WO2014169537A1 - 像素电路、像素电路驱动方法及显示装置 - Google Patents

像素电路、像素电路驱动方法及显示装置 Download PDF

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Publication number
WO2014169537A1
WO2014169537A1 PCT/CN2013/078920 CN2013078920W WO2014169537A1 WO 2014169537 A1 WO2014169537 A1 WO 2014169537A1 CN 2013078920 W CN2013078920 W CN 2013078920W WO 2014169537 A1 WO2014169537 A1 WO 2014169537A1
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Prior art keywords
transistor
pixel circuit
terminal
control signal
signal terminal
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
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PCT/CN2013/078920
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English (en)
French (fr)
Inventor
青海刚
祁小敬
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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BOE Technology Group Co Ltd
Chengdu BOE Optoelectronics Technology Co Ltd
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Priority to US14/368,863 priority Critical patent/US9466242B2/en
Publication of WO2014169537A1 publication Critical patent/WO2014169537A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416—Control or interface arrangements specially adapted for digitisers
    • G06F3/0418—Control or interface arrangements specially adapted for digitisers for error correction or compensation, e.g. based on parallax, calibration or alignment
    • G06F3/04184—Synchronisation with the driving of the display or the backlighting unit to avoid interferences generated internally
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing

Definitions

  • Pixel circuit, pixel circuit driving method and display device
  • the present disclosure relates to the field of organic light emitting display technologies, and in particular, to a pixel circuit, a driving method for driving the pixel circuit, and a display device including the pixel circuit.
  • AMOLED Active Matrix/Organic Light Emitting Diode
  • the active matrix organic light emitting diode is driven to emit light by a pixel circuit.
  • the conventional 2T1C pixel circuit is composed of two transistors (TFT) and one capacitor (C), as shown in FIG. 1 : including a driving transistor DTFT, a switching transistor T5, and a storage capacitor C st .
  • the switching transistor T5 is controlled by the scan line signal V scan for controlling the input of the data voltage V data
  • the driving transistor DTFT is used for controlling the light emission of the organic light emitting diode (OLED)
  • the storage capacitor C st is used for the driving transistor DTFT
  • the gate provides a sustain voltage.
  • FIG. 2 it is a driving timing chart of the 2T1C pixel circuit shown in FIG. 1.
  • the working process of the 2T1C pixel circuit is: when the scan signal is low level, the switching transistor T5 is turned on, the gray scale voltage on the data line charges the storage capacitor C st , and the data voltage V data acts on the driving transistor On the gate of the DTFT, the driving transistor DTFT is operated in a saturated state to drive the organic light emitting diode OLED to emit light.
  • the switching transistor T5 is turned off, and the storage capacitor C st supplies a sustain voltage to the gate of the driving transistor DTFT, so that the driving transistor DTFT is still in a saturated state, so that the OLED continues to emit light.
  • threshold voltage V th of the transistor are hook poor in conventional low-temperature polysilicon process technology, but also in the course also occur threshold voltage shift, such that when the input the same data voltage V data to the drive transistor the DTFT, the drive The threshold voltage of the transistor DTFT is different to generate different driving currents, resulting in uniform brightness of the AMOLED panel. Poor sex.
  • An object of the present disclosure is to provide a pixel circuit capable of compensating for threshold voltage drift of a driving transistor to improve uniformity of brightness of an OLED display panel. Further, the present disclosure does not increase circuit structure and operational complexity, but also in the above pixel.
  • the touch circuit is perfectly integrated in the circuit.
  • the present disclosure also provides a driving method for driving the above pixel circuit and a display device including the above pixel circuit to improve display quality of the display device.
  • a pixel circuit including an electroluminescent element, a driving transistor, a first switching unit, a compensation unit, a blocking unit, and a storage capacitor;
  • the first switch unit is configured to control writing of a data voltage of the data line, the first end of the first switch unit is connected to the first end of the storage capacitor, and the second end is connected to the data line;
  • a second end of the storage capacitor is respectively connected to a gate of the driving transistor and a first end of the compensation unit;
  • the compensation unit is configured to pre-store a threshold voltage of the driving transistor to the storage capacitor, and a second end of the compensation unit is connected to a drain of the driving transistor;
  • the source of the driving transistor is connected to the power terminal, and the drain is connected to the first end of the blocking unit;
  • the blocking unit is configured to block electrical connection between the driving transistor and the electroluminescent element, and the second end of the blocking unit is connected to the first end of the electroluminescent element;
  • the second end of the electroluminescent element is connected to the ground.
  • the electroluminescent element is an organic light emitting diode
  • the first switching unit is a first switching transistor
  • the compensation unit is a compensation transistor
  • the blocking unit is a blocking crystal.
  • a gate of the first switching transistor is connected to the first scan signal end, a source is connected to the first end of the storage capacitor, and a drain is connected to the data line;
  • a second end of the storage capacitor is respectively connected to a gate of the driving transistor and a drain of the compensation transistor;
  • a gate of the compensation transistor is connected to the first scan signal end, and a source is connected to a drain of the driving transistor;
  • the source of the driving transistor is connected to the power terminal, and the drain is connected to the source of the blocking transistor;
  • a gate of the blocking transistor is connected to the second control signal end, and a drain is connected to an anode of the organic light emitting diode;
  • the cathode of the organic light emitting diode is connected to the ground.
  • the second switching transistor is further included; the gate of the second switching transistor is connected to the first control signal terminal, the source is connected to the first end of the storage capacitor, and the drain is connected to the reference voltage terminal.
  • the pixel circuit is further connected to the touch circuit, and the touch circuit includes a charging transistor, a coupling capacitor, a sensing electrode, an amplifying transistor, a third switching transistor, a second scanning signal end, and an sensing line;
  • the gate of the charging transistor is connected to the third control signal end, the source is connected to the second end of the storage capacitor, and the drain is respectively connected to the first end of the coupling capacitor, the sensing electrode and the gate of the amplifying transistor ;
  • the second end of the coupling capacitor is connected to the first control signal end
  • a source of the amplifying transistor is connected to the power terminal, and a drain is connected to a source of the third switching transistor;
  • the gate of the third switching transistor is connected to the second scan signal terminal, and the drain is connected to the sensing line.
  • the third control signal end is the first scan signal end.
  • all of the transistors have the same channel type.
  • the embodiment of the present disclosure further provides a driving method for driving the pixel circuit, including the steps of: S1. applying a scan signal to the first scan signal terminal to turn on the first switching transistor and the compensation transistor, where a control signal terminal and a second control signal terminal apply a control signal to turn off the second switching transistor and the blocking transistor, so that the threshold voltage of the driving transistor is And writing a data voltage on the data line to the storage capacitor;
  • the method further includes:
  • step S1 further includes:
  • a scan signal applied to the first scan signal end turns on the charge transistor, a scan signal is applied to the second scan signal end to turn off the third switch transistor, and the power supply terminal passes through the drive transistor and the charge transistor Charging the coupling capacitor;
  • the step S2 further includes:
  • a scan signal applied to the first scan signal end turns off the charge transistor, and a scan signal is applied to the second scan signal terminal to turn on the third switch transistor; and the current on the sense line is monitored.
  • Embodiments of the present disclosure also provide a display device including any of the above pixel circuits.
  • the pixel circuit provided by the embodiment of the present disclosure blocks the electrical connection between the drain of the driving transistor and the organic light emitting diode by blocking the transistor when writing data to the storage capacitor, and prestores the threshold voltage and the data voltage signal of the driving transistor through the storage capacitor.
  • the threshold voltage drift is effectively compensated to ensure the uniformity and stability of the drive current.
  • the touch circuit multiplexes the scan signal of the pixel circuit, and charges the coupling capacitor in the touch circuit through the charging transistor while charging the storage capacitor, thereby not increasing the circuit structure and the operation complexity. At the same time, the integration of the touch circuit in the pixel circuit is perfectly realized.
  • FIG. 1 is a schematic structural view of a pixel circuit in the prior art
  • FIG. 2 is a driving timing chart of the pixel circuit shown in FIG. 1;
  • 3 is a schematic block diagram of a pixel circuit in Embodiment 1 of the present disclosure;
  • FIG. 4 is a schematic structural diagram of a pixel circuit in Embodiment 1 of the present disclosure.
  • Figure 5 is a timing chart of driving of the pixel circuit shown in Figure 4.
  • FIG. 6 is a schematic diagram showing an equivalent circuit structure of the pixel circuit shown in FIG. 4 in a stage
  • FIG 7 is a diagram showing an equivalent circuit configuration of the pixel circuit shown in FIG 4 in the phase t 2;
  • FIG 8 is a pixel circuit shown in FIG. 4 is a schematic equivalent circuit of the phase t 3;
  • FIG 9 is a pixel circuit shown in FIG. 4 is a schematic equivalent circuit of the phase T 4;
  • FIG. 10 is a schematic structural diagram of a pixel circuit in Embodiment 2 of the present disclosure.
  • Figure 11 is a timing chart of driving of the pixel circuit shown in Figure 10;
  • FIG 12 is a diagram showing an equivalent circuit configuration of the pixel circuit shown in FIG 10 ⁇ phase
  • FIG. 13 is a diagram showing an equivalent circuit configuration of the pixel circuit shown in FIG 10 in the phase t 2
  • FIG. 14 is a pixel 10 shown in FIG. a schematic equivalent circuit of the circuit at t stage 3
  • FIG. 15 is a diagram showing an equivalent circuit configuration of the pixel circuit shown in FIG. 4 of t at stage 10
  • FIG. 16 is an equivalent circuit of the pixel shown in FIG. 5 stage 10 at t Schematic diagram of the circuit structure.
  • the pixel circuit in the present disclosure includes an electroluminescent element, a driving transistor, a first switching unit, a compensation unit, a blocking unit, and a storage capacitor; the first switching unit is configured to control writing of a data voltage of the data line
  • the first end of the first switching unit is connected to the first end of the storage capacitor, and the second end is connected to the data line; the second end of the storage capacitor is respectively connected to the gate of the driving transistor and the first end of the compensation unit;
  • the unit is configured to pre-store a threshold voltage of the driving transistor to the storage capacitor, the second end of the compensation unit is connected to the drain of the driving transistor; the source of the driving transistor is connected to the power terminal, and the drain is connected to the first end of the blocking unit;
  • the unit is configured to block electrical connection between the driving transistor and the electroluminescent element, the second end of the blocking unit is coupled to the first end
  • the specific structure of the pixel circuit in this embodiment may be as shown in FIG. 4, including a driving transistor DTFT and a storage capacitor C st , the electroluminescent element is an organic light emitting diode OLED, the first switching unit is a first switching transistor T5, and compensation Unit
  • the compensation transistor T2 is a blocking transistor ⁇ 3, further includes a power terminal V DD and a ground terminal V ss , the first scanning signal terminal provides a scanning signal to turn on or off the first switching transistor T5 and the compensation transistor T2, the data line Data Line writes a data voltage signal to the pixel through the first switching transistor T5.
  • the gate of the first switching transistor T5 is connected to the first scanning signal terminal, the source is connected to the first end of the storage capacitor C st , the drain is connected to the data line Data Line , and the scanning signal is provided at the first scanning signal terminal.
  • the first switching transistor T5 provided in the data lines data line data voltage signal by the storage capacitor C st to hold the storage capacitor C st voltage; a storage capacitor C st and the second terminal of the driving transistor and the compensating transistor the gate of the DTFT
  • the drain of T2 is connected.
  • the gate of the compensation transistor T2 is connected to the first scanning signal terminal, the source is connected to the drain of the driving transistor DTFT, the source of the driving transistor DTFT is connected to the power supply terminal V DD , and the drain is connected to the source of the blocking transistor T3.
  • the compensation transistor T2 Under the control of the scan signal provided by the first scan signal terminal, the compensation transistor T2 is turned on, and the gate and drain of the driving transistor DTFT are connected to form a diode connection to ensure that the driving transistor DTFT is in the saturation current region, at the power terminal V DD under it is driven through the drive transistor DTFT to the method of the storage capacitor C st charge of the driving transistor DTFT threshold voltage of the storage capacitor C st, the purpose of compensating the threshold voltage; driving transistor DTFT by the storage capacitor C st stores voltage Controlled to be turned on or off, the current flowing through the driving transistor DTFT is controlled by the voltage stored on the storage capacitor C st .
  • the gate of the blocking transistor T3 is connected to the second control signal end, the drain is connected to the anode of the organic light emitting diode OLED, and the cathode of the organic light emitting diode OLED is connected to the ground end, under the control of the control signal provided by the second control signal terminal, Turning off or blocking the transistor T3, when writing the data voltage signal of the data line Data Line to the pixel circuit, the transistor T3 is turned off to prevent: the current flowing through the organic light emitting diode OLED after the blocking transistor T3 is turned on, resulting in the storage capacitor C St cannot store the threshold voltage and data voltage of the driving transistor DTFT, and also causes the organic light emitting diode OLED to display flicker.
  • the pixel circuit in this embodiment may further include a second switching transistor T6.
  • the gate of the second switching transistor T6 is connected to the first control signal end, the source is connected to the first end of the storage capacitor C st , and the drain and the reference voltage end are connected.
  • the second switching transistor is turned on, and the potential signal of the reference voltage terminal is supplied to the storage capacitor C st to clamp the potential of the gate end of the driving tube to prevent the potential from being affected by noise. Interference causes fluctuations.
  • the pixel circuit in this embodiment can be compatible with a voltage amplitude modulated data driving chip, or Compatible with pulse width modulated data driving chip for first scanning signal end, data line
  • the Data Line, the first control signal terminal and the second control signal terminal provide the required voltage signal.
  • CMOS Complementary Metal Oxide Semiconductor
  • the OLED display will not be described here.
  • a driving method for driving the pixel circuit is also provided in the embodiment of the present disclosure, and a driving timing diagram thereof is shown in FIG. 5.
  • a driving timing diagram thereof is shown in FIG. 5.
  • voltage change signal G (n) the data line data line data voltage V data, a first control signal terminal of the voltage control signal CTR (n) and the second control signal terminal of the voltage control signal EM (n) is.
  • the storage capacitor C st needs to be discharged to eliminate the influence of the previous frame data, that is, the timing segment ⁇ .
  • the driving method mainly includes compensating the threshold voltage phase of the driving transistor DTFT (ie, the t 2 timing segment) and the driving display phase (ie, the timing segment t 3 and the timing segment t 4 ), and the writing data is completed in the compensation phase. .
  • the compensating transistor T2 and the driving transistor DTFT pre-store the threshold voltage of the driving transistor DTFT and the data voltage V data of the data line Data line in the storage capacitor C st under the control of the multi-level voltage signal.
  • the storage capacitor C st maintains the threshold voltage and the data voltage V data unchanged during the driving display timing period.
  • the timing circuit equivalent circuit diagram is as shown in FIG. 6; in the timing segment, the scan signal voltage G(n) of the first scan signal end and the control voltage signal EM(n) of the second control signal end are low level, first The switching transistor T5, the blocking transistor ⁇ 3, and the compensating transistor ⁇ 2 are turned on, the control signal voltage CTR(n) of the first control signal terminal is high level, the second switching transistor T6 is turned off, and the gate and the drain of the driving transistor DTFT are connected to form a diode-connected, the storage capacitor C st is discharged through the compensating transistor T2.
  • This timing segment is a reset phase and is used to eliminate the residual voltage signal of the previous phase.
  • the equivalent circuit diagram of the timing section is as shown in FIG. 7; in this timing section, the organic light emitting diode OLED In the off state, an initial voltage approximately equal to the threshold voltage of the driving transistor DTFT and a data voltage V data of the data line Data Line are previously stored in the storage capacitor C st .
  • the scan signal voltage G(n) of the first scan signal terminal is maintained at a low level, so that the switch transistor and the compensation transistor T2 are in an on state, and the first control signal is The control signal voltage CTR(n) of the terminal maintains a high level, the control signal voltage EM(n) of the second control signal jumps to a high level, and the blocking transistor T3 is turned off.
  • the driving transistor DTFT Since the driving transistor DTFT is diode-connected, the driving transistor DTFT is guaranteed to operate in the current saturation region, and the power supply terminal V DD supplies a stable driving current through the driving transistor DTFT to charge the storage capacitor c st until the potential at the point g rises to ⁇ ⁇ - ⁇ ⁇ ⁇ , ⁇ ⁇ is the threshold voltage of the driving tube. At this time, the driving transistor DTFT is turned off. Since the voltage signal on the data line is V data at this stage, the voltage across the storage capacitor C st is V DD -IV thd lV data ; The second switching transistor T6 is in an off state such that the reference potential cannot reach the first end of the storage capacitor.
  • the timing circuit equivalent circuit diagram is as shown in FIG. 8; in the timing section, the control voltage signal CTR(n) of the first control signal terminal and the control signal voltage EM(n) of the second control signal terminal remain unchanged, the first scan The scanning signal voltage G(n) of the signal terminal jumps to a high level, and the first switching transistor T5 and the compensation transistor T2 are turned off; although the driving transistor DTFT is no longer a diode connection, the potential of each point remains unchanged.
  • the timing segment is an isolation phase to avoid simultaneous input of signals causing noise input. It should be understood that the isolation timing segment t 3 is only a preferred mode in this embodiment, which may also be completed in the following timing segment t 4 .
  • the equivalent circuit diagram of the timing section is as shown in FIG. 9; in this timing section, the organic light emitting diode OLED is in an on state, and the voltage stored in the storage capacitor C st drives the display of the organic light emitting diode OLED.
  • the scan signal voltage G(n) of the first scan signal terminal maintains the high level V GH unchanged, so that the first switching transistor T5 and the compensation transistor T2 are in an off state, and the control signal voltage CTR(n) of the first control signal end is Jumping to a low level V GL , the control signal voltage EM(n) of the second control signal terminal jumps to a low level, and the blocking transistor T3 and the second switching transistor T6 are turned on, causing the m point potential to jump to a potential V rcf , the organic light emitting diode OLED is in an on state; since the gate of the driving transistor DTFT is in a floating state, the gate potential of the driving transistor DTFT also jumps to:
  • V g V DD -IVth d l+V rcr V data ;
  • the gate-to-source voltage of the driving transistor DTFT is:
  • the driving transistor DTFT is in a saturated state, which is an organic light emitting diode OLED Provides stable drive current, organic light-emitting diode
  • K (V data -V ref ) 2 , K is a constant related to the process and drive design. It can be seen that the drive current I. The LED has no relationship with the threshold voltage of the driving transistor DTFT, and the drift of the threshold voltage of the driving transistor DTFT does not affect the drain current (ie, the driving current of the pixel circuit: I. led ).
  • the present disclosure also perfectly integrates the touch circuit in the pixel circuit.
  • the pixel circuit described in the first embodiment is used as an example, and the pixel circuit in the embodiment is shown in FIG.
  • the touch circuit integrated in the above pixel circuit is further included
  • the touch circuit includes a charging transistor T4, a coupling capacitor C P , a sensing electrode Sense Electrode, an amplifying transistor ATFT, and a third switching transistor T1.
  • the gate of the charging transistor ⁇ 4 is connected to the third control signal terminal, the source is connected to the second terminal of the storage capacitor C st , the first end of the drain and coupling capacitor C P , the sensing electrode Sense Electrode and the gate of the amplification transistor ATFT Connected, under the control of the control signal provided by the third control signal terminal, the charging transistor T4 is turned on, while the power supply terminal V DD charges the storage capacitor C st , and also provides the driving voltage for the coupling capacitor C P and is coupled by the coupling capacitor C P maintains this voltage.
  • the second end of the coupling capacitor C P is connected to the first control signal end.
  • the source of the amplifying transistor ATFT is connected to the power supply terminal V DD , and the drain is connected to the source of the third switching transistor T1 , and is mainly used for amplifying the touch signal of the finger.
  • the gate of the third switching transistor T1 is connected to the second scanning signal terminal, and the drain is connected to the sensing line Sense Line. Under the control of the control signal provided by the second scanning signal terminal, the third switching transistor T1 is turned on, and will be amplified.
  • the touch signal is transmitted to the sensing line Sense Line, and the touch information can be obtained by detecting the signal change in the sensing line Sense Line.
  • the third control signal end may be the first scan signal end; and the coupling capacitor C P in the touch circuit is charged by multiplexing the scan signal in the pixel circuit, without adding a circuit.
  • the structural and operational complexity simultaneously achieves the integration of the touch circuit in the pixel circuit.
  • the data driving chip of the pixel circuit in this embodiment does not need to provide a special control signal for the touch circuit, and the circuit structure is completed, and the process flow is completed.
  • a driving method for driving the pixel circuit is further provided, and a driving timing diagram thereof is shown in FIG. 11, in which a first scan in one frame operation timing is illustrated.
  • Scan signal voltage G(n) at the signal end scan signal voltage G(n+2) at the second scan signal end, data voltage V data of the data line Data Line, control signal voltage CTR(n) at the first control signal end, and second Controls the change in the control signal voltage EM(n) at the signal terminal.
  • the timing circuit equivalent circuit diagram is as shown in FIG. 12; in the timing segment, the scan signal voltage G(n) of the first scan signal terminal and the control voltage signal EM(n) of the second control signal terminal are low level, first The switching transistor T5, the blocking transistor ⁇ 3, the compensating transistor ⁇ 2, and the charging transistor ⁇ 4 are turned on, and the control signal voltage CTR(n) of the first control signal terminal and the scanning signal voltage G(n+2) of the second scanning signal terminal are at a high level.
  • the second switching transistor T6 and the third switching transistor T1 are turned off, the gate and the drain of the driving transistor DTFT are connected to form a diode connection, the storage capacitor C st is discharged through the compensation transistor T2, and the coupling capacitor C P passes through the charging transistor T4 and the compensation transistor. T2 discharge, the potential at point p is V CH .
  • This timing segment is a reset phase and is used to eliminate the residual voltage signal of the previous phase.
  • the timing circuit equivalent circuit diagram is as shown in FIG. 13; in this timing section, the organic light emitting diode OLED is in an off state, and an initial voltage and a data line Data Line approximately equal to the threshold voltage of the driving transistor DTFT are previously stored in the storage capacitor C st .
  • the data voltage V data is simultaneously charged to the coupling capacitor C P .
  • the scan signal voltage G(n) of the first scan signal terminal is maintained at a low level, so that the first switching transistor T5 and the compensation transistor T2 are in an on state,
  • the control signal voltage CTR(n) of a control signal terminal and the scan signal voltage G(n+2) of the second scan signal terminal remain at a high level, and the control signal voltage EM(n) of the second control signal terminal jumps to a high level.
  • the blocking transistor T3 is turned off.
  • the driving transistor DTFT Since the driving transistor DTFT is diode-connected, the driving transistor DTFT is guaranteed to operate in the current saturation region, and the power supply terminal V DD charges the storage capacitor C st through the driving transistor DTFT until the potential of the point g rises to V DD -IVth d l, p point The potential is also charged to V DD -IV thd l, ⁇ ⁇ is the threshold voltage of the driving transistor. At this time, the driving transistor DTFT is turned off. Since the voltage signal on the data line is V data at this stage, the voltage across the storage capacitor C st is V DD -IVth d lV data ; The voltage across the coupling capacitor C P is V DD -IVth d lV G H . Since the off-off transistor T3 is in an off state, thereby causing the organic light emitting diode OLED to be in an off state, preventing current from flowing through the organic light emitting diode OLED results in an incorrect display.
  • Isolated timing segment t 3 The equivalent circuit diagram of the timing section is as shown in FIG. 14; in the timing section, the control voltage signal CTR(n) of the first control signal terminal and the control signal voltage EM(n) of the second control signal terminal remain unchanged, the first scan The scanning signal voltage G(n) of the signal terminal jumps to a high level, and the first switching transistor T5 and the compensation transistor T2 are turned off; although the driving transistor DTFT is no longer a diode connection, the potential of each point remains unchanged.
  • the timing segment is an isolation phase to avoid simultaneous input of signals causing noise input. It should be understood that the isolation timing segment t 3 is only a preferred mode in this embodiment, which may also be completed in the following timing segment t 4 .
  • the equivalent circuit diagram of the timing section is as shown in FIG. 15; in the timing section, the organic light emitting diode OLED is in an on state, and the voltage stored in the storage capacitor C st drives the organic light emitting diode OLED display, and the gate potential of the amplifying transistor ATFT The touch information is reflected in it.
  • the scan signal voltage G(n) of the first scan signal terminal is maintained at a high level, so that the first switching transistor T5, the compensating transistor ⁇ 2, and the charging transistor ⁇ 4 are in an off state, and the scanning signal voltage G at the second scanning signal end ( n+2) also maintains a high level, so that the third switching transistor T1 is in an off state, and the control signal voltage CTR(n) of the first control signal jumps to a low level, so that the second switching transistor T6 is turned on.
  • the driving transistor DTFT is in a saturated state, providing a stable driving current for the organic light emitting diode OLED, and the driving current of the organic light emitting diode OLED:
  • the gate potential of the amplifying transistor ATFT is also pulled down from V DD -IV thd l through the coupling capacitor C P .
  • the specific pull-down potential is as follows: if there is a finger touch, a sensing capacitance C F is formed between the sensing electrode Sense Electrode and the finger, Therefore, the gate potential of the amplifying transistor ATFT is: [V DD - IVth d l - (V G HV GL )] X Cp / (C P + C F ); if there is no finger touch, the gate potential of the amplifier ATFT is : V DD - IVth d l-(V CH - V C L) ; Since the third switching transistor T1 is in an off state at this stage, the drain of the amplifying transistor ATFT is open, and no current flows.
  • the timing circuit equivalent circuit diagram is as shown in FIG. 16; in the timing segment, the scan signal voltage G(n+2) of the second scan signal terminal jumps downward, and the third switch transistor T1 is turned on, the first scan The scanning signal voltage G(n) at the signal terminal, the control voltage signal CTR(n) at the first control signal terminal, and the control voltage signal EM(n) at the second control signal terminal remain unchanged. If there is a finger touch, the gate-source voltage V sg of the amplifying transistor ATFT is:
  • ⁇ ⁇ is the threshold voltage of the driving transistor
  • Vth a is the threshold voltage of the amplifying transistor ATFT
  • K a is a constant related to the process and design of the amplifying transistor ATFT.
  • the gate-source voltage V sg of the amplifying transistor ATFT is:
  • the magnitude of the induced current through the sense line Sense Line is:
  • a display device including the above pixel circuit.
  • the display device includes a plurality of pixel unit arrays, and each pixel unit corresponds to any pixel in the above embodiment. Circuit. Since the pixel circuit compensates for the threshold voltage drift of the driving transistor, the display of the organic light emitting diode is stable and does not flicker, thereby ensuring the display quality of the organic light emitting display device; meanwhile, the scanning circuit multiplexes the scanning of the pixel circuit in the present invention.
  • the signal charges the coupling capacitor in the touch circuit through the charging transistor while charging the storage capacitor, which perfectly integrates the touch circuit in the pixel circuit, integrates the display and the touch function, and uses a process flow It can be completed without dividing into two process flows, so it not only has the advantage of low cost, but also enables the process to be single and the display device to be lighter and thinner.

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Abstract

一种像素电路、驱动该像素电路的驱动方法以及包括该像素电路的显示装置。该像素电路在向存储电容（Cst）写入数据时通过隔断晶体管（T3）阻断驱动晶体管（DTFT）的漏极与有机发光二极管（OLED）的电连接，并通过存储电容（Cst）预存驱动晶体管（DTFT）的阈值电压和数据电压（Vdata）信号，对阈值电压漂移进行补偿，保证了驱动电流的均匀性和稳定性。进一步的，触控电路复用像素电路的扫描信号，并在为存储电容（Cst）充电的同时通过充电晶体管（T4）为触控电路中的耦合电容（Cp）充电，实现了触控电路在像素电路中的集成。

Description

像素电路、 像素电路驱动方法及显示装置 技术领域
本公开涉及有机发光显示技术领域， 具体涉及一种像素电路、 驱动该像 素电路的驱动方法以及包括该像素电路的显示装置。 背景技术
相比传统的液晶面板， AMOLED ( Active Matrix/Organic Light Emitting Diode, 有源矩阵有机发光二极管）面板具有反应速度更快、 对比度更高、 视 角更广等特点， 因此， AMOLED得到了显示装置开发商日益广泛的关注。
有源矩阵有机发光二极管由像素电路驱动发光。 传统的 2T1C像素电路 由两个晶体管 (TFT)和一个电容 (C)组成， 具体如图 1 中所示： 包括驱动晶体 管 DTFT、 开关晶体管 T5，以及存储电容 Cst。 其中， 开关晶体管 T5，由扫描线 信号 Vscan控制， 以用于控制数据电压 Vdata的输入， 驱动晶体管 DTFT用于控 制有机发光二极管 (OLED)的发光， 存储电容 Cst用于为驱动晶体管 DTFT的 栅极提供维持电压。
如图 2中所示， 其为图 1所示 2T1C像素电路的驱动时序图。 该 2T1C像 素电路的工作过程为： 当扫描信号为低电平时， 开关晶体管 T5，导通， 数据 ( data )线上的灰阶电压对存储电容 Cst充电， 同时数据电压 Vdata作用在驱动 晶体管 DTFT的栅极上， 使驱动晶体管 DTFT工作在饱和状态下， 驱动有机 发光二极管 OLED发光。 当扫描信号为高电平时， 开关晶体管 T5，截止， 存 储电容 Cst为驱动晶体管 DTFT的栅极提供维持电压， 使驱动晶体管 DTFT仍 处于饱和状态， 从而使 OLED持续发光。
由上述可知， AMOLED中的 OLED能够发光是由驱动晶体管 DTFT工作 在饱和状态时所产生的驱动电流驱动的， 具体而言驱动电流（即流过 OLED 的电路 )IOIjED = K(Vgs-IVthdl)2, 其中 Vgs为驱动晶体管 DTFT的栅极和源极之间 的电压差， IVthdl为驱动晶体管 DTFT的阈值电压， K为与驱动晶体管 DTFT 自身结构和工艺有关的常数。 因为在现有的低温多晶硅工艺制程中晶体管的 阈值电压 Vth均勾性较差， 而且在使用过程中还会发生阈值电压漂移， 这样 当向驱动晶体管 DTFT输入相同数据电压 Vdata时， 由于驱动晶体管 DTFT的 阈值电压不同而产生不同的驱动电流， 从而导致 AMOLED 面板亮度的均匀 性较差。
近年来， 触控功能在各种显示面板尤其是移动显示中的应用越来越广， 几乎成了智能手机的标准配置， 现有技术中是将显示面板和触摸面板（ Touch Screen Panel, TSP )分开制作， 然后再进行贴合。 这样的工艺流程使得实现 显示功能和触摸功能的面板工艺复杂， 成本高， 也不利于显示触摸面板的轻 薄化。 TSP in cell技术则是将显示功能和触控功能进行整合， 使用一道工艺 流程即可完成， 而不用分成两道流程， 因此不仅拥有低成本的优势， 还能使 得工艺筒单， 使得显示触摸面板更加轻薄。 但是对于如何完美将触控电路与 像素电路集成， 目前还没有很好的解决方案。 发明内容
本公开的目的在于提供一种能够补偿驱动晶体管阈值电压漂移的像素电 路， 以提高 OLED显示面板亮度的均匀性； 进一步的， 本公开还在不增加电 路结构和操作复杂性的同时， 在上述像素电路中完美的集成了触控电路。
本公开还提供了一种驱动上述像素电路的驱动方法以及包括上述像素电 路的显示装置， 以提高显示装置的显示质量。
根据本公开实施例， 提供了一种像素电路， 包括电致发光元件、 驱动晶 体管、 第一开关单元、 补偿单元、 隔断单元以及存储电容；
所述第一开关单元用于控制数据线的数据电压的写入， 所述第一开关单 元的第一端与所述存储电容的第一端连接、 第二端与所述数据线连接；
所述存储电容的第二端分别与所述驱动晶体管的栅极以及所述补偿单元 的第一端连接；
所述补偿单元用于向所述存储电容预先存储所述驱动晶体管的阈值电 压， 所述补偿单元的第二端与所述驱动晶体管的漏极连接；
所述驱动晶体管的源极与电源端连接、 漏极与所述隔断单元的第一端连 接；
所述隔断单元用于隔断所述驱动晶体管与电致发光元件的电连接， 所述 隔断单元的第二端与所述电致发光元件的第一端连接；
所述电致发光元件的第二端与接地端连接。
在一个示例中， 所述电致发光元件为有机发光二极管， 所述第一开关单 元为第一开关晶体管， 所述补偿单元为补偿晶体管， 所述隔断单元为隔断晶 体管；
所述第一开关晶体管的栅极与第一扫描信号端连接、 源极与所述存储电 容的第一端连接、 漏极与所述数据线连接；
所述存储电容的第二端分别与所述驱动晶体管的栅极以及补偿晶体管的 漏极连接；
所述补偿晶体管的栅极与第一扫描信号端连接、 源极与所述驱动晶体管 的漏极连接；
所述驱动晶体管的源极与电源端连接、 漏极与所述隔断晶体管的源极连 接；
所述隔断晶体管的栅极与第二控制信号端连接、 漏极与所述有机发光二 极管的阳极连接；
所述有机发光二极管的阴极与接地端连接。
在一个示例中， 还包括第二开关晶体管； 所述第二开关晶体管的栅极与 第一控制信号端、 源极与所述存储电容的第一端连接、 漏极与参考电压端连 接。
在一个示例中， 所述像素电路还与触控电路连接， 所述触控电路包括充 电晶体管、 耦合电容、 感应电极、 放大晶体管、 第三开关晶体管、 第二扫描 信号端以及感应线；
所述充电晶体管的栅极与第三控制信号端连接、 源极与所述存储电容的 第二端连接、 漏极分别与所述耦合电容的第一端、 感应电极以及放大晶体管 的栅极连接；
所述耦合电容的第二端与第一控制信号端连接；
所述放大晶体管的源极与电源端连接、 漏极与所述第三开关晶体管的源 极连接；
所述第三开关晶体管的栅极与第二扫描信号端连接、漏极与感应线连接。 在一个示例中， 所述第三控制信号端为所述第一扫描信号端。
在一个示例中， 所有所述晶体管均具有相同的沟道类型。
本公开实施例还提供了一种驱动上述像素电路的驱动方法， 包括步骤： S1. 在所述第一扫描信号端施加扫描信号以导通所述第一开关晶体管以 及补偿晶体管， 在所述第一控制信号端以及第二控制信号端施加控制信号以 截止所述第二开关晶体管以及隔断晶体管， 使所述驱动晶体管的阈值电压以 及数据线上的数据电压写入所述存储电容；
S2. 在所述第一扫描信号端施加扫描信号以截止所述第一开关晶体管 以及补偿晶体管， 在所述第一控制信号端以及第二控制信号端施加控制信号 以导通所述第二开关晶体管以及隔断晶体管， 利用存储在所述存储电容中的 电压驱动所述有机发光二极管发光。
在一个示例中， 所述步骤 S1之前还包括：
在所述第一扫描信号端施加扫描信号以及在所述第二控制信号端施加控 制信号以导通所述第一开关晶体管、 补偿晶体管、 隔断晶体管以及充电晶体 管， 在所述第一控制信号端施加控制信号以及在所述第二扫描信号端施加扫 描信号以截止所述第二开关晶体管以及第三开关晶体管， 重置所述存储电容 以及耦合电容。
在一个示例中， 所述步骤 S1中还包括：
施加在所述第一扫描信号端的扫描信号导通所述充电晶体管， 在所述第 二扫描信号端施加扫描信号以截止所述第三开关晶体管， 所述电源端通过所 述驱动晶体管以及充电晶体管为所述耦合电容充电；
所述步骤 S2中还包括：
施加在所述第一扫描信号端的扫描信号截止所述充电晶体管， 在所述第 二扫描信号端施加扫描信号导通所述第三开关晶体管； 监测所述感应线上的 电流变 4匕。
本公开实施例还提供了一种包括上述任一种像素电路的显示装置。
本公开实施例所提供的像素电路在向存储电容写入数据时通过隔断晶体 管阻断驱动晶体管的漏极与有机发光二极管的电连接， 并通过存储电容预存 驱动晶体管的阈值电压和数据电压信号， 对阈值电压漂移进行了有效的补 偿， 保证了驱动电流的均勾性和稳定性。 进一步的， 本公开实施例中触控电 路复用像素电路的扫描信号， 并在为存储电容充电的同时通过充电晶体管为 触控电路中的耦合电容充电， 因此， 在不增加电路结构和操作复杂性的同 时， 完美的实现了触控电路在像素电路中的集成。 附图说明
图 1是现有技术中像素电路的结构示意图；
图 2是图 1中所示像素电路的驱动时序图； 图 3是本公开实施例一中的像素电路的示意性框图；
图 4是本公开实施例一中的像素电路的结构示意图；
图 5是图 4中所示像素电路的驱动时序图；
图 6是图 4中所示像素电路在 ^阶段的等效电路结构示意图；
图 7是图 4中所示像素电路在 t2阶段的等效电路结构示意图；
图 8是图 4中所示像素电路在 t3阶段的等效电路结构示意图；
图 9是图 4中所示像素电路在 t4阶段的等效电路结构示意图；
图 10是本公开实施例二中像素电路的结构示意图；
图 11是图 10中所示像素电路的驱动时序图；
图 12是图 10中所示像素电路在 ^阶段的等效电路结构示意图； 图 13是图 10中所示像素电路在 t2阶段的等效电路结构示意图； 图 14是图 10中所示像素电路在 t3阶段的等效电路结构示意图； 图 15是图 10中所示像素电路在 t4阶段的等效电路结构示意图； 图 16是图 10中所示像素电路在 t5阶段的等效电路结构示意图。 具体实施方式
下面结合附图和实施例， 对本公开实施例的具体实施方式做进一步描 述。 以下实施例仅用于说明本公开， 但不用来限制本公开的范围。
实施例一
本实施例中以共阴极的有机发光二极管显示器的像素电路结构为例进行 说明。 本公开中的像素电路如图 3 中所示， 包括电致发光元件、 驱动晶体 管、 第一开关单元、 补偿单元、 隔断单元以及存储电容； 第一开关单元用于 控制数据线的数据电压的写入， 第一开关单元的第一端与存储电容的第一端 连接、 第二端与数据线连接； 存储电容的第二端分别与驱动晶体管的栅极以 及补偿单元的第一端连接； 补偿单元用于向存储电容预先存储驱动晶体管的 阈值电压， 补偿单元的第二端与驱动晶体管的漏极连接； 驱动晶体管的源极 与电源端连接、 漏极与隔断单元的第一端连接； 隔断单元用于隔断驱动晶体 管与电致发光元件的电连接， 隔断单元的第二端与电致发光元件的第一端连 接； 电致发光元件的第二端与接地端连接。 本实施例中的像素电路的具体结 构可以如图 4中所示， 包括驱动晶体管 DTFT以及存储电容 Cst, 电致发光元 件为有机发光二极管 OLED, 第一开关单元为第一开关晶体管 T5、 补偿单元 为补偿晶体管 T2、 隔断单元为隔断晶体管 Τ3, 还包括电源端 VDD以及接地 端 Vss, 第一扫描信号端提供扫描信号来导通或者截止第一开关晶体管 T5以 及补偿晶体管 T2, 数据线 Data Line通过第一开关晶体管 T5向像素中写入数 据电压信号。
第一开关晶体管 T5的栅极与第一扫描信号端连接、 源极与存储电容 Cst 的第一端连接、 漏极与数据线 Data Line 连接， 在第一扫描信号端提供的扫 描信号的控制下， 第一开关晶体管 T5向存储电容 Cst提供数据线 Data Line 的数据电压信号并由存储电容 Cst保持该电压； 存储电容 Cst的第二端分别与 驱动晶体管 DTFT的栅极以及补偿晶体管 T2的漏极连接。
补偿晶体管 T2的栅极与第一扫描信号端连接、 源极与驱动晶体管 DTFT 的漏极连接； 驱动晶体管 DTFT的源极与电源端 VDD连接、 漏极与隔断晶体 管 T3 的源极连接。 在第一扫描信号端提供的扫描信号的控制下， 补偿晶体 管 T2导通， 驱动晶体管 DTFT的栅极和漏极连接， 形成一个二极管连接， 保 证驱动晶体管 DTFT处于饱和电流区， 在电源端 VDD的驱动下， 通过驱动晶 体管 DTFT给存储电容 Cst充电的方法， 将驱动晶体管 DTFT的阈值电压存储 到存储电容 Cst里， 达到补偿阈值电压的目的； 驱动晶体管 DTFT受存储电容 Cst存储电压的控制而导通或截止， 流过驱动晶体管 DTFT的电流受到存储电 容 Cst上存储的电压的控制。
隔断晶体管 T3 的栅极与第二控制信号端连接、 漏极与有机发光二极管 OLED的阳极连接， 有机发光二极管 OLED的阴极连接接地端， 在第二控制 信号端提供的控制信号的控制下， 导通或截止隔断晶体管 T3 , 在向该像素 电路写入数据线 Data Line 的数据电压信号时， 截止隔断晶体管 T3 , 以防 止： 隔断晶体管 T3 导通后电流流过有机发光二极管 OLED, 导致存储电容 Cst无法存储驱动晶体管 DTFT阈值电压和数据电压， 同时也会造成有机发光 二极管 OLED显示闪烁。
本实施例中的像素电路还可以包括第二开关晶体管 T6, 第二开关晶体 管 T6栅极与第一控制信号端连接、 源极与存储电容 Cst的第一端连接、 漏极 与参考电压端连接， 在第一控制信号端提供的控制信号控制下， 第二开关晶 体管导通， 将参考电压端的电位信号提供给存储电容 Cst, 以便箝制驱动管 栅极端的电位， 防止该电位受到噪声的干扰而产生波动。
本实施例中的像素电路可以和电压振幅调制的数据驱动芯片兼容， 也可 以和脉沖宽度调制的数据驱动芯片兼容， 用于向第一扫描信号端、 数据线
Data Line, 第一控制信号端以及第二控制信号端等提供所需的电压信号。
本实施例中像素电路的另一个优势就是采用单一沟道类型的晶体管即全 为 P沟道型晶体管， 从而降低了制备工艺的复杂程度和生产成本。 当然， 本 领域所属技术人员很容易得出本发明所提供的像素电路可以轻易改成全为 N 沟道型晶体管或全为 CMOS ( Complementary Metal Oxide Semiconductor, 互 补金属氧化物半导体） 的电路； 以及， 本发明也适用于共阳极的有机发光二
OLED显示器， 在此不再赘述。
本公开实施例中还提供了一种驱动上述像素电路的驱动方法， 其驱动时 序示意图如图 5 中所示， 在该时序图中， 示意了在一帧工作时序中的第一扫 描信号端的扫描信号电压 G(n)、 数据线 Data Line的数据电压 Vdata、 第一控制 信号端的控制信号电压 CTR(n)以及第二控制信号端的控制信号电压 EM(n)的 变化。 其中， 数据电压信号写入像素电路之前需要对存储电容 Cst进行放 电， 以消除上一帧数据的影响， 即为时序段 ^。 该驱动方法主要包括补偿驱 动晶体管 DTFT阈值电压阶段 (即 t2时序段）和驱动显示阶段 (即为时序段 t3 以及时序段 t4 ) 两个阶段， 而写入数据是在补偿阶段内完成。
在补偿驱动晶体管 DTFT阈值电压阶段中， 补偿晶体管 T2和驱动晶体管 DTFT 在多级电压信号的控制下， 在存储电容 Cst里预先存储驱动晶体管 DTFT的阈值电压以及数据线 Data Line的数据电压 Vdata, 在驱动显示时序段 存储电容 Cst保持该阈值电压和数据电压 Vdata不变。 下面将结合图 6-图 9分 别对上述各个时序段进行具体说明：
复位时序段 t1 :
该时序段等效电路图如图 6中所示； 在该时序段， 第一扫描信号端的扫 描信号电压 G(n)以及第二控制信号端的控制电压信号 EM(n)为低电平， 第一 开关晶体管 T5、 隔断晶体管 Τ3、 以及补偿晶体管 Τ2导通， 第一控制信号端 的控制信号电压 CTR(n)高电平， 第二开关晶体管 T6 截止， 驱动晶体管 DTFT的栅极和漏极连接， 形成一个二极管连接， 存储电容 Cst通过补偿晶体 管 T2放电。 该时序段为重置阶段， 用于消除上一阶段的残留电压信号。
补偿时序段 t2:
该时序段等效电路图如图 7中所示； 在该时序段， 有机发光二极管 OLED 处于截止状态，向存储电容 Cst中预先存储近似等于驱动晶体管 DTFT阈值电压 的初始电压和数据线 Data Line的数据电压 Vdata。 具体为， 当向像素中写入数 据电压 Vdata时，第一扫描信号端的扫描信号电压 G(n)维持低电平不变，使得开 关晶体管和补偿晶体管 T2处于导通状态， 第一控制信号端的控制信号电压 CTR(n)维持高电平不变， 第二控制信号端的控制信号电压 EM(n)跳变为高电 平， 隔断晶体管 T3截止。 由于驱动晶体管 DTFT为二极管连接， 保证驱动晶体 管 DTFT工作在电流饱和区，电源端 VDD通过驱动晶体管 DTFT提供稳定的驱动 电流对存储电容 cst充电， 直到 g点的电位上升到 ν∞-ινωι, νω为驱动管的阈 值电压，此时驱动晶体管 DTFT截止，由于此阶段数据线上的电压信号为 Vdata, 因此存储电容 Cst两端的电压为 VDD-IVthdl-Vdata； 由于第二开关晶体管 T6处于截 止状态， 从而使参考电位不能到达存储电容的第一端。
隔离时序段 t3:
该时序段等效电路图如图 8中所示； 在该时序段， 第一控制信号端的控 制电压信号 CTR(n)以及第二控制信号端的控制信号电压 EM(n) 维持不变， 第一扫描信号端的扫描信号电压 G(n)跳变为高电平， 第一开关晶体管 T5 以 及补偿晶体管 T2截止； 驱动晶体管 DTFT虽然不再是二极管连接， 但各个点 的电位维持不变。 该时序段为隔离阶段， 避免信号的同时跳变引起杂讯的输 入。 需要理解的是， 隔离时序段 t3仅仅为本实施例中的优选方式， 其也可以 在下述时序段 t4中完成。
驱动显示时序段 t4:
该时序段等效电路图如图 9中所示； 在该时序段， 有机发光二极管 OLED 处于导通状态， 存储电容 Cst中存储的电压驱动有机发光二极管 OLED显示。 具体为， 第一扫描信号端的扫描信号电压 G(n)维持高电平 VGH不变， 使得第一 开关晶体管 T5以及补偿晶体管 T2处于截止状态， 第一控制信号端的控制信号 电压 CTR(n)跳变为低电平 VGL, 第二控制信号端的控制信号电压 EM(n)跳变为 低电平， 隔断晶体管 T3以及第二开关晶体管 T6处于导通状态， 使得 m点电位 跳变为电位 Vrcf,有机发光二极管 OLED处于导通状态； 由于驱动晶体管 DTFT 栅极处于悬空状态， 因此驱动晶体管 DTFT的栅极电位也跟着跳变为：
Vg=VDD-IVthdl+VrcrVdata； 驱动晶体管 DTFT的栅源电压为：
Vsg=Vs-Vg=VDD-(VDD-IVthdl+VrerVdata)= IVthdl+Vdata-Vref; 此时驱动晶体管 DTFT 处于饱和状态， 为有机发光二极管 OLED提供稳定的驱动电流，有机发光二极 管 OLED的驱动电流为： I。led=K(Vsg-IVthd l)2=K(IVthdl+Vdata-Vref -I νω
Figure imgf000010_0001
K(Vdata-Vref)2 , K为与工艺和驱动设计有关的常数。 可以看到， 驱动电流 I。led 与驱动晶体管 DTFT的阈值电压没有关系， 则驱动晶体管 DTFT阈值电压的漂 移， 不会对漏极电流（即像素电路的驱动电流: I。led )产生影响。
实施例二
本公开还在像素电路中完美的集成了触控电路； 本实施例中在实施例一 中所述的像素电路基础上为例进行说明， 图 10 中所示为本实施例中的像素 电路， 除了包括有机发光二极管 OLED、 驱动晶体管 DTFT、 第一开关晶体 管 T5、 补偿晶体管 Τ2、 隔断晶体管 Τ3、 第二开关晶体管 Τ6以及存储电容 cst之外， 还包括在上述像素电路中集成的触控电路， 该触控电路包括充电晶 体管 T4、 耦合电容 CP、 感应电极 Sense Electrode, 放大晶体管 ATFT以及第 三开关晶体管 Tl。
充电晶体管 Τ4的栅极与第三控制信号端连接、 源极与存储电容 Cst的第 二端连接、 漏极与耦合电容 CP的第一端、 感应电极 Sense Electrode以及放大 晶体管 ATFT的栅极连接， 在第三控制信号端提供的控制信号的控制下， 充 电晶体管 T4导通， 在电源端 VDD为存储电容 Cst充电的同时， 也为耦合电容 CP提供了驱动电压并由耦合电容 CP保持该电压。 耦合电容 CP的第二端与第 一控制信号端连接。
放大晶体管 ATFT的源极与电源端 VDD连接、 漏极与第三开关晶体管 T1 的源极连接， 主要用于对手指的触摸信号进行放大。 第三开关晶体管 T1 的 栅极与第二扫描信号端连接、 漏极与感应线 Sense Line连接， 在第二扫描信 号端提供的控制信号的控制下， 第三开关晶体管 T1 导通， 将放大后的触控 信号传递至感应线 Sense Line, 通过检测感应线 Sense Line中的信号变化， 即 可得到触控信息。
为了筒化工艺以及减少成本， 上述第三控制信号端可以为第一扫描信号 端； 通过复用了像素电路中的扫描信号， 对触控电路中的耦合电容 CP进行 充电， 在不增加电路结构和操作复杂性的同时， 完美的实现了触控电路在像 素电路中的集成。 同时， 本实施例中的像素电路的数据驱动芯片， 无需为触 控电路设置专门的控制信号驱动， 筒化了电路结构， 筒化了工艺流程。
本实施例中还提供了一种驱动上述像素电路的驱动方法， 其驱动时序示 意图如图 11 中所示， 在该时序图中， 示意了在一帧工作时序中的第一扫描 信号端的扫描信号电压 G(n)、 第二扫描信号端的扫描信号电压 G(n+2)、 数据 线 Data Line的数据电压 Vdata、 第一控制信号端的控制信号电压 CTR(n)以及 第二控制信号端的控制信号电压 EM(n)的变化。 下面将结合图 12-图 16分别 各个时序段进行具体说明：
复位时序段 t1 :
该时序段等效电路图如图 12 中所示； 在该时序段， 第一扫描信号端的 扫描信号电压 G(n)以及第二控制信号端的控制电压信号 EM(n)为低电平， 第 一开关晶体管 T5、 隔断晶体管 Τ3、 补偿晶体管 Τ2以及充电晶体管 Τ4导通， 第一控制信号端的控制信号电压 CTR(n) 以及第二扫描信号端的扫描信号电 压 G(n+2)为高电平， 第二开关晶体管 T6以及第三开关晶体管 T1截止， 驱动 晶体管 DTFT的栅极和漏极连接， 形成一个二极管连接， 存储电容 Cst通过补 偿晶体管 T2放电， 耦合电容 CP通过充电晶体管 T4 以及补偿晶体管 T2放 电， p 点的电位为 VCH。 该时序段为重置阶段， 用于消除上一阶段的残留电 压信号。
补偿时序段 t2:
该时序段等效电路图如图 13中所示；在该时序段，有机发光二极管 OLED 处于截止状态，向存储电容 Cst中预先存储近似等于驱动晶体管 DTFT的阈值电 压的初始电压和数据线 Data Line的数据电压 Vdata, 同时， 对耦合电容 CP进行 充电。 具体为， 当向像素中写入数据电压 Vdata时， 第一扫描信号端的扫描信 号电压 G(n)维持低电平不变， 使得第一开关晶体管 T5和补偿晶体管 T2处于导 通状态， 第一控制信号端的控制信号电压 CTR(n)以及第二扫描信号端的扫描 信号电压 G(n+2)维持高电平不变，第二控制信号端的控制信号电压 EM(n)跳变 为高电平， 隔断晶体管 T3截止。 由于驱动晶体管 DTFT为二极管连接， 保证驱 动晶体管 DTFT工作在电流饱和区，电源端 VDD通过驱动晶体管 DTFT对存储电 容 Cst充电， 直到 g点的电位上升到 VDD-IVthdl, p点的电位也被充到 VDD-IVthdl, νω为驱动管的阈值电压， 此时驱动晶体管 DTFT截止， 由于此阶段数据线上 的电压信号为 Vdata, 因此存储电容 Cst两端的电压为 VDD-IVthdl-Vdata； 耦合电容 CP两端的电压为 VDD-IVthdl-VGH。 由于隔断关晶体管 T3处于截止状态， 从而使 有机发光二极管 OLED处于截止状态， 防止电流流过有机发光二极管 OLED导 致不正确的显示。
隔离时序段 t3: 该时序段等效电路图如图 14 中所示； 在该时序段， 第一控制信号端的 控制电压信号 CTR(n)以及第二控制信号端的控制信号电压 EM(n) 维持不 变， 第一扫描信号端的扫描信号电压 G(n)跳变为高电平， 第一开关晶体管 T5以及补偿晶体管 T2截止； 驱动晶体管 DTFT虽然不再是二极管连接， 但 各个点的电位维持不变。 该时序段为隔离阶段， 避免信号的同时跳变引起杂 讯的输入。 需要理解的是， 隔离时序段 t3仅仅为本实施例中的优选方式， 其 也可以在下述时序段 t4中完成。
驱动显示时序段 t4:
该时序段等效电路图如图 15中所示；在该时序段，有机发光二极管 OLED 处于导通状态， 存储电容 Cst中存储的电压驱动有机发光二极管 OLED显示， 在放大晶体管 ATFT的栅极电位中反映了触控信息。 具体为， 第一扫描信号端 的扫描信号电压 G(n)维持高电平不变， 使得第一开关晶体管 T5、 补偿晶体管 Τ2以及充电晶体管 Τ4处于截止状态， 第二扫描信号端的扫描信号电压 G(n+2) 也维持高电平不变， 使得第三开关晶体管 T1处于截止状态， 第一控制信号端 的控制信号电压 CTR(n)跳变为低电平， 使得第二开关晶体管 T6处于导通状 态， m点电位跳变为低电平 Vrcf, 第二控制信号端的控制信号电压 EM(n)跳变 为低电平， 隔断晶体管 T3处于导通状态， 有机发光二极管 OLED处于导通状 态； 由于驱动晶体管 DTFT栅极悬空， 因此驱动晶体管 DTFT的栅极电位也跟 着跳变为： Vg=VDD-IVthdl+Vref-Vdata; 驱动晶体管 DTFT的栅源电压为：
V^Vs-V^VDjHVDD-IVthdl+VrerVdata Vthdl+Vdata-Vref; 此时驱动晶体管 DTFT 处于饱和状态， 为有机发光二极管 OLED提供稳定的驱动电流，有机发光二极 管 OLED的驱动电流：
I。led=K(Vsg-IVthd l)2=K(IVthdl+Vdata-VrerlVthdl)2=k(Vdata-Vref)2, K为与工艺和驱 动设计有关的常数。 可以看到， 驱动电流 I。led与驱动晶体管 DTFT的阈值电压 没有关系， 则驱动晶体管 DTFT的阈值电压的漂移， 不会对漏极电流（即像素 电路的驱动电流 I。led )产生影响， 同时该电路电流公式中没有电源电压 （VDD 或 Vss ) 的影响， 克服了内阻对发光电流的影响， 使得有机发光二极管 OLED 显示稳定， 极大的提升了显示品质。
由于第一控制信号端的控制电压信号 CTR(n)跳变为低电平， 通过耦合电 容 CP, 放大晶体管 ATFT的栅极电位也从 VDD-IVthdl被下拉。 具体的下拉电位如 下：如果有手指触摸，则感应电极 Sense Electrode和手指之间形成感应电容 CF, 因此放大晶体管 ATFT的栅极电位为： [VDD-IVthdl-(VGH-VGL)] X Cp/(CP+CF); 如 果没有手指触摸， 则放大管 ATFT的栅极电位为： VDD-IVthdl-(VCH-VCL) ; 由于 该阶段第三开关晶体管 T1处于截止状态， 因此放大晶体管 ATFT的漏极断路， 没有电流流过。
触控判断时序段 t5:
该时序段等效电路图如图 16中所示； 在该时序段， 第二扫描信号端的扫 描信号电压 G(n+2)向下跳变， 第三开关晶体管 T1处于导通状态， 第一扫描信 号端的扫描信号电压 G(n)、 第一控制信号端的控制电压信号 CTR(n)以及第二 控制信号端的控制电压信号 EM(n)维持不变。 如果有手指触摸， 放大晶体管 ATFT的栅源电压 Vsg为：
VSG=VS-VG=VDD-[VDD-IVthdl+ ( VGL-VGH ) ]xCp/(Cp+CF)
=(IVthdl+VGH-VGL+VDDxCF/ Cp)xCp/(Cp+CF);
因此通过感应线 Sense Line的感应电流大小为：
ι86=κ3(ν¾-ΐνώ3ΐ)2=κ3(ν86-ΐνώ3ΐ)2
Figure imgf000013_0001
其中， νω为驱动晶体管的阈值电压、 Vtha为放大晶体管 ATFT的阈值电 压； Ka为放大晶体管 ATFT与工艺和设计有关的常数。
如果没有手指触摸， 则放大晶体管 ATFT的栅源电压 Vsg为：
VSG=VS-VG=VDD-[VDD-IVthdl- ( VGH-VGL ) ]
Figure imgf000013_0002
通过感应线 Sense Line的感应电流大小为：
Ise=Ka(Vsg-lVt )2=Ka(Vsg-lVt )2
=Ka[IVthdl+(VGH-VGL)-IVthal]2;
因此，通过监测感应线 Sense Line中电流即可判断该处是否有手指触摸， 触摸导致的电流差见图 11中的 Isense_lme。
通过以上阶段即完成了一行像素发光的驱动和触控的判断， 而且没有不 增加电路结构和操作复杂性， 因此完美的实现了触控电路在像素电路中的集 成。
实施例三
本实施例中提供了一种显示装置， 包括上述的像素电路。 具体地， 该显 示装置包括多个像素单元阵列， 每个像素单元对应上述实施例中的任一像素 电路。 由于该像素电路补偿了驱动晶体管的阈值电压漂移， 使得有机发光二 极管的显示稳定， 不会闪烁， 从而保证了有机发光显示装置的显示质量； 同 时， 本发明中触控电路复用像素电路的扫描信号， 在为存储电容充电的同时 通过充电晶体管为触控电路中的耦合电容充电， 完美的实现了触控电路在像 素电路中的集成， 将显示和触控功能进行整合， 使用一道工艺流程即可完 成， 而不用分成两道工艺流程， 因此不仅拥有低成本的优势， 还能使得工艺 筒单， 且显示装置更加轻薄。
以上实施方式仅用于说明本发明， 而并非对本发明的限制， 有关技术领 域的普通技术人员， 在不脱离本发明的精神和范围的情况下， 还可以做出各 种变化和变型， 因此所有等同的技术方案也属于本发明的保护范畴。

Claims

权 利 要 求 书
1、 一种像素电路， 包括： 电致发光元件、 驱动晶体管、 第一开关单 元、 补偿单元、 隔断单元以及存储电容；
所述第一开关单元用于控制数据线的数据电压的写入， 所述第一开关单 元的第一端与所述存储电容的第一端连接、 第二端与所述数据线连接；
所述存储电容的第二端分别与所述驱动晶体管的栅极以及所述补偿单元 的第一端连接；
所述补偿单元用于向所述存储电容预先存储所述驱动晶体管的阈值电 压， 所述补偿单元的第二端与所述驱动晶体管的漏极连接；
所述驱动晶体管的源极与电源端连接、 漏极与所述隔断单元的第一端连 接；
所述隔断单元用于隔断所述驱动晶体管与所述电致发光元件的电连接， 所述隔断单元单元的第二端与所述电致发光元件的第一端连接；
所述电致发光元件的第二端与接地端连接。
2、 根据权利要求 1所述的像素电路， 其中： 所述电致发光元件为有机发 光二极管， 所述第一开关单元为第一开关晶体管， 所述补偿单元为补偿晶体 管， 所述隔断单元为隔断晶体管；
所述第一开关晶体管的栅极与第一扫描信号端连接、 源极与所述存储电 容的第一端连接、 漏极与所述数据线连接；
所述存储电容的第二端分别与所述驱动晶体管的栅极以及所述补偿晶体 管的漏极连接；
所述补偿晶体管的栅极与第一扫描信号端连接、 源极与所述驱动晶体管 的漏极连接；
所述驱动晶体管的源极与电源端连接、 漏极与所述隔断晶体管的源极连 接；
所述隔断晶体管的栅极与第二控制信号端连接、 漏极与所述有机发光二 极管的阳极连接；
所述有机发光二极管的阴极与接地端连接。
3、 根据权利要求 2所述的像素电路， 还包括第二开关晶体管； 所述第二 开关晶体管的栅极与第一控制信号端、 源极与所述存储电容的第一端连接、 漏极与参考电压端连接。
4、 根据权利要求 2或 3所述的像素电路， 其中： 所述像素电路还与触控 电路连接， 所述触控电路包括充电晶体管、 耦合电容、 感应电极、 放大晶体 管、 第三开关晶体管、 第二扫描信号端以及感应线；
所述充电晶体管的栅极与第三控制信号端连接、 源极与所述存储电容的 第二端连接、 漏极分别与所述耦合电容的第一端、 感应电极以及放大晶体管 的栅极连接；
所述耦合电容的第二端与第一控制信号端连接；
所述放大晶体管的源极与电源端连接、 漏极与所述第三开关晶体管的源 极连接；
所述第三开关晶体管的栅极与第二扫描信号端连接、漏极与感应线连接。
5、 根据权利要求 4所述的像素电路， 其中： 所述第三控制信号端为所述 第一扫描信号端。
6、 根据权利要求 2-3或 5任一项所述的像素电路， 其中： 所有所述晶体 管均具有相同的沟道类型。
7、 一种像素电路驱动方法， 包括步骤：
S1. 在所述第一扫描信号端施加扫描信号以导通所述第一开关晶体管以 及补偿晶体管， 在所述第一控制信号端以及第二控制信号端施加控制信号以 截止所述第二开关晶体管以及隔断晶体管， 使所述驱动晶体管的阈值电压以 及数据线上的数据电压写入所述存储电容；
S2. 在所述第一扫描信号端施加扫描信号以截止所述第一开关晶体管 以及补偿晶体管， 在所述第一控制信号端以及第二控制信号端施加控制信号 以导通所述第二开关晶体管以及隔断晶体管， 利用存储在所述存储电容中的 电压驱动所述有机发光二极管发光。
8、 根据权利要求 7所述的像素电路驱动方法， 其中， 所述步骤 S1之前 还包括：
在所述第一扫描信号端以及第二控制信号端施加控制信号以导通所述第 一开关晶体管、 补偿晶体管、 隔断晶体管以及充电晶体管， 在所述第一控制 信号端施加控制信号以及在所述第二扫描信号端施加扫描信号以截止所述第 二开关晶体管以及第三开关晶体管， 重置所述存储电容以及耦合电容。
9、 根据权利要求 7或 8所述的像素电路驱动方法， 其中， 所述步骤 S1 中还包括：
施加在所述第一扫描信号端的扫描信号导通所述充电晶体管， 在所述第 二扫描信号端施加扫描信号截止所述第三开关晶体管， 所述电源端通过所述 驱动晶体管以及充电晶体管为所述耦合电容充电；
所述步骤 S2中还包括：
施加在所述第一扫描信号端的扫描信号截止所述充电晶体管， 在所述第 二扫描信号端施加扫描信号导通所述第三开关晶体管； 监测所述感应线上的 电流变 4匕。
10、 一种显示装置， 包括权利要求 1-6任一项所述的像素电路。
PCT/CN2013/078920 2013-04-15 2013-07-05 像素电路、像素电路驱动方法及显示装置 Ceased WO2014169537A1 (zh)

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