WO2014109090A1 - Circuit d'amplificateur haute fréquence - Google Patents

Circuit d'amplificateur haute fréquence Download PDF

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Publication number
WO2014109090A1
WO2014109090A1 PCT/JP2013/072950 JP2013072950W WO2014109090A1 WO 2014109090 A1 WO2014109090 A1 WO 2014109090A1 JP 2013072950 W JP2013072950 W JP 2013072950W WO 2014109090 A1 WO2014109090 A1 WO 2014109090A1
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Prior art keywords
circuit
frequency amplifier
transistor
bias
amplifier circuit
Prior art date
Application number
PCT/JP2013/072950
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English (en)
Japanese (ja)
Inventor
草地敬治
Original Assignee
株式会社村田製作所
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Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Priority to CN201380069829.0A priority Critical patent/CN104904118B/zh
Publication of WO2014109090A1 publication Critical patent/WO2014109090A1/fr
Priority to US14/794,082 priority patent/US9369090B2/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/52—Circuit arrangements for protecting such amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • H03F1/0261—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A
    • H03F1/0266—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers with control of the polarisation voltage or current, e.g. gliding Class A by using a signal derived from the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/191—Tuned amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217—Class D power amplifiers; Switching amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/105—A non-specified detector of the power of a signal being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/411—Indexing scheme relating to amplifiers the output amplifying stage of an amplifier comprising two power stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/555—A voltage generating circuit being realised for biasing different circuit elements

Definitions

  • the present invention relates to a high frequency amplifier circuit in which destruction due to excessive input is suppressed.
  • the high-frequency amplifier circuit described in Patent Document 1 includes a directional coupler, a diode, and a transistor.
  • the directional coupler is connected between the input end and the base end of the transistor.
  • the anode of the diode is connected to the emitter end of the transistor, and the cathode of the diode is connected to the ground.
  • One end of the directional coupler is connected to the anode of the diode.
  • An object of the present invention is to provide a miniaturized high-frequency amplifier circuit that can be easily set as a threshold value when detecting an excessive input without being destroyed by the excessive input.
  • the high-frequency amplifier circuit includes a high-frequency amplifier element, a bias circuit, and a bias adjustment circuit.
  • the high frequency amplifying element has an input end and an output end.
  • the bias circuit is connected to the high frequency amplifying element and supplies a first bias voltage to the input side of the high frequency amplifying element.
  • the bias adjustment circuit is connected between the input terminal and the bias circuit, and adjusts the first bias voltage based on a high-frequency signal input to the input terminal.
  • the bias adjustment circuit includes a lumped constant element and an active element.
  • the output power of the high frequency amplifying element can be adjusted based on the high frequency signal input to the input end. Therefore, even in the case of excessive input, the high frequency amplifier circuit operates in the safe operation region. Therefore, it is possible to prevent the high-frequency amplifier circuit from being destroyed by excessive input.
  • the high frequency amplifier circuit can be reduced in size as compared with the high frequency amplifier circuit using a distributed constant element such as a directional coupler.
  • the high frequency amplifier circuit can be prevented from being destroyed by excessive input.
  • the bias adjustment circuit is composed of lumped constant elements, the threshold for detecting an excessive input can be easily set, and the high-frequency amplifier circuit can be reduced in size.
  • FIG. 1 is a circuit diagram showing a high-frequency amplifier circuit 10 according to a first embodiment.
  • 2 is a circuit diagram showing a bias circuit 12.
  • FIG. 3A is a circuit diagram showing a part of the signal detection circuit 14.
  • FIG. 3B is a diagram illustrating a time change in voltage at the connection point N1 when a high-frequency signal is input.
  • FIG. 4A is a diagram showing output power and output current with respect to input power in a conventional high-frequency amplifier circuit.
  • FIG. 4B is a diagram showing output power and output current with respect to input power in the high-frequency amplifier circuit 10.
  • FIG. 5A is a diagram showing a load line of the final stage amplification element of the high frequency amplification element 11 in the conventional high frequency amplification circuit.
  • 5B is a diagram showing a load line of the final stage amplification element of the high frequency amplification element 11 in the high frequency amplification circuit 10. It is a circuit diagram which shows a part of high frequency amplifier circuit which concerns on 2nd Embodiment. It is a circuit diagram which shows a part of high frequency amplifier circuit which concerns on 3rd Embodiment. It is a circuit diagram which shows a part of high frequency amplifier circuit which concerns on 4th Embodiment.
  • FIG. 1 is a circuit diagram showing a high-frequency amplifier circuit 10.
  • the high frequency amplifier circuit 10 includes a high frequency amplifier element 11, a bias circuit 12, and a bias adjustment circuit 13.
  • the high frequency amplifier circuit 10 is formed, for example, in one IC chip.
  • the high frequency amplifying element 11 has an input terminal P3, an output terminal P4, and two amplifying elements connected in cascade.
  • the input terminal P3 is connected to the terminal P1 through capacitors C2 and C3 connected in series.
  • the output terminal P4 is connected to the terminal P2.
  • the high frequency amplifying element 11 amplifies the high frequency signal input from the input terminal P3 and outputs the amplified signal to the output terminal P4.
  • the bias circuit 12 is connected to the high frequency amplifying element 11 and supplies a first bias voltage to the input side of the high frequency amplifying element 11.
  • the bias adjustment circuit 13 is connected to a connection point N2 between the capacitor C2 and the capacitor C3 and is also connected to the bias circuit 12.
  • the bias adjustment circuit 13 has a signal detection circuit 14, a switch circuit 15, and terminals P5 and P6.
  • the signal detection circuit 14 is connected to the connection point N2, the switch circuit 15, and the terminals P5 and P6.
  • the switch circuit 15 is connected to the bias circuit 12.
  • the terminal P5 is connected to the DC power source Vctl, and the terminal P6 is connected to the DC power source V0.
  • the signal detection circuit 14 includes transistors Tr1 and Tr2, resistors R1 to R4, a capacitor C1, and a circuit 16a.
  • the resistor R4 corresponds to the signal detection element of the present invention.
  • the transistor Tr1 corresponds to the rectifying element and the second transistor of the present invention.
  • the capacitor C1 corresponds to the first capacitor of the present invention.
  • all the transistors constituting the bias adjustment circuit 13 are npn transistors.
  • the base end of the transistor Tr1 is connected to the first ends of the resistors R1 and R2 and the first end of the capacitor C1.
  • the second end of the resistor R1 is connected to the circuit 16a.
  • the circuit 16a is connected to the terminal P5.
  • the second end of the resistor R2 is connected to the base end and the collector end of the transistor Tr2.
  • the emitter end of the transistor Tr2 is connected to the ground.
  • the second end of the capacitor C1 is connected to the ground.
  • the collector terminal of the transistor Tr1 is connected to the terminal P6 via the resistor R3.
  • the emitter end of the transistor Tr1 is connected to the connection point N2 via the resistor R4.
  • a connection point N1 between the emitter end of the transistor Tr1 and the resistor R4 is connected to the switch circuit 15.
  • the circuit 16a includes transistors Tr3, Tr4, Tr5 and resistors R5 to R8.
  • the base end of the transistor Tr3 is connected to the first ends of the resistors R5 and R6.
  • a second end of the resistor R5 is connected to the terminal P5.
  • the second end of the resistor R6 is connected to the base end and the collector end of the transistor Tr4.
  • the emitter end of the transistor Tr4 is connected to the ground.
  • the collector end of the transistor Tr3 is connected to the terminal P5 via the resistor R7.
  • a connection point between the collector end of the transistor Tr3 and the resistor R7 is connected to the second end of the resistor R1.
  • the emitter end of the transistor Tr3 is connected to the base end and the collector end of the transistor Tr5 via a resistor R8.
  • the emitter end of the transistor Tr5 is connected to the ground.
  • the switch circuit 15 includes a transistor Tr6 and resistors R9 and R10.
  • the transistor Tr6 corresponds to the first transistor of the present invention.
  • the base end of the transistor Tr6 is connected to a connection point N1 in the bias adjustment circuit 13 through a resistor R9.
  • the collector terminal of the transistor Tr6 is connected to the bias circuit 12 via the resistor R10.
  • the emitter end of the transistor Tr6 is connected to the ground.
  • FIG. 2 is a circuit diagram showing the bias circuit 12.
  • the bias circuit 12 includes a circuit 16b, resistors R11a, R11b, R12a, R12b, transistors Tr7a, Tr7b, and terminals P7, P8. Since the configuration of the circuit 16b is the same as the configuration of the circuit 16a, a detailed description of the circuit 16b is omitted.
  • the base end of the transistor Tr7a is connected to the first end of the resistor R13 constituting the circuit 16b via the resistor R11a.
  • a second end of the resistor R13 is connected to the terminal P7.
  • the voltage supplied to the base end of the transistor Tr7a is supplied from the DC power supply Vctl connected to the terminal P7.
  • a connection point N3 between the resistor R11a and the resistor R13 is connected to the resistor R10 of the bias adjustment circuit 13.
  • the collector end of the transistor Tr7a is connected to the terminal P8 via the resistor R12a.
  • the voltage supplied to the collector terminal of the transistor Tr7a is supplied from the DC power supply V0 connected to the terminal P8.
  • the emitter end is connected to the first stage amplification element of the high frequency amplification element 11.
  • the circuit composed of the transistor Tr7b and the resistors R11b and R12b is the same as the circuit composed of the transistor Tr7a and the resistors R11a and R12a, detailed description of this circuit is omitted. However, the emitter end of the transistor Tr7b is connected to the last stage amplifying element of the high frequency amplifying element 11.
  • FIG. 3A is a circuit diagram showing a part of the signal detection circuit 14.
  • the bias voltage Vb supplied to the base end of the transistor Tr1 corresponds to the second bias voltage of the present invention.
  • the bias voltage Vc supplied to the collector terminal of the transistor Tr1 corresponds to the third bias voltage of the present invention.
  • the diode D1 is caused by the pn junction between the base and the emitter of the transistor Tr1, and corresponds to the rectifying element of the present invention.
  • emitter voltage (hereinafter simply referred to as emitter voltage) of the transistor Tr1 generated by the bias voltages Vb and Vc is lower than the bias voltage Vb by the forward voltage drop of the diode D1.
  • the base end of the transistor Tr1 is AC-grounded by the capacitor C1. For this reason, even if the high-frequency signal input from the connection point N1 leaks to the base end of the transistor Tr1, the base voltage of the transistor Tr1 always maintains the bias voltage Vb. As a result, the voltage at the connection point N1 does not fall below a voltage lower than the bias voltage Vb by the forward voltage drop of the diode D1.
  • the voltage at the connection point N1 is a combined voltage of the extracted high-frequency signal voltage and the emitter voltage. This combined voltage is obtained by clipping a lower portion than the vicinity of the emitter voltage by the diode D1 from a voltage waveform obtained by simply superimposing the voltage of the extracted high-frequency signal and the emitter voltage. For this reason, when the amplitude of a high-frequency signal (hereinafter referred to as an input signal) input to the terminal P1 increases, the minimum voltage does not change and the maximum voltage increases. As a result, the average voltage at the connection point N1 increases.
  • FIG. 3 (B) is a diagram showing the time change of the voltage at the connection point N1 when a high frequency signal of 15 dBm is input to the terminal P1.
  • the bias voltage Vb is 2.25V.
  • the emitter voltage is 1V.
  • the voltage at the node N1 is not less than about 0.7V, which is about 0.3V lower than the emitter voltage.
  • the average voltage at the connection point N1 is about 1.8V.
  • the dotted lines indicate 0.7V and 1.8V.
  • the transistor Tr6 of the switch circuit 15 When the average voltage at the connection point N1 is equal to or higher than the threshold value, the transistor Tr6 of the switch circuit 15 is turned on, and the collector-emitter voltage of the transistor Tr6 decreases. For this reason, the voltage at the connection point N3 where the collector terminal of the transistor Tr6 is connected via the resistor R10 decreases, and the base voltages of the transistors Tr7a and Tr7b decrease. As a result, the first bias voltage supplied to the input side of the high frequency amplifying element 11 decreases, and the output current and output power of the high frequency amplifying element 11 decrease.
  • the transistor Tr6 is, for example, a GaAs HBT (Heterojunction Bipolar Transistor), a Si transistor, a SiGe transistor, or the like.
  • the threshold value of GaAsHBT is about 1.25V, and the threshold value of Si transistor and SiGe transistor is about 0.7V.
  • the transistor Tr6 may be an FET.
  • FIG. 4A is a diagram showing output power and output current with respect to input power in a conventional high-frequency amplifier circuit.
  • FIG. 4B is a diagram showing output power and output current with respect to input power in the high-frequency amplifier circuit 10.
  • the conventional high-frequency amplifier circuit includes only the high-frequency amplifier element 11 and the bias circuit 12.
  • the output power increases as the input power increases.
  • the input power becomes about 0 dBm or more, the output power enters the saturation region and becomes about 30 dBm. Further, as the input power increases, the output current increases monotonously.
  • the change in the output power with respect to the input power is the same as in the conventional high frequency amplifier circuit.
  • the input power is about 10 dBm or more, the output power is greatly reduced.
  • the input power is about 5 dBm, the output power is the largest.
  • the change in the output current with respect to the input power is the same as in the case of the conventional high-frequency amplifier circuit.
  • the input power is about 10 dBm or more, the output current is greatly reduced.
  • the input power is about 5 dBm, the output current is the largest.
  • FIG. 5A is a diagram showing a load line of the final stage amplification element of the high frequency amplification element 11 in the conventional high frequency amplification circuit.
  • FIG. 5B is a diagram showing a load line of the final stage amplification element of the high frequency amplification element 11 in the high frequency amplification circuit 10 of the present invention.
  • the vertical axis represents the collector current, and the horizontal axis represents the collector-emitter voltage.
  • the final-stage amplifying element of the high-frequency amplifying element 11 is composed of an npn transistor, and a voltage of 4.5 V is supplied to the collector terminal of the npn transistor.
  • FIG. 5A shows a load line measured when a high frequency signal of 18 dBm is input to the terminal P1.
  • FIG. 5B is a load line measured when a high frequency signal of 5 dBm is input to the terminal P1.
  • the breakdown voltage value shown in FIG. 5 is measured by applying a voltage between the collector and emitter of the npn transistor constituting the final stage amplification element of the high-frequency amplification element 11 and destroying the npn transistor. It is the result.
  • the input power is 18 dBm, and in the high-frequency amplifier circuit 10 of the present invention, the input power is 5 dBm.
  • each input power is a condition in which the high frequency amplifying element 11 is most easily destroyed.
  • the dotted line indicating the breakdown voltage and the load line intersect. For this reason, the high frequency amplifying element 11 is destroyed when a high frequency signal of 18 dBm is input.
  • the load line is closest to the breakdown voltage when the input power is about 5 dBm, reflecting that the output power becomes the largest when the input power is about 5 dBm.
  • the dotted line indicating the breakdown voltage and the load line do not intersect. That is, the high frequency amplifying element 11 operates normally without being destroyed by excessive input.
  • the bias voltage at the connection point N1 is set using resistance division by the resistors R1 and R2. Moreover, the electric power taken out to the signal detection circuit 14 among input electric power is adjusted with the value of resistance R4. Therefore, the threshold when the bias adjustment circuit 13 detects an excessive input can be adjusted by the values of the resistors R1, R2, and R4.
  • the transistor Tr2 compensates for fluctuations in the bias voltage Vb supplied to the base end of the transistor Tr1 due to temperature changes. Thereby, the transistor Tr2 compensates the emitter voltage of the transistor Tr1.
  • the circuit 16a absorbs the fluctuation of the DC power supply Vctl and prevents the fluctuation of the DC power supply Vctl from being transmitted to the connection point N1.
  • the degree to which the base voltages of the transistors Tr7a and Tr7b are lowered is adjusted by the resistor R10. By reducing the resistance value of the resistor R10, the base voltages of the transistors Tr7a and Tr7b can be greatly reduced.
  • a part of the input signal is extracted to the signal detection circuit 14.
  • the detection value of the signal detection circuit 14 is equal to or greater than the threshold value of the switch circuit 15.
  • the switch circuit 15 is turned on, and the first bias voltage supplied from the bias circuit 12 decreases. For this reason, the output current and output power of the high frequency amplifying element 11 are reduced.
  • the high-frequency amplifier circuit 10 operates in the safe operation region. Therefore, it is possible to prevent the high-frequency amplifier circuit 10 from being destroyed by excessive input.
  • the bias adjustment circuit 13 includes a lumped constant element and an active element. Further, the switch circuit 15 can be realized by one transistor. Therefore, the high frequency amplifier circuit 10 can be reduced in size as compared with the high frequency amplifier circuit using the distributed constant element.
  • the signal detection circuit 14 of the present invention detects an over-input by a composite voltage of the voltage of the high frequency signal taken out by the resistor R4 and the emitter voltage of the transistor Tr1. For this reason, the high frequency signal required for detection of an excessive input does not necessarily need to be large.
  • the high frequency amplifier circuit 10 of the present invention over input is determined while keeping the power loss of the high frequency signal entering the high frequency amplifier element 11 small compared to the conventional technique using a directional coupler for detecting over input. Therefore, the power loss of the high frequency signal can be reduced.
  • the bias adjustment circuit 13 is not directly inserted between the input terminal P3 of the high-frequency amplification element 11 and the terminal P1.
  • the bias adjustment circuit 13 operates only when there is an excessive input. For this reason, it does not affect the high frequency characteristics such as gain, P1 dB (1 dB CompressionEPoint), EVM (Error ⁇ VectorMagnitude).
  • FIG. 6 is a circuit diagram showing a part of the high-frequency amplifier circuit 20.
  • the high frequency amplifier circuit 20 includes a diode D21 instead of the capacitor C1 of the high frequency amplifier circuit 10.
  • the cathode of the diode D21 is connected to the base end of the transistor Tr1.
  • the anode of the diode D21 is connected to the ground.
  • Other configurations are the same as those of the high-frequency amplifier circuit 10.
  • the base end of the transistor Tr1 is AC-grounded using the capacitance generated by the pn junction of the diode D21.
  • the high-frequency amplifier circuit 40 can be reduced in size as compared with the case where a bypass capacitor such as MIMC (Metal-Insulator-Metal-Capacitor) is used as the capacitor C1.
  • the high-frequency amplifier circuit 20 can be protected from excessive input. Moreover, the threshold value when detecting an excessive input can be easily adjusted.
  • FIG. 7 is a circuit diagram showing a part of the high-frequency amplifier circuit 30.
  • the high frequency amplifier circuit 30 includes a capacitor C31 instead of the resistor R4 of the high frequency amplifier circuit 10.
  • the capacitor C31 corresponds to the second capacitor of the present invention.
  • Other configurations are the same as those of the high-frequency amplifier circuit 10.
  • the high frequency signal is extracted using the capacitor C31.
  • the high frequency signal is likely to enter the connection point N1.
  • the average voltage at the connection point N1 is higher in the high frequency band than in the low frequency band.
  • the high-frequency amplifier circuit 30 can be protected from excessive input.
  • the frequency characteristics of the excessive input level can be adjusted.
  • FIG. 8 is a circuit diagram showing a part of the high-frequency amplifier circuit 40.
  • the high frequency amplifier circuit 40 includes an inductor L41 instead of the resistor R4 of the high frequency amplifier circuit 10.
  • Other configurations are the same as those of the high-frequency amplifier circuit 10.
  • the high frequency signal is extracted using the inductor L41.
  • the high frequency signal In the low frequency band, since the magnitude of the impedance of the inductor L41 is smaller than in the high frequency band, the high frequency signal easily enters the connection point N1. For this reason, the average voltage at the connection point N1 is higher in the low frequency band than in the high frequency band. As a result, it is possible to give frequency characteristics to the sensitivity for detecting excessive input.
  • the high-frequency amplifier circuit 40 can be protected from excessive input.
  • the frequency characteristics of the excessive input level can be easily adjusted.
  • Bias voltage (second bias voltage) Vc collector voltage (third bias voltage) DESCRIPTION OF SYMBOLS 10, 20, 30, 40 ... High frequency amplifier circuit 11 ... High frequency amplifier element 12 ... Bias circuit 13 ... Bias adjustment circuit 14 ... Signal detection circuit 15 ... Switch circuit 16a, 16b ... Circuit

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Amplifiers (AREA)

Abstract

L'invention porte sur un circuit d'amplificateur haute fréquence (10) qui comporte : un élément d'amplificateur haute fréquence (11) ; un circuit de polarisation (12) ; et un circuit de commande de polarisation (13). L'élément d'amplificateur haute fréquence (11) possède une extrémité d'entrée et une extrémité de sortie. Le circuit de polarisation (12) est connecté à l'élément d'amplificateur haute fréquence (11) et fournit une première tension de polarisation au côté d'entrée de l'élément d'amplificateur haute fréquence (11). Le circuit de commande de polarisation (13) est connecté entre l'extrémité d'entrée et le circuit de polarisation (12) et règle la première tension de polarisation sur la base d'un signal haute fréquence appliqué sur l'extrémité d'entrée. Le circuit de commande de polarisation (13) est configuré pour comprendre un élément à constante localisée et un élément actif.
PCT/JP2013/072950 2013-01-09 2013-08-28 Circuit d'amplificateur haute fréquence WO2014109090A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201380069829.0A CN104904118B (zh) 2013-01-09 2013-08-28 高频放大电路
US14/794,082 US9369090B2 (en) 2013-01-09 2015-07-08 High-frequency amplifier circuit

Applications Claiming Priority (2)

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JP2013-001593 2013-01-09
JP2013001593 2013-01-09

Related Child Applications (1)

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US14/794,082 Continuation US9369090B2 (en) 2013-01-09 2015-07-08 High-frequency amplifier circuit

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WO2014109090A1 true WO2014109090A1 (fr) 2014-07-17

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Publication number Priority date Publication date Assignee Title
JP2019091966A (ja) * 2017-11-10 2019-06-13 株式会社村田製作所 電力増幅回路
WO2022226935A1 (fr) * 2021-04-29 2022-11-03 华为技术有限公司 Puce de circuit intégré radiofréquence et appareil de communication sans fil

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JP2005079967A (ja) * 2003-09-01 2005-03-24 Seiko Epson Corp 高周波電力増幅器及びこれを使用した無線通信機器
JP2008004987A (ja) * 2006-06-20 2008-01-10 Nec Electronics Corp 信号増幅回路
JP2010041233A (ja) * 2008-08-01 2010-02-18 Panasonic Corp 検波回路及び無線通信システム

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