WO2014107034A1 - Led chip having curved substrate and led package using same - Google Patents
Led chip having curved substrate and led package using same Download PDFInfo
- Publication number
- WO2014107034A1 WO2014107034A1 PCT/KR2014/000023 KR2014000023W WO2014107034A1 WO 2014107034 A1 WO2014107034 A1 WO 2014107034A1 KR 2014000023 W KR2014000023 W KR 2014000023W WO 2014107034 A1 WO2014107034 A1 WO 2014107034A1
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- WO
- WIPO (PCT)
- Prior art keywords
- led chip
- substrate
- bending deformation
- led
- type semiconductor
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 105
- 238000005452 bending Methods 0.000 claims description 60
- 239000004065 semiconductor Substances 0.000 claims description 52
- 238000000034 method Methods 0.000 claims description 34
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 21
- 229910052782 aluminium Inorganic materials 0.000 claims description 15
- 229910052759 nickel Inorganic materials 0.000 claims description 15
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 claims description 12
- 239000000463 material Substances 0.000 claims description 12
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 239000006023 eutectic alloy Substances 0.000 claims description 9
- 229910052737 gold Inorganic materials 0.000 claims description 9
- 239000000919 ceramic Substances 0.000 claims description 8
- 229910052721 tungsten Inorganic materials 0.000 claims description 8
- 229910052738 indium Inorganic materials 0.000 claims description 7
- 230000008569 process Effects 0.000 claims description 7
- 229910018125 Al-Si Inorganic materials 0.000 claims description 6
- 229910018520 Al—Si Inorganic materials 0.000 claims description 6
- 229910017401 Au—Ge Inorganic materials 0.000 claims description 6
- 229910015363 Au—Sn Inorganic materials 0.000 claims description 6
- 229910052804 chromium Inorganic materials 0.000 claims description 6
- 239000011651 chromium Substances 0.000 claims description 6
- 239000008393 encapsulating agent Substances 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 6
- 229910015365 Au—Si Inorganic materials 0.000 claims description 5
- 229910017755 Cu-Sn Inorganic materials 0.000 claims description 5
- 229910017927 Cu—Sn Inorganic materials 0.000 claims description 5
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 claims description 5
- 230000005496 eutectics Effects 0.000 claims description 5
- 229910052742 iron Inorganic materials 0.000 claims description 5
- 239000011733 molybdenum Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- 239000004593 Epoxy Substances 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 229910018459 Al—Ge Inorganic materials 0.000 claims description 2
- 230000008878 coupling Effects 0.000 claims description 2
- 238000010168 coupling process Methods 0.000 claims description 2
- 238000005859 coupling reaction Methods 0.000 claims description 2
- 230000003287 optical effect Effects 0.000 abstract 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 32
- 229910002601 GaN Inorganic materials 0.000 description 29
- 230000008859 change Effects 0.000 description 10
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 6
- 239000012535 impurity Substances 0.000 description 4
- 229910052594 sapphire Inorganic materials 0.000 description 4
- 239000010980 sapphire Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 239000003989 dielectric material Substances 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 3
- 229910010271 silicon carbide Inorganic materials 0.000 description 3
- 229910002704 AlGaN Inorganic materials 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000006835 compression Effects 0.000 description 2
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- 229910052732 germanium Inorganic materials 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 239000012780 transparent material Substances 0.000 description 2
- 229910000640 Fe alloy Inorganic materials 0.000 description 1
- -1 InN Chemical compound 0.000 description 1
- PWHULOQIROXLJO-UHFFFAOYSA-N Manganese Chemical compound [Mn] PWHULOQIROXLJO-UHFFFAOYSA-N 0.000 description 1
- 229910000914 Mn alloy Inorganic materials 0.000 description 1
- 229910000990 Ni alloy Inorganic materials 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- HPDFFVBPXCTEDN-UHFFFAOYSA-N copper manganese Chemical compound [Mn].[Cu] HPDFFVBPXCTEDN-UHFFFAOYSA-N 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- UGKDIUIOSMUOAW-UHFFFAOYSA-N iron nickel Chemical compound [Fe].[Ni] UGKDIUIOSMUOAW-UHFFFAOYSA-N 0.000 description 1
- 239000011572 manganese Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Definitions
- the present invention relates to an LED chip having an X-ray substrate and an LED package using the same, and more particularly, to maintain a curved shape by forming a tensile force on the LED chip, thereby improving the band structure of the quantum well layer and the internal quantum.
- the present invention relates to an LED chip having a curved substrate having an improved light output efficiency and an LED package using the same.
- LED Light Emitting Diode
- LED is a well-known semiconductor light emitting device that converts electric current into light.In 1962, red LED using GaAsP compound semiconductor was commercialized. It has been used as a light source for display images of electronic devices, including.
- the wavelength of light emitted by such an LED depends on the semiconductor material used to manufacture the LED, which is a semiconductor material in which the wavelength of the emitted light indicates an energy difference between valence band electrons and conduction band electrons. This is due to the band-gap of.
- GaN compound semiconductors (Gallium Nitride) have high thermal stability and wide bandgap (0.8-6.2eV), which has attracted much attention in the development of high-power electronic components including LEDs.
- GaN can be combined with other elements (indium (In), aluminum (A1), etc.) to produce semiconductor layers that emit green, blue and white light.
- the brightness or output of the LED using GaN-based materials is large, the structure of the active layer, the light extraction efficiency to extract light to the outside, the size of the LED chip, the type and angle of the mold when assembling the lamp package, the fluorescent light It depends on the substance.
- FIG. 1 is a block diagram showing an LED structure of a general GaN-based material, as shown in FIG. 1, between an n-type GaN layer 1 as an electron injection layer and a p-type GaN layer 3 as a hole injection layer.
- the active layer (2) having a quantum well structure is located at.
- one side of the P-type GaN layer 3 and the active layer 2 is etched to expose the n-type GaN layer 1, and the n-type GaN layer 1 exposed to the etched surface is n-type.
- An electrode 6 is formed, and a P-type electrode 7 is formed in the P-type GaN charge 3.
- This structure is formed on the substrate 4, in which a buffer buffer 5 is normally formed between the substrate 4 and the n-type GaN layer 1, but the buffer buffer 5 may not be formed.
- a buffer buffer 5 is normally formed between the substrate 4 and the n-type GaN layer 1, but the buffer buffer 5 may not be formed.
- InGaN (2 ') layer used as a quantum well is grown on the n-type GaN (l) layer grown on the sapphire substrate as shown in Fig. 2 (a)
- InGaN (2') is formed of GaN (l). It grows along the lattice constant and grows as shown in Fig. 2 (b).
- the present invention has a curved substrate that improves the light output efficiency by improving the band structure of the quantum well layer and increasing the internal quantum efficiency by maintaining the curved shape so that the tensile force is formed on the LED chip
- An object of the present invention is to provide an LED chip and an LED package using the same.
- the present invention provides an LED chip, a substrate; An n-type semiconductor layer formed on the substrate; An active layer formed on the n-type semiconductor layer; A P-type semiconductor layer formed on the active charge; An nV type electrode formed on the n-type semiconductor layer in which the active layer is not formed; A P-type electrode formed on the P-type semiconductor layer; And a bending deformation portion formed at a lower portion of the substrate to generate a force to bend the substrate.
- the bending deformation portion according to the invention the substrate is convex in the upward direction It is characterized in that to generate a tensile force.
- curvature of the 3 ⁇ 4 transformation unit according to the invention is characterized in that not more than 6.2m at least 1 2.0 ⁇ 1.
- the bending deformation portion according to the invention is characterized in that the bimetal made of two or more kinds of materials having different coefficients of thermal expansion.
- the bending deformation portion according to the invention the first bending deformation portion having an arbitrary coefficient of thermal expansion; And a second bending deformation portion having a thermal expansion coefficient smaller than the thermal expansion coefficient of the first bending deformation portion.
- the bimetal according to the present invention is characterized in that the metal containing at least one of nickel, iron, manganese, molybdenum, copper, aluminum.
- the bimetal according to the present invention is characterized in that the dielectric containing at least one of Si02, SiN, SiON.
- the bimetal according to the present invention is characterized in that the ceramic.
- the bimetal according to the present invention is characterized in that the semiconductor containing at least one of Si, GaN, A1N, GaAs.
- the bending deformation portion according to the invention is characterized in that it comprises at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, W.
- the substrate and the bending deformation portion according to the present invention is a eutectic alloy (Eutectic alloy) composed of one or more of Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si, Al—Si It is characterized by binding via Eutectic bonding.
- the bending deformation unit 180 according to the present invention is characterized in that the ceramic.
- the substrate and the bending deformation portion according to the invention is characterized in that the coupling through the plating method.
- the LED chip according to the invention is characterized in that it further comprises a reflective layer provided between the substrate and the bending deformation portion.
- the reflective layer according to the present invention is a distributed Bragg reflector ) 1 13 ⁇ 61
- DBR Bragg Reflector
- the reflective layer according to the invention is characterized in that the reflective metal containing one or more of Al, Pt, Ni, Pd, Ti, Au, W, Ag.
- the present invention provides an LED package, a substrate, an nV type semiconductor layer formed on the substrate, an active layer formed on the nV type semiconductor layer, a U-shaped semiconductor layer formed on the active layer, N-type electrode formed on n-type semiconductor layer without active layer And a LED chip including a P-type electrode formed on the P-type semiconductor layer, and a bending deformation part formed under the substrate to generate force to bend the substrate;
- a lead frame connected to the LED chip;
- a package mold having the lead frame installed thereon and forming a reflector to reflect light emitted from the LED chip;
- an encapsulant that is filled in the package mold to protect the LED chip and the bonding wire and to fix the substrate of the LED chip to maintain a curved state.
- the LED chip according to the invention is characterized in that it further comprises a reflective layer between the substrate and the bending deformation portion.
- the bending deformation portion according to the invention is characterized in that it comprises at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, W.
- the substrate and the warpage deformation portion according to the invention is characterized in that the adhesive using any one of the paste (Paste) or epoxy.
- the substrate and the bending deformation portion according to the invention eutectic alloy consisting of at least one of Au-In, Cn-Sn, Au-Sn, Au-Ge, Au-Si, Al-Ge, Al-Si (Eutectic alloy ) By using bonding (Eutectic) bonding or by a plating method.
- the stress of the LED chip according to the present invention is characterized in that the tensile force generated by the heat generated in the reflow process for curing the encapsulant.
- the bending deformation portion of the LED chip according to the invention is characterized in that the bimetal.
- the present invention has the advantage of increasing the internal quantum efficiency by improving the band structure of the quantum well layer by maintaining a curved shape to form a tensile force on the LED chip.
- the present invention has an advantage of improving the light output efficiency of the LED chip by increasing the internal quantum efficiency.
- 1 is a cross-sectional view showing the LED structure of a typical GaN-based material.
- FIG. 2 is an exemplary diagram illustrating a process of growing an active layer on an n-type GaN layer.
- 3 is a cross-sectional view showing the structure of an LED chip having a curved substrate according to the present invention.
- FIG. 4 is a side view illustrating a bending deformation state of the LED chip having the curved substrate according to FIG. 3.
- FIG. 5 is an exemplary view showing a change in light output characteristics and electrical characteristics according to the bending deformation of the LED chip having a curved substrate according to FIG.
- FIG. 6 is an exemplary view showing a change in light output characteristics and electrical characteristics according to the substrate thickness of the LED chip having a curved substrate according to FIG.
- FIG. 7 is an exemplary view showing a characteristic change of the internal quantum efficiency according to the substrate thickness of the LED chip having a curved substrate according to FIG.
- FIG. 8 is a cross-sectional view showing the structure of an LED package using an LED chip having a curved substrate according to the present invention.
- FIG. 9 is an exemplary view showing a characteristic change in internal quantum efficiency according to the substrate thickness of the LED package using the LED chip having a curved substrate according to FIG.
- FIG. 10 is an exemplary view showing a wavelength change according to the curvature of the LED package using the LED chip having a curved substrate according to FIG.
- FIG. 3 is a cross-sectional view showing the structure of the LED chip having a curved substrate according to the present invention
- Figure 4 is a cross-sectional view showing the bending deformation state of the LED chip having a curved substrate according to FIG.
- the LED chip 100 having a curved substrate includes a substrate 140, an n-type semiconductor charge 110 formed on the substrate 140, an active layer 120 formed on the n-type semiconductor layer 110, a pV type semiconductor layer 130 formed on the active layer 120, and an n-type semiconductor on which the active layer 120 is not formed.
- the n-type and p-type semiconductor layers 110 and 130 and the active layer 120 may have an Al x In y Ga (lxy) N composition formula, where 0 ⁇ x ⁇ l, 0 ⁇ y ⁇ l, and 0 ⁇ x + y ⁇ l. It may be made of a semiconductor material having a).
- the n-type semiconductor layer 110 may be a GaN layer doped with n-type conductivity impurities or
- the GaN / AlGaN layer may be formed, and as the n ⁇ type conductive impurity, for example, Si, Ge, Sn, etc. may be used, and preferably Si is mainly used.
- the active layer 120 may be formed of an InGaN / GaN layer having a multi quantum well (MQW) structure.
- MQW multi quantum well
- the P-type nitride semiconductor layer 130 may be formed of a GaN layer or a GaN / AlGaN layer doped with P-type conductive impurities.
- P-type conductive impurities For example, Mg, Zn, and Be may be used as p-type conductive impurities. Is used, and preferably Mg is mainly used.
- the substrate 140 is preferably formed using a transparent material including sapphire, in addition to sapphire, zinc oxide (ZnO), gallium nitride (GaN), silicon carbide (silicon carbide, SiC) and aluminum nitride (A1N) rounds.
- a transparent material including sapphire, in addition to sapphire, zinc oxide (ZnO), gallium nitride (GaN), silicon carbide (silicon carbide, SiC) and aluminum nitride (A1N) rounds.
- a buffer layer 150 may be formed between the substrate 140 and the nV type semiconductor layer 110 to improve lattice matching therebetween, and the buffer layer 150 may be formed of GaN or AlN / GaN. Can be.
- n-type electrode 160 is formed on the n-type semiconductor layer 110 exposed by etching, and a P-type electrode 170 is formed on the P-type semiconductor layer 130.
- the malleable deformation part 180 is a structure that generates tensile stresses so that the substrate 140 becomes convex in the upward direction, and includes at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, and W.
- it is a bimetal composed of two or more kinds of materials having different coefficients of thermal expansion, and the bimetal may be formed by increasing and selecting materials such as metals, dielectrics, ceramics, and semiconductors, and preferably ceramics.
- the metal is formed of nickel, iron, manganese, molybdenum, copper, aluminum at least one, the dielectric is formed including at least one of Si02, SiN, SiON, the semiconductor is Si, GaN, A1N, It is formed comprising one or more of GaAs.
- the bending deformation portion 180 may include a first bending deformation portion 181 having an arbitrary thermal expansion coefficient, and a second bending deformation portion having a thermal expansion coefficient smaller than that of the first bending deformation portion 181 ( 182, and the first bending deformation portion 181 having a high coefficient of thermal expansion expands more convexly in the upward direction of the substrate 140.
- the bending deformation unit 180 is a eutectic alloy composed of at least one of the substrate 140 and Au-In, Cu-Sn, Au-Sn, Au-Ge, Au ⁇ Si, Al-Si. Bond through the bonding process (Eutectic) or by any one of the plating method.
- the first bending deformation portion 181 is made of any one of an alloy of nickel, manganese and iron, nickel 'molybdenum and iron, and nickel and manganese copper, which are well expanded, and the second bending deformation portion (181).
- 182 is made of an alloy of nickel-iron that is less expandable than crab 1 whip deformation 181.
- the first and second bending deformation parts 181 and 182 are formed of metals in the examples, but dielectrics, ceramics, and semiconductors having different coefficients of thermal expansion may be used in the embodiments.
- the bending deformation portion 180 is more than 2.0ra _1 when the deformation by the deformation of the tensile force
- the compression force applied to the multiple quantum well of InGaN / GaN, which is the active layer 120, is about
- FIG. 5 is an exemplary view illustrating a change in light output characteristics and electrical characteristics according to the bending deformation of the LED chip having the curved substrate according to FIG. 3.
- the para bending deformation portion is bent in the tensile force. It can be seen that the light output power (light output power) is increased, and also there is no difference in voltage / current due to bending deformation as shown in FIG.
- FIG. 6 is an exemplary view illustrating a change in light output characteristics and electrical characteristics according to a substrate thickness of an LED chip having a curved substrate according to FIG. 3, and as shown in FIG. It can be seen that as the light output (Light Output Power) increases as the increase, and also the difference in voltage / current according to the bending deformation as shown in Figure 6 (b) is not large.
- Light Output Power Light Output Power
- FIG. 7 is an exemplary view illustrating a change in characteristics of internal quantum efficiency according to a substrate thickness of an LED chip having a curved substrate according to FIG. 3. It can be seen that (Internal Quantum Efficiency) increases.
- the internal quantum effect increases by about 8%.
- the reflective layer 190 is a distributed Bragg reflective element provided between the substrate 140 and the bending deformation unit 180.
- the reflective layer 190 is formed by alternately stacking two transparent materials having different refractive indices into a plurality of layers. (Distributed Bragg Reflector, DBR) to reflect the light efficiency can be improved, the reflective layer 190 is a reflective metal composed of one or more of Al, Pt, Ni, Pd, Ti, Au, W, Ag. :
- FIG. 8 is a cross-sectional view showing the structure of an LED package using an LED chip having a curved substrate according to the present invention.
- the LED package 200 using the LED chip having a curved substrate includes an LED chip 100 that is curved to form an arbitrary curvature on the bottom thereof, and the LED chip 100. And a lead mold 210 connected with the package frame, a package mold 220 on which the lead frame 210 is installed, and a reflector formed to reflect light emitted from the LED chip 100, and the LED chip 100. And a bonding wire 230 connecting the lead frame 210 and the lead frame 210 to the package mold 220 to protect the LED chip 100 and the bonding wire 230, and the substrate of the LED chip 100.
- the encapsulant 240 is fixed to maintain the curved state.
- the LED chip 100 includes a substrate, an n-type semiconductor layer formed on the substrate, an active layer formed on the n-type semiconductor layer, a P-type semiconductor layer formed on the active layer, An n-type electrode formed on an n-type semiconductor layer in which no active layer is formed, a P-type electrode formed on the P-type semiconductor layer, and a lower portion of the substrate to generate a deflection to bend the substrate And a reflection layer formed between the substrate and the bending deformation portion.
- the bending deformation portion of the LED chip 100 is a bimetal, and is a bimetal composed of two or more materials having different thermal expansion coefficients. Choose from materials such as metals, dielectrics, ceramics and semiconductors. Can be configured.
- the metal is formed containing at least one of nickel, iron, manganese, molybdenum, copper, aluminum, the dielectric is formed containing at least one of Si02, SiN, SiON.
- the semiconductor may be formed including one or more of Si, GaN, A1N, and GaAs.
- the tensile force applied to the bending deformation portion of the LED chip 100 is generated by the heat generated in the reflow process during the manufacturing process of the LED chip 100 so that the bending deformation portion is a convex shape protruding upward in the substrate. do.
- the convex shape protruding warpage deformation portion includes at least one of Cr, Ni, Cu, Al, Au, kg, Mo, W, the encapsulant 240 filled in the package mold 220 is cured and bent Let the state be fixed.
- the substrate and the bending deformation portion of the LED chip 100 may be bonded using any one of a paste or epoxy, Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si To be bonded using eutectic bonding, or plating using an eutectic alloy composed of one or more of Al, Ge, and Al-Si.
- FIG. 9 is an exemplary view illustrating a characteristic change of internal quantum efficiency according to a substrate thickness of an LED package using an LED chip having a curved substrate according to FIG. 8. As shown in the figure, it can be seen that the internal quantum efficiency (Internal Quantum Efficiency) increases as the thickness of the substrate becomes thinner.
- FIG. 10 is an exemplary diagram illustrating wavelength change according to curvature of an LED package using an LED chip having a curved substrate according to FIG. 8. As the curvature (m— 1 ) increases, the wavelength (Wavelength, nm) is shortened. The peak emission wavelength of the chip 100 shifts to a shorter wavelength (shorter wavelength).
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Abstract
The present invention provides: an LED chip having a curved substrate, wherein tensile stress is formed on the LED chip to maintain a curved shape, thereby improving a band structure of a quantum well layer, and optical output efficiency is improved by increasing the internal quantum efficiency; and an LED package using the same.
Description
【명세서】, 【Specification】,
【발명의 명칭】 [Name of invention]
곡선 기판을 갖는 LED 칩과 이를 이용한 LED 패키지 【기술분야】 LED Chip with Curved Substrate and LED Package Using the Same
본 발명은 끅선 기판을 갖는 LED 칩과 이를 이용한 LED 패키지에 관한 발명 으로서， 더욱 상세하게는 LED 칩에 인장 웅력이 형성되도록 하여 휘어진 형상을 유 지함으로써， 양자 우물층의 밴드 구조를 개선하고 내부 양자 효율을 증가시켜 광 출력 효율을 향상시킨 곡선 기판을 갖는 LED 칩과 이를 이용한 LED 패키지에 관한 것이다. The present invention relates to an LED chip having an X-ray substrate and an LED package using the same, and more particularly, to maintain a curved shape by forming a tensile force on the LED chip, thereby improving the band structure of the quantum well layer and the internal quantum. The present invention relates to an LED chip having a curved substrate having an improved light output efficiency and an LED package using the same.
【배경기술】 Background Art
발광 다이오드 (Light Emitting Diode: LED)는 전류를 빛으로 변환시키는 잘 알려진 반도체 발광 소자로서， 1962년 GaAsP 화합물 반도체를 이용한 적색 LED가 상품화 된 것을 시작으로 GaP:N 계열의 녹색 LED와 함께 정보 통신기기를 비롯한 전자장치의 표시 화상용 광원으로 이용되어 왔다. Light Emitting Diode (LED) is a well-known semiconductor light emitting device that converts electric current into light.In 1962, red LED using GaAsP compound semiconductor was commercialized. It has been used as a light source for display images of electronic devices, including.
이러한 LED에 의해 방출되는 광의 파장은 LED를 제조하는데 사용되는 반도체 재료에 따르고， 이는 방출된 광의 파장이 가전자대 (valence band) 전자들과 전도대 (conduction band) 전자들 사이의 에너지 차를 나타내는 반도체 재료의 밴드갭 (band— gap)에 따르기 때문이다. The wavelength of light emitted by such an LED depends on the semiconductor material used to manufacture the LED, which is a semiconductor material in which the wavelength of the emitted light indicates an energy difference between valence band electrons and conduction band electrons. This is due to the band-gap of.
GaN화합물 반도체 (Gallium Nitride: 질화 갈륨)는 높은 열적 안정성과 폭넓 은 밴드갭 (0.8 - 6.2eV)을 가지고 있어， LED를 포함한 고출력 전자부품 소자 개발 분야에서 많은 주목올 받아왔다. GaN compound semiconductors (Gallium Nitride) have high thermal stability and wide bandgap (0.8-6.2eV), which has attracted much attention in the development of high-power electronic components including LEDs.
이에 대한 이유 중 하나는 GaN이 타 원소들 (인듐 (In), 알루미늄 (A1) 등)과 조합되어 녹색， 청색 및 백색광을 방출하는 반도체 층들을 제조할 수 있기 때문이 다. One reason for this is that GaN can be combined with other elements (indium (In), aluminum (A1), etc.) to produce semiconductor layers that emit green, blue and white light.
이러한 GaN 계열 물질을 이용한 LED의 휘도 또는 출력은 크게， 활성층의 구 조， 빛을 외부로 추출할 수 있는 광 추출 효율， LED 칩의 크기， 램프 패키지 조립 시 몰드 (mold)의 종류 및 각도， 형광물질 등에 의해서 좌우된다. The brightness or output of the LED using GaN-based materials is large, the structure of the active layer, the light extraction efficiency to extract light to the outside, the size of the LED chip, the type and angle of the mold when assembling the lamp package, the fluorescent light It depends on the substance.
한편， 이러한 GaN 계열 반도체 성장이 다른 ΠΙ-V족 화합물 반도체보다 어려 운 이유 증에 하나는 고품질의 기판， 즉， GaN, InN, A1N 등의 물질의 웨이퍼가 존 재하지 않기 때문이다.
따라서 사파이어와 같은 이종 기판 위에 LED 구조를 성장하게 되며， 이때 많 은 결함이 발생하게 되고， 이러한 결함들은 LED 성능에 큰 영향을 미치게 된다. 도 1은 일반적인 GaN 계열 물질의 LED 구조를 나타낸 블록도로서， 도 1에 도 시한 바와 같이 전자 주입층으로서 n—형 GaN층 (1)과， 정공 주입층으로서 p—형 GaN 층 (3) 사이에 양자우물구조 (quantum well)를 가지는 활성층 (2)이 위치한다. On the other hand, the reason why the growth of GaN-based semiconductors is more difficult than other ΠΙ-V compound semiconductors is that there are no wafers of high-quality substrates, that is, GaN, InN, A1N, and the like. Therefore, the LED structure is grown on a heterogeneous substrate such as sapphire, and many defects are generated, and these defects have a great influence on the LED performance. FIG. 1 is a block diagram showing an LED structure of a general GaN-based material, as shown in FIG. 1, between an n-type GaN layer 1 as an electron injection layer and a p-type GaN layer 3 as a hole injection layer. The active layer (2) having a quantum well structure is located at.
이때， P-형 GaN층 (3)과 활성층 (2)의 일측은 n-형 GaN층 (1)이 드러나도록 식 각되고， 이와 같이 식각되어 드러난 n-형 GaN층 (1)에는 n-형 전극 (6)이 형성되며， P-형 GaN충 (3)에는 P-형 전극 (7)이 형성된다. At this time, one side of the P-type GaN layer 3 and the active layer 2 is etched to expose the n-type GaN layer 1, and the n-type GaN layer 1 exposed to the etched surface is n-type. An electrode 6 is formed, and a P-type electrode 7 is formed in the P-type GaN charge 3.
이러한 구조는 기판 (4) 상에 형성되며， 이때， 기판 (4)과 nᅳ형 GaN층 (1) 사이 에는 통상 버퍼충 (5)이 형성되는데 상기 버퍼충 (5)은 형성되지 않을 수도 있다. 한편， 도 2(a)와 같이 사파이어 기판 위에 성장된 n-형 GaN(l) 층 상에 양자 우물로 사용되는 InGaN(2') 층을 성장시킬 때 InGaN(2')는 GaN(l)의 격자 상수를 따라 성장을 하여 도 2(b)와 같이 성장한다. This structure is formed on the substrate 4, in which a buffer buffer 5 is normally formed between the substrate 4 and the n-type GaN layer 1, but the buffer buffer 5 may not be formed. On the other hand, when the InGaN (2 ') layer used as a quantum well is grown on the n-type GaN (l) layer grown on the sapphire substrate as shown in Fig. 2 (a), InGaN (2') is formed of GaN (l). It grows along the lattice constant and grows as shown in Fig. 2 (b).
이러한 경우에 InGaN의 격자 상수는 GaN의 격자 상수보다 크기 때문에， InGaN(2')층에 압축 웅력이 발생하게 된다. In this case, since the lattice constant of InGaN is larger than the lattice constant of GaN, compressive force is generated in the InGaN (2 ') layer.
또한， 이러한 양자우물에 발생하는 압축 웅력으로 인해 압전 분극이 발생하 기 때문에 내부 양자 효율이 하락하는 문제점이 있다. In addition, since piezoelectric polarization occurs due to the compression force generated in the quantum well, there is a problem in that the internal quantum efficiency decreases.
【발명의 상세한 설명】 [Detailed Description of the Invention]
【기술적 과제】 [Technical problem]
이러한 문제점을 해결하기 위하여， 본 발명은 LED 칩에 인장 웅력이 형성되 도록 하여 휘어진 형상올 유지함으로써， 양자 우물층의 밴드 구조를 개선하고 내부 양자 효율을 증가시켜 광 출력 효율을 향상시킨 곡선 기판을 갖는 LED 칩과 이를 이용한 LED 패키지를 제공하는 것을 목적으로 한다. In order to solve this problem, the present invention has a curved substrate that improves the light output efficiency by improving the band structure of the quantum well layer and increasing the internal quantum efficiency by maintaining the curved shape so that the tensile force is formed on the LED chip An object of the present invention is to provide an LED chip and an LED package using the same.
【기술적 해결방법】 Technical Solution
상기한 목적을 달성하기 위하여 본 발명은 LED 칩으로서， 기판; 상기 기판 상에 형성한 n-형 반도체 층; 상기 n-형 반도체 층 상에 형성한 활성충; 상기 활성 충 상에 형성한 P-형 반도체 층; 상기 활성층이 형성되지 않은 n-형 반도체 층에 형성한 nᅳ형 전극; 상기 P-형 반도체 층에 형성한 P-형 전극; 및 상기 기판의 하부 에 형성되어 상기 기판이 휘어지도록 웅력을 발생하는 휨 변형부를 포함한다. In order to achieve the above object, the present invention provides an LED chip, a substrate; An n-type semiconductor layer formed on the substrate; An active layer formed on the n-type semiconductor layer; A P-type semiconductor layer formed on the active charge; An nV type electrode formed on the n-type semiconductor layer in which the active layer is not formed; A P-type electrode formed on the P-type semiconductor layer; And a bending deformation portion formed at a lower portion of the substrate to generate a force to bend the substrate.
또한， 본 발명에 따른 상기 휨 변형부는 기판이 상방향으로 볼록 형상이 되
도록 인장 웅력을 발생하는 것을 특징으로 한다. In addition, the bending deformation portion according to the invention the substrate is convex in the upward direction It is characterized in that to generate a tensile force.
또한, 본 발명에 따른 상기 ¾ 변형부는 곡률이 2.0ΠΓ1 이상 6.2m1 이하인 것을 특징으로 한다. In addition, the curvature of the ¾ transformation unit according to the invention is characterized in that not more than 6.2m at least 1 2.0ΠΓ 1.
또한， 본 발명에 따른 상기 휨 변형부는 열팽창계수가 다른 두 종류 이상의 물질로 이루어진 바이메탈인 것을 특징으로 한다. In addition, the bending deformation portion according to the invention is characterized in that the bimetal made of two or more kinds of materials having different coefficients of thermal expansion.
또한， 본 발명에 따른 상기 휨 변형부는 임의의 열팽창계수를 갖는 제 1 휨 변형부; 및 상기 제 1 휨 변형부의 열팽창계수보다 작은 열팽창계수를 갖는 제 2 휨 변형부를 포함하는 것을 특징으로 한다. In addition, the bending deformation portion according to the invention the first bending deformation portion having an arbitrary coefficient of thermal expansion; And a second bending deformation portion having a thermal expansion coefficient smaller than the thermal expansion coefficient of the first bending deformation portion.
또한ᅳ 본 발명에 따른 상기 바이메탈은 니켈， 철， 망간， 몰리브덴， 구리， 알 루미늄 중 하나 이상을 포함하는 금속인 것을 특징으로 한다. In addition, the bimetal according to the present invention is characterized in that the metal containing at least one of nickel, iron, manganese, molybdenum, copper, aluminum.
또한， 본 발명에 따른 상기 바이메탈은 Si02, SiN, SiON 증 하나 이상을 포 함하는 유전체인 것을 특징으로 한다. In addition, the bimetal according to the present invention is characterized in that the dielectric containing at least one of Si02, SiN, SiON.
또한， 본 발명에 따른 상기 바이메탈은 세라믹인 것을 특징으로 한다. In addition, the bimetal according to the present invention is characterized in that the ceramic.
또한， 본 발명에 따른 상기 바이메탈은 Si, GaN, A1N, GaAs 중 하나 이상을 포함하는 반도체인 것을 특징으로 한다. In addition, the bimetal according to the present invention is characterized in that the semiconductor containing at least one of Si, GaN, A1N, GaAs.
또한， 본 발명에 따른 상기 휨 변형부는 Cr, Ni, Cu, Al, Au, Ag, Mo, W중 하나 이상을 포함하는 것을 특징으로 한다. In addition, the bending deformation portion according to the invention is characterized in that it comprises at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, W.
또한， 본 발명에 따른 상기 기판과 휨 변형부는 Au-In, Cu-Sn, Au-Sn, Au- Ge, Au-Si , Al— Si 중에서 하나 이상으로 구성되는 공정합금 (Eutect ic alloy)을 이 용한 공정 (Eutectic) 본딩을 통해 결합하는 것을 특징으로 한다. In addition, the substrate and the bending deformation portion according to the present invention is a eutectic alloy (Eutectic alloy) composed of one or more of Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si, Al—Si It is characterized by binding via Eutectic bonding.
또한， 본 발명에 따른 상기 휨 변형부 (180)는 세라믹인 것을 특징으로 한다. 또한， 본 발명에 따른 상기 기판과 휨 변형부는 도금법을 통해 결합하는 것 을 특징으로 한다. In addition, the bending deformation unit 180 according to the present invention is characterized in that the ceramic. In addition, the substrate and the bending deformation portion according to the invention is characterized in that the coupling through the plating method.
또한， 본 발명에 따른 상기 LED 칩은 상기 기판과 휨 변형부 사이에 설치한 반사층을 더 포함하는 것을 특징으로 한다. In addition, the LED chip according to the invention is characterized in that it further comprises a reflective layer provided between the substrate and the bending deformation portion.
또한， 본 발명에 따른 상기 반사층은 분산 브라그 반사 소자 )1 13^61In addition, the reflective layer according to the present invention is a distributed Bragg reflector ) 1 13 ^ 61
Bragg Reflector, DBR)로 이루어진 것을 특징으로 한다. Bragg Reflector, DBR) is characterized in that.
또한， 본 발명에 따른 상기 반사층은 Al, Pt, Ni, Pd, Ti, Au, W, Ag 중 하 나 이상을 포함한 반사메탈인 것을 특징으로 한다. In addition, the reflective layer according to the invention is characterized in that the reflective metal containing one or more of Al, Pt, Ni, Pd, Ti, Au, W, Ag.
또한， 본 발명은 LED 패키지로서， 기판과， 상기 기판 상에 형성한 nᅳ형 반도 체 층과， 상기 nᅳ형 반도체 층 상에 형성한 활성층과， 상기 활성층 상에 형성한 으 형 반도체 층과， 상기 활성층이 형성되지 않은 n-형 반도체 층에 형성한 n-형 전극
과， 상기 P-형 반도체 층에 형성한 P-형 전극과， 상기 기판의 하부에 형성되어 상 기 기판이 휘어지도록옹력을 발생하는 휨 변형부를 포함한 LED 칩; 상기 LED 칩과 접속된 리드 프레임; 상기 리드 프레임이 설치되고， 상기 LED 칩에서 발광된 빛이 반사되도록 리플렉터를 형성한 패키지 몰드; 상기 LED 칩과 리드 프레임을 연결하 는 본딩 와이어; 및 상기 패키지 몰드에 충진되어 상기 LED칩과 본딩 와이어를 보 호하고， 상기 LED 칩의 기판이 휘어진 상태를 유지하도록 고정하는 봉지재를 포함 한다. In addition, the present invention provides an LED package, a substrate, an nV type semiconductor layer formed on the substrate, an active layer formed on the nV type semiconductor layer, a U-shaped semiconductor layer formed on the active layer, N-type electrode formed on n-type semiconductor layer without active layer And a LED chip including a P-type electrode formed on the P-type semiconductor layer, and a bending deformation part formed under the substrate to generate force to bend the substrate; A lead frame connected to the LED chip; A package mold having the lead frame installed thereon and forming a reflector to reflect light emitted from the LED chip; A bonding wire connecting the LED chip to the lead frame; And an encapsulant that is filled in the package mold to protect the LED chip and the bonding wire and to fix the substrate of the LED chip to maintain a curved state.
또한, 본 발명에 따른 상기 LED 칩은 기판과, 휨 변형부 사이에 반사층을 더 포함하는 것을 특징으로 한다. In addition, the LED chip according to the invention is characterized in that it further comprises a reflective layer between the substrate and the bending deformation portion.
또한, 본 발명에 따른 상기 휨 변형부는 Cr, Ni, Cu, Al, Au, Ag, Mo, W 중 하나 이상을 포함하는 것을 특징으로 한다. In addition, the bending deformation portion according to the invention is characterized in that it comprises at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, W.
또한， 본 발명에 따른 상기 기판과 휨 변형부는 페이스트 (Paste) 또는 에폭 시 중 어느 하나를 이용하여 접착하는 것을 특징으로 한다. In addition, the substrate and the warpage deformation portion according to the invention is characterized in that the adhesive using any one of the paste (Paste) or epoxy.
또한， 본 발명에 따른 상기 기판과 휨 변형부는 Au-In, Cn-Sn, Au-Sn, Au- Ge, Au-Si, Al-Ge, Al-Si 중에서 하나 이상으로 구성되는 공정합금 (Eutectic alloy)을 이용한 공정 (Eutectic) 본딩을 통해 결합하거나 또는 도금법을 통해 결합 하는 것을 특징으로 한다. In addition, the substrate and the bending deformation portion according to the invention eutectic alloy consisting of at least one of Au-In, Cn-Sn, Au-Sn, Au-Ge, Au-Si, Al-Ge, Al-Si (Eutectic alloy ) By using bonding (Eutectic) bonding or by a plating method.
또한， 본 발명에 따른 상기 LED 칩의 웅력은 인장 웅력이고， 상기 봉지재의 경화를 위한 리플로우 공정에서 발생하는 열에 의해 발생하는 것을 특징으로 한다. 또한, 본 발명에 따른 상기 LED 칩의 휨 변형부는 바이메탈인 것을 특징으로 한다. In addition, the stress of the LED chip according to the present invention is characterized in that the tensile force generated by the heat generated in the reflow process for curing the encapsulant. In addition, the bending deformation portion of the LED chip according to the invention is characterized in that the bimetal.
【유리한 효과】 Advantageous Effects
본 발명은 LED 칩에 인장 웅력이 형성되도록 하여 휘어진 형상을 유지함으로 써， 양자 우물층의 밴드 구조를 개선하여 내부 양자 효율을 증가시킬 수 있는 장점 이 있다. The present invention has the advantage of increasing the internal quantum efficiency by improving the band structure of the quantum well layer by maintaining a curved shape to form a tensile force on the LED chip.
또한, 본 발명은 내부 양자 효율을 증가시켜 LED 칩의 광 출력 효율을 향상 시킬 수 있는 장점이 있다. In addition, the present invention has an advantage of improving the light output efficiency of the LED chip by increasing the internal quantum efficiency.
[도면의 간단한 설명】 [Brief Description of Drawings]
도 1 은 일반적인 GaN 계열 물질의 LED구조를 나타낸 단면도. 1 is a cross-sectional view showing the LED structure of a typical GaN-based material.
도 2 는 n-형 GaN층 상에 활성층이 성장하는 과정을 나타낸 예시도.
도 3 은 본 발명에 따른 곡선 기판을 갖는 LED 칩의 구조를 나타낸 단면도. 도 4 는 도 3에 따른 곡선 기판을 갖는 LED 칩의 휨 변형 상태를 나타낸 단 면도. 2 is an exemplary diagram illustrating a process of growing an active layer on an n-type GaN layer. 3 is a cross-sectional view showing the structure of an LED chip having a curved substrate according to the present invention. FIG. 4 is a side view illustrating a bending deformation state of the LED chip having the curved substrate according to FIG. 3.
도 5 는 도 3에 따른 곡선 기판을 갖는 LED 칩의 휨 변형에 따른 광 출력 특 성과 전기적 특성 변화를 나타낸 예시도. 5 is an exemplary view showing a change in light output characteristics and electrical characteristics according to the bending deformation of the LED chip having a curved substrate according to FIG.
도 6 은 도 3에 따른 곡선 기판을 갖는 LED 칩의 기판 두께에 따른 광 출력 특성과 전기적 특성 변화를 나타낸 예시도. 6 is an exemplary view showing a change in light output characteristics and electrical characteristics according to the substrate thickness of the LED chip having a curved substrate according to FIG.
도 7 은 도 3에 따른 곡선 기판을 갖는 LED 칩의 기판 두깨에 따른 내부 양 자 효율의 특성 변화를 나타낸 예시도. 7 is an exemplary view showing a characteristic change of the internal quantum efficiency according to the substrate thickness of the LED chip having a curved substrate according to FIG.
도 8 은 본 발명에 따른 곡선 기판을 갖는 LED 칩을 이용한 LED 패키지의 구 조를 나타낸 단면도. 8 is a cross-sectional view showing the structure of an LED package using an LED chip having a curved substrate according to the present invention.
도 9 는 도 8에 따른 곡선 기판을 갖는 LED 칩을 이용한 LED 패키지의 기판 두께에 따른 내부 양자 효율의 특성 변화를 나타낸 예시도. 9 is an exemplary view showing a characteristic change in internal quantum efficiency according to the substrate thickness of the LED package using the LED chip having a curved substrate according to FIG.
도 10 은 도 8에 따른 곡선 기판을 갖는 LED 칩을 이용한 LED 패키지의 곡률 에 따른 파장 변화를 나타낸 예시도. 10 is an exemplary view showing a wavelength change according to the curvature of the LED package using the LED chip having a curved substrate according to FIG.
【발명의 실시를 위한 형태】 [Form for implementation of invention]
이하， 첨부된 도면을 참조하여 본 발명에 따른 곡선 기판을 갖는 LED 칩과 이를 이용한 LED 패키지의 바람직한 실시예를 상세하게 설명한다. Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the LED chip having a curved substrate and the LED package using the same according to the present invention.
(LED 칩 ) (LED chip)
도 3은 본 발명에 따른 곡선 기판을 갖는 LED 칩의 구조를 나타낸 단면도이 고， 도 4는 도 3에 따른 곡선 기판을 갖는 LED 칩의 휨 변형 상태를 나타낸 단면도 이다. 3 is a cross-sectional view showing the structure of the LED chip having a curved substrate according to the present invention, Figure 4 is a cross-sectional view showing the bending deformation state of the LED chip having a curved substrate according to FIG.
도 3 및 도 4에 나타낸 바와 같이， 본 발명에 따른 곡선 기판을 갖는 LED 칩 (100)은 기판 (140)과， 상기 기판 (140) 상에 형성한 n-형 반도체 충 (110)과， 상기 n-형 반도체 층 (110) 상에 형성한 활성층 (120)과， 상기 활성층 (120) 상에 형성한 pᅳ형 반도체 층 (130)과, 상기 활성충 (120)이 형성되지 않은 n-형 반도체 층 (110)에 형성한 n-형 전극 (160)과, 상기 P-형 반도체 층 (130)에 형성한 p-형 전극 (170)과， 상기 기판 (140)의 하부에 형성되어 상기 기관 (140)이 휘어지도록 웅력을 발생하는 휨 변형부 (180)와， 상기 기판과 휨 변형부 (180) 사이에 설치되는 반사층 (190)을 포 함하여 구성된다. 一
상기 n-형 및 p-형 반도체 층 (110, 130)과 활성층 (120)은， AlxInyGa(l-x-y)N 조성식 (여기서， 0≤x≤l, 0<y<l, 0≤x+y≤l임)을 갖는 반도체 물질로 이루어질 수 있다. , 상기 n-형 반도체 층 (110)은 n-형 도전형 불순물이 도핑된 GaN층 또는3 and 4, the LED chip 100 having a curved substrate according to the present invention includes a substrate 140, an n-type semiconductor charge 110 formed on the substrate 140, an active layer 120 formed on the n-type semiconductor layer 110, a pV type semiconductor layer 130 formed on the active layer 120, and an n-type semiconductor on which the active layer 120 is not formed. An n-type electrode 160 formed in the layer 110, a p-type electrode 170 formed in the P-type semiconductor layer 130, and a lower portion of the substrate 140. 140 includes a bending deformation unit 180 generating a deflection so as to bend, and a reflective layer 190 provided between the substrate and the bending deformation unit 180.一 The n-type and p-type semiconductor layers 110 and 130 and the active layer 120 may have an Al x In y Ga (lxy) N composition formula, where 0 ≦ x ≦ l, 0 <y <l, and 0 ≦ x + y ≦ l. It may be made of a semiconductor material having a). The n-type semiconductor layer 110 may be a GaN layer doped with n-type conductivity impurities or
GaN/AlGaN층으로 이루어질 수 있으며， nᅳ형 도전형 불순물로는 예를 들어， Si， Ge 및 Sn등을 사용하고， 바람직하게는 Si를 주로 사용한다. The GaN / AlGaN layer may be formed, and as the n ᅳ type conductive impurity, for example, Si, Ge, Sn, etc. may be used, and preferably Si is mainly used.
상기 활성충 (120)은 다중 양자 우물 (MQW) 구조의 InGaN/GaN층으로 이루어질 수 있다. The active layer 120 may be formed of an InGaN / GaN layer having a multi quantum well (MQW) structure.
상기 P-형 질화물 반도체층 (130)은 P-형 도전형 불순물이 도핑된 GaN층 또는 GaN/AlGaN층으로 이루어질 수 있으며， p-형 도전형 불순물로는 예를 들어， Mg, Zn 및 Be등을 사용하고， 바람직하게는 Mg을 주로 사용한다. The P-type nitride semiconductor layer 130 may be formed of a GaN layer or a GaN / AlGaN layer doped with P-type conductive impurities. For example, Mg, Zn, and Be may be used as p-type conductive impurities. Is used, and preferably Mg is mainly used.
상기 기판 (140)은, 바람직하게는， 사파이어를 포함하는 투명한 재료를 이용 하여 형성되며， 사파이어 이외에도 징크 옥사이드 (zinc oxide, ZnO), 갈륨 나이트 라이드 (gallium nitride , GaN)， 실리콘 카바이드 (silicon carbide, SiC) 및 알루미 늄 나이트라이드 (A1N) 둥으로 형성될 수 있다. The substrate 140 is preferably formed using a transparent material including sapphire, in addition to sapphire, zinc oxide (ZnO), gallium nitride (GaN), silicon carbide (silicon carbide, SiC) and aluminum nitride (A1N) rounds.
상기 기판 (140)과 nᅳ형 반도체층 (110)의 사이에는， 이들 간의 격자 정합을 향상시키기 위한 버퍼층 (150)이 형성되어 있을 수 있고， 상기 버퍼층 (150)은 GaN 또는 AlN/GaN등으로 형성될 수 있다. A buffer layer 150 may be formed between the substrate 140 and the nV type semiconductor layer 110 to improve lattice matching therebetween, and the buffer layer 150 may be formed of GaN or AlN / GaN. Can be.
식각에 의해 드러난 n-형 반도체층 (110) 상에는 n-형 전극 (160)이 형성되고， 상기 P-형 반도체층 (130) 상에는 P-형 전극 (170)이 형성된다. An n-type electrode 160 is formed on the n-type semiconductor layer 110 exposed by etching, and a P-type electrode 170 is formed on the P-type semiconductor layer 130.
상가 휨 변형부 (180)는 기판 (140)이 상방향으로 볼록 형상이 되도록 인장 웅 력을 발생하는 구성으로서， Cr, Ni, Cu, Al, Au, Ag, Mo, W 중 하나 이상을 포함하 며， 바람직하게는 열팽창계수가 다른 두 종류 이상의 물질로 이루어진 바이메탈이 고, 상기 바이메탈은 금속， 유전체， 세라믹， 반도체 등의 물질 증 선택하여 구성될 수 있고, 바람직하게는 세라믹이다. The malleable deformation part 180 is a structure that generates tensile stresses so that the substrate 140 becomes convex in the upward direction, and includes at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, and W. Preferably, it is a bimetal composed of two or more kinds of materials having different coefficients of thermal expansion, and the bimetal may be formed by increasing and selecting materials such as metals, dielectrics, ceramics, and semiconductors, and preferably ceramics.
상기 금속은 니켈， 철， 망간， 몰리브덴， 구리， 알루미늄 증 하나 이상을 포 함하여 형성되고, 상기 유전체는 Si02, SiN, SiON 중 하나 이상을 포함하여 형성되 며， 상기 반도체는 Si, GaN, A1N, GaAs 중 하나 이상을 포함하여 형성된다. The metal is formed of nickel, iron, manganese, molybdenum, copper, aluminum at least one, the dielectric is formed including at least one of Si02, SiN, SiON, the semiconductor is Si, GaN, A1N, It is formed comprising one or more of GaAs.
또한， 상기 휨 변형부 (180)는 임의의 열팽창계수를 갖는 제 1 휨 변형부 (181)와， 상기 제 1 휨 변형부 (181)의 열팽창계수보다 작은 열팽창계수를 갖는 제 2 휨 변형부 (182)로 구성되어 열팽창계수가 큰 제 1 휨 변형부 (181)쪽이 더 많이 팽창하면서 기판 (140)의 상방향으로 볼록 형상이 되도톡 휜다.
또한， 상기 휨 변형부 (180)는 기판 (140)과 Au-In, Cu-Sn, Au-Sn, Au-Ge , Auᅳ Si, Al-Si 중에서 하나 이상으로 구성되는 공정합금 (Eutectic alloy)을 이용한 공 정 (Eutectic) 본딩을 통해 결합하거나 또는 도금법 중 어느 하나를 통해 결합한다. 상기 제 1 휨 변형부 (181)는 팽창이 잘 되는 니켈 ·망간 ·철의 합금， 니켈 ' 몰리브덴 ·철의 합금, 니켈 ·망간ᅳ구리의 합금 중 어느 하나로 이루어지고, 상기 제 2 휨 변형부 (182)는 게 1 휩 변형부 (181)에 비해 팽창이 잘 되지 않는 니켈 -철 의 합금으로 이루어진다. In addition, the bending deformation portion 180 may include a first bending deformation portion 181 having an arbitrary thermal expansion coefficient, and a second bending deformation portion having a thermal expansion coefficient smaller than that of the first bending deformation portion 181 ( 182, and the first bending deformation portion 181 having a high coefficient of thermal expansion expands more convexly in the upward direction of the substrate 140. As shown in FIG. In addition, the bending deformation unit 180 is a eutectic alloy composed of at least one of the substrate 140 and Au-In, Cu-Sn, Au-Sn, Au-Ge, Au ᅳ Si, Al-Si. Bond through the bonding process (Eutectic) or by any one of the plating method. The first bending deformation portion 181 is made of any one of an alloy of nickel, manganese and iron, nickel 'molybdenum and iron, and nickel and manganese copper, which are well expanded, and the second bending deformation portion (181). 182 is made of an alloy of nickel-iron that is less expandable than crab 1 whip deformation 181.
본 실시예에서는 제 1 및 제 2 휨 변형부 (181， 182)를 금속을 실시예로 구 성하였으나， 열팽창계수가 다른 유전체， 세라믹， 반도체를 실시예로 구성할 수도 있다. In the present embodiment, the first and second bending deformation parts 181 and 182 are formed of metals in the examples, but dielectrics, ceramics, and semiconductors having different coefficients of thermal expansion may be used in the embodiments.
또한， 상기 휨 변형부 (180)는 인장 웅력에 의한 변형시 곡를이 2.0ra_1 이상 In addition, the bending deformation portion 180 is more than 2.0ra _1 when the deformation by the deformation of the tensile force
20m"1 이하가 되도록.한다. 20 m "1 or less.
상기 활성층 (120)인 InGaN/GaN의 다중 양자 우물에 걸리는 압축 웅력은 약 The compression force applied to the multiple quantum well of InGaN / GaN, which is the active layer 120, is about
6.5GPa로 상기 압축 응력과 반대로 인장 웅력을 걸어주고， 하기의 표 1과 같이 인 장응력에 따른'곡률이 형성된다. Giving a tension to walk ungryeok as opposed to the compressive stress to 6.5GPa, the "curvature according to the stress field, as shown in Table 1 below is formed.
【표 1】
Table 1
도 5는 도 3에 따른 곡선 기판을 갖는 LED 칩의 휨 변형에 따른 광 출력 특 성과 전기적 특성 변화를 나타낸 예시도로서， 도 5(a)에 도시된 바와 같이, 인장 웅력에 파라 휨 변형부가 휘어짐이 증가할수톡 광 출력 (Light Output Power)이 향 상되는 것을 알 수 있고， 또한 도 5(b)와 같이 휨 변형에 따른 전압 /전류의 차이는 없음을 알 수 있다. FIG. 5 is an exemplary view illustrating a change in light output characteristics and electrical characteristics according to the bending deformation of the LED chip having the curved substrate according to FIG. 3. As illustrated in FIG. 5 (a), the para bending deformation portion is bent in the tensile force. It can be seen that the light output power (light output power) is increased, and also there is no difference in voltage / current due to bending deformation as shown in FIG.
도 6은 도 3에 따른 곡선 기판올 갖는 LED 칩의 기판 두께에 따른 광 출력 특성과 전기적 특성 변화를 나타낸 예시도로서， 도 6(a)에 도시된 바와 같이， 기판 의 두께를 얇게 하여 휘어짐이 증가할수록 광 출력 (Light Output Power)이 향상되 는 것을 알 수 있고 또한， 도 6(b)와 같이 휨 변형에 따른 전압 /전류의 차이가 크 지 않음을알 수 있다. FIG. 6 is an exemplary view illustrating a change in light output characteristics and electrical characteristics according to a substrate thickness of an LED chip having a curved substrate according to FIG. 3, and as shown in FIG. It can be seen that as the light output (Light Output Power) increases as the increase, and also the difference in voltage / current according to the bending deformation as shown in Figure 6 (b) is not large.
도 7은 도 3에 따른 곡선 기판을 갖는 LED 칩의 기판 두께에 따른 내부 양자 효율의 특성 변화를 나타낸 예시도로서， 기판의 두께가 얇아질수록 내부 양자 효율
(Internal Quantum Efficiency)이 증가함을 알 수 있다. FIG. 7 is an exemplary view illustrating a change in characteristics of internal quantum efficiency according to a substrate thickness of an LED chip having a curved substrate according to FIG. 3. It can be seen that (Internal Quantum Efficiency) increases.
즉 기판의 두께가 80μηι에서 35μηι로 줄어들 경우 내부 양자 효을은 약 8% 정도 증가하는 것을 알 수 있다. In other words, when the thickness of the substrate is reduced from 80μηι to 35μηι, the internal quantum effect increases by about 8%.
상기 반사층 (190)은 기판 (140)과 휨 변형부 (180) 사이에 설치된 분산 브라그 반사 소자로서， 굴절률이 다른 두 개의 투명재료를 여러 층으로 번갈아 적층한 것 으로 아래 흡수되는 빛을 유전체 반사막 (Distributed Bragg Reflector, DBR)을 통 해 반사시켜 광효율이 향상될 수 있도록 하며， 상기 반사층 (190)은 Al, Pt, Ni, Pd, Ti, Au, W, Ag중 하나 이상으로 구성되는 반사메탈이다 : The reflective layer 190 is a distributed Bragg reflective element provided between the substrate 140 and the bending deformation unit 180. The reflective layer 190 is formed by alternately stacking two transparent materials having different refractive indices into a plurality of layers. (Distributed Bragg Reflector, DBR) to reflect the light efficiency can be improved, the reflective layer 190 is a reflective metal composed of one or more of Al, Pt, Ni, Pd, Ti, Au, W, Ag. :
(LED 패키지) (LED package)
도 8은 본 발명에 따른 곡선 기판을 갖는、 LED 칩을 이용한 LED 패키지의 구 조를 나타낸 단면도이다. 8 is a cross-sectional view showing the structure of an LED package using an LED chip having a curved substrate according to the present invention.
도 8에 나타낸 바와 같이， 본 발명에 따른 곡선 기판을 갖는 LED 칩을 이용 한 LED 패키지 (200)는 저면에 임의의 곡률을 형성하도록 만곡된 LED 칩 (100)과， 상 기 LED 칩 (100)과 접속된 리드 프레임 (210)과， 상기 리드 프레임 (210)이 설치되고， 상기 LED 칩 (100)에서 발광된 빛이 반사되도록 리플렉터를 형성한 패키지 몰드 (220)와， 상기 LED 칩 (100)과 리드 프레임 (210)을 연결하는 본딩 와이어 (230)와， 상기 패키지 몰드 (220)에 충진되어 상기 LED 칩 (100)과 본딩 와이어 (230)를 보호하 고， 상기 LED 칩 (100)의 기판이 휘어진 상태를 유지하도록 고정하는 봉지재 (240)를 포함한다. As shown in FIG. 8, the LED package 200 using the LED chip having a curved substrate according to the present invention includes an LED chip 100 that is curved to form an arbitrary curvature on the bottom thereof, and the LED chip 100. And a lead mold 210 connected with the package frame, a package mold 220 on which the lead frame 210 is installed, and a reflector formed to reflect light emitted from the LED chip 100, and the LED chip 100. And a bonding wire 230 connecting the lead frame 210 and the lead frame 210 to the package mold 220 to protect the LED chip 100 and the bonding wire 230, and the substrate of the LED chip 100. The encapsulant 240 is fixed to maintain the curved state.
상기 LED 칩 (100)은 기판과， 상기 기판 상에 형성한 n-형 반도체 층과， 상기 n-형 반도체 층 상에 형성한 활성층과， 상기 활성층 상에 형성한 P-형 반도체 층 과， 상기 활성층이 형성되지 않은 n-형 반도체 층에 형성한 n-형 전극과， 상기 P- 형 반도체 층에 형성한 P-형 전극과， 상기 기판의 하부에 형성되어 상기 기판이 휘 어지도록 웅력을 발생하는 휨 변형부와， 상기 기판과 휨 변형부 사이에 형성한 반 사층을 포함하여 구성된다. The LED chip 100 includes a substrate, an n-type semiconductor layer formed on the substrate, an active layer formed on the n-type semiconductor layer, a P-type semiconductor layer formed on the active layer, An n-type electrode formed on an n-type semiconductor layer in which no active layer is formed, a P-type electrode formed on the P-type semiconductor layer, and a lower portion of the substrate to generate a deflection to bend the substrate And a reflection layer formed between the substrate and the bending deformation portion.
상기 LED 칩 (100)의 휨 변형부는 바이메탈로서， 상기 기판이 상방향으로 볼 록 형상이 되도록 인장 웅력을 발생하는 구성으로 바람직하게는 열팽창계수가 다른 두 종휴 이상의 물질로 이루어진 바이메탈이고, 상기 바이메탈은 금속， 유전체， 세 라믹, 반도체 등의 물질 중 선택하여. 구성될 수 있다. The bending deformation portion of the LED chip 100 is a bimetal, and is a bimetal composed of two or more materials having different thermal expansion coefficients. Choose from materials such as metals, dielectrics, ceramics and semiconductors. Can be configured.
상기 금속은 니켈， 철， 망간， 몰리브덴， 구리， 알루미늄 중 하나 이상을 포 함하여 형성되고， 상기 유전체는 Si02, SiN, SiON 중 하나 이상을 포함하여 형성되
며， 상기 반도체는 Si, GaN, A1N, GaAs 중 하나 이상을 포함하여 형성된다. The metal is formed containing at least one of nickel, iron, manganese, molybdenum, copper, aluminum, the dielectric is formed containing at least one of Si02, SiN, SiON. The semiconductor may be formed including one or more of Si, GaN, A1N, and GaAs.
또한， 상기 LED 칩 (100)의 휨 변형부에 걸리는 인장 웅력은 LED 칩 (100)의 제조 공정 중 리플로우 공정에서 발생하는 열에 의해 발생되어 휨 변형부가 기판의 상방향으로 돌출된 볼록 형상이 되도록 한다. In addition, the tensile force applied to the bending deformation portion of the LED chip 100 is generated by the heat generated in the reflow process during the manufacturing process of the LED chip 100 so that the bending deformation portion is a convex shape protruding upward in the substrate. do.
또한， 상기 볼록 형상으로 돌출된 휨 변형부는 Cr, Ni, Cu, Al, Au, kg, Mo, W 중 하나 이상을 포함하고， 패키지 몰드 (220)에 충진되는 봉지재 (240)가 경화되머 휘어진 상태가 고정되도록 한다. In addition, the convex shape protruding warpage deformation portion includes at least one of Cr, Ni, Cu, Al, Au, kg, Mo, W, the encapsulant 240 filled in the package mold 220 is cured and bent Let the state be fixed.
또한， 상기 LED 칩 (100)의 기판과 휨 변형부는 페이스트 (Paste) 또는 에폭시 중 어느 하나를 이용하여 접착될 수 있으며， Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si , Al-Ge, Al-Si 중에서 하나 이상으로 구성되는 공정합금 (Eutect ic alloy)을 이용한 공정 (Eutectic) 본딩， 또는 도금법을 이용하여 결합되도록 한다. In addition, the substrate and the bending deformation portion of the LED chip 100 may be bonded using any one of a paste or epoxy, Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si To be bonded using eutectic bonding, or plating using an eutectic alloy composed of one or more of Al, Ge, and Al-Si.
도 9는 도 8에 따른 곡선 기판을 갖는 LED 칩을 _이용한 LED 패키지의 기판 두께에 따른 내부 양자 효율의 특성 변화를 나타낸 예시도로서， LED 칩의 기판 두 께에 따른 내부 양자 효율의 특성 변화를 나타낸 예시도로서， 기판의 두께가 얇아 질수록 내부 양자 효율 (Internal Quantum Efficiency)이 증가함을 알 수 있다. FIG. 9 is an exemplary view illustrating a characteristic change of internal quantum efficiency according to a substrate thickness of an LED package using an LED chip having a curved substrate according to FIG. 8. As shown in the figure, it can be seen that the internal quantum efficiency (Internal Quantum Efficiency) increases as the thickness of the substrate becomes thinner.
도 10은 도 8에 따른 곡선 기판을 갖는 LED 칩을 이용한 LED 패키지의 곡률 에 따른 파장 변화를 나타낸 예시도로서， 곡률 (Curvature, m—1)이 증가할수록 파장 (Wavelength, nm)가 짧아져 LED 칩 (100)의 발광 피크 파장은 단파장 (짧은 파장)으 로 이동한다. FIG. 10 is an exemplary diagram illustrating wavelength change according to curvature of an LED package using an LED chip having a curved substrate according to FIG. 8. As the curvature (m— 1 ) increases, the wavelength (Wavelength, nm) is shortened. The peak emission wavelength of the chip 100 shifts to a shorter wavelength (shorter wavelength).
따라서 LED 칩에 인장 웅력이 형성되도록 하여 휘어진 형상을 유지함으로써， 양자 우물층의 밴드 구조를 개선하여 내부 양자 효율을 증가시켜 LED 칩의 광 출력 효율을 향상시킬 수 있게 된다. 상기와 같이， 본 발명의 반람직한 실시 예를 참조하여 설명하였지만 해당 기 술 분야의 숙련된 당업자라면 하기의 특허청구범위에 기재된 본 발명의 사상 및 영 역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다. Therefore, by maintaining the curved shape by forming a tensile force on the LED chip, it is possible to improve the band structure of the quantum well layer to increase the internal quantum efficiency to improve the light output efficiency of the LED chip. As described above, the present invention has been described with reference to the preferred embodiments of the present invention, but those skilled in the art can vary the present invention without departing from the spirit and scope of the present invention as set forth in the claims below. It will be understood that modifications and changes can be made.
또한, 본 발명의 실시예를 설명하는 과정에서 도면에 도시된 선들의 두께나 구성요소의 크기 등은 설명의 명료성과 편의상 과장되게 도시되어 있을 수 있으며， 상술된 용어들은 본 발명에서의 기능을 고려하여 정의된 용어들로서 이는 사용자， 운용자의 의도 또는 관례에 따라 달라질 수 있으므로， 이러한 용어들에 대한 정의 는 본 명세서 전반에 걸친 내용을 토대로 내려져야 할 것이다.
In addition, in the process of describing an embodiment of the present invention, the thickness of the lines or the size of the components shown in the drawings may be exaggerated for clarity and convenience of description, and the above terms are considered in the present invention. As the terms are defined in accordance with the user or operator's intention or convention, the definition of these terms should be made based on the contents throughout the specification.
Claims
【청구의 범위] [Claim]
【청구항 1】 [Claim 1]
기판 (140); Substrate 140;
상기 기판 (140) 상에 형성한 n-형 반도체 층 (110); An n-type semiconductor layer 110 formed on the substrate 140;
상기 n-형 반도체 층 (110) 상에 형성한 활성층 (120); An active layer 120 formed on the n-type semiconductor layer 110;
상기 활성층 ( 0) 상에 형성한 P-형 반도체 층 (130); A P-type semiconductor layer 130 formed on the active layer (0);
상기 활성층 (120)이 형성되지 않은 n-형 반도체 층 (110)에 형성한 n-형 전극 N-type electrode formed on the n-type semiconductor layer 110 where the active layer 120 is not formed
(160)； (160);
상기 P-형 반도체 충 (130)에 형성한 P-형 전극 (170); 및 A P-type electrode 170 formed on the P-type semiconductor charge 130; And
상기 기판 (140)의 하부에 형성되어 상기 기판 (140)이 휘어지도록 웅력을 발 생하는 휨 변형부 (180)를 포함하는 곡선 기판을 갖는 LED칩. The LED chip having a curved substrate formed on the lower portion of the substrate 140 and includes a bending deformation portion 180 for generating a force to bend the substrate (140).
[청,구항 2】 [Qing, Port 2]
제 1 항에 있어서， The method of claim 1,
상기 휨 변형부 (180)는 기판 (140)아 상방향으로 볼록 형상이 되도록 인장 응 력을 발생하는 것을 특징으로 하는 곡선 기판올 갖는 LED 칩. The bending deformation part 180 is a substrate having an LED chip having a curved substrate, characterized in that to generate a tensile stress to be convex in the upward direction.
【청구항 3】 [Claim 3]
제 1 항에 있어서， The method of claim 1,
상기 휨 변형부 (180)는 곡률이 2.0m1 이상 20m1 이하인 것을 특징으로 하는 곡선 기판을 갖는 LED칩 . The bending deformation unit 180 is a LED chip having a curved substrate, characterized in that the curvature is 2.0m 1 or more and 20m 1 or less.
【청구항 4】 [Claim 4]
제 1 항에 있어서， The method of claim 1,
상기 휨 변형부 (180)는 열팽창계수가 다른 두 종류 이상의 물질로 이루어진 바이메탈인 것을 특징으로 하는 곡선 기판을 갖는 LED 칩. The bending deformation part 180 is a LED chip having a curved substrate, characterized in that the bimetal made of two or more kinds of materials having different coefficients of thermal expansion.
[청구항 5】 [Claim 5]
제 4 항에 있어서， The method of claim 4 ,
상기 휨 변형부 (180)는 임의의 열팽창계수를 갖는 제 1 휨 변형부 (181); 및 상기 제 1 휨 변형부 (181)의 열팽창계수보다 작은 열팽창계수를 갖는 제 2 휨 변형부 (182)를 포함하는 것을 특징으로 하는 곡선 기판을 갖는 LED칩.
【청구항 6】 The bending deformation part 180 includes a first bending deformation part 181 having an arbitrary coefficient of thermal expansion; And a second bending deformation portion (182) having a thermal expansion coefficient smaller than that of the first bending deformation portion (181). [Claim 6]
제 4 항에 있어서， The method of claim 4,
상기 바이메탈은 니켈， 철， 망간， 몰리브덴， 구리， 알루미늄 중 하나 이상을 포함하는 금속인 것을 특징으로 하는 곡선 기판을 갖는 LED 칩. The bimetal is a LED chip having a curved substrate, characterized in that the metal containing at least one of nickel, iron, manganese, molybdenum, copper, aluminum.
【청구항 7】 [Claim 7]
제 4 항에 있어서， The method of claim 4,
상기 바이메탈은 Si02, SiN, SiON 중 하나 이상을 포함하는 유전체인 것을 특징으로 하는 곡선 기판을 갖는 LED 칩 . The bimetal is a LED chip having a curved substrate, characterized in that the dielectric containing at least one of Si02, SiN, SiON.
【청구항 8] [Claim 8]
제 4 항에 있어서， The method of claim 4,
상기 바이메탈은 세라믹인 것을 특징으로 하는 곡선 기판을 갖는 LED 칩 . The bimetal is an LED chip having a curved substrate, characterized in that the ceramic.
【청구항 9】 [Claim 9]
제 4 항에 있어서， The method of claim 4,
상기 바이메탈은 Si, GaN, A1N, GaAs 중 하나 이상을 포함하는 반도체인 것 을특징으로 하는 곡선 기판을 갖는 LED 칩 . The bimetal is a LED chip having a curved substrate, characterized in that the semiconductor containing at least one of Si, GaN, A1N, GaAs.
【청구항 10】 [Claim 10]
제 1 항에 있어서， The method of claim 1,
상기 휨 변형부는 Cr, Ni, Cu, Al, Au, Ag, Mo, W 중 하나 이상을 포함하는 것을 특징으로 하는 LED칩을 이용한 LED 칩 . The bending deformation part LED chip using an LED chip, characterized in that it comprises at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, W.
【청구항 11】 [Claim 11]
제 1 항에 있어서， The method of claim 1,
상기 기판과 휨 변형부는 Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si， Al-Si 중에서 하나 이상으로 구성되는 공정합금 (Eutectic alloy)을 이용한 공정 (Eutectic) 본딩 을 통해 결합하는 것을 특징으로 하는 LED 칩을 이용한 LED 칩. The substrate and the bending deformation portion are formed through eutectic bonding using an eutectic alloy composed of at least one of Au-In, Cu-Sn, Au-Sn, Au-Ge, Au-Si, and Al-Si. LED chip using an LED chip, characterized in that to combine.
【청구항 12]
제 1항에 있어서, [Claim 12] The method of claim 1,
상기 휨 변형부 (180)는 세라믹인 것을 특징으로 하는 곡선 기판 ΐ 갖는 LED 칩. LED chip having a curved substrate-characterized in that the bending deformation portion 180 is a ceramic.
【청구항 13】 [Claim 13]
제 1항에 있어서， The method of claim 1,
상기 기판과 휨 변형부는 도금법을 통해 결합하는 것을 특징으로 하는 LED 칩. LED substrate, characterized in that for coupling the substrate and the bending deformation via a plating method.
【청구항 14】 [Claim 14]
제 1 항에 있어서， The method of claim 1,
상기 LED 칩은 상기 기판 (140)과 휨 변형부 (180)사이에 설치한 반사층 (190) 을 더 포함하는 것을 특징으로 하는 곡선 기판을 갖는 LED칩. The LED chip has a curved substrate further comprises a reflective layer (190) provided between the substrate (140) and the bending deformation portion (180).
【청구항 15】 [Claim 15]
제 14항에 있어서， The method of claim 14,
상기 반사층 (190)은 분산 브라그 반사 소자 (Distributed Bragg Reflector, DBR)로 이루어진 것을 특징으로 하는 곡선 기판을 갖는 LED 칩 . The reflective layer 190 is a LED chip having a curved substrate, characterized in that consisting of a Distributed Bragg Reflector (DBR).
【청구항 16] [Claim 16]
제 14항에 있어서， The method of claim 14,
상기 반사층 (190)은 Al, Pt, Ni, Pd, Ti, Au, , Ag 중 하나 이상을 포함한 반사메탈인 것을 특징으로 하는 곡선 기판을 갖는 LED칩 . The reflective layer 190 is an LED chip having a curved substrate, characterized in that the reflective metal containing at least one of Al, Pt, Ni, Pd, Ti, Au,, Ag.
【청구항 17】 [Claim 17]
LED패키지로서 As an LED package
기판과, 상기 기판 상에 형성한 n-형 반도체 충과， 상기 n-형 반도체 층 상 에 형성한 활성충과， 상기 활성층 상에 형성한 P-형 반도체 층과, 상기 활성층이 형성되지 않은 nᅳ형 반도체 층에 형성한 n-형 전극과， 상기 P-형 반도체 층에 형성 한 P-형 잔극과， 상기 기판의 하부에 형성되어 상기 기판이 휘어지도록 웅력을 발 생하는 휨 변형부를 포함한 LED칩 (100); A substrate, an n-type semiconductor charge formed on the substrate, an active charge formed on the n-type semiconductor layer, a P-type semiconductor layer formed on the active layer, and an n ᅳ type semiconductor on which the active layer is not formed An LED chip including an n-type electrode formed in a layer, a P-type electrode formed in the P-type semiconductor layer, and a bending deformation portion formed at a lower portion of the substrate and generating a force to bend the substrate (100) );
상기 LED 칩 (100)과 접속된 리드 프레임 (210);
상기 리드 프레임 (210)이 설치되고， 상기 LED 칩 (100)에서 발광된 빛이 반사 되도록 리플렉터를 형성한 패키지 몰드 (220); A lead frame 210 connected to the LED chip 100; A package mold 220 in which the lead frame 210 is installed and a reflector is formed to reflect light emitted from the LED chip 100;
상기 LED 칩 (100)과 리드 프레임 (210)을 연결하는 본딩 와이어 (230); 및 상기 패키지 몰,드 (220)에 충진되어 상기 LED 칩 (100)과 본딩 와이어 (230)를 보호하고， 상기 LED 칩 (100)의 기판이 휘어진 상태를 유지하도록 고정하는 A bonding wire 230 connecting the LED chip 100 and the lead frame 210 to each other; And a charge of the package mold 220 to protect the LED chip 100 and the bonding wire 230, and to fix the substrate of the LED chip 100 to maintain a bent state.
봉지재 (240)를 포함하는 곡선 기판을 갖는 LED 칩을 이용한 LED 패키지 . An LED package using an LED chip having a curved substrate including an encapsulant 240.
【청구항 18】 [Claim 18]
제 17 항에 있어서， The method of claim 17,
. 상기 LED 칩 (100)은 기판과， 휨 변형부 사이에 반사층을 더 포함하는 것을 특징으로 하는 LED 칩을 이용한 LED 패키지 . . . The LED chip 100 further comprises a reflective layer between the substrate and the bending deformation portion LED package using an LED chip. .
【청구항 19】 [Claim 19]
제 17 항 또는 제 18 항에 있어서， The method of claim 17 or 18,
상기 휨 변형부는 Cr, Ni, Cu, Al, Au, Ag, Mo, W 중 하나 이상을 포함하는 것을 특징으로 하는 LED 칩을 이용한 LED 패키지. The bending deformation unit is an LED package using an LED chip, characterized in that it comprises at least one of Cr, Ni, Cu, Al, Au, Ag, Mo, W.
【청구항 20】 [Claim 20]
제 17 항 또는 제 18 항에 있어서， The method of claim 17 or 18,
상기 기판과 ¾ 변형부는 페이스트 (Paste) 또는 에폭시 중 어느 하나를 이용 하여 접착하는 것을 특징으로 하는 LED 칩을 이용한 LED 패키지 . LED substrate using the LED chip, characterized in that for bonding the substrate and the ¾ strain using any one of a paste (Paste) or epoxy.
【청구항 21】 [Claim 21]
제 17 항 또는 제 18 항에 있어서， The method of claim 17 or 18,
상기 기판과 휨 변형부는 Au— In, Cu-Sn, Au-Sn, Au-Ge, Au-Si , Al-Ge, Al-Si 중에서 하나 이상으로 구성되는 공정합금 (Eutectic alloy)을 이용한 공정 (Eutectic) 본딩을 통해 결합하는 것을 특징으로 하는 LED 칩을 이용한 LED 패키 The substrate and the warpage deformation process using an eutectic alloy consisting of at least one of Au—In, Cu-Sn, Au-Sn, Au-Ge, Au-Si, Al-Ge, Al-Si (Eutectic alloy) ) LED package using an LED chip, characterized in that bonding through
【청구항 22】 [Claim 22]
제 17 항 또는 제 18 항에 있어서
상기 기판과 휨 변형부는 도금법을 통해 결합하는 것을 특징으로 하는 LED 칩을 이용한 LED 패키지. The method according to claim 17 or 18. The LED package using the LED chip, characterized in that the substrate and the bending deformation portion is bonded by a plating method.
【청구항 23】 [Claim 23]
제 17 항 또는 제 18 항에 있어서， The method of claim 17 or 18,
상기 LED 칩 (100)의 응력은 인장 웅력이고， 상기 봉지재 (240)의 경화를 위한 리플로우 공정에서 발생하는 열에 의해 발생하는 것을 특징으로 하는 곡선 기판을 갖는 LED 칩을 이용한 LED 패키지. ᅳ The stress of the LED chip 100 is a tensile force, the LED package using a LED chip having a curved substrate, characterized in that generated by the heat generated in the reflow process for curing the encapsulant (240). ᅳ
【청구항 24】 [Claim 24]
제 17 항 또는 제 18 항에 있어서， ' 18. The method of claim 17 or 18, '
상기 LED 칩 (100)의 휨 변형부는 바이메탈인 것을 특징으로 하는 곡선 기판 을 갖는 LED 칩을 이용한 LED 패키지 .
LED package using a LED chip having a curved substrate, characterized in that the bending deformation portion of the LED chip 100 is bimetal.
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| Application Number | Priority Date | Filing Date | Title |
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| KR1020130000562A KR101439153B1 (en) | 2013-01-03 | 2013-01-03 | Led chip with curvature board and led package using the same |
| KR10-2013-0000562 | 2013-01-03 |
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| US11322908B2 (en) * | 2017-05-01 | 2022-05-03 | Nuvoton Technology Corporation Japan | Nitride light emitter |
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| CN104576854B (en) * | 2013-10-22 | 2017-08-22 | 比亚迪股份有限公司 | LED chip and forming method thereof |
| WO2015058598A1 (en) * | 2013-10-22 | 2015-04-30 | 比亚迪股份有限公司 | Led chip and method of forming same |
| FR3023978A1 (en) * | 2014-07-18 | 2016-01-22 | Commissariat Energie Atomique | OPTOELECTRONIC DEVICE WITH ELECTROLUMINESCENT DIODE |
| KR102211998B1 (en) * | 2019-04-10 | 2021-02-04 | 주식회사 디아이티 | Multi layer ceramic substrate with upper and lower surfaces having different coefficients of expansion and method of manufacturing the same |
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| KR101562375B1 (en) * | 2011-07-08 | 2015-10-23 | 서울바이오시스 주식회사 | Light emitting diode chip and light emitting diode package each having distributed bragg reflector |
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| JP2010192671A (en) * | 2009-02-18 | 2010-09-02 | Panasonic Corp | Transistor, and transistor control system |
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| US11322908B2 (en) * | 2017-05-01 | 2022-05-03 | Nuvoton Technology Corporation Japan | Nitride light emitter |
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| KR101439153B1 (en) | 2014-09-12 |
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