CN104576854B - LED chip and forming method thereof - Google Patents
LED chip and forming method thereof Download PDFInfo
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- CN104576854B CN104576854B CN201310499374.8A CN201310499374A CN104576854B CN 104576854 B CN104576854 B CN 104576854B CN 201310499374 A CN201310499374 A CN 201310499374A CN 104576854 B CN104576854 B CN 104576854B
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 239000004065 semiconductor Substances 0.000 claims abstract description 162
- 230000004888 barrier function Effects 0.000 claims abstract description 47
- 238000000926 separation method Methods 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 24
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 15
- 238000009792 diffusion process Methods 0.000 claims description 30
- 238000005530 etching Methods 0.000 claims description 7
- 238000002955 isolation Methods 0.000 claims description 7
- 230000008901 benefit Effects 0.000 abstract description 8
- 239000000463 material Substances 0.000 description 17
- 238000002347 injection Methods 0.000 description 14
- 239000007924 injection Substances 0.000 description 14
- 239000004020 conductor Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 6
- 230000005611 electricity Effects 0.000 description 5
- 238000009434 installation Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 4
- 238000001259 photo etching Methods 0.000 description 4
- 230000000717 retained effect Effects 0.000 description 4
- 229910052681 coesite Inorganic materials 0.000 description 3
- 229910052906 cristobalite Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000000605 extraction Methods 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052682 stishovite Inorganic materials 0.000 description 3
- 229910052905 tridymite Inorganic materials 0.000 description 3
- 230000000903 blocking effect Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
- H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
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Abstract
The invention discloses a kind of LED chip and forming method thereof.Wherein the LED chip includes：Substrate；N type semiconductor layer；MQW, the area of the MQW is less than the area of n type semiconductor layer, to form N electrode installing zone on n type semiconductor layer；Electronic barrier layer；P type semiconductor layer, it has linear opening, and the bottom of linear opening is contacted with electronic barrier layer；N electrode, N electrode formation is on N electrode installing zone；P electrode, the P electrode includes：P electrode line portion, fills the P electrode connecting portion of the one end in the P electrode line portion of the bottom of linear opening, the P electrode end on p type semiconductor layer and positioned at one end of linear open upper edge and connection P electrode end and P electrode line portion；And separation layer, separation layer is positioned between P electrode end and p type semiconductor layer, and the shape and the shape of P electrode end of separation layer match.The LED chip of the present invention has the advantages that driving voltage is low, luminosity is high.
Description
Technical field
The invention belongs to technical field of semiconductors, and in particular to a kind of LED chip and forming method thereof.
Background technology
Because LED has the advantages that environmental protection, energy-conservation, long lifespan, what is obtained is widely applied.Fig. 1 is of the prior art
The structural representation of horizontal structure LED chip.As shown in Figure 1, the LED chip has following feature：（1）In the epitaxial slice structure
Growth has conventional n type semiconductor layer 2 '；（2）P electrode 8 ' is deposited directly to the electric current of the ITO materials on the surface of P-type semiconductor 5 '
Diffusion layer（Current Diffusion Layer, CDL）On 7 ', and the lower section of P electrode 8 ' is provided with SiO2The electric current resistance of material
Barrier（Current Blocking Layer, CBL）6′；（3）N electrode 5 ' directly contacts n type semiconductor layer 2 '.
In the LED chip, due to the good conductivity of ITO materials, and the path that electric current can select resistance minimum is passed
Defeated diffusion, so electric current can be diffused rapidly to stepped area after the injection of P electrode 8 ' along the surface of current-diffusion layer 7 ', it is then straight again
Connect and sequentially pass through p type semiconductor layer 5 ', electronic barrier layer downwards（Electron Blocking Layer, EBL）4 ', Multiple-quantum
Trap（Multiple Quantum Wells, MQW）Enter N electrode after 3 '.The phenomenon causes a series of bad shadows to LED chip
Ring.First, the step edge of p type semiconductor layer 5 ' and the current density of the neighbouring position of the middle N electrode 5 ' of n type semiconductor layer 2 ' be very
By force, easily there is current-crowding effect, so as to cause voltage higher.Secondly as most current is current barrier layer 6 '
MQW 3 ', other regions are passed through at the step edge of formation downwards（The particularly underface of current barrier layer 6 ' central area）
The current density of the middle injection of MQW 3 ' is very low, lights seldom, causes the luminosity of integral LED chip relatively low.
The content of the invention
It is contemplated that at least solving one of above-mentioned technical problem to a certain extent or providing at a kind of useful business
Industry is selected.Therefore, it is an object of the present invention to propose a kind of driving voltage is low, luminosity is high LED chip.The present invention
Another purpose be the forming method of the LED chip for proposing that driving voltage is low, luminosity is high a kind of.
LED chip according to embodiments of the present invention, can include following part：Substrate；N type semiconductor layer, the N-type half
Conductor layer is located at the substrate；MQW, the MQW is located on the n type semiconductor layer, the volume
The area of sub- trap is less than the area of the n type semiconductor layer, to form N electrode installing zone on the n type semiconductor layer；Electronics
Barrier layer, the electronic barrier layer is located on the MQW；P type semiconductor layer, the p type semiconductor layer is located at described
On electronic barrier layer, the p type semiconductor layer has linear opening, bottom and the electronic barrier layer of the linear opening
Contact；N electrode, the N electrode formation is on the N electrode installing zone；P electrode, the P electrode includes：P electrode line portion, institute
State the bottom that the linear opening is filled in P electrode line portion；P electrode end, the P electrode end is located at the p type semiconductor layer
On and positioned at the linear open upper edge one end；With P electrode connecting portion, the P electrode connecting portion connects the P electricity
Extreme portion and the one end in the P electrode line portion；And separation layer, the separation layer is positioned at the P electrode end and the p-type half
Between conductor layer, the shape of the separation layer and the shape of the P electrode end match.
LED chip according to the above embodiment of the present invention, at least has the following advantages that：
（1）The part that extraneous electrical connection is served as in P electrode end in P electrode is retained in P-type semiconductor layer surface, and the P
Electrode tip bottom design has isolation layer tissue electric current to enter MQW below P electrode end, that is to say, that electric current is only capable of
MQW is flowed into from P electrode line portion.
（2）P electrode line portion is provided in the electronic barrier layer on adjacent MQW, therefore foreign current is from P
P electrode line portion is oriented to after electrode tip injection and then is directly diffused into electronic barrier layer and injects MQW, is needed not move through whole
The top half of individual p type semiconductor layer and electronic barrier layer, reduces driving voltage, improves the injection efficiency of electric current to carry
High luminous efficiency.
（3）It is simple in construction, it is adapted to produce in enormous quantities.
In addition, LED chip according to embodiments of the present invention can also have following additional technical feature：
In one embodiment of the invention, the N electrode includes：N electrode line portion, the N electrode line portion and the line
Shape opening parallel；With N electrode end, the N electrode end is connected with the one end in the N electrode line portion.
In one embodiment of the invention, the N electrode installing zone is close to the side of the LED chip, the line style
Opposite side of the opening close to the LED chip.
In one embodiment of the invention, the separation layer extends to the side wall being linearly open.
In one embodiment of the invention, the n type semiconductor layer includes：First n type semiconductor layer, the first N
Type semiconductor layer is located at the substrate；And second n type semiconductor layer, second n type semiconductor layer is located at described the
On one n type semiconductor layer, wherein the doping concentration of first n type semiconductor layer is more than second n type semiconductor layer
Doping concentration, the area of first n type semiconductor layer is more than the area of second n type semiconductor layer, with the first N
N electrode installing zone is formed in type semiconductor layer.
In one embodiment of the invention, in addition to：N electrode current-diffusion layer, the N electrode current-diffusion layer is located at
Between the N electrode and the n type semiconductor layer, and the shape phase of the shape and the N electrode of the N electrode current-diffusion layer
Matching.
In one embodiment of the invention, in addition to：Go out photosphere, it is described go out photosphere be located at the p type semiconductor layer top
On the region not covered by the P electrode on surface.
The forming method of the LED chip of embodiment according to a further aspect of the invention, may comprise steps of：Lining is provided
Bottom；In substrate formation n type semiconductor layer；MQW is formed on the n type semiconductor layer；In the volume
Electronic barrier layer is formed on sub- trap；P type semiconductor layer is formed on the electronic barrier layer；To the p type semiconductor layer,
Electronic barrier layer and multiple quantum well layer carry out local etching, are pacified using the part that exposes the n type semiconductor layer as N electrode
Fill area；A linear opening is formed in the p type semiconductor layer, bottom and the electronic barrier layer of the linear opening connect
Touch；Patterned isolation is formed on the p type semiconductor layer and positioned at the position of one end of the linear open upper edge
Layer；And N electrode and P electrode are formed, wherein the N electrode is located on the N electrode installing zone, the P electrode includes：P electricity
Fill the bottom of the linear opening in polar curve portion, the P electrode line portion；P electrode end, the P electrode end be located at it is described every
The shape and the shape of the separation layer of on the absciss layer and P electrode end match；With P electrode connecting portion, the P electricity
Pole connecting portion connects the one end in the P electrode end and the P electrode line portion.
The forming method of LED chip according to the above embodiment of the present invention, at least has the following advantages that：
（1）Serve as the part electrically connected with the external world and be retained in p-type half in P electrode end in obtained LED chip in P electrode
Conductor layer surface, and the P electrode end base is designed with isolation layer tissue electric current and enters MQW below P electrode end,
That is electric current is only capable of flowing into MQW from P electrode line portion.
（2）P electrode line portion is provided in the electronic barrier layer on adjacent MQW, therefore foreign current is from P
P electrode line portion is oriented to after electrode tip injection and then is directly diffused into electronic barrier layer and injects MQW, is needed not move through whole
The top half of individual p type semiconductor layer and electronic barrier layer, reduces driving voltage, improves the injection efficiency of electric current to carry
High luminous efficiency.
（3）Technique is simple, is adapted to produce in enormous quantities.
In addition, the forming method of LED chip according to embodiments of the present invention can also have following additional technical feature：
In one embodiment of the invention, the N electrode includes：N electrode line portion, the N electrode line portion and the line
Shape opening parallel；With N electrode end, the N electrode end is connected with the one end in the N electrode line portion.
In one embodiment of the invention, the N electrode installing zone is close to the side of the LED chip, the line style
Opposite side of the opening close to the LED chip.
In one embodiment of the invention, the separation layer extends to the side wall being linearly open.
In one embodiment of the invention, it is described to comprise the following steps in substrate formation n type semiconductor layer：
In the substrate the first n type semiconductor layer of formation；And the second N-type half is formed on first n type semiconductor layer
On conductor layer, wherein the doping that the doping concentration of first n type semiconductor layer is more than second n type semiconductor layer is dense
Degree, the area of first n type semiconductor layer is more than the area of second n type semiconductor layer, and N electrode formation exists
On first n type semiconductor layer.
In one embodiment of the invention, in addition to step：The shape between the N electrode and the n type semiconductor layer
Into N electrode current-diffusion layer, the shape of the shape and the N electrode of the N electrode current-diffusion layer matches.
In one embodiment of the invention, in addition to step：The p type semiconductor layer top surface, not by the P
Photosphere is formed out on the region of electrode covering.
The additional aspect and advantage of the present invention will be set forth in part in the description, and will partly become from the following description
Obtain substantially, or recognized by the practice of the present invention.
Brief description of the drawings
The above-mentioned and/or additional aspect and advantage of the present invention will become from description of the accompanying drawings below to embodiment is combined
Substantially and be readily appreciated that, wherein：
Fig. 1 is the structural representation of the LED chip of conventional flat structure；
Fig. 2 is the structural representation of the LED chip of first embodiment of the invention；
Fig. 3 a and Fig. 3 b are the electrode lay-out schematic diagram of the LED chip of one embodiment of the invention；
Fig. 4 is the structural representation of the LED chip of second embodiment of the invention；
Fig. 5 a and Fig. 5 b are the structural representation and schematic top plan view of the LED chip of third embodiment of the invention；
Fig. 6 a and Fig. 6 b are the structural representation and schematic top plan view of the LED chip of fourth embodiment of the invention；
Fig. 7 is the flow chart of the forming method of LED chip according to embodiments of the present invention；With
Fig. 8 to Figure 13 is the detailed process schematic diagram of the forming method of LED chip according to embodiments of the present invention.
Embodiment
Embodiments of the invention are described below in detail, the example of the embodiment is shown in the drawings, wherein from beginning to end
Same or similar label represents same or similar element or the element with same or like function.Below with reference to attached
The embodiment of figure description is exemplary, it is intended to for explaining the present invention, and be not considered as limiting the invention.
In the description of the invention, it is to be understood that term " " center ", " longitudinal direction ", " transverse direction ", " length ", " width ",
" thickness ", " on ", " under ", "front", "rear", "left", "right", " vertical ", " level ", " top ", " bottom " " interior ", " outer ", " up time
The orientation or position relationship of the instruction such as pin ", " counterclockwise " are, based on orientation shown in the drawings or position relationship, to be for only for ease of
The description present invention and simplified description, rather than indicate or imply that the device or element of meaning must have specific orientation, Yi Te
Fixed azimuth configuration and operation, therefore be not considered as limiting the invention.In addition, term " first ", " second " are only used for
Purpose is described, and it is not intended that indicating or implying relative importance or the implicit quantity for indicating indicated technical characteristic.
Thus, " first " is defined, one or more this feature can be expressed or be implicitly included to the feature of " second ".At this
In the description of invention, " multiple " are meant that two or more, unless otherwise specifically defined.
In the present invention, unless otherwise clearly defined and limited, term " installation ", " connected ", " connection ", " fixation " etc.
Term should be interpreted broadly, for example, it may be being fixedly connected or being detachably connected, or be integrally connected；It can be machine
Tool is connected or electrically connected；Can be joined directly together, can also be indirectly connected to by intermediary, can be two members
Connection inside part.For the ordinary skill in the art, above-mentioned term can be understood in this hair as the case may be
Concrete meaning in bright.
LED chip of the present invention and forming method thereof is discussed in detail with reference to Fig. 2 to Figure 13.
Fig. 2 is the structural representation of the LED chip of first embodiment of the invention.As illustrated, the LED chip can include
Following part：Substrate 100, cushion 110, n type semiconductor layer 200, MQW 300, electronic barrier layer 400, P-type semiconductor
Layer 500, N electrode 600, P electrode 700 and separation layer 800.Cushion 110 is located on substrate 100.N type semiconductor layer 200
Positioned on cushion 110.MQW 300 is formed on n type semiconductor layer 200, and the area of the MQW 300 is small
In the area of n type semiconductor layer 200, to form N electrode installing zone on n type semiconductor layer 200.Electronic barrier layer 400 is located at
On MQW 300.P type semiconductor layer 500 is located on electronic barrier layer 400, and p type semiconductor layer 500 has linear open
Mouthful, the bottom of linear opening is contacted with electronic barrier layer 400.N electrode 600, which forms the P electrode 700 on N electrode installing zone, includes P
Electrode wires portion 710, P electrode end 720 and P electrode connecting portion 730.Wherein, the bottom of linear opening is filled in P electrode line portion 710,
Shape is long and narrow；P electrode end 720 is located on p type semiconductor layer 500 and positioned at one end of linear open upper edge, shape
Do not limit but area is unsuitable excessive, can be used for the extraction electrode that is connected with metal wire；P electrode connecting portion 730 is located at what is be linearly open
Side wall and one end that P electrode end 720 is connected to P electrode line portion 710.Separation layer 800 is located at P electrode end 720 and p-type
Between semiconductor layer 500, the shape and the shape of P electrode end 720 of separation layer 800 match.
It should be noted that substrate 100, cushion 110, n type semiconductor layer 200, MQW 300, electronic barrier layer
400th, the material and thickness of p type semiconductor layer 500, N electrode 600, P electrode 700 and separation layer 800, can be according to target LED core
The performance of piece and flexibly select, the technology belongs to the known of those skilled in the art, does not repeat herein.And need what is illustrated
It is that the cushion 110 in the embodiment is optional rather than necessary, and the cushion 110 in other embodiment is equally hereinafter
So.
LED chip according to the above embodiment of the present invention, at least has the following advantages that：
（1）P electrode end in P electrode serves as the part electrically connected with the external world and is retained in P-type semiconductor layer surface, and is somebody's turn to do
P electrode end base is designed with isolation layer tissue electric current and enters MQW below P electrode end, that is to say, that electric current is only capable of
MQW is flowed into from P electrode line portion.
（2）P electrode line portion is provided in the electronic barrier layer on adjacent MQW, therefore foreign current is from P
P electrode line portion is oriented to after electrode tip injection and then is directly diffused into electronic barrier layer and injects MQW, is needed not move through whole
The top half of individual p type semiconductor layer and electronic barrier layer, reduces driving voltage, improves the injection efficiency of electric current to carry
High luminous efficiency.
（3）It is simple in construction, it is adapted to produce in enormous quantities.
As illustrated by background technology, because conventional LED chip has that current spread is uneven, easily in N poles
Current-crowding effect is pressed in region, causes that the driving voltage of LED chip is higher, and luminosity is relatively low.This is directed to, present invention design
Go out N electrode 600 and P electrode 700 in a kind of LED chip to come in elongated shape and the two parallel interval the technical scheme of layout,
So that electric current equably can diffuse to N electrode 600 from P electrode 700.Therefore, in one embodiment of the invention, N electrode
600 include N electrode line portion 610 and N electrode end 620.Wherein, N electrode line portion 610 and linear opening parallel, shape are long and narrow；N
Electrode tip 620 is connected with the one end in N electrode line portion 610, and shape is not limited but area is unsuitable excessive, can be used for and metal wire phase
Connect extraction electrode.The electrode lay-out schematic diagram of the LED chip of the embodiment can be as shown in Fig. 3 a or Fig. 3 b, and arrow is represented in figure
The sense of current.Preferably, the electrode lay-out mode using electrode symmetry more preferably, shown in the more uniform Fig. 3 a of current spread.
Electrode lay-out integrally takes parallel mode up and down, electric current can than relatively evenly diffusing to N electrode line portion from P electrode line portion,
It is not easy electric current local congestion effect occur, it is to avoid driving voltage is higher.
In one embodiment of the invention, N electrode installing zone is close to the side of LED chip, and line style opening is close to LED core
The opposite side of piece.In the top view of the LED chip of the embodiment, N electrode 600 and P electrode 700 are located at LED chip not respectively
Homonymy, can cause electric current to flow through most chip areas, improve luminosity.
Fig. 4 is the structural representation of the LED chip of second embodiment of the invention.As illustrated, separation layer 800 extends to line
The side wall of property opening.Separation layer 800 in the LED chip of the embodiment not only prevents P electrode end 720 to P-type semiconductor
Injection Current in layer 500, also prevents the Injection Current into p type semiconductor layer 500 of P electrode connecting portion 730, it is to avoid electric current warp
P type semiconductor layer 500 is crossed, driving voltage is advantageously reduced.
Fig. 5 a and Fig. 5 b for the LED chip of third embodiment of the invention structural representation and schematic top plan view, in Fig. 5 a
Arrow represents the sense of current.As illustrated, the n type semiconductor layer 200 in LED chip can include the first n type semiconductor layer 210
With the second n type semiconductor layer 220.First n type semiconductor layer 210 can be located on substrate 100.When LED chip includes delaying
When rushing layer 110, then the first n type semiconductor layer 210 is located on cushion 110.Second n type semiconductor layer 220 is located at the first N-type
On semiconductor layer 210.The doping concentration of first n type semiconductor layer 210 is more than the doping concentration of the second n type semiconductor layer 220.
The area of first n type semiconductor layer 210 is more than the area 220 of the second n type semiconductor layer, with the shape on the first n type semiconductor layer
Into N electrode installing zone.
In the above embodiment of the present invention, it is heavy dopant concentration that can make the first n type semiconductor layer 210, and the second N-type is partly led
Body layer 220 is common doping concentration, and specific concentration can be selected as needed., can by setting the first n type semiconductor layer 210
So that electric current is longitudinal（It is i.e. vertical）Through after the n type semiconductor layer 220 of MQW 400 and second, by high conductive
First n type semiconductor layer 210 of heavy doping is rapidly horizontal（That is level）The position of N electrode 600 is diffused into, voltage is reduced and damages
Consumption.
Fig. 6 a and Fig. 6 b for the LED chip of fourth embodiment of the invention structural representation and schematic top plan view, in Fig. 6 a
Arrow represents the sense of current.As illustrated, may also include N electrode current-diffusion layer 900 in LED chip and/or go out photosphere 1000.
The N electrode current-diffusion layer 900 can be located between N electrode 600 and n type semiconductor layer 200, and N electrode current-diffusion layer 900
The shape of shape and N electrode 600 match.The N electrode current-diffusion layer 900 can be made up of materials such as ITO.Go out photosphere
1000 can be located on the region not covered by P electrode 700 of the top surface of p type semiconductor layer 500.Go out photosphere 1000 equally may be used
To be made up of materials such as ITO.Preferably, N electrode current-diffusion layer 900 can be made and go out photosphere 1000 using ITO materials, and
Processing forms N electrode current-diffusion layer 900 and goes out photosphere 1000 simultaneously.
In LED chip according to the above embodiment of the present invention, CURRENT DISTRIBUTION can be made by setting up N electrode current-diffusion layer 900
Evenly.It is one of conventional EDL layer materials and the square resistance of ITO materials is small.It should be noted that due to electric current not
P type semiconductor layer 500 is flowed through, therefore this on p type semiconductor layer 500 without setting P electrode current-diffusion layer.This embodiment
In, ITO material layers on p type semiconductor layer 500 are used as another purposes --- as going out photosphere 1000.The refractive index of ITO materials
（Refractive index about 1.8-2.0）Between p type semiconductor layer 500（Such as GaN refractive indexes 2.5）And surrounding air（Refractive index about 1.0）
Between, light can be reduced and going out the total reflection on optical interface, the effect of anti-reflection film is played, increase LED chip luminosity.
As shown in fig. 7, the forming method of LED chip according to embodiments of the present invention, may comprise steps of：
S1., substrate is provided.
S2. in substrate formation cushion.
S3. n type semiconductor layer is formed on cushion.
S4. MQW is formed on n type semiconductor layer.
S5. electronic barrier layer is formed on MQW.
S6. p type semiconductor layer is formed on electronic barrier layer.
S7. local etching is carried out to p type semiconductor layer, electronic barrier layer and multiple quantum well layer, to expose N-type semiconductor
A part for layer is used as N electrode installing zone.
S8. a linear opening is formed in p type semiconductor layer, the bottom of linear opening is contacted with electronic barrier layer.
S9. on p type semiconductor layer and patterned isolation is formed positioned at the position of one end of linear open upper edge
Layer.
S10. N electrode and P electrode are formed.N electrode is located on N electrode installing zone.P electrode includes P electrode line portion, P electrode
End and P electrode connecting portion.Fill the bottom of linear opening in P electrode line portion.P electrode end is located on separation layer and P electricity
The extreme shape in portion and the shape of separation layer match.P electrode connecting portion is in the side wall being linearly open and by P electrode end
It is connected to the one end in P electrode line portion.
It should be noted that substrate, cushion, n type semiconductor layer, MQW, electronic barrier layer, p type semiconductor layer,
The material and thickness of N electrode, P electrode and separation layer, can flexibly be selected according to the performance of target LED chip, technology category
In known in those skilled in the art, do not repeat herein.And it should be noted that：Step S102 is optional and nonessential
, if without step S102, step S103 is that n type semiconductor layer is directly formed on substrate.
, can be with it should be noted that step S107, step S108 and step S109 execution sequence can be adjusted flexibly
Priority as needed is performed first afterwards, does not change the essence of the present invention.
The forming method of LED chip according to the above embodiment of the present invention, at least has the following advantages that：
（1）Serve as the part electrically connected with the external world and be retained in p-type half in P electrode end in obtained LED chip in P electrode
Conductor layer surface, and the P electrode end base is designed with isolation layer tissue electric current and enters MQW below P electrode end,
That is electric current is only capable of flowing into MQW from P electrode line portion.
（2）P electrode line portion is provided in the electronic barrier layer on adjacent MQW, therefore foreign current is from P
P electrode line portion is oriented to after electrode tip injection and then is directly diffused into electronic barrier layer and injects MQW, is needed not move through whole
The top half of individual p type semiconductor layer and electronic barrier layer, reduces driving voltage, improves the injection efficiency of electric current to carry
High luminous efficiency.
（3）Technique is simple, is adapted to produce in enormous quantities.
In one embodiment of the invention, N electrode includes：N electrode line portion, N electrode line portion and linear opening parallel；With
N electrode end, N electrode end is connected with the one end in N electrode line portion.Electrode lay-out integrally takes mode parallel up and down, electric current
Can be than relatively evenly diffusing to N electrode line portion from P electrode line portion, it is not easy to electric current local congestion effect occur, it is to avoid drive
Dynamic voltage is higher.
In one embodiment of the invention, N electrode installing zone is close to the side of LED chip, and line style opening is close to LED core
The opposite side of piece.In the top view of the LED chip of the embodiment, N electrode and P electrode, can respectively positioned at the not homonymy of LED chip
To cause electric current to flow through most chip areas, luminosity is improved.
In one embodiment of the invention, separation layer extends to the side wall being linearly open.In the LED chip of the embodiment
Separation layer not only prevent P electrode end Injection Current into p type semiconductor layer, also prevent P electrode connecting portion to p-type half
Injection Current in conductor layer, it is to avoid electric current passes through p type semiconductor layer, advantageously reduces driving voltage.
In one embodiment of the invention, step S3 comprises the following steps：First in substrate（When having a cushion then
On cushion）Form the first n type semiconductor layer；Then the second n type semiconductor layer is formed on the first n type semiconductor layer
On.Wherein, the doping concentration of the first n type semiconductor layer is more than the doping concentration of the second n type semiconductor layer, and the first N-type is partly led
The area of body layer is more than the area of the second n type semiconductor layer.N electrode formation is on the first n type semiconductor layer.
In one embodiment of the invention, the forming method of LED chip can also include step：In N electrode and N-type half
N electrode current-diffusion layer is formed between conductor layer, the shape of N electrode current-diffusion layer and the shape of N electrode match.Wherein, N
Electrode current diffusion layer can be made up of ITO.N electrode current-diffusion layer is set to cause the electric current point of N electrode near zone
Cloth is evenly, it is to avoid produce current-crowding effect.
In one embodiment of the invention, the forming method of LED chip also includes step：In p type semiconductor layer top table
Photosphere is formed out on face, the region that is not covered by P electrode.Wherein, going out photosphere can be made up of ITO.Set out photosphere can
To cause the fairing profit export in LED chip.
It should be noted that N electrode current-diffusion layer is set and set out photosphere can successively, it is rear carry out first or simultaneously,
The essence of the present invention is not changed.When N electrode current-diffusion layer and setting light extraction layer material phase are likewise it is preferred that set N electrode simultaneously
Current-diffusion layer and photosphere is set out.
To make those skilled in the art more fully understand the present invention, a GaN base is discussed in detail with reference to Fig. 8 to Figure 13
The forming process of LED chip.
A., Sapphire Substrate 100 is provided, by MOCVD techniques, sequentially form the AlN of ideal thickness as cushion 110,
Si concentration of adulterating is 1019cm3N++GaN as the first n type semiconductor layer 210, doping Si concentration be 1018cm3N-GaN make
For the second n type semiconductor layer 220, five cycle InGaN/GaN as MQW 300, AlGaN as electronic barrier layer 400,
Mg concentration of adulterating is 1017cm3P-GaN be used as p type semiconductor layer 500.As shown in figure 8, Fig. 8 is structural representation.
B. by the technique such as photoetching and etching, p type semiconductor layer 500, electronic barrier layer 400 and multiple quantum well layer are removed
300 and second n type semiconductor layer 220 Part portions, to expose the Part portions of the first n type semiconductor layer 210, the part
That is the default installation site of N electrode.As shown in figures 9 a and 9b, wherein, Fig. 9 a be structural representation, Fig. 9 b for overlook illustrate
Figure.
C. by the technique such as photoetching and etching, a linear opening 510, linear opening are formed in p type semiconductor layer 500
510 close to LED chip opposite side, contacted with the bottom of linear opening 510 with electronic barrier layer 400.The linear opening is P electricity
The default installation site in polar curve portion.As as-shown-in figures 10 a and 10b, wherein, Figure 10 a are structural representation, and Figure 10 b show for vertical view
It is intended to.
D. SiO is deposited2Material simultaneously carry out photoetching and etching etc. technique, P electrode end default installation site formation every
Absciss layer 800, as shown in fig. 11a, Figure 11 a are structural representation.Preferably, the separation layer 800 is also extend to linear opening
510 sidewall locations（Retain the SiO of sidewall locations2Without being etched away）, as shown in figure 11b, Figure 11 b are structural representation
Figure.The schematic top plan view of device now is as shown in fig. 11c.
E. ITO materials are deposited and the technique such as photoetching and etching is carried out, form patterned in the default installation site of N electrode
N electrode current-diffusion layer 900, and region outside P electrode predeterminated position above p type semiconductor layer form out photosphere
1000.As depicted in figs. 12 a and 12b, wherein, Figure 12 a be structural representation, Figure 12 b be schematic top plan view.
F. deposition of electrode material and process, form N electrode（Including N electrode line portion 610 and N electrode end 620）And P electrode
（Including P electrode line portion 710, P electrode end 720 and P electrode connecting portion 730）.As shown in figure 13, Figure 13 is structural representation.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means to combine specific features, structure, material or the spy that the embodiment or example are described
Point is contained at least one embodiment of the present invention or example.Moreover, specific features, structure, material or the feature of description
Can in an appropriate manner it be combined in any one or more embodiments or example.Although having been shown and described above
Embodiments of the invention, but above-described embodiment is not considered as limiting the invention, and one of ordinary skill in the art is not
Above-described embodiment can be changed, changed within the scope of the invention in the case of the principle and objective that depart from the present invention,
Replace and modification.
Claims (14)
1. a kind of LED chip, it is characterised in that including：
Substrate；
N type semiconductor layer, the n type semiconductor layer is located at the substrate；
MQW, the MQW is located on the n type semiconductor layer, and the area of the MQW is less than the N
The area of type semiconductor layer, to form N electrode installing zone on the n type semiconductor layer；
Electronic barrier layer, the electronic barrier layer is located on the MQW；
P type semiconductor layer, the p type semiconductor layer is located on the electronic barrier layer, and the p type semiconductor layer has linear
Opening, the bottom of the linear opening is contacted with the electronic barrier layer；
N electrode, the N electrode formation is on the N electrode installing zone；
P electrode, the P electrode includes：
Fill the bottom of the linear opening in P electrode line portion, the P electrode line portion；
P electrode end, the P electrode end is located on the p type semiconductor layer and positioned at the linear open upper edge
One end；With
P electrode connecting portion, the P electrode connecting portion connects the one end in the P electrode end and the P electrode line portion；And
Separation layer, the separation layer is located between the P electrode end and the p type semiconductor layer, the shape of the separation layer
Match with the shape of the P electrode end.
2. LED chip as claimed in claim 1, it is characterised in that the N electrode includes：
N electrode line portion, the N electrode line portion and the linear opening parallel；With
N electrode end, the N electrode end is connected with the one end in the N electrode line portion.
3. LED chip as claimed in claim 1, it is characterised in that the N electrode installing zone is close to the one of the LED chip
Side, opposite side of the linear opening close to the LED chip.
4. LED chip as claimed in claim 1, it is characterised in that the separation layer extends to the side wall of the linear opening.
5. LED chip as claimed in claim 1, it is characterised in that the n type semiconductor layer includes：
First n type semiconductor layer, first n type semiconductor layer is located at the substrate；And
Second n type semiconductor layer, second n type semiconductor layer is located on first n type semiconductor layer, wherein described the
The doping concentration of one n type semiconductor layer is more than the doping concentration of second n type semiconductor layer, first n type semiconductor layer
Area be more than second n type semiconductor layer area, with first n type semiconductor layer formed N electrode installing zone.
6. LED chip as claimed in claim 1, it is characterised in that also include：
N electrode current-diffusion layer, the N electrode current-diffusion layer is located between the N electrode and the n type semiconductor layer, and
The shape of the shape and the N electrode of the N electrode current-diffusion layer matches.
7. the LED chip as any one of claim 1-6, it is characterised in that also include：
Go out photosphere, it is described go out photosphere be located on the region not covered by the P electrode of the p type semiconductor layer top surface.
8. a kind of forming method of LED chip, it is characterised in that comprise the following steps：
Substrate is provided；
In substrate formation n type semiconductor layer；
MQW is formed on the n type semiconductor layer；
Electronic barrier layer is formed on the MQW；
P type semiconductor layer is formed on the electronic barrier layer；
Local etching is carried out to the p type semiconductor layer, electronic barrier layer and multiple quantum well layer, partly led with exposing the N-type
A part for body layer is used as N electrode installing zone；
A linear opening is formed in the p type semiconductor layer, bottom and the electronic barrier layer of the linear opening connect
Touch；
Patterned isolation is formed on the p type semiconductor layer and positioned at the position of one end of the linear open upper edge
Layer；And
N electrode and P electrode are formed, wherein the N electrode is located on the N electrode installing zone, the P electrode includes：
Fill the bottom of the linear opening in P electrode line portion, the P electrode line portion；
P electrode end, the P electrode end be located at the separation layer on and the shape of the P electrode end with it is described every
The shape of absciss layer matches；With
P electrode connecting portion, the P electrode connecting portion connects the one end in the P electrode end and the P electrode line portion.
9. the forming method of LED chip as claimed in claim 8, it is characterised in that the N electrode includes：
N electrode line portion, the N electrode line portion and the linear opening parallel；With
N electrode end, the N electrode end is connected with the one end in the N electrode line portion.
10. the forming method of LED chip as claimed in claim 8, it is characterised in that the N electrode installing zone is close to described
The side of LED chip, opposite side of the linear opening close to the LED chip.
11. the forming method of LED chip as claimed in claim 8, it is characterised in that the separation layer extends to described linear
The side wall of opening.
12. the forming method of LED chip as claimed in claim 8, it is characterised in that described in substrate formation N
Type semiconductor layer comprises the following steps：
In the substrate the first n type semiconductor layer of formation；And
Formed on first n type semiconductor layer on the second n type semiconductor layer, wherein
The doping concentration of first n type semiconductor layer is more than the doping concentration of second n type semiconductor layer, the first N
The area of type semiconductor layer is more than the area of second n type semiconductor layer, and N electrode formation is in first N-type
Semiconductor layer.
13. the forming method of LED chip as claimed in claim 8, it is characterised in that also including step：
N electrode current-diffusion layer is formed between the N electrode and the n type semiconductor layer, the N electrode current-diffusion layer
The shape of shape and the N electrode matches.
14. the forming method of the LED chip as any one of claim 8-13, it is characterised in that also including step：
Photosphere is formed out on the p type semiconductor layer top surface, the region that is not covered by the P electrode.
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| CN201310499374.8A CN104576854B (en) | 2013-10-22 | 2013-10-22 | LED chip and forming method thereof |
| PCT/CN2014/086543 WO2015058598A1 (en) | 2013-10-22 | 2014-09-15 | Led chip and method of forming same |
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