WO2014101798A1 - 一种倒装光子晶体led芯片及其制造方法 - Google Patents

一种倒装光子晶体led芯片及其制造方法 Download PDF

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WO2014101798A1
WO2014101798A1 PCT/CN2013/090572 CN2013090572W WO2014101798A1 WO 2014101798 A1 WO2014101798 A1 WO 2014101798A1 CN 2013090572 W CN2013090572 W CN 2013090572W WO 2014101798 A1 WO2014101798 A1 WO 2014101798A1
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layer
photonic crystal
flip
chip
led chip
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PCT/CN2013/090572
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English (en)
French (fr)
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武乐可
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映瑞光电科技(上海)有限公司
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Priority to US14/652,071 priority Critical patent/US9601660B2/en
Priority to EP13868123.4A priority patent/EP2940741B1/en
Publication of WO2014101798A1 publication Critical patent/WO2014101798A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
    • H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0075—Processes relating to semiconductor body packages relating to heat extraction or cooling elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0083—Periodic patterns for optical field-shaping in or on the semiconductor body or semiconductor body package, e.g. photonic bandgap structures

Definitions

  • the present invention relates to the field of LED manufacturing technology, and in particular, to a flip-chip photonic crystal LED chip and a method of fabricating the same.
  • LED Light Emitting Diode
  • LED is a semiconductor solid-state light-emitting device that uses a semiconductor PN junction as a light-emitting material to convert electricity into light.
  • a forward voltage is applied to both ends of the semiconductor PN junction, electrons and holes injected into the PN junction are recombined, and excess energy is released in the form of photons.
  • LEDs have the advantages of long life and low power consumption. As technology matures, the power and brightness requirements of LEDs are becoming higher and higher. At present, commonly used methods for improving LED power and brightness include flip chip LED chips, patterned substrates, and high voltage LED chips.
  • the photonic crystal structure refers to a periodic structure in which materials of different refractive indices are alternately arranged to produce a photonic crystal band gap (similar to a forbidden band in a semiconductor).
  • the distance between the periodically arranged low refractive index sites is the same, which results in a photonic crystal of a certain distance only producing an energy band effect on a certain wavelength of light.
  • the invention provides a flip-chip photonic crystal LED chip and a manufacturing method thereof, and the flip-chip photonic crystal structure forms a patterned substrate and a photonic crystal structure, thereby greatly improving the working efficiency of the LED.
  • the invention provides a method for manufacturing a flip chip photonic crystal LED chip, comprising:
  • the process of performing a nanoimprint process on the epitaxial growth surface of the initial substrate comprises: cleaning the initial substrate, forming a first imprinting layer on an epitaxial growth surface of the initial substrate; An embossing stencil is pressed on the first embossing layer, and the pattern on the first stencil is transferred into the first embossing layer;
  • the first embossed layer is removed to form a nanoscale patterned substrate.
  • the pattern on the first imprint stencil is a regularly arranged first nano-bump.
  • the graphic on the first imprint stencil is an irregularly arranged first nano-bump.
  • the pattern on the first imprint stencil is transferred to the first embossed layer by a thermoplastic or ultraviolet curing method.
  • the process of forming the flip-chip LED structure on the epitaxial growth surface of the nano-scale patterned substrate comprises:
  • the epitaxial layer comprising a sequentially formed N-type gallium nitride layer, a multiple quantum well active layer, and a P-type gallium nitride layer;
  • the electrode solder layer is soldered to a heat sink substrate by a soldering process. Forming a second embossed layer on the light emitting surface of the nanoscale patterned substrate;
  • the second embossed layer is removed to form a photonic crystal structure.
  • the pattern on the second imprint stencil is a regularly arranged second nano-bump, and the size and spacing of the second nano-bump are the same order of magnitude as the illuminating wavelength of the flip-chip photonic crystal LED chip.
  • the shape of the second nano-bump is cylindrical or cuboid.
  • the step of thinning the nano-scale patterned substrate is further included.
  • the initial substrate is a sapphire substrate.
  • a flip-chip photonic crystal LED chip manufactured by the above-described method for fabricating a flip chip photonic crystal LED chip, comprising:
  • the nano-scale patterned substrate has a photonic crystal structure formed on the nano-patterned light-emitting surface, and the nano-scale patterned epitaxial growth surface is formed with a flip-chip LED structure.
  • the flip-chip LED structure includes:
  • the electrode solder layer is soldered to a heat sink substrate.
  • the pattern on the second imprint stencil used in the nanoimprinting technique for forming a photonic crystal structure is a regularly arranged second nano-bump, and the size and spacing of the second nano-bump are the same as Pour The wavelength of the light emitted by the photonic crystal LED chip is of the same order of magnitude.
  • the shape of the second nano-bump is a cylinder shape or a rectangular parallelepiped shape.
  • the invention provides a flip chip photonic crystal LED chip and a manufacturing method thereof, which can effectively combine a photonic crystal structure and a flip chip LED chip.
  • the manufacturing method of the flip-chip photonic crystal LED chip respectively performs pattern processing on the epitaxial growth surface and the light-emitting surface of the substrate by nanoimprint technology to form a patterned substrate and a photonic crystal structure, thereby greatly improving the power and light of the LED. Precipitation rate.
  • FIGS. 2A to 2Q are schematic views showing respective steps of a method of fabricating a flip-chip photonic crystal LED chip according to an embodiment of the present invention.
  • the invention provides a flip chip photonic crystal LED chip and a manufacturing method thereof, which can effectively combine a photonic crystal structure and a flip chip LED chip.
  • the method for fabricating the flip-chip photonic crystal LED chip respectively performs patterning processing on the epitaxial growth surface and the light-emitting surface of the substrate by a nanoimprint technique to form a patterned substrate and a photonic crystal structure. In this way, the power and light emission rate of the LED are greatly improved.
  • FIG. 1 is a flow chart of a method for fabricating a flip-chip photonic crystal LED chip according to an embodiment of the present invention. The method includes the following steps:
  • Step S021 providing an initial substrate, the initial substrate comprising an epitaxial growth surface and a light exit surface; a patterned substrate;
  • Step S023 forming a flip-chip LED structure on the epitaxial growth surface of the nano-scale patterned substrate; Step S024, performing a nanoimprint process on the light-emitting surface of the nano-scale patterned substrate to form a photonic crystal structure.
  • step S021 is performed to provide an initial substrate 101 including an epitaxial growth surface and a light exit surface.
  • the epitaxial growth surface grows an epitaxial layer in a subsequent process, and the light exiting surface is a surface from which the light is emitted after the device is completed.
  • the initial substrate 101 is a sapphire substrate.
  • step S022 is performed to perform a nanoimprint process on the epitaxial growth surface of the initial substrate 101 to form a nano-scale patterned substrate 111.
  • the process of the nanoimprint process performed on the epitaxial growth surface includes: first, as shown in FIG. 2B, cleaning the initial substrate 101, and forming a first surface on the epitaxial growth surface of the initial substrate Embossing the adhesive layer 102; then, as shown in FIG. 2C to FIG.
  • the first imprint stencil 201 is pressed against the first embossed layer 102, and the pattern on the first imprint stencil 201 is transferred to the In the first embossed layer 102, a patterned first embossed layer 112 is formed; then, as shown in FIG. 2F, the first stencil 201 is removed, and the patterned first pressure is applied.
  • the ink layer 112 is etched to form a pattern in the epitaxial growth surface of the initial substrate; finally, the first embossed layer 112 is removed to form a nano-scale patterned substrate 111.
  • the pattern on the nano-scale patterned substrate 111 may be regularly arranged or irregularly arranged, so that the pattern on the first imprint template 201 may be a first nano-bump or a regularly arranged or irregularly arranged,
  • the pattern on the first imprint stencil 201 used in the embodiment is a regularly arranged first nano-bump.
  • the method commonly used to transfer the pattern on the first imprint stencil 201 to the first embossed layer 102 is thermoplastic or violet.
  • External curing method In the ultraviolet curing method, the first imprint stencil 201 is made of a material transparent to ultraviolet light, such as quartz glass or polydimethyl siloxane (PDMS), and the first embossing layer 102 is made of a low viscosity. Light-cured solution.
  • PDMS polydimethyl siloxane
  • the first imprint stencil 201 is pressed onto the first embossing layer 102, and then the first embossing stencil 201 is subjected to ultraviolet exposure to cure the first embossed layer 102, and finally the first pressure is removed.
  • the stamp template 201 completes the process of pattern transfer to form a patterned first embossed layer 112.
  • the material of the first embossing layer 102 is a thermoplastic material, such as polymethylMethacrylate (PMMA), and the temperature is first raised to lower the viscosity of the first embossing layer 102, and the fluidity is improved.
  • PMMA polymethylMethacrylate
  • the stamp template 201 completes the process of pattern transfer to form a patterned first embossed layer 112.
  • anisotropic etching such as ICP
  • ICP anisotropic etching
  • An etching process or an RIE etching process forms a pattern in the epitaxial growth surface.
  • the remaining first embossed layer 112 is removed to form a nanoscale patterned substrate 111.
  • the nano-scale patterned substrate 111 can reduce the difference in density during epitaxial growth and reduce the defects of epitaxial growth, thereby improving the internal quantum effect and increasing the power.
  • step S023 is performed to form a flip-chip LED structure on the epitaxial growth surface of the nano-scale patterned substrate 111.
  • the process of forming the flip-chip LED structure specifically includes: first, as shown in FIG. 2G, an epitaxial layer 106 is grown on the epitaxial growth surface, and the epitaxial layer includes a sequentially formed N-type gallium nitride layer 103, multiple quantum a well active layer 104 and a P-type gallium nitride layer 105; next, as shown in FIG. 2H, the epitaxial layer 106 is etched to form an electrode hole 116 exposing the N-type gallium nitride layer 103; As shown in FIG.
  • a metal mirror layer 107 is formed on the P-type gallium nitride layer 105, and then an insulating layer 108 is formed on the metal mirror layer 107.
  • the insulating layer 108 forms an opening 117 exposing a portion of the metal mirror layer 107 and the N-type gallium nitride layer 103; thereafter, as shown in FIG. 2K, an electrode solder layer 109 is formed in the opening 117; As shown in FIG. 2L, the electrode bonding layer 109 is soldered to a heat dissipation substrate 110 by a soldering process.
  • step S024 is performed to perform nanoimprinting on the light-emitting surface of the nano-scale patterned substrate 111 to form a photonic crystal structure.
  • the material of the substrate and the air are alternately arranged, and a periodic structure is formed on the light-emitting surface.
  • the process and the process for forming a photonic crystal structure are similar to the processes and processes for forming a nano-scale patterned substrate, and specifically include: forming a second imprinting layer 113 on the light-emitting surface; pressing the second imprinting template 202 in the Transferring the pattern on the second imprint stencil 202 to the second embossing layer 113 on the second embossing layer 113; removing the second imprint stencil 202, the second embossing
  • the ink layer 113 is etched to form a pattern in the light-emitting surface of the nano-scale patterned substrate 111.
  • the second embossed layer is removed to form a photonic crystal nano-patterned substrate 121.
  • the pattern on the second imprint stencil 202 used is a regularly arranged second nano-bump, and the size and spacing of the second nano-bump are the same order of magnitude as the illuminating wavelength of the flip-chip photonic crystal LED chip, such that
  • the second imprint stencil forms a periodic structure in which the substrate material and the air are alternately arranged on the light-emitting surface, that is, a photonic crystal structure, so that the photonic band gap is formed in all directions of the light-emitting surface, and the energy of the illuminating wavelength falls on the photon. In the band gap, light enters the photonic crystal structure and is prohibited from propagating in the direction of the light-emitting surface.
  • the photonic crystal structure formed on the light-emitting surface may be a regularly arranged cylindrical hole having a diameter of 200 to 600 nm and a depth of 100 to 300 nm.
  • the spacing between the holes is 400 to 800 nm.
  • the structure of the regular arrangement is not limited to a cylindrical hole, and may be other periodically arranged structures, such as a rectangular-shaped hole, a cylindrical convex structure, and the like.
  • the shape of the second bump corresponds to a different photonic crystal structure, and may be a cylindrical shape or a rectangular parallelepiped shape.
  • the substrate may be subjected to a thinning step before the second imprinting layer is formed.
  • the specific embossing process thermoplastic or ultraviolet curing
  • the material of the corresponding second embossing layer is different from the way of forming the pattern.
  • the specific process can refer to the process of forming the nano-scale patterned substrate, and no longer Narration.
  • the photonic crystal nanoscale patterned substrate 121 is included.
  • the photonic crystal nanoscale patterned substrate 121 includes an epitaxial growth surface and a a smooth surface, a nano-scale pattern structure is formed in the epitaxial growth surface, and a photonic crystal structure is formed in the light-emitting surface; and the flip-chip LED structure is formed on the epitaxial growth surface.
  • the flip-chip LED structure includes: an epitaxial layer 106 grown on an epitaxial growth surface of the photonic crystal nanoscale patterned substrate, the epitaxial layer comprising an N-type gallium nitride layer 103 sequentially formed, and a multiple quantum well a source layer 104 and a P-type gallium nitride layer 105; an electrode hole formed in the epitaxial layer, the electrode hole exposing the N-type gallium nitride layer 103; formed in the P-type gallium nitride layer 105 a metal mirror layer 107; an insulating layer 108 formed on the metal mirror layer 107; an opening formed in the insulating layer 108, the opening exposing a portion of the metal mirror layer 107 and N-type nitridation A gallium layer 103; an electrode solder layer 109 formed in the opening; and a heat dissipation substrate 110 soldered to the electrode solder layer 109.
  • Such a structure because of the formation of a patterned substrate, reduces the difference in the density of epitaxial growth, reduces the defects of epitaxial growth, thereby improving the internal quantum effect and increasing the power.
  • a photonic crystal structure is formed on the light-emitting surface, so that the light emission rate is improved, and the working efficiency is further improved.
  • the present invention provides a flip-chip photonic crystal LED chip and a method of fabricating the same, the flip-chip forming process to form a patterned substrate and a photonic crystal structure. In this way, the efficiency of the LED can be greatly improved.
  • the spirit and scope of the Ming Thus, it is intended that the present invention cover the modifications and variations of the inventions

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  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
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Abstract

提供一种倒装光子晶体LED芯片的制造方法，包括：提供初始衬底，所述初始衬底包括外延生长面和出光面（S021）；在所述初始衬底的外延生长面进行纳米压印工艺，形成纳米级图形化衬底（S022）；在所述纳米级图形化衬底的外延生长面上形成倒装LED结构（S023）；在所述纳米级图形化衬底的出光面进行纳米压印工艺，形成倒装光子晶体LED芯片（S024）。由于在出光面形成了光子晶体结构，使得光出射率提高，提高LED的发光效率。

Description

一种倒装光子晶体 LED芯片及其制造方法
技术领域
本发明涉及 LED制造技术领域，尤其涉及一种倒装光子晶体 LED芯片及其 制造方法。
背景技术
发光二级管 （LED, Light Emitting Diode )是一种半导体固体发光器件， 其 利用半导体 PN结作为发光材料， 可以将电转换为光。 当半导体 PN结的两端加 上正向电压后， 注入 PN结中的电子和空穴发生复合， 将过剩的能量以光子的形 式译放出来。 LED具有寿命长、 功耗低的优点， 随着技术的日渐成熟， 对 LED 的功率和亮度的要求也越来越高。 目前常用的提高 LED功率和亮度的手段有倒 装 LED芯片、 图形化衬底、 高压 LED芯片等技术。
随着光子晶体理论和工艺完善， 光子晶体在光通信和信息技术领域中有所 发展，也有将光子晶体结合到 LED制造领域中来提高 LED效率的探索。光子晶 体结构指不同折射率的材料交替排列形成的周期性结构， 可以产生光子晶体带 隙 （Band Gap, 类似于半导体中的禁带）。 而周期排列的低折射率位点的之间的 距离大小相同， 导致了一定距离大小的光子晶体只对一定波长的光产生能带效 应， 如果只在某个方向上存在周期性结构， 那么光子带隙出现在这个方向， 能 量落在光子带隙中的光进入光子晶体后将在该方向禁止传播。 这样利用特定的 光子晶体结构可以实现对光的行为进行控制。
发明内容
本发明提供一种倒装光子晶体 LED芯片及其制造方法， 所述倒装光子晶体 理， 形成图形化衬底和光子晶体结构， 从而大大提高 LED的工作效率。
本发明提供一种倒装光子晶体 LED芯片的制造方法， 包括：
提棋初始衬底， 所述初始衬底 括外延生长面和出光面： 在所述纳米级图形化衬底的外延生长面上形成倒装 LED结构； 在所述纳米级图形化衬底的出光面进行纳米压印工艺， 形成光子晶体结构。 可选的， 对所述初始衬底的外延生长面进行纳米压印工艺的过程包括： 清洗所述初始衬底， 在所述初始衬底的外延生长面形成第一压印胶层； 将第一压印模版压在所述第一压印胶层上， 将第一压印模版上的图形转移 到所述第一压印胶层中；
移去所述第一压印模版， 对所述第一压印胶层进行刻蚀， 在所述初始衬底 的外延生长面中形成图形；
去除所述第一压印胶层， 形成纳米级图形化衬底。
可选的， 所述第一压印模版上的图形为规则排布的第一纳米凸点。
可选的， 所述第一压印模版上的图形为不规则排布的第一纳米凸点。
可选的， 利用热塑或紫外固化的方法将第一压印模版上的图形转移到所述 第一压印胶层中。
可选的， 在所述纳米级图形化衬底的外延生长面上形成所述倒装 LED结构 的过程包括：
在所述纳米级图形化衬底的外延生长面上生长外延层， 所述外延层包括依 次形成的 N型氮化镓层、 多量子阱有源层和 P型氮化镓层；
刻蚀所述外延层， 形成暴露出所述 N型氮化镓层的电极孔洞；
在所述 P型氮化镓层上形成金属反射镜层；
在所述金属反射镜层上形成绝缘层；
图形化所述绝缘层形成开口， 所述开口暴露出部分金属反射镜层和 N型氮 化镓层；
在所述开口中形成电极焊接层；
通过焊接工艺将电极焊接层焊接到一散热基板上。 在所述纳米级图形化衬底的出光面形成第二压印胶层；
将第二压印模版压在所述第二压印胶层上， 将第二压印模版上的图形转移 到所述第二压印胶层中；
移去所述第二压印模版， 对所述第二压印胶层进行刻蚀， 在所述纳米级图 形化衬底的出光面中形成图形；
去除所述第二压印胶层， 形成光子晶体结构。
可选的， 所述第二压印模版上的图形为规则排布的第二纳米凸点， 所述第 二纳米凸点的尺寸以及间距与倒装光子晶体 LED 芯片的发光波长在同一数量 级。
可选的， 所述第二纳米凸点的形状为圓柱形或长方体形。
可选的， 在所述纳米级图形化衬底的出光面形成第二压印胶层之前， 还包 括对所述纳米级图形化衬底减薄的步骤。
可选的， 所述初始衬底为蓝宝石衬底。
根据本发明的另一面， 还提供一种利用上述的倒装光子晶体 LED芯片的制 造方法制造的倒装光子晶体 LED芯片， 包括：
纳米级图形化衬底， 所述纳米级图形化的出光面上形成有光子晶体结构， 所述纳米级图形化的外延生长面上形成有倒装 LED结构。
可选的， 所述倒装 LED结构包括：
生长在所述纳米级图形化衬底的外延生长面上的外延层， 所述外延层包括 依次形成的 N型氮化镓层、 多量子阱有源层和 P型氮化镓层；
形成于所述外延层中的电极孔洞， 所述电极孔洞暴露出所述 N型氮化镓层 的；
形成于所述 P型氮化镓层上的金属反射镜层；
形成于所述金属反射镜层上的绝缘层；
形成于所述绝缘层中的开口， 所述开口暴露出部分金属反射镜层和 N型氮 化镓层；
形成于所述开口中的电极焊接层；
所述电极焊接层与一散热基板焊接。
可选的， 所述形成光子晶体结构的纳米压印技术使用的第二压印模版上的 图形为规则排布的第二纳米凸点， 所述第二纳米凸点的尺寸以及间距与所述倒 装光子晶体 LED芯片的发光波长同一数量级。
可选的， 所述第二纳米凸点的形状为圓柱体形或长方体形。
本发明提供一种倒装光子晶体 LED芯片及其制造方法， 能有效将光子晶体 结构与倒装 LED芯片相结合。所述倒装光子晶体 LED芯片的制造方法通过纳米 压印技术分别对衬底的外延生长面和出光面进行图形化处理， 形成图形化衬底 和光子晶体结构， 从而大大提高了 LED的功率和光析出率。
附图说明
图 1为本发明实施例的倒装光子晶体 LED芯片的制造方法的流程图； 图 2A〜2Q为本发明实施例的倒装光子晶体 LED芯片的制造方法的各步骤 的示意图。
具体实施方式
本发明提供一种倒装光子晶体 LED芯片及其制造方法， 能有效将光子晶体 结构与倒装 LED芯片相结合。所述倒装光子晶体 LED芯片的制造方法通过纳米 压印技术分别对衬底的外延生长面和出光面进行图形化处理， 形成图形化衬底 和光子晶体结构。 这样， 大大提高了 LED的功率和光析出率。
下面将结合附图对本发明进行更详细的描述， 其中表示了本发明的优选实 施例， 应所述理解本领域技术人员可以修改在此描述的本发明， 而仍然实现本 发明的有利效果。 因此， 下列描述应当被理解为对于本领域技术人员的广泛知 道， 而并不作为对本发明的限制。
为了清楚， 不描述实际实施例的全部特征。 在下列描述中， 不详细描述公 知的功能和结构， 因为它们会使本发明由于不必要的细节而混乱。 应当认为在 任何实际实施例的开发中， 必须做出大量实施细节以实现开发者的特定目标， 例如按照有关系统或有关商业的限制， 由一个实施例改变为另一个实施例。 另 外， 应当认为这种开发工作可能是复杂和耗费时间的， 但是对于本领域技术人 员来说仅仅是常规工作。 在下列段落中参照附图以举例方式更具体地描述本发明。 根据下面说明和 权利要求书， 本发明的优点和特征将更清楚。 需说明的是， 附图均采用非常简 化的形式且均使用非精准的比例， 仅用以方便、 明晰地辅助说明本发明实施例 的目的。
请参考图 1 , 其为本发明实施例的倒装光子晶体 LED芯片的制造方法的流程 图， 所述方法包括如下步骤：
步骤 S021 , 提供初始衬底， 所述初始衬底包括外延生长面和出光面； 图形化衬底；
步骤 S023 , 在所述纳米级图形化衬底的外延生长面上形成倒装 LED结构； 步骤 S024, 在所述纳米级图形化衬底的出光面进行纳米压印工艺， 形成光 子晶体结构。
参照图 2A, 执行步骤 S021 , 提供初始衬底 101 , 所述初始衬底 101包括外 延生长面和出光面。 所述外延生长面在后续的工艺中生长外延层， 所述出光面 为器件完成后光出射的面， 本实施例中， 所述初始衬底 101为蓝宝石衬底。
参照图 2B至图 2F, 执行步骤 S022, 在所述初始衬底 101的外延生长面进 行纳米压印工艺， 形成纳米级图形化衬底 111。 具体的， 对所述外延生长面进行 的纳米压印工艺的过程包括： 首先， 如图 2B所示， 清洗所述初始衬底 101 , 并 在在所述初始衬底的外延生长面形成第一压印胶层 102; 接着， 如图 2C至图 2E 所示， 将第一压印模版 201压在所述第一压印胶层 102上， 将第一压印模版 201 上的图形转移到所述第一压印胶层 102中， 形成图形化的第一压印胶层 112; 接 着， 如图 2F所示， 移去所述第一压印模版 201 , 对所述图形化的第一压印胶层 112进行刻蚀， 在所述初始衬底的外延生长面中形成图形； 最后， 去除第一压印 胶层 112, 形成纳米级图形化衬底 111。
纳米级图形化衬底 111 上的图形可以是规则排布或不规则排布的， 因此第 一压印模版 201 上的图形可以为规则排布或不规则排布的第一纳米凸点， 本实 施例中使用的第一压印模版 201 上的图形为规则排布的第一纳米凸点。 将第一 压印模版 201上的图形转移到所述第一压印胶层 102中常用的方法有热塑或紫 外固化的方法。 紫外固化的方法中， 第一压印模版 201 采用对紫外光透明的材 质制成， 如石英玻璃或聚二曱基硅氧烷（Polydimethylsiloxane, PDMS), 第一压 印胶层 102材质采用低粘度光固化的溶液。 先将第一压印模版 201压在所述第 一压印胶层 102上， 然后透过第一压印模板 201进行紫外曝光使第一压印胶层 102固化成型， 最后移去第一压印模板 201完成图形转移的过程， 形成图形化的 第一压印胶层 112。 热塑的方法中， 第一压印胶层 102的材质为热塑形材料， 例 如聚曱基丙烯酸曱酯 (PolymethylMethacrylate , PMMA) , 先进行升温使第一压印 胶层 102粘度降低， 流动性增强， 然后将将第一压印模版 201压在所述第一压 印胶层 102上， 并施加适当的压力， 之后降低温度使第一压印胶层 102固化成 型， 最后移去第一压印模板 201 完成图形转移的过程， 形成图形化的第一压印 胶层 112。
在将第一压印模版 201上的图形转移到所述第一压印胶层 102中后， 以图 形化的第一压印胶层 112为掩膜，进行各向异性的刻蚀，如 ICP刻蚀工艺或 RIE 刻蚀工艺， 在所述外延生长面中形成图形。 去除残余的第一压印胶层 112, 形成 纳米级图形化衬底 111。所述纳米级图形化衬底 111能减少外延生长时的差排密 度， 减少外延生长的缺陷， 从而提高内量子效应， 使得功率提高。
参考图 2G至 2L, 执行步骤 S023 , 在所述纳米级图形化衬底 111的外延生 长面上形成倒装 LED结构。 形成所述倒装 LED结构的过程具体包括： 首先， 如 图 2G所示， 在所述外延生长面上生长外延层 106, 所述外延层包括依次形成的 N型氮化镓层 103、 多量子阱有源层 104和 P型氮化镓层 105; 接着， 如图 2H 所示，刻蚀所述外延层 106,形成暴露出所述 N型氮化镓层 103的电极孔洞 116; 接着， 如图 21所示， 在所述 P型氮化镓层 105上形成金属反射镜层 107, 之后 在所述金属反射镜层 107上形成绝缘层 108; 接着， 如图 2J所示， 图形化所述 绝缘层 108形成开口 117,所述开口 117暴露出部分金属反射镜层 107和 N型氮 化镓层 103; 之后， 如图 2K所示， 在所述开口 117中形成电极焊接层 109; 最 后， 如图 2L所示， 通过焊接工艺将电极焊接层 109焊接到一散热基板 110上。 形成倒装 LED结构是本领域技术人员公知的手段和方法， 并且本发明对该部分 未做出改进， 在此不再贅述每个步骤的具体过程。 参考图 2M至图 2Q, 执行步骤 S024, 在所述纳米级图形化衬底 111的出光 面进行纳米压印技术， 形成光子晶体结构。 本实施例中衬底的材质和空气交替 排列， 在出光面上形成的周期性结构。 形成光子晶体结构的工艺和过程同形成 纳米级图形化衬底使用的工艺和过程类似， 具体包括： 在所述出光面形成第二 压印胶层 113; 将第二压印模版 202压在所述第二压印胶层 113上， 将第二压印 模版 202上的图形转移到所述第二压印胶层 113中；移去所述第二压印模版 202, 对所述第二压印胶层 113进行刻蚀， 在所述纳米级图形化衬底 111 的出光面中 形成图形； 去除第二压印胶层， 形成光子晶体纳米级图形化衬底 121。
其中， 使用的第二压印模版 202上的图形为规则排布的第二纳米凸点， 所 述第二纳米凸点的尺寸以及间距与倒装光子晶体 LED芯片的发光波长在同一数 量级， 这样， 第二压印模版在出光面上形成了由衬底材质和空气交替排列的周 期性结构， 即光子晶体结构， 因此光子带隙形成在出光面的各个方向上， 发光 波长的能量落在光子带隙中， 光进入光子晶体结构后将在出光面的方向上禁止 传播。
以波长为 460nm的蓝色光的 LED为例，在出光面形成的光子晶体结构可以 是规则排布的圓柱形孔洞， 所述圓柱形孔洞的直径为 200〜600nm , 深度为 100〜300nm, 相邻孔洞间的间距为 400〜800nm。 这样该 LED发出的光无法在所 述光子晶体结构中周期排布的方向传播， 只能从出光面射出。 当然， 该规则排 布的结构并不限定为圓柱形孔洞， 也可以是其他周期性排布的结构， 比如长方 体形的孔洞、 圓柱形凸起结构等。 所述第二凸点的形状对应不同的光子晶体结 构， 可以为圓柱形或长方体形。 本领域技术人员能根据本发明的核心思想制造 对应不同波长 LED的光子晶体结构。 为了控制 LED倒装光子晶体 LED芯片的 尺寸， 可以在形成第二压印胶层之前， 对衬底进行一次减薄的步骤。 根据具体 使用的压印工艺 （热塑或紫外固化）， 对应的第二压印胶层的材质和形成图形的 方式不同， 具体过程可参考形成纳米级图形化衬底的过程， 在此不再贅述。
根据本发明的另一面， 还提供一种利用上述实施例所述倒装光子晶体 LED 芯片的制造方法制造的倒装光子晶体 LED芯片， 参照图 2Q, 包括： 光子晶体纳 米级图形化衬底 121 ,所述光子晶体纳米级图形化衬底 121包括外延生长面和出 光面， 所述外延生长面中形成有纳米级图形结构， 所述出光面中形成有光子晶 体结构； 所述倒装 LED结构形成于所述外延生长面上。
所述倒装 LED结构包括： 生长在所述光子晶体纳米级图形化衬底的外延生 长面上的外延层 106, 所述外延层包括依次形成的 N型氮化镓层 103、 多量子阱 有源层 104和 P型氮化镓层 105; 形成于所述外延层中的电极孔洞， 所述电极孔 洞暴露出所述 N型氮化镓层 103; 形成于所述 P型氮化镓层 105上的金属反射 镜层 107;形成于所述金属反射镜层 107上的绝缘层 108;形成于所述绝缘层 108 中的开口， 所述开口暴露出部分金属反射镜层 107和 N型氮化镓层 103; 形成 于所述开口中的电极焊接层 109 以及与所述电极焊接层 109 焊接的散热基板 110。
这样的结构， 由于形成了图形化衬底， 减少外延生长时的差排密度， 减少 外延生长的缺陷， 从而提高了内量子效应， 使得功率提高。 同时在出光面形成 有光子晶体结构， 使得光出射率提高， 进一步提高工作效率。
综上所述， 本发明提供一种倒装光子晶体 LED芯片及其制造方法， 所述倒装 形化处理， 形成图形化衬底和光子晶体结构。 这样， 能大大提高 LED的工作效 率。 明的精神和范围。 这样， 倘若本发明的这些修改和变型属于本发明权利要求及 其等同技术的范围之内， 则本发明也意图包含这些改动和变型在内。

Claims

权利要求
1、 一种倒装光子晶体 LED芯片的制造方法， 包括：
提供初始衬底， 所述初始衬底包括外延生长面和出光面； 在所述纳米级图形化衬底的外延生长面上形成倒装 LED结构；
在所述纳米级图形化衬底的出光面进行纳米压印工艺， 形成倒装光子晶体 LED芯片。
2、 如权利要求 1所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 对所述初始衬底的外延生长面进行纳米压印工艺的过程包括：
清洗所述初始衬底， 在所述初始衬底的外延生长面形成第一压印胶层； 将第一压印模版压在所述第一压印胶层上， 将第一压印模版上的图形转移 到所述第一压印胶层中；
移去所述第一压印模版， 对所述第一压印胶层进行刻蚀， 在所述初始衬底 的外延生长面中形成图形；
去除所述第一压印胶层， 形成纳米级图形化衬底。
3、 如权利要求 2所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 所述第一压印模版上的图形为规则排布的第一纳米凸点。
4、 如权利要求 2所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 所述第一压印模版上的图形为不规则排布的第一纳米凸点。
5、 如权利要求 2所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 利用热塑或紫外固化的方法将第一压印模版上的图形转移到所述第一压印胶层 中。
6、 如权利要求 1所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 在所述纳米级图形化衬底的外延生长面上形成所述倒装 LED结构的过程包括： 在所述纳米级图形化衬底的外延生长面上生长外延层， 所述外延层包括依 次形成的 N型氮化镓层、 多量子阱有源层和 P型氮化镓层；
刻蚀所述外延层， 形成暴露出所述 N型氮化镓层的电极孔洞；
在所述 P型氮化镓层上形成金属反射镜层； 在所述金属反射镜层上形成绝缘层；
图形化所述绝缘层形成开口， 所述开口暴露出部分金属反射镜层和 N型氮 化镓层；
在所述开口中形成电极焊接层；
通过焊接工艺将电极焊接层焊接到一散热基板上。
7、 如权利要求 1所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 在所述纳米级图形化衬底的出光面形成第二压印胶层；
将第二压印模版压在所述第二压印胶层上， 将第二压印模版上的图形转移 到所述第二压印胶层中；
移去所述第二压印模版， 对所述第二压印胶层进行刻蚀， 在所述纳米级图 形化衬底的出光面中形成图形；
去除所述第二压印胶层， 形成光子晶体结构。
8、 如权利要求 7所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 所述第二压印模版上的图形为规则排布的第二纳米凸点， 所述第二纳米凸点的 尺寸以及间距与倒装光子晶体 LED芯片的发光波长在同一数量级。
9、 如权利要求 8所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 所述第二纳米凸点的形状为圓柱形或长方体形。
10、如权利要求 7所述的倒装光子晶体 LED芯片的制造方法，其特征在于： 在所述纳米级图形化衬底的出光面形成第二压印胶层之前， 还包括对所述纳米 级图形化衬底减薄的步骤。
11、如权利要求 1至 9中任一项所述的倒装光子晶体 LED芯片的制造方法， 其特征在于： 所述初始衬底为蓝宝石衬底。
12、 一种利用权利要求 1所述的倒装光子晶体 LED芯片的制造方法制造的 倒装光子晶体 LED芯片， 其特征在于， 包括：
光子晶体纳米级图形化衬底和倒装 LED结构； 所述光子晶体纳米级图形化 衬底包括外延生长面和出光面， 所述外延生长面中形成有纳米级图形结构， 所 述出光面中形成有光子晶体结构；所述倒装 LED结构形成于所述外延生长面上。
13、 如权利要求 12所述的倒装光子晶体 LED芯片， 其特征在于： 所述倒 装 LED结构包括：
生长在所述光子晶体纳米级图形化衬底的外延生长面上的外延层， 所述外 延层包括依次形成的 N型氮化镓层、 多量子阱有源层和 P型氮化镓层；
形成于所述外延层中的电极孔洞，所述电极孔洞暴露出所述 N型氮化镓层； 形成于所述 P型氮化镓层上的金属反射镜层；
形成于所述金属反射镜层上的绝缘层；
形成于所述绝缘层中的开口， 所述开口暴露出部分金属反射镜层和 N型氮 化镓层；
形成于所述开口中的电极焊接层以及
与所述电极焊接层焊接的散热基板。
14、 如权利要求 12所述的倒装光子晶体 LED芯片， 其特征在于： 所述形 成光子晶体结构的纳米压印技术使用的第二压印模版上的图形为规则排布的第 二纳米凸点， 所述第二纳米凸点的尺寸以及间距与所述倒装光子晶体 LED芯片 的发光波长同一数量级。
15、 如权利要求 14所述的倒装光子晶体 LED芯片， 其特征在于： 所述第 二纳米凸点的形状为圓柱体形或长方体形。
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