WO2014082434A1 - Led驱动电路及控制系统 - Google Patents

Led驱动电路及控制系统 Download PDF

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Publication number
WO2014082434A1
WO2014082434A1 PCT/CN2013/076607 CN2013076607W WO2014082434A1 WO 2014082434 A1 WO2014082434 A1 WO 2014082434A1 CN 2013076607 W CN2013076607 W CN 2013076607W WO 2014082434 A1 WO2014082434 A1 WO 2014082434A1
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WIPO (PCT)
Prior art keywords
circuit
control
led
constant current
data
Prior art date
Application number
PCT/CN2013/076607
Other languages
English (en)
French (fr)
Inventor
卢长军
刘志勇
Original Assignee
利亚德光电股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 利亚德光电股份有限公司 filed Critical 利亚德光电股份有限公司
Priority to EP13859015.3A priority Critical patent/EP2927895A4/en
Priority to KR1020157017065A priority patent/KR20150095707A/ko
Priority to CA2894580A priority patent/CA2894580C/en
Priority to US14/647,005 priority patent/US9679515B2/en
Priority to JP2015544317A priority patent/JP2016505880A/ja
Publication of WO2014082434A1 publication Critical patent/WO2014082434A1/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/345—Current stabilisation; Maintaining constant current
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G09G3/342—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
    • G09G3/3426—Control of illumination source using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines the different display panel areas being distributed in two dimensions, e.g. matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/40—Details of LED load circuits
    • H05B45/44—Details of LED load circuits with an active control inside an LED matrix
    • H05B45/46—Details of LED load circuits with an active control inside an LED matrix having LEDs disposed in parallel lines
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0272—Details of drivers for data electrodes, the drivers communicating data to the pixels by means of a current
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/06—Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2380/00—Specific applications
    • G09G2380/14—Electronic books and readers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/32—Pulse-control circuits

Definitions

  • FIG. 1 is a schematic diagram of the internal architecture of an LED driving circuit according to the prior art.
  • the current LED driving circuit is composed of a driving control circuit and a constant current channel group circuit, and the driving control circuit is a logic circuit.
  • the drive control circuit includes a serial data port (wherein the serial data port includes SDI, SCLK, LE, OE, SDO) and a constant current channel control signal group.
  • the serial data port is responsible for inputting and outputting the control signals of the system into the LED driving circuit, and controlling the constant current channels of the constant current channel group circuit to be sequentially turned on and off through the constant current channel control signal group.
  • SDI is the data input signal
  • SCLK is the shift pulse signal
  • LE is the data latch signal
  • OE is the unified enable control signal of the constant current input interface group
  • SDO1012 is the data output signal.
  • the constant current channel includes a current input end, a current output end and a signal control end.
  • the current input end of the constant current channel group circuit is connected to the constant current input interface group for connecting the cathode of the LED, and the current output end of the constant current channel group circuit is interconnected.
  • the signal control terminal of the constant current channel group circuit is connected to the constant current channel control signal group.
  • 2 is a schematic diagram of a cascade application of an LED drive circuit in accordance with the prior art.
  • the current LED driving circuit cascade application includes a display control logic circuit and N LED driving circuits connected in series.
  • the control signal port of the display control logic circuit is connected to the serial data ports SDI, SCLK, LE, OE, SDO of the LED drive circuit, and the display of the LED unit board is controlled by the transmitted serial data.
  • the control signal port includes: C_SDI serial data output signal, C_SCLK serial data shift pulse signal, C_LE serial data latch signal, C_OE serial data enable signal.
  • the C_SDI is connected to the SDI of the first LED driving circuit, and the C_SCLK, C_LE, and C_OE are respectively connected to the SCLK, LE, and OE of the N LED driving circuits by means of a bus.
  • the two LED driver circuits are interconnected via SDI and SDO.
  • the current SCLK, LE, and OE of the LED driving circuit are interconnected by the display control logic circuit by a bus method, and the number of control signals is large, the PCB wiring is difficult, and the anti-interference ability of the control signal is relatively low.
  • LED driver circuit cascade will lead to signal transmission problems, such as the output signal of the display control logic circuit shown in Part A of Figure 5, where C_SDI is the serial output data, C_SCLK is the shift pulse signal, and the signal rises.
  • C_SDI is the serial output data
  • C_SCLK is the shift pulse signal
  • the serial data is collected into the shift register of the logic circuit
  • C_LE is the serial data latch signal
  • the rising edge of the signal outputs the signals of the internal shift register data of each controlled LED drive circuit to the signal of the constant current channel in parallel.
  • Part B of Figure 5 shows a serial data port signal diagram of the final stage LED driver circuit shown in Figure 2 for cascading applications.
  • the signal SDI received by the final serial data input port has a time delay, wherein the SDI delay is T_SDI, and the delay value is gradually accumulated by the delay of the logic circuits of the N LED driving circuits.
  • the SDI delay is T_SDI
  • the delay value is gradually accumulated by the delay of the logic circuits of the N LED driving circuits.
  • a main object of the present invention is to provide an LED driving circuit and a control system to solve the above problems.
  • an LED driving circuit comprising: a driving control circuit and a constant current channel group circuit, wherein the driving control circuit comprises: a logic control circuit and a clock delay circuit, wherein, the logic control circuit is connected to the constant current channel group circuit for controlling the orderly turning on or off of the constant current channel group circuit by using the data control signal; and the clock delay circuit is connected with the logic control circuit for acquiring and data A timing control signal that controls signal synchronization and outputs a timing control signal.
  • the timing control signal comprises: a shift pulse signal
  • the input end of the drive control circuit comprises: a shift pulse input port
  • the output end of the drive control circuit comprises: a shift pulse output port
  • the clock delay circuit comprises a shift delay The input port, the clock delay sub-circuit, and the delay output port, wherein the shift delay input port is connected to the shift pulse input port for receiving the shift pulse signal
  • the clock delay sub-circuit is connected to the shift delay input Between the port and the logic control circuit, used to delay data generated by the clock delay sub-circuit Delaying the shift pulse signal to obtain a shift pulse signal synchronized with the data control signal; and delaying the output port connected between the clock delay sub-circuit and the shift pulse output port for outputting the shift pulse signal .
  • the clock delay circuit includes: a reading device, wherein the input end of the reading device is connected to the logic control circuit for reading delay data in the delay table of the logic control circuit; and the output end of the reading device Connected to the clock delay sub-circuit for transmitting delayed data to the clock delay sub-circuit.
  • the timing control signal comprises: a data latch signal
  • the input end of the driving control circuit comprises: a data latch input port
  • the logic control circuit comprises a latch input port, wherein the latch input port and the data latch input port Connection, used to receive data latch signals.
  • the timing control signal includes: an enable control signal
  • the input end of the drive control circuit includes: an enable control input port
  • the logic control circuit includes an enable input port, wherein the enable input port and the enable control input port Connection, used to receive the enable control signal.
  • the input end of the driving control circuit comprises: a data input port
  • the output end of the driving control circuit comprises: a data control output port
  • the logic control circuit comprises: a logic control sub-circuit, a first control input port, a first control output a port and a second control output port, wherein the first control input port is connected to the data input port for receiving the data control signal
  • the logic control sub-circuit is connected between the first control input port and the clock delay circuit for using the data
  • the control signal and the timing control signal generate a logic control signal
  • the first control output port is connected to the logic control sub-circuit, and is connected to the constant current channel group circuit through the constant current channel control signal group for outputting the logic control signal to the constant current logic circuit
  • the constant current channel group circuit includes one or more constant current logic elements, wherein a first end of each constant current logic element is respectively connected to a power supply end or a ground end of the power supply device; The two ends are respectively connected to the anode or the cathode of the LED particles in the corresponding column in the LED display panel; and the third end of each constant current logic element is respectively connected to the corresponding terminal in the constant current channel control signal group.
  • the logic control sub-circuit includes: a sub-processor connected between the constant current logic circuit and the reading device for reading delay data corresponding to the number of constant current logic elements in the constant current channel group circuit .
  • an LED control system includes: a display driving circuit, the display driving circuit includes a plurality of LED driving circuits, and the display driving circuit further includes a display control circuit, wherein the display control The circuit is respectively connected to the control end of each LED driving circuit through a driving control port for controlling the turning on or off of each LED driving circuit.
  • the driving control port includes: a data output port, a shift pulse output port, a data latch output port, and an enable control output port, wherein the data input port of the first LED driving circuit is connected to the data output port, and is used for Receiving a data control signal, and the data input port of the i+1th LED driving circuit is connected to the data control output port of the ith LED driving circuit, and is configured to receive a data control signal, where i is a natural number greater than or equal to 1;
  • a shift pulse input port of an LED driving circuit is connected to the shift pulse output port to receive the shift pulse signal, and the shift pulse input port of the i+1th LED driving circuit and the ith LED driving circuit
  • the second delay output port is connected to receive a shift pulse signal synchronized with the data control signal, wherein i is a natural number greater than or equal to 1;
  • the data latch input port of each LED drive circuit is respectively connected to the data latch output port , for receiving a data latch signal; and an enable control input port of each LED driver circuit and
  • the LED control system includes: a switch circuit, wherein a first end of one of the constant current channel group circuit in the switch circuit and the LED drive circuit is connected to a power end of the power supply device, and the first end of the other end is connected to the power supply device a ground end; a second end of one of the constant current channel group circuits in the switch circuit and the LED drive circuit is connected to the anode of the LED display panel, and the other end is connected to the cathode of the LED display panel; and the control circuit includes: a control circuit, wherein the power supply control circuit is connected to the third end of the switch circuit through the power supply control port for controlling opening or closing of the switch circuit; wherein, the switch circuit is used for controlling power supply to the LED display panel, and the LED drive circuit is used Controls the orderly display of the LED display panel.
  • the switch circuit includes a sub-switch circuit, and the sub-switch circuit includes one or more FETs, wherein the source of each FET is respectively connected to a power terminal or a ground terminal of the power supply device; each FET The drains are respectively connected to the anodes or cathodes of the respective LED particles in the corresponding rows in the LED display panel; and the gates of each of the field effect transistors are respectively connected to corresponding ones of the power supply control ports.
  • the switch circuit includes a first sub-switch circuit and a second sub-switch circuit, wherein the first sub-switch circuit and the second sub-switch circuit each include one or more FETs, and the first sub-switch circuit and the second The source of each FET in the sub-switch circuit is respectively connected to the power terminal or the ground terminal of the power supply device, wherein the drain of each FET in the first sub-switch circuit respectively corresponds to the LED display panel An anode or a cathode of a red tube in each LED particle in the row, and a gate of each FET is respectively connected to a corresponding terminal in the power supply control port for controlling the power supply of the red lamp of the LED display panel; The drain of each FET in the second sub-switch circuit is respectively connected to the green lamp and the anode or cathode of the blue lamp in each LED particle in the corresponding row in the LED display panel, and the gate of each FET The poles are respectively connected with corresponding terminal blocks in the
  • the clock delay circuit is integrated in the LED driving circuit, and the timing control signal can be delayed to a signal synchronized with the data control signal, so that the data in the erroneous data control signal is not collected, and the time is
  • the input and output ports of the sequence control signal are built into the LED driving circuit, which reduces the number of PCB wirings, and solves the problem that the number of control signals of the LED driving circuit cascaded in the prior art is large and the serial output data is delayed, which leads to difficulty in PCB wiring.
  • the anti-interference ability of the control signal is relatively low and the LED display error, the data control signal and the timing control signal are synchronized, and the number of PCB wiring is reduced, and the influence of the timing control signal on the signal on the PCB layout board is reduced.
  • the effect of the LED is accurately displayed, and the signal transmission quality and anti-interference ability of the LED unit board are improved, and the wiring difficulty of the LED unit board is reduced.
  • FIG. 1 is a schematic diagram of an internal structure of an LED driving circuit according to the prior art
  • FIG. 2 is a schematic diagram of an LED driving circuit cascade application according to the prior art
  • FIG. 3 is an LED driving circuit according to an embodiment of the present invention.
  • 4 is a detailed structural diagram of an LED driving circuit according to an embodiment of the present invention
  • FIG. 5 is a schematic structural view of an LED control system according to an embodiment of the present invention
  • FIG. 6 is an LED control system according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a clock of a data input port signal according to an embodiment of the present invention
  • FIG. 8 is a schematic structural view of an LED display according to a preferred embodiment of the present invention
  • FIG. 8a is an LED display according to a preferred embodiment of the present invention.
  • Figure 8b is a partial enlarged view of the broken line portion D in Figure 8a;
  • Figure 8c is a partial enlarged view of the dotted line portion D1 in Figure 8b;
  • Figure 9a is a structure of the LED display according to Embodiment 5 of the present application
  • Figure 9b is a partial enlarged view of the broken line portion I of Figure 9a;
  • Figure 9c is a partial enlarged view of the broken line portion II of Figure 9b.
  • the LED driving circuit includes a driving control circuit 30 and a constant current channel group circuit 10, wherein the driving control circuit 30 includes: a logic control circuit 31 and a clock delay circuit 33, wherein the logic control circuit 31 And connected to the constant current channel group circuit 10, for controlling the orderly turning on or off of the constant current channel group circuit 10 by using a data control signal; the clock delay circuit 33 is connected to the logic control circuit 31 for acquiring and data A timing control signal for controlling signal synchronization, and outputting the timing control signal.
  • the clock delay circuit delays the acquired current timing control signal to obtain a delayed timing control signal, and the delayed timing control signal is synchronized with the data control signal.
  • a clock delay circuit is integrated in the LED driving circuit, and the timing control signal can be delayed to a signal synchronized with the data control signal, so that the data in the erroneous data control signal is not collected, and the timing is
  • the input and output ports of the control signal are built into the LED driving circuit, which reduces the number of PCB wirings, and solves the problem that the number of control signals of the LED driving circuit cascaded in the prior art is large and the serial output data is delayed, which causes the PCB wiring to be difficult.
  • the anti-interference ability of the control signal is relatively low and the LED display error is solved, the data control signal is synchronized with the timing control signal, and the number of PCB wiring is reduced, and the influence of the timing control signal on the signal on the PCB layout board is reduced.
  • the effect is to make the LED display accurately, and improve the signal transmission quality and anti-interference ability of the LED unit board, and reduce the wiring difficulty of the LED unit board.
  • the timing control signal may include: a shift pulse signal, the input end of the drive control circuit includes: a shift pulse input port, and an output end of the drive control circuit includes: a shift pulse output port, wherein
  • the clock delay circuit includes a shift delay input port, a clock delay sub-circuit, and a delay output port, wherein the shift delay input port is connected to the shift pulse input port for receiving the shift pulse signal;
  • the clock delay sub-circuit Connected between the shift delay input port and the logic control circuit, used for delay processing of the shift pulse signal by using the delay data generated by the clock delay sub-circuit to obtain a synchronization shift with the data control signal
  • the bit pulse signal; the delay output port is connected between the clock delay sub-circuit and the shift pulse output port, and is used for outputting a shift pulse signal synchronized with the data control signal.
  • the delay data may be directly programmed in the clock delay sub-circuit, or may be read from the logic control circuit by a reading device in the clock delay sub-circuit.
  • the input end of the reading device is connected to the logic control circuit for reading the delay data in the delay table in the logic control circuit, wherein the delay data recorded in the delay table can be according to the logic control circuit
  • the number of constant current logic elements included in the connected constant current channel group circuit 10 is determined and updated; the output of the reading device is coupled to the clock delay sub-circuit for transmitting the delayed data to the clock delay sub-circuit.
  • the timing control signal may include: a data latch signal, the input end of the driving control circuit includes: a data latch input port, wherein the logic control circuit includes a latch input port, wherein the latch input The port is coupled to the data latch input port for receiving a data latch signal.
  • the data latch input port is the LE port in Figure 4.
  • the timing control signal includes: an enable control signal, the input end of the drive control circuit includes: an enable control input port, wherein the logic control circuit includes an enable input port, wherein the input port is enabled Connected to the enable control input port for receiving the enable control signal.
  • the enable control input port is the OE port in FIG.
  • the input end of the driving control circuit includes: a data input port
  • the output end of the driving control circuit includes: a data control output port
  • the logic control circuit comprises: a logic control sub-circuit, a first control input port a first control output port and a second control output port, wherein the first control input port is connected to the data input port for receiving the data control signal
  • the logic control sub-circuit is connected to the first control input port and the first delay output
  • the logic control signal is generated by using the data control signal and the timing control signal
  • the first control output port is connected to the logic control sub-circuit, and is connected to the constant current channel group circuit through the constant current channel control signal group for output
  • the logic control signal is connected to the constant current logic circuit
  • the second control output port is connected between the logic control sub-circuit and the data control output port for outputting the data control signal.
  • the LED driving circuit in the above embodiment of the present application includes a driving control circuit.
  • the logic circuit includes a serial data input (ie, the input of the drive control circuit, including SDI, SCLK, LE, OE ports), a serial data output port (ie, the output of the drive control circuit, including the SDO, SCLKO port), the clock A delay circuit, a logic control circuit, and a constant current channel control signal group.
  • the serial data input port is used to input the control signal of the system to the LED driving circuit, and the serial data output port is used for processing the control signal and then outputting to the next-level LED driving circuit.
  • the logic control circuit controls each constant current logic component in the constant current channel group circuit through the constant current channel control signal group (ie constant current channel) is turned on or off in an orderly manner.
  • SDI is a data input signal port (ie, a data input port);
  • SCLK is an input port of a shift pulse signal (ie, a shift pulse input port);
  • LE is a data latch signal (ie, a data latch input port);
  • SDO is the data output signal (ie data control output port);
  • SCLKO is the shift pulse output signal (ie the first delay in the above embodiment) Output port).
  • the logic control sub-circuit may include: a sub-processor connected between the constant current logic circuit and the reading device for reading delay data corresponding to the number of constant current logic elements in the constant current channel group circuit (ie, the delay time corresponding to the number of constant current channels in the constant current channel group circuit).
  • the sub-processor in the logic control circuit acquires the number of constant current logic elements in the constant current logic circuit, and obtains a constant current according to the number of constant current logic elements and the preset delay time of the single constant current logic element.
  • the delay data of the logic circuit the reading device in the clock delay circuit reads the delay data corresponding to the constant current logic circuit, and sends the delay data to the clock delay sub-circuit, and then the clock delay sub-circuit uses the delay
  • the data delay processing the shift pulse signal, the data latch signal and the enable control signal respectively to acquire a shift pulse signal synchronized with the data control signal, and to acquire the data latch signal and the enable control signal
  • the logic control circuit After being sent to the logic control circuit, the logic control circuit generates a logic control signal using the data latch signal, the enable control signal, and the data control signal, and uses the logic control signal to control the orderly turn-on or turn-off of the constant current logic group circuit.
  • the constant current channel group circuit includes one or more constant current logic elements, wherein the first end of each constant current logic element is respectively connected to a power supply terminal or a ground terminal of the power supply device; The second ends of the constant current logic elements are respectively connected to the anodes or cathodes of the LED particles in the corresponding columns of the LED display panel (ie, the LED unit board); the third end of each constant current logic element and the constant current channel control signal respectively Connect the corresponding terminal blocks in the group.
  • the constant current channel includes a current input end, a current output end, and a signal control end, and the current input end of the constant current channel group circuit is connected to the input end of the constant current logic channel for connecting the LED display panel.
  • FIG. 5 is a schematic structural view of an LED control system according to an embodiment of the present invention.
  • FIG. 6 is a detailed structural diagram of an LED control system according to an embodiment of the present invention.
  • Figure 8 is a block diagram showing the structure of an LED display in accordance with a preferred embodiment of the present invention. As shown in FIG. 5, FIG. 6, and FIG.
  • the LED control system includes: a display driving circuit 1, the display driving circuit includes a plurality of LED driving circuits 3, and the display driving circuit 1 further includes a display control circuit 50, wherein The control circuit 50 is respectively connected to the control terminal of each of the LED driving circuits 3 through a driving control port for controlling the on or off of each of the LED driving circuits 3.
  • a logic control circuit and a clock delay circuit are provided in a drive control circuit in the display drive circuit, and the logic control circuit is connected to the constant current channel group circuit for controlling the constant current channel by using the data control signal
  • the circuit is sequentially turned on or off; the clock delay circuit is connected to the logic control circuit for delay processing the timing control signal to obtain a timing control signal synchronized with the data control signal, and the output is synchronized with the data control signal Timing control signal.
  • a clock delay circuit is integrated in the LED driving circuit, and the timing control signal can be delayed to a signal synchronized with the data control signal, so that the data in the erroneous data control signal is not collected, and the timing is
  • the input and output ports of the control signal are built into the LED driving circuit, which reduces the number of PCB wirings, and solves the problem that the number of control signals of the LED driving circuit cascaded in the prior art is large and the serial output data is delayed, which causes the PCB wiring to be difficult.
  • the anti-interference ability of the control signal is relatively low and the LED display error is solved, the data control signal is synchronized with the timing control signal, and the number of PCB wiring is reduced, and the influence of the timing control signal on the signal on the PCB layout board is reduced.
  • the effect is such that the LED is accurately displayed, and the signal transmission quality and anti-interference ability of the LED unit board are improved, the wiring difficulty is reduced, and the number of cascades of the LED control system is increased.
  • the drive control port may include: a data output port, a shift pulse output port, a data latch output port, an enable control output port, wherein the data input port of the first LED drive circuit is a data output port connection for receiving a data control signal, and a data input port of the i+1th LED driving circuit is connected to a data control output port of the ith LED driving circuit, for receiving a data control signal, where i is a natural number greater than or equal to 1; a shift pulse input port of the first LED driving circuit is connected to the shift pulse output port for receiving the shift pulse signal, and the shift pulse input port of the i+1th LED driving circuit is a second delayed output port of the i-th LED driving circuit is connected for receiving a shift pulse signal synchronized with the data control signal, wherein i is a natural number greater than or equal to 1; a data latch input port of each LED driving circuit Connected to the data latch output port for receiving the data latch signal; the enable control input port of each LED driver circuit is respectively Connected to the enable control output
  • the LED control system includes a display driving circuit and N LED driving circuits connected in series.
  • the output of the display driving circuit is a driving control port (ie, a control signal port), wherein the control signal port includes C_SDI (data output port, that is, serial data output signal), C_SCLK (shift pulse) Output port, ie serial data shift pulse signal), C_LE (data latch output port, ie serial data latch signal), C OE (enable control output port, ie serial data enable signal).
  • the C_SDI is connected to the SDI of the first LED driving circuit
  • the C_SCLK is connected to the SCLK of the first new LED driving circuit
  • the C_LE and C_OE are respectively interconnected to the LE and OE of the N LED driving circuits by means of a bus.
  • Two LED drive circuits are interconnected by serial data input ports SDI, SCLK and corresponding serial data output ports SDO, SCLKO.
  • 7 is a schematic diagram of a data input port signal in accordance with an embodiment of the present invention. As shown in Fig. 7, part C of the figure is a serial data input port signal diagram of the first-stage and final-stage LED driving circuits of the LED control circuit cascaded application LED driving circuit.
  • the signal SDI/SCLK/LE/OE received by the serial data input port of the final LED driver circuit has a time delay, in which the SDI delay
  • the T_SDI is caused by the logic control circuit of the N LED driving circuits being gradually accumulated.
  • the SCLK delay T_SCLK is controlled by the clock delay circuit of the LED driving circuit, wherein the delay T_SCLK of the SCLK is cumulatively controlled by the clock delay circuits of the N LED driving circuits, LE
  • the delay T_LE and the OE delay T_OE are simultaneously controlled by the display driving circuit.
  • the cascading of more LED driving circuits is realized by ensuring that the timing control signals are synchronously connected into the logic control circuit in the LED driving circuit. Since the two ports SCLK and SCLKO are built in the LED driver circuit, the number of PCB layouts is reduced, and the influence of the output signals of the two ports SCLK and SCLKO on other signals on the PCB is reduced, thereby improving the signal of the LED unit board. Transmission quality and anti-interference ability, reducing the difficulty of wiring the LED unit board. In the embodiment shown in FIG.
  • the LED control system may further include: a switch circuit, wherein the first end of one of the constant current channel group circuit 10 in the switch circuit and the LED drive circuit 3 is connected to the power supply end of the power supply device, and The first end of one is connected to the ground end of the power supply device; the second end of one of the constant current channel group circuit 10 in the switch circuit and the LED drive circuit 3 is connected to the anode of the LED display panel, and the second end of the other is displayed with the LED a cathode connection of the panel; the display control circuit 50, comprising: a power supply control circuit, wherein the power supply control circuit is connected to the third end of the switch circuit through the power supply control port for controlling opening or closing of the switch circuit; wherein, the switch circuit is used In order to control the power supply to the LED display panel, the LED drive circuit is used to control the orderly display of the LED display panel.
  • the LED control system includes a display driving circuit, wherein the display driving circuit includes a switching circuit, an LED driving circuit, and a control circuit, and the control circuit may include a display control circuit 50 and a driving control circuit 30, and the power supply control circuit in the display control circuit
  • the drive control circuit is used to control the on or off of the LED drive circuit, and then control the power supply of the LED display panel (ie, the LED unit board) through the opening or closing of the switch circuit, and through the LED drive circuit. Turning on or off controls the display of the LED display panel to achieve an orderly display of the LED display panel.
  • the switch circuit, the LED drive circuit 3 and the control circuit are integrated into the display drive circuit 1, so that more display drive circuits can be placed under the condition that the original LED display panel area is constant, so that the area is constant
  • the ratio of the number of LED particles to the display drive circuit is reduced, the refresh rate is improved, and the LED display panel is M.
  • the row*N column LED particle array has a clearer connection relationship with the display driver circuit, and fewer connection lines, which reduces the design difficulty of the PCB.
  • 8a to 8c are detailed structural views of an LED display according to a preferred embodiment of the present invention; wherein, Fig. 8b is a partial enlarged view of a broken line portion D in Fig. 8a; and Fig.
  • FIG. 8c is a partially enlarged view of a broken line portion D1 in Fig. 8b.
  • 9a to 9c are schematic structural views of an LED display according to Embodiment 5 of the present application; wherein, FIG. 9b is a partial enlarged view at a broken line portion I in FIG. 9a; and FIG. 9c is a partial portion at a broken line portion II in FIG. 9b. Enlarged image.
  • the switch circuit in this embodiment may include a sub-switch circuit, a sub-switch circuit Include one or more FETs, wherein the source of each FET is respectively connected to a power terminal or a ground terminal of the power supply device; the drain of each FET is respectively associated with each of the corresponding rows in the LED display panel The anode or cathode of the LED particles are connected; the gate of each FET is connected to a corresponding terminal in the power supply control port.
  • the sub-switch circuit may include N P-MOS transistors, wherein the drain of each P-MOS transistor is respectively used as one of the output pins of the control circuit, and the source of the P-MOS transistor is connected to The power supply terminal of the display circuit (ie, the VCC terminal) is connected, and the gate of the P-MOS transistor is connected to one of the power supply control ports of the control circuit;
  • the constant current channel group circuit may include N constant current logic components (also referred to as a constant current logic circuit), the second end of each constant current logic element (in this embodiment, the input terminal of the constant current logic element) is one of the input pins of the display driving circuit, and all the constant current logic elements
  • the first end (ie, the output end) is internally interconnected, and the ground end (ie, the GND end) of the display driving circuit is connected to the ground end of the power supply device, and the third end of the constant current logic element (in this embodiment, the constant current logic)
  • the control terminal of the component is connected to the drive
  • the LED display panel (which may also be referred to as an LED unit) may include a matrix arrangement of M rows*N columns of LED particles, wherein the anode interconnection of the single row of LED particles is connected to the i-th node, and each node is connected to the switch An output pin corresponding to a drain of a P-MOS transistor in the sub-switch circuit of the circuit, a cathode of the same primary color in the single column of LED particles is interconnected to an input terminal of a constant current logic component of the constant current channel group circuit of the display driving circuit, That is, the common cathode interconnection of the red tube (ie, the R LED) in the single column of LED particles is connected to the constant current logic element input terminal of the constant current channel group circuit of the display driving circuit; the green tube of the single column of LED particles (ie, the G color)
  • the common cathode interconnection of the light emitting diodes is connected to the constant current logic element input terminal of the constant current channel group circuit of the display driving circuit
  • the red, green, and blue tubes may be R/G/B primary light emitting diodes, respectively.
  • the LED particles in the LED display panel may also have the following connection modes: R/G/B of a single row of LED particles in the LED display panel
  • the anode interconnection of the LEDs is connected to a drain of a P-MOS tube in the switching circuit of the display driving circuit
  • the corresponding output pin of the pole, the cathode of the same primary color in the single column of LED particles is interconnected to the input end of the constant current logic component of the constant current channel group circuit of the display driving circuit, that is, the common cathode interconnection of the R primary color LED in the single column of LED particles a constant current logic element input terminal of the constant current channel group circuit of the display driving circuit
  • a common cathode interconnection of the G primary color light emitting diode in the single column of LED particles is connected to the constant current logic element input end of the constant current channel group circuit of the display driving circuit
  • the LED display panel is controlled by the display driving circuit, and the power supply control circuit controls the sub-switch circuit (which may be a P-MOS channel group) through the power supply control port to be in an on state, which is on the LED display panel.
  • the drive control circuit outputs a constant current control signal to each constant current logic component in the constant current channel group circuit through the drive control port to control the working state of each constant current logic component. , thereby providing a current path for the primary color cathode of the corresponding column of LED particles, and achieving an orderly display of the LED unit.
  • the primary color cathode of the LED particles of the corresponding column includes cathodes of three primary colors of R, G, and B, that is, an ordered display of red, green, and blue lamps respectively corresponding to the LED particles in the column.
  • the sub-switch circuit may include N N-MOS transistors, wherein the drain of each N-MOS transistor serves as one of the output pins of the control circuit, and the source of the N-MOS transistor serves as a display driver.
  • the ground terminal of the circuit (ie, the GND terminal) is connected to the ground terminal of the power supply device, and the gate of the N-MOS transistor is connected to one of the power supply control ports of the control circuit;
  • the constant current channel group circuit includes N constant current logic components (Alternatively referred to as a constant current logic circuit), the second end (ie, the input terminal) of each constant current logic element serves as one of the input pins of the display driving circuit, and the first end of all the constant current logic elements (ie, The output terminal) is interconnected, and the power supply terminal (ie, the VCC terminal) of the display driving circuit is connected to the power terminal of the power supply device, and the third end (ie, the control terminal) of the constant current logic component is connected to the display control port of the control circuit, and is used for Receiving a constant current control signal of the LED driving circuit.
  • the LED display panel (which may be referred to as an LED unit, which may also be referred to as an LED unit board) includes a matrix arrangement of M rows*N columns of LED particles, wherein the cathode interconnection of the single row of LED particles To the i-th node, each node is connected to an output pin corresponding to the drain of one N-MOS transistor in the switching circuit of the display driving circuit, and the anode of the same primary color in the single column of LED particles is interconnected to the constant current channel of the display driving circuit
  • the input end of the constant current logic component of the group circuit that is, the common anode interconnection of the R primary light emitting diode in the single row of LED particles is connected to the input terminal of the constant current logic component of the constant current channel group circuit of the display driving circuit; the G primary color illumination in the single column LED particle
  • each of the LED particles in the LED display panel includes a red tube, a green tube, and a blue tube, wherein the cathode of the red tube in each LED particle in each row, green
  • the cathode of the lamp tube and the cathode of the blue lamp tube are connected in parallel, and are connected to the drain of a corresponding N-MOS tube in the switch circuit;
  • the anodes of the red lamps of the respective LED particles in each column are respectively connected in parallel, respectively and respectively
  • the second end of the corresponding one of the constant current logic elements in the flow channel group circuit is connected;
  • the anodes of the green light tubes of the respective LED particles in each column are respectively connected in parallel, and respectively correspond to a constant current logic element in the constant current channel group circuit
  • the second end is connected; the anodes of the blue tubes of the respective LED particles in each column are respectively connected in parallel, and are respectively connected to the second end of a corresponding constant current logic element in the constant current channel group circuit.
  • the cathode of the single row of LED particles in the LED display panel in this embodiment may also be interconnected to the output pin corresponding to the drain of one of the N-MOS transistors in the switching circuit of the display driving circuit, the same in the single column of LED particles
  • the anode of the primary color is interconnected to the input end of the constant current logic component of the constant current channel group circuit of the display driving circuit, that is, the common anode interconnection of the red light bulb R primary light emitting diode in the single row of LED particles is connected to the constant current channel group circuit of the display driving circuit
  • the input terminal of the constant current logic element; the common anode interconnection of the G primary color LED in the single column of LED particles is connected to the input terminal of the constant current logic element of the constant current channel group circuit of the display driving circuit; the common anode of the B primary color LED in the single column of LED particles Connected to the constant current logic element input terminal of the constant current channel group circuit of the display driving circuit.
  • the control circuit in the embodiment shown in FIGS. 9a to 9c may include a display control circuit and a drive control circuit, and the display drive circuit is connected to the drive control circuit; the switch circuit in this embodiment may further include a first sub-switch circuit and a second a sub-switch circuit, wherein the first sub-switch circuit and the second sub-switch circuit each comprise one or more field effect transistors, and the sources of each of the first sub-switch circuit and the second sub-switch circuit Connected to a power terminal or a ground terminal of the power supply device, respectively, wherein a drain of each FET in the first sub-switch circuit and an anode or a cathode of a red lamp in each LED particle in a corresponding row in the LED display panel Connected, the gate of each FET is respectively connected with a corresponding terminal in the power supply control port for controlling the power supply of the red lamp of the LED display panel; the drain of each FET in the second sub-switch circuit Connecte
  • the display driving circuit integrates the first sub-switching circuit and the second sub-switching circuit, and the two sub-switching circuits respectively comprise one or more P-MOS tubes, and the source of the P-MOS tube of the first sub-switching circuit Extremely interconnected It can be used as an external pin VCCB of the display driving circuit, connected to a terminal of the power supply terminal of the power supply device, the gate is connected to the red power supply control signal of the power supply control port, and the drain is connected to the corresponding row of LED particles of the LED display panel.
  • the anode of the red lamp tube ie, the R primary color anode of the corresponding row of LED particles
  • the source interconnection of the P-MOS tube of the second sub-switch circuit can be used as the external pin VCCA of the display drive circuit, and is connected to the power supply of the power supply device a terminal of the terminal, the gate is connected to the green and blue power supply control signals of the power supply control port, and the drain is connected to the green light tube of the LED particle of the corresponding row of the LED display panel and the anode of the blue light tube (ie, the corresponding row G-based anode and B-primary anode of LED particles).
  • the power supply control circuit is configured to control one of the first sub-switch circuits to be turned on to the LED particles in the row of the LED display panel corresponding to the field effect transistor in the first sub-switch circuit.
  • the red lamp is powered;
  • the power control circuit is further configured to control the FET of the second sub-switch circuit corresponding to one of the first sub-switch circuits to open and interact with the field effect in the first sub-switch circuit
  • the green LED tube and the blue tube in the LED particles in the corresponding LED display panel row are powered;
  • the driving control circuit is used to control the conduction of each constant current logic component in the constant current channel group circuit, and each constant current logic component is guided.
  • the field effect transistor in the switch circuit may be a P-MOS tube
  • the LED display panel may include M rows and N columns of LED particles, and each of the LED particles includes a red tube, a green tube, and a blue tube.
  • the anode of the red tube in the ith LED particle in each row is connected in parallel to the i-th node, and each node in each row is connected in parallel, respectively, corresponding to a corresponding P-MOS tube in the first sub-switch circuit.
  • Drain connection; the anode of the green lamp and the anode of the blue lamp in the jth LED particle in each row are connected in parallel to the jth node, and each node in each row is connected in parallel, corresponding to the corresponding in the second sub-switch circuit a drain connection of a P-MOS transistor; cathodes of red LEDs of respective LED particles in each column are respectively connected in parallel, respectively connected to a second end of a corresponding constant current logic element in the constant current logic group circuit; The cathodes of the green tubes of the respective LED particles are respectively connected in parallel, respectively connected to the second end of a corresponding constant current logic element in the constant current logic group circuit; the cathode of the blue tube of each LED particle in each column Parallel connection A second end connected to a constant logic elements respectively corresponding to the logical group and the constant current circuit.
  • the display driving circuit integrates the first sub-switching circuit and the second sub-switching circuit, and the two sub-switching circuits respectively comprise one or more P-MOS tubes, and the source of the P-MOS tube of the first sub-switching circuit Extremely interconnected It can be used as an external pin VCCB of the display driving circuit, connected to a terminal of the power supply terminal of the power supply device, the gate is connected to the red power supply control signal of the power supply control port, and the drain is connected to the corresponding row of LED particles of the LED display panel.
  • the anode of the red lamp tube ie, the R primary color anode of the corresponding row of LED particles
  • the source interconnection of the P-MOS tube of the second sub-switch circuit can be used as the external pin VCCA of the display drive circuit, and is connected to the power supply of the power supply device a terminal of the terminal, the gate is connected to the green and blue power supply control signals of the power supply control port, and the drain is connected to the green light tube of the LED particle of the corresponding row of the LED display panel and the anode of the blue light tube (ie, the corresponding row G-based anode and B-primary anode of LED particles).
  • the anodes of the red lamps in the ith LED particles in each row of the LED display panel are connected in parallel to the i-th node, and the respective nodes in each row are connected in parallel to respectively correspond to the first sub-switch circuit.
  • the drain connection of one P-MOS tube; the anode of the green lamp and the anode of the blue tube in the jth LED particle in each row are connected in parallel to the jth node, and the nodes in each row are connected in parallel, respectively a drain connection of a corresponding one of the P-MOS transistors in the second sub-switch circuit; a cathode of the same primary color in the single column of LED particles is interconnected to an input terminal of the constant current logic component of the constant current channel group circuit of the display driving circuit 1, that is, a single column
  • the common cathode interconnection of the red lamp tube (ie, the R primary color display unit) in the LED particles is connected to the input terminal of the constant current logic element of the constant current channel group circuit of the display drive circuit 1; the green lamp tube in the single column of LED particles (ie, G
  • the common cathode interconnection of the primary color display unit is connected to the constant current logic element input terminal of the constant current channel group circuit of the display driving circuit 1;
  • the supply voltages of the first sub-switch circuit and the second sub-switch circuit may be different, and the VCCB supply voltage is preferably 1.6V, and the supply voltage may be lower than the supply voltage of the pin VCCA, and the voltage value of the 1.6V is The typical operating voltage (3.4-3.6V) of the green and blue LEDs is subtracted from the typical operating voltage (1.8-2V) of the red LED. This allows differential control of the supply voltage of the R/G/B primary LED. , thereby reducing the power consumption of the LED display.
  • the power supply control circuit of the display driving circuit 1 controls the corresponding P-MOS tubes corresponding to the same row in the first sub-switch circuit and the second sub-switch circuit to be in an on state respectively through the power supply control port, respectively, being LED display
  • the R primary color light emitting diode and the G/B primary color light emitting diode positive electrode of the LED particles in the corresponding row on the panel are powered by the first R display control sub port / the first G display control sub port / the first B display control
  • the sub port outputs the R display control signal /G display control signal /B display control signal to each of the constant current logic elements in the first constant current channel group circuit / the second constant current channel group circuit / the third constant current channel group circuit, To respectively control the respective constant current logic elements in the three constant current channel group circuits to be in an active state, thereby providing a current path for the R primary color cathode, the G primary color cathode, and the B primary color cathode of the corresponding column of LED
  • the LED display panel can also be implemented by the following embodiments:
  • the LED display panel can include M rows and N columns of LED particles, and each LED particle includes a red tube, a green tube, and a blue light tube, wherein cathodes of red light tubes in each of the LED particles in each row are connected in parallel, respectively connected to drains of a corresponding one of the first sub-switch circuits; each LED in each row The anode of the green tube in the particle is connected in parallel with the anode of the blue tube, and is respectively connected to the drain of a corresponding P-MOS tube in the second sub-switch circuit; the red tube of each LED particle in each column The cathodes are respectively connected in parallel and respectively connected to the second end of a corresponding constant current logic element in the constant current logic group circuit; the cathodes of the green light tubes of the respective LED particles in each column are respectively connected in parallel, respectively, and the constant current logic group circuit The second end of the corresponding one
  • the FET in the switch circuit can be an N-MOS tube, and the LED display panel has M rows and N columns of LED particles, and each LED particle includes a red tube, a green tube and a blue tube, wherein each The cathodes of the red tubes in each of the LED particles in the row are connected in parallel, respectively connected to the drain of a corresponding one of the first sub-switch circuits; the cathode of the green tube in each of the LED particles in each row Connected to the cathode of the blue tube in parallel, respectively connected to the drain of a corresponding one of the second sub-switch circuits; the anodes of the red tubes of the respective LED particles in each column are respectively connected in parallel, respectively The second end of the corresponding one of the constant current logic elements is connected in the flow logic group circuit; the anodes of the green light tubes of the respective LED particles in each column are respectively connected in parallel, and respectively correspond to a constant current logic element in the constant current logic group circuit The second end is connected; the anodes of the blue
  • the cathodes of the red lamps in the ith LED particles in each row of the LED display panel are connected in parallel to the i-th node, and the nodes in each row are connected in parallel.
  • the cathode of the green lamp in the j-th LED particle in each row and the cathode of the blue lamp are connected in parallel to the j-th node, each row
  • Each of the nodes is connected in parallel and connected to a drain of a corresponding one of the second sub-switch circuits
  • the anodes of the red tubes of the respective LED particles in each column are respectively connected in parallel, respectively, and the constant current logic group circuit
  • the second end of the corresponding one of the constant current logic elements is connected;
  • the anodes of the green tubes of the respective LED particles in each column are respectively connected in parallel, respectively, and the second end of a constant current logic element corresponding to the constant current logic group circuit Connecting;
  • the anodes of the blue tubes of the respective LED particles in each column are respectively connected in parallel, and respectively connected to the second end of a corresponding constant current logic element in the constant current logic group circuit.
  • the display driving circuit integrates the first sub-switching circuit and the second sub-switching circuit, and the two sub-switching circuits respectively comprise one or more N-MOS tubes, and the source of the N-MOS tube of the first sub-switching circuit
  • the interconnection can be used as an external pin GND of the display driving circuit, connected to a terminal of the power supply terminal of the power supply device, and the gate a red power supply control signal connected to the power supply control port, the drain connected to the anode of the red lamp tube of the corresponding row of LED particles of the LED display panel (ie, the R primary color anode of the corresponding row of LED particles); the second sub-switch circuit N -
  • the source interconnection of the MOS transistor can be used as an external pin GND of the display driver circuit, connected to a terminal of the power supply terminal of the power supply device, the gate is connected to the green and blue power supply control signals of the power supply control port, and the drain is connected to the drain The green light tube of the LED particles of
  • the LED driving circuit may be the same as the LED driving circuit shown in the above embodiment, and the second end (ie, the input end) of each constant current logic element in the LED driving circuit serves as one of the input pins of the display driving circuit, respectively.
  • the first end (ie, the output end) of all the constant current logic elements are internally interconnected, and the VCC end of the display driving circuit is connected to the power supply end of the power supply device, and the third end (ie, the control end) of the constant current logic element and the control circuit
  • the drive control port is connected to receive a constant current control signal of the LED drive circuit.
  • the LED driving circuit in the above embodiment may include a first constant current channel group circuit, a second constant current channel group circuit, and a third constant current channel group circuit, wherein the switching circuit may include a sub-switch circuit or a first sub-switch circuit And the second sub-switch circuit and the two sub-switch circuits, and the connection manner thereof can be the same as that in the above embodiment.
  • the first constant current channel group circuit may include one or more constant current logic elements, wherein the first end of each constant current logic element is respectively connected to a power supply end or a ground end of the power supply device, and each The third ends of the constant current logic elements are respectively connected to the first R display control subports of the drive control port, and the second end of each constant current logic element is respectively red with each of the LED particles in the corresponding column in the LED display panel An anode or cathode connection of the lamp for controlling display of the red lamp of the LED display panel; a second constant current channel group circuit including one or more constant current logic elements, wherein the first of each constant current logic element The terminals are respectively connected to the power terminal or the ground terminal of the power supply device, and the third end of each constant current logic component is respectively connected to the first G display control subport of the drive control port, and the second end of each constant current logic component is respectively The anode or cathode of the green tube in each LED particle in the corresponding column in the LED display panel is used to control the display
  • the first constant current logic group circuit may be an R primary color constant current channel group circuit
  • the second constant current logic group circuit may be a G primary color constant current channel group circuit
  • the third constant current logic group circuit may be a B primary color constant current channel Group circuit.
  • the driving control circuit is configured to control, by the first R display control sub-port, each of the constant current logic elements in the first constant current channel group circuit to be turned on, and after each of the constant current logic elements is turned on, respectively, the LED corresponding to the constant current logic element
  • the red tube in the LED particles in the display panel column provides a current path to control the display of the red tube of the LED particles in the LED display panel row corresponding to the FET; the drive control circuit is also used to display through the first G
  • the control sub-port controls each of the constant current logic elements in the second constant current channel group circuit to be turned on, and after each of the constant current logic elements is turned on, respectively, is green in the LED particles in the LED display panel column corresponding to the constant current logic element
  • the lamp tube provides
  • the LED particles respectively include a red light tube, a green light tube and a blue light tube, wherein the anodes of the red light tubes in each of the LED particles in each row are connected in parallel, respectively corresponding to a corresponding P-MOS in the first sub-switch circuit
  • cathodes of red LEDs of respective LED particles in each column are respectively connected in parallel, and respectively connected to a second end of a corresponding constant current logic element in the first constant current channel group circuit;
  • the cathodes of the green tubes of the respective LED particles in each column are respectively connected in parallel, and are respectively connected to the second end of a corresponding constant current logic element in the second constant current channel group circuit; the blue of each LED particle in each column
  • the LED driving circuit includes three constant current channel group circuits, as in the case where the LED driving circuit includes only one constant current channel group circuit, the connection relationship of the LED particles on the LED unit board is not affected, in the LED particles.
  • the present invention achieves the following technical effects: Through the application, the clock delay circuit is integrated in the LED driving circuit, and the timing control signal can be delayed to a signal synchronized with the data control signal, and never The data in the wrong data control signal is collected, and the input and output ports of the timing control signal are built into the LED driving circuit, which reduces the number of PCB wirings, and solves the problem that the number of control signals of the cascade driving application of the LED driving circuit in the prior art is smaller.
  • the invention is not limited to any specific combination of hardware and software.
  • the above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

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Abstract

本发明公开了一种LED驱动电路及控制系统。其中，该LED驱动电路包括：包括驱动控制电路和恒流通道组电路，其中，驱动控制电路包括：逻辑控制电路和时钟延迟电路，其中，逻辑控制电路，与恒流通道组电路连接，用于使用数据控制信号控制恒流通道组电路的有序导通或截止；时钟延迟电路，与逻辑控制电路连接，用于获取与数据控制信号同步的时序控制信号，并输出时序控制信号。通过本申请，在LED驱动电路中集成时钟延迟电路，可以实现了数据控制信号与时序控制信号同步，且减少PCB布线的数量，降低了时序控制信号对PCB布图板上信号的影响的效果，从而使得LED准确显示，且提高了LED单元板信号传输质量及抗干扰能力，降低LED单元板的布线难度。

Description

LED驱动电路及控制系统
技术领域 本发明涉及 LED控制领域， 具体而言， 涉及一种 LED驱动电路及控制系统。 背景技术 图 1是根据现有技术的 LED驱动电路的内部架构示意图。 如图 1所示， 当前 LED驱动电路由驱动控制电路和恒流通道组电路构成， 该驱动 控制电路是一个逻辑电路。 驱动控制电路包含串行数据端口 （其中， 串行数据端口包 括 SDI、 SCLK、 LE、 OE、 SDO) 以及恒流通道控制信号组。 串行数据端口负责将系 统的控制信号输入及输出 LED驱动电路，通过恒流通道控制信号组控制恒流通道组电 路的各个恒流通道有序开通与关闭。 其中， SDI 为数据输入信号， SCLK为移位脉冲 信号， LE为数据锁存信号， OE为恒流输入接口组的统一使能控制信号， SDO1012为 数据输出信号。 恒流通道包含电流输入端、 电流输出端以及信号控制端， 恒流通道组 电路的电流输入端连接至恒流输入接口组， 用来连接 LED的阴极， 恒流通道组电路的 电流输出端互联至 LED驱动电路的外部引脚 GND， 恒流通道组电路的信号控制端连 接至恒流通道控制信号组。 图 2是根据现有技术的 LED驱动电路级联应用的示意图。 如图 2所示， 当前 LED驱动电路级联应用包含显示控制逻辑电路和 N个首尾串 联的 LED驱动电路构成。 显示控制逻辑电路的控制信号端口连接至 LED 驱动电路的串行数据端口 SDI、 SCLK、 LE、 OE、 SDO, 通过传输的串行数据控制 LED单元板的显示。 控制信号端口包含： C_SDI串行数据输出信号， C_SCLK串行数据移位脉冲信号， C_LE串行数据锁存信号， C_OE串行数据使能信号。 其中 C_SDI连接至首个 LED驱 动电路的 SDI， C_SCLK、 C_LE、 C_OE通过总线的方式分别互联于 N个 LED驱动电 路的 SCLK、 LE、 OE。 两个 LED驱动电路通过 SDI和 SDO互联。 当前 LED驱动电路的 SCLK、 LE、 OE采用总线方式互联于显示控制逻辑电路， 控制信号数量较多， PCB布线难度高， 控制信号的抗干扰能力相对较低。 LED驱动电路级联多会导致信号传输问题，如图 5中 A部分所示出的显示控制逻 辑电路的输出信号， 其中 C_SDI为串行输出数据， C_SCLK为移位脉冲信号， 在该信 号的上升沿将串行数据采集进逻辑电路的移位寄存器内， C_LE为串行数据锁存信号， 该信号的上升沿将各个受控的 LED 驱动电路内部移位寄存器数据并行输出至恒流通 道的信号控制端。 图 5中的 B部分示出了级联应用在图 2中示出的末级 LED驱动电路的串行数据 端口信号图。 LED驱动电路在串接若干级后，末级串行数据输入端口接收到的信号 SDI 有一个时间延迟， 其中 SDI延迟 T_SDI， 这个延迟值是由 N个 LED驱动电路的逻辑 电路的延迟逐级累加所致， 由于 SCLK/LE/OE均未有延迟， 这样在 SCLK的上升沿也 出现了 SDI的数据变化， 此时 LED驱动电路的逻辑电路部分则根据 SCLK信号采集 SDI的数据并将数据采集到移位寄存器内， 但是此时的数据是错误的， 会导致 LED显 示内容的错误。 针对现有技术中 LED驱动电路级联应用控制信号数量较多且串行输出数据延迟， 而导致 PCB布线难度高， 控制信号的抗干扰能力相对较低且 LED显示错误的问题， 目前尚未提出有效的解决方案。 发明内容 针对相关技术 LED驱动电路级联应用控制信号数量较多且串行输出数据延迟，而 导致 PCB布线难度高， 控制信号的抗干扰能力相对较低且 LED显示错误的问题， 目 前尚未提出有效的解决方案， 为此， 本发明的主要目的在于提供一种 LED驱动电路及 控制系统， 以解决上述问题。 为了实现上述目的， 根据本发明的一个方面， 提供了一种 LED驱动电路， 该电路 包括： 包括驱动控制电路和恒流通道组电路， 其中， 驱动控制电路包括： 逻辑控制电 路和时钟延迟电路， 其中， 逻辑控制电路， 与恒流通道组电路连接， 用于使用数据控 制信号控制恒流通道组电路的有序导通或截止； 以及时钟延迟电路， 与逻辑控制电路 连接， 用于获取与数据控制信号同步的时序控制信号， 并输出时序控制信号。 进一步地， 时序控制信号包括： 移位脉冲信号， 驱动控制电路的输入端包括： 移 位脉冲输入端口， 驱动控制电路的输出端包括： 移位脉冲输出端口， 其中， 时钟延迟 电路包括移位延时输入端口、 时钟延迟子电路、 以及延时输出端口， 其中， 移位延时 输入端口与移位脉冲输入端口连接， 用于接收移位脉冲信号； 时钟延迟子电路连接于 移位延时输入端口与逻辑控制电路之间， 用于使用时钟延迟子电路所生成的延时数据 对移位脉冲信号进行延时处理， 以获取与数据控制信号同步的移位脉冲信号； 以及延 时输出端口连接于时钟延迟子电路与移位脉冲输出端口之间，用于输出移位脉冲信号。 进一步地， 时钟延迟电路包括： 读取装置， 其中， 读取装置的输入端与逻辑控制 电路连接， 用于读取逻辑控制电路的延时表中的延时数据； 以及读取装置的输出端与 时钟延迟子电路连接， 用于将延时数据发送给时钟延迟子电路。 进一步地， 时序控制信号包括： 数据锁存信号， 驱动控制电路的输入端包括： 数 据锁存输入端口， 其中， 逻辑控制电路包括锁存输入端口， 其中， 锁存输入端口与数 据锁存输入端口连接， 用于接收数据锁存信号。 进一步地， 时序控制信号包括： 使能控制信号， 驱动控制电路的输入端包括： 使 能控制输入端口， 其中， 逻辑控制电路包括使能输入端口， 其中， 使能输入端口与使 能控制输入端口连接， 用于接收使能控制信号。 进一步地， 驱动控制电路的输入端包括： 数据输入端口， 驱动控制电路的输出端 包括： 数据控制输出端口， 其中， 逻辑控制电路包括： 逻辑控制子电路、 第一控制输 入端口、 第一控制输出端口以及第二控制输出端口， 其中， 第一控制输入端口与数据 输入端口连接， 用于接收数据控制信号； 逻辑控制子电路连接于第一控制输入端口与 时钟延迟电路之间， 用于使用数据控制信号和时序控制信号生成逻辑控制信号； 第一 控制输出端口与逻辑控制子电路连接， 并通过恒流通道控制信号组与恒流通道组电路 连接， 用于输出逻辑控制信号至恒流逻辑电路； 以及第二控制输出端口连接于逻辑控 制子电路与数据控制输出端口之间， 用于输出数据控制信号。 进一步地， 恒流通道组电路包括一个或多个恒流逻辑元件， 其中， 每个恒流逻辑 元件的第一端分别与供电设备的电源端或接地端连接； 每个恒流逻辑元件的第二端分 别与 LED显示面板中对应列中的 LED颗粒的阳极或阴极连接； 以及每个恒流逻辑元 件的第三端分别与恒流通道控制信号组中对应的接线端子连接。 进一步地， 逻辑控制子电路包括： 子处理器， 连接于恒流逻辑电路与读取装置之 间， 用于读取与恒流通道组电路中恒流逻辑元件的个数相对应的延时数据。 为了实现上述目的，根据本发明的另一个方面，提供了一种 LED控制系统，包括: 显示驱动电路， 显示驱动电路包括多个 LED驱动电路， 显示驱动电路还包括显示控制 电路，其中，显示控制电路通过驱动控制端口分别与每个 LED驱动电路的控制端连接， 用于控制每个 LED驱动电路的导通或截止。 进一步地， 驱动控制端口包括： 数据输出端口、 移位脉冲输出端口、 数据锁存输 出端口、使能控制输出端口， 其中， 第一个 LED驱动电路的数据输入端口与数据输出 端口连接， 用于接收数据控制信号， 且第 i+1个 LED驱动电路的数据输入端口与第 i 个 LED驱动电路的数据控制输出端口连接， 用于接收数据控制信号， 其中， i为大于 等于 1的自然数;第一个 LED驱动电路的移位脉冲输入端口与移位脉冲输出端口连接， 于接收移位脉冲信号，且第 i+1个 LED驱动电路的移位脉冲输入端口与第 i个 LED驱 动电路的第二延时输出端口连接， 用于接收与数据控制信号同步的移位脉冲信号， 其 中， i为大于等于 1的自然数； 每个 LED驱动电路的数据锁存输入端口分别与数据锁 存输出端口连接， 用于接收数据锁存信号； 以及每个 LED驱动电路的使能控制输入端 口分别与使能控制输出端口连接， 用于接收使能控制信号。 进一步地， LED控制系统包括： 开关电路， 其中， 开关电路和 LED驱动电路中 恒流通道组电路之一的第一端连接至供电设备的电源端， 另一个的第一端连接至供电 设备的接地端； 开关电路和 LED驱动电路中恒流通道组电路之一的第二端与 LED显 示面板的阳极连接， 另一个的第二端与 LED显示面板的阴极连接； 以及控制电路， 包 括： 供电控制电路， 其中， 供电控制电路， 通过供电控制端口与开关电路的第三端连 接， 用于控制开关电路的打开或闭合； 其中， 开关电路用于控制对 LED显示面板的供 电， LED驱动电路用于控制 LED显示面板的有序显示。 进一步地， 开关电路包括一个子开关电路， 子开关电路包括一个或多个场效应管， 其中， 每个场效应管的源极分别与供电设备的电源端或接地端连接； 每个场效应管的 漏极分别与 LED显示面板中对应行中的各个 LED颗粒的阳极或阴极连接； 以及每个 场效应管的栅极分别与供电控制端口中的对应的接线端子连接。 进一步地， 开关电路包括第一子开关电路和第二子开关电路， 其中， 第一子开关 电路和第二子开关电路各包括一个或多个场效应管， 且第一子开关电路和第二子开关 电路中的每个场效应管的源极都分别与供电设备的电源端或接地端连接， 其中， 第一 子开关电路中的每个场效应管的漏极分别与 LED显示面板中对应行中各个 LED颗粒 中的红色灯管的阳极或阴极连接， 每个场效应管的栅极分别与供电控制端口中对应的 接线端子连接， 用于控制 LED显示面板的红色灯管的供电； 以及第二子开关电路中的 每个场效应管的漏极分别与 LED显示面板中对应行中各个 LED颗粒中的绿色灯管和 蓝色灯管的阳极或阴极连接， 每个场效应管的栅极分别与供电控制端口中对应的接线 端子连接， 用于控制 LED显示面板的绿色灯管和蓝色灯管的供电。 通过本申请， 在 LED驱动电路中集成时钟延迟电路， 可以将时序控制信号延时为 与数据控制信号同步的信号， 从而不会采集错误的数据控制信号中的数据， 并且将时 序控制信号的输入输出端口内置到 LED驱动电路中， 减少了 PCB布线的数量， 解决 了现有技术中 LED驱动电路级联应用控制信号数量较多且串行输出数据延迟，而导致 PCB布线难度高，控制信号的抗干扰能力相对较低且 LED显示错误的问题，实现了数 据控制信号与时序控制信号同步， 且减少 PCB 布线的数量， 降低了时序控制信号对 PCB布图板上信号的影响的效果， 从而使得 LED准确显示， 且提高了 LED单元板信 号传输质量及抗干扰能力， 降低 LED单元板的布线难度。 附图说明 此处所说明的附图用来提供对本发明的进一步理解， 构成本申请的一部分， 本发 明的示意性实施例及其说明用于解释本发明， 并不构成对本发明的不当限定。 在附图 中： 图 1是根据现有技术的 LED驱动电路的内部架构示意图； 图 2是根据现有技术的 LED驱动电路级联应用的示意图； 图 3是根据本发明实施例的 LED驱动电路的结构示意图； 图 4是根据本发明实施例的 LED驱动电路的详细结构示意图； 图 5是根据本发明实施例的 LED控制系统的结构示意图； 图 6是根据本发明实施例的 LED控制系统的详细结构示意图； 图 7是根据本发明实施例的数据输入端口信号的时钟示意图； 图 8是根据本发明的优选实施例的 LED显示器的结构示意图； 图 8a是根据本发明优选实施例的 LED显示器的详细结构示意图； 图 8b是图 8a中虚线部分 D处的局部放大图； 图 8c是图 8b中虚线部分 D1处的局部放大图； 图 9a是根据本申请的实施例五的 LED显示器的结构示意图； 图 9b是图 9a中虚线部分 I处的局部放大图； 以及 图 9c是图 9b中虚线部分 II处的局部放大图。 具体实施方式 需要说明的是， 在不冲突的情况下， 本申请中的实施例及实施例中的特征可以相 互组合。 下面将参考附图并结合实施例来详细说明本发明。 图 3是根据本发明实施例的 LED驱动电路的结构示意图。图 4是根据本发明实施 例的 LED驱动电路的详细结构示意图。 如图 3和图 4所示，该 LED驱动电路包括驱动控制电路 30和恒流通道组电路 10， 其中， 驱动控制电路 30包括： 逻辑控制电路 31和时钟延迟电路 33， 其中， 逻辑控制 电路 31， 与恒流通道组电路 10连接， 用于使用数据控制信号控制恒流通道组电路 10 的有序导通或截止； 时钟延迟电路 33， 与逻辑控制电路 31连接， 用于获取与所述数 据控制信号同步的时序控制信号， 并输出所述时序控制信号。 其中， 时钟延迟电路对 获取到的当前时序控制信号进行延时处理， 以获取延时后的时序控制信号， 该延时后 的时序控制信号与数据控制信号同步。 采用本申请的 LED驱动电路，通过在驱动控制电路中设置逻辑控制电路和时钟延 迟电路， 逻辑控制电路， 与恒流通道组电路连接， 用于使用数据控制信号控制恒流通 道组电路的有序导通或截止； 时钟延迟电路， 与逻辑控制电路连接， 用于获取并输出 与数据控制信号同步的时序控制信号。 通过本申请的 LED驱动电路， 在 LED驱动电 路中集成时钟延迟电路， 可以将时序控制信号延时为与数据控制信号同步的信号， 从 而不会采集错误的数据控制信号中的数据， 并且将时序控制信号的输入输出端口内置 到 LED驱动电路中， 减少了 PCB布线的数量， 解决了现有技术中 LED驱动电路级联 应用控制信号数量较多且串行输出数据延迟， 而导致 PCB布线难度高， 控制信号的抗 干扰能力相对较低且 LED 显示错误的问题， 实现了数据控制信号与时序控制信号同 步， 且减少 PCB布线的数量， 降低了时序控制信号对 PCB布图板上信号的影响的效 果， 从而使得 LED准确显示， 且提高了 LED单元板信号传输质量及抗干扰能力， 降 低 LED单元板的布线难度。 在本申请的上述实施例中， 时序控制信号可以包括： 移位脉冲信号， 驱动控制电 路的输入端包括： 移位脉冲输入端口， 驱动控制电路的输出端包括： 移位脉冲输出端 口， 其中， 时钟延迟电路包括移位延时输入端口、 时钟延迟子电路、 以及延时输出端 口， 其中， 移位延时输入端口与移位脉冲输入端口连接， 用于接收移位脉冲信号； 时 钟延迟子电路连接于移位延时输入端口与逻辑控制电路之间， 用于使用时钟延迟子电 路所生成的延时数据对移位脉冲信号进行延时处理， 以获取与数据控制信号同步的移 位脉冲信号； 延时输出端口连接于时钟延迟子电路与移位脉冲输出端口之间， 用于输 出与数据控制信号同步的移位脉冲信号。 其中， 延时数据可以是直接烧录在时钟延迟子电路中， 也可以是通过时钟延迟子 电路中的读取装置从逻辑控制电路中读取。 具体地， 读取装置的输入端与逻辑控制电路连接， 用于读取逻辑控制电路中的延 时表中的延时数据， 其中， 延时表中记录的延时数据可以根据逻辑控制电路所连接的 恒流通道组电路 10中所包含的恒流逻辑元件的个数来确定和更新；读取装置的输出端 与时钟延迟子电路连接， 用于将延时数据发送给时钟延迟子电路。 在本申请的上述实施例中， 时序控制信号可以包括： 数据锁存信号， 驱动控制电 路的输入端包括： 数据锁存输入端口， 其中， 逻辑控制电路包括锁存输入端口， 其中， 锁存输入端口与数据锁存输入端口连接， 用于接收数据锁存信号。 其中， 数据锁存输 入端口在图 4中为 LE端口。 在本申请的上述实施例中， 时序控制信号包括： 使能控制信号， 驱动控制电路的 输入端包括： 使能控制输入端口， 其中， 逻辑控制电路包括使能输入端口， 其中， 使 能输入端口， 与使能控制输入端口连接， 用于接收使能控制信号。 其中， 使能控制输 入端口在图 4中为 OE端口。 根据本申请的上述实施例， 驱动控制电路的输入端包括： 数据输入端口， 驱动控 制电路的输出端包括： 数据控制输出端口， 其中， 逻辑控制电路包括： 逻辑控制子电 路、 第一控制输入端口、 第一控制输出端口以及第二控制输出端口， 其中， 第一控制 输入端口与数据输入端口连接， 用于接收数据控制信号； 逻辑控制子电路连接于第一 控制输入端口与第一延时输出端口之间， 用于使用数据控制信号和时序控制信号生成 逻辑控制信号； 第一控制输出端口与逻辑控制子电路连接， 并通过恒流通道控制信号 组与恒流通道组电路连接， 用于输出逻辑控制信号至恒流逻辑电路； 第二控制输出端 口连接于逻辑控制子电路与数据控制输出端口之间， 用于输出数据控制信号。 具体地， 如图 4所示， 本申请的上述实施例中的 LED驱动电路包括驱动控制电路
(即图 4中所示的逻辑电路） 和恒流通道组电路。 逻辑电路包括串行数据输入端 （即 驱动控制电路的输入端， 包括 SDI、 SCLK、 LE、 OE端口）， 串行数据输出端口 （即 驱动控制电路的输出端， 包括 SDO、 SCLKO端口）， 时钟延迟电路、 逻辑控制电路， 以及恒流通道控制信号组。其中，串行数据输入端口用于将系统的控制信号输入至 LED 驱动电路， 串行数据输出端口用于将控制信号处理后再输出给下一级 LED驱动电路。 逻辑控制电路通过恒流通道控制信号组控制恒流通道组电路中的各个恒流逻辑元件 (即恒流通道） 的有序开通或关闭。 其中， SDI 为数据输入信号端口 （即数据输入端 口）； SCLK为移位脉冲信号的输入端口 （即移位脉冲输入端口）； LE为数据锁存信号 (即数据锁存输入端口）； OE为恒流输入接口组的统一使能控制信号 （即使能控制输 入端口）； SDO为数据输出信号 （即数据控制输出端口）； SCLKO为移位脉冲输出信 号 （即上述实施例中的第一延时输出端口）。 另外， 逻辑控制子电路可以包括： 子处理器， 连接于恒流逻辑电路与读取装置之 间， 用于读取与恒流通道组电路中恒流逻辑元件的个数所对应的延时数据 （即与恒流 通道组电路中恒流通道的个数相对应的延时时间）。 具体地，逻辑控制电路中的子处理器获取恒流逻辑电路中的恒流逻辑元件的个数， 根据恒流逻辑元件的个数及单个恒流逻辑元件的预设延时时间计算获取恒流逻辑电路 的延时数据， 时钟延迟电路中的读取装置读取与恒流逻辑电路对应的延时数据， 并将 该延时数据发送给时钟延迟子电路， 然后时钟延迟子电路使用该延时数据分别对移位 脉冲信号、 数据锁存信号以及使能控制信号进行延时处理， 以获取与数据控制信号同 步的移位脉冲信号， 并在将获取到的数据锁存信号以及使能控制信号发送至逻辑控制 电路之后， 逻辑控制电路使用数据锁存信号、 使能控制信号以及数据控制信号生成逻 辑控制信号， 并使用逻辑控制信号控制恒流逻辑组电路的有序导通或截止。 在本申请的上述实施例中，恒流通道组电路包括一个或多个恒流逻辑元件，其中， 每个恒流逻辑元件的第一端分别与供电设备的电源端或接地端连接； 每个恒流逻辑元 件的第二端分别与 LED显示面板（也即 LED单元板）中对应列中的 LED颗粒的阳极 或阴极连接； 每个恒流逻辑元件的第三端分别与恒流通道控制信号组中对应的接线端 子连接。 具体地， 如图 4所示， 恒流通道包含电流输入端、 电流输出端以及信号控制端， 恒流通道组电路的电流输入端连接至恒流逻辑通道的输入端，用来连接 LED显示面板 的阴极， 恒流通道组电路的电流输出端互联至 LED驱动电路的外部引脚 GND， 恒流 通道组电路的信号控制端连接至恒流通道控制信号组。 图 5是根据本发明实施例的 LED控制系统的结构示意图。图 6是根据本发明实施 例的 LED控制系统的详细结构示意图。 图 8是根据本发明的优选实施例的 LED显示 器的结构示意图。 如图 5、 图 6以及图 8所示， 该 LED控制系统包括： 显示驱动电路 1， 显示驱动 电路包括多个 LED驱动电路 3， 显示驱动电路 1还包括显示控制电路 50， 其中， 显示 控制电路 50通过驱动控制端口分别与每个 LED驱动电路 3的控制端连接， 用于控制 每个 LED驱动电路 3的导通或截止。 采用本申请的 LED控制系统，通过在显示驱动电路中的驱动控制电路中设置逻辑 控制电路和时钟延迟电路， 逻辑控制电路， 与恒流通道组电路连接， 用于使用数据控 制信号控制恒流通道组电路的有序导通或截止； 时钟延迟电路， 与逻辑控制电路连接， 用于对时序控制信号进行延时处理， 以获取与数据控制信号同步的时序控制信号， 并 输出与数据控制信号同步的时序控制信号。 通过本申请的 LED控制系统， 在 LED驱 动电路中集成时钟延迟电路，可以将时序控制信号延时为与数据控制信号同步的信号， 从而不会采集错误的数据控制信号中的数据， 并且将时序控制信号的输入输出端口内 置到 LED驱动电路中， 减少了 PCB布线的数量， 解决了现有技术中 LED驱动电路级 联应用控制信号数量较多且串行输出数据延迟， 而导致 PCB布线难度高， 控制信号的 抗干扰能力相对较低且 LED显示错误的问题，实现了数据控制信号与时序控制信号同 步， 且减少 PCB布线的数量， 降低了时序控制信号对 PCB布图板上信号的影响的效 果， 从而使得 LED准确显示， 且提高了 LED单元板信号传输质量及抗干扰能力， 降 低的布线难度， 进而增加 LED控制系统的级联数量。 如图 6所示的实施例， 驱动控制端口可以包括： 数据输出端口、 移位脉冲输出端 口、 数据锁存输出端口、 使能控制输出端口， 其中， 第一个 LED驱动电路的数据输入 端口与数据输出端口连接， 用于接收数据控制信号， 且第 i+1个 LED驱动电路的数据 输入端口与第 i个 LED驱动电路的数据控制输出端口连接， 用于接收数据控制信号， 其中， i为大于等于 1的自然数； 第一个 LED驱动电路的移位脉冲输入端口与移位脉 冲输出端口连接， 用于接收移位脉冲信号， 且第 i+1个 LED驱动电路的移位脉冲输入 端口与第 i个 LED驱动电路的第二延时输出端口连接， 用于接收与数据控制信号同步 的移位脉冲信号， 其中， i为大于等于 1的自然数； 每个 LED驱动电路的数据锁存输 入端口分别与数据锁存输出端口连接， 用于接收数据锁存信号； 每个 LED驱动电路的 使能控制输入端口分别与使能控制输出端口连接， 用于接收使能控制信号。 如图 6所示， LED控制系统的包括显示驱动电路和 N个首尾串联的 LED驱动电 路。 具体地， 如图 6所示， 显示驱动电路的输出为驱动控制端口 （即控制信号端口）， 其中，控制信号端口包含 C_SDI (数据输出端口， 即串行数据输出信号）， C_SCLK (移 位脉冲输出端口， 即串行数据移位脉冲信号）， C_LE (数据锁存输出端口， 即串行数 据锁存信号）， C OE (使能控制输出端口， 即串行数据使能信号）。 具体地， C_SDI连接至首个 LED驱动电路的 SDI， C_SCLK连接至首个新型 LED 驱动电路的 SCLK， C_LE、 C_OE通过总线的方式分别互联于 N个 LED驱动电路的 LE、 OE。 两个 LED驱动电路通过串行数据输入端口 SDI、 SCLK和对应的串行数据 输出端口 SDO、 SCLKO互联。 图 7是根据本发明实施例的数据输入端口信号的示意图。 如图 7所示， 图中 C部 分为 LED控制系统级联应用 LED驱动电路的首级和末级 LED驱动电路的串行数据输 入端口信号图。 对比 A部分所示， LED驱动电路在串接若干级 LED驱动电路后， 末 级 LED驱动电路的串行数据输入端口接收到的信号 SDI/SCLK/LE/OE都有一个时间延 迟，其中 SDI延迟 T_SDI由 N个 LED驱动电路的逻辑控制电路逐级累加所致， SCLK 延迟 T_SCLK由 LED驱动电路的时钟延迟电路控制， 其中， SCLK的延迟 T_SCLK 由 N个 LED驱动电路的时钟延迟电路累加控制， LE延迟 T_LE、 OE延迟 T_OE同时 通过显示驱动电路进行延时控制。通过保证时序控制信号同步接入 LED驱动电路中的 逻辑控制电路内， 实现更多 LED驱动电路的级联。 由于 SCLK、 SCLKO这两个端口内置于 LED驱动电路，减少了 PCB布线的数量， 降低了 SCLK、 SCLKO这两个端口输出信号对 PCB板上的其他信号的影响， 进而达 到了提高 LED单元板信号传输质量及抗干扰能力， 降低 LED单元板的布线难度。 图 8所示的实施例中， LED控制系统还可以包括： 开关电路， 其中， 开关电路和 LED驱动电路 3中恒流通道组电路 10之一的第一端连接至供电设备的电源端， 另一 个的第一端连接至供电设备的接地端；开关电路和 LED驱动电路 3中恒流通道组电路 10之一的第二端与 LED显示面板的阳极连接， 另一个的第二端与 LED显示面板的阴 极连接； 显示控制电路 50， 包括： 供电控制电路， 其中， 供电控制电路， 通过供电控 制端口与开关电路的第三端连接， 用于控制开关电路的打开或闭合； 其中， 开关电路 用于控制对 LED显示面板的供电， LED驱动电路用于控制 LED显示面板的有序显示。 具体地， LED控制系统包括显示驱动电路， 其中， 显示驱动电路包括开关电路、 LED驱动电路以及控制电路，控制电路可以包括显示控制电路 50和驱动控制电路 30， 显示控制电路中的供电控制电路用于控制开关电路的打开或闭合， 驱动控制电路用于 控制 LED驱动电路的导通或截止， 然后通过开关电路的打开或闭合控制 LED显示面 板（即 LED单元板） 的供电， 和通过 LED驱动电路的导通或截止控制 LED显示面板 的显示， 从而实现 LED显示面板的有序显示。 通过该 LED控制系统， 将开关电路、 LED驱动电路 3和控制电路集成到显示驱动电路 1中， 使得在原 LED显示面板面积 不变的情况下，可以放置更多的显示驱动电路，从而在面积一定的 LED显示器上， LED 颗粒与显示驱动电路的数量比减小， 实现了刷新率的提高， 并且 LED显示面板中 M 行 *N列 LED颗粒阵列与显示驱动电路的接接关系更清晰，连接线路更少，降低了 PCB 的设计难度。 图 8a至 8c是根据本发明优选实施例的 LED显示器的详细结构示意图； 其中， 图 8b是图 8a中虚线部分 D处的局部放大图；图 8c是图 8b中虚线部分 D1处的局部放大 图； 图 9a至 9c是根据本申请的实施例五的 LED显示器的结构示意图； 其中， 图 9b 是图 9a中虚线部分 I处的局部放大图；以及图 9c是图 9b中虚线部分 II处的局部放大 图。 图 8a至图 8c所示的实施例中的控制电路可以包括显示控制电路和驱动控制电路， 显示驱动电路与驱动控制电路连接；该实施例中的开关电路可以包括一个子开关电路， 子开关电路包括一个或多个场效应管， 其中， 每个场效应管的源极分别与供电设备的 电源端或接地端连接； 每个场效应管的漏极分别与 LED 显示面板中对应行中的各个 LED颗粒的阳极或阴极连接； 每个场效应管的栅极分别与供电控制端口中的对应的接 线端子连接。 具体地， 上述子开关电路可以包含 N个 P-MOS管， 其中， 每个 P-MOS管的漏极 分别作为控制电路的输出引脚中的一个引脚， P-MOS管的源极连接于显示驱动电路的 供电端（即 VCC端）， P-MOS管的栅极与控制电路的供电控制端口中的一个接线端子 连接； 恒流通道组电路可以包含 N个恒流逻辑元件 （也可以称为恒流逻辑电路）， 每 个恒流逻辑元件的第二端 （在该实施例中为恒流逻辑元件的输入端） 分别作为显示驱 动电路的输入引脚中的一个， 所有恒流逻辑元件的第一端 （即输出端） 内部互联， 作 为显示驱动电路的接地端 （即 GND端） 与供电设备的接地端连接， 恒流逻辑元件的 第三端 （在该实施例中为恒流逻辑元件的控制端） 与控制电路的驱动控制端口连接， 用于接收驱动电路 （即 LED驱动电路） 的恒流控制信号。 在该实施例中， LED显示面板（也可以称为 LED单元）可以包括 M行 *N列 LED 颗粒的矩阵排列， 其中， 单行 LED颗粒的阳极互联连接至第 i节点， 将各个节点连接 至开关电路中子开关电路中的一个 P-MOS管的漏极对应的输出引脚， 单列 LED颗粒 中的相同基色的阴极互联至显示驱动电路的恒流通道组电路的恒流逻辑元件的输入 端， 即单列 LED颗粒中红色灯管 （也即 R发光二极管） 的共同阴极互联连接至显示 驱动电路的恒流通道组电路的恒流逻辑元件输入端； 单列 LED颗粒中绿色灯管（也即 G基色发光二极管） 的共同阴极互联连接至显示驱动电路的恒流通道组电路的恒流逻 辑元件输入端； 单列 LED颗粒中蓝色灯管 （也即 B基色发光二极管） 的共同阴极互 联连接至显示驱动电路的恒流通道组电路的恒流逻辑元件输入端。 其中， l≤i≤N， i为 自然数， 红色灯管、 绿色灯管以及蓝色灯管可以分别为 R/G/B基色发光二极管。 LED显示面板中的 LED颗粒还可以具有如下连接方式： LED显示面板中单行 LED 颗粒的 R/G/B 基色发光二极管的阳极互联连接至显示驱动电路中开关电路中的一个 P-MOS管的漏极对应的输出引脚， 单列 LED颗粒中的相同基色的阴极互联至显示驱 动电路的恒流通道组电路的恒流逻辑元件的输入端， 即单列 LED颗粒中 R基色发光 二极管的共同阴极互联连接至显示驱动电路的恒流通道组电路的恒流逻辑元件输入 端； 单列 LED颗粒中 G基色发光二极管的共同阴极互联连接至显示驱动电路的恒流 通道组电路的恒流逻辑元件输入端； 单列 LED颗粒中蓝色灯管 B基色发光二极管的 共同阴极互联连接至显示驱动电路的恒流通道组电路的恒流逻辑元件输入端。 上述 LED显示面板在显示驱动电路的控制下，供电控制电路通过供电控制端口控 制子开关电路（可以为 P-MOS通道组） 中的某一个 P-MOS管处于开启状态， 为 LED 显示面板上的对应行中的 LED颗粒的正极供电，驱动控制电路通过驱动控制端口将恒 流控制信号输出到恒流通道组电路中的各个恒流逻辑元件， 以控制各个恒流逻辑元件 处于导通的工作状态， 从而为对应列的 LED 颗粒的基色阴极提供电流通路， 并实现 LED单元的有序显示。 其中， 对应列的 LED颗粒的基色阴极包括 R、 G、 B三基色的 阴极，也即分别为对应列中 LED颗粒的红色灯管、绿色灯管以及蓝色灯管的有序显示。 具体地， 子开关电路可以包含 N个 N-MOS管， 其中， 每个 N-MOS管的漏极分 别作为控制电路的输出引脚中的一个引脚， N-MOS管的源极作为显示驱动电路的接地 端 （即 GND端） 与供电设备的接地端连接， N-MOS管的栅极与控制电路的供电控制 端口中的一个接线端子连接； 恒流通道组电路包含 N个恒流逻辑元件（也可以称为恒 流逻辑电路）， 每个恒流逻辑元件的第二端（即输入端）分别作为显示驱动电路的输入 引脚中的一个， 所有恒流逻辑元件的第一端 （即输出端） 内部互联， 作为显示驱动电 路的供电端（即 VCC端）与供电设备的电源端连接， 恒流逻辑元件的第三端（即控制 端） 与控制电路的显示控制端口连接， 用于接收 LED驱动电路的恒流控制信号。 与上述实施例子开关电路包含 N-MOS管的 LED显示面板中的 LED颗粒的连接 关系也有两种。 具体地， 在第一种连接方式中， LED显示面板 （可以称为 LED单元， 也可以称 为 LED单元板）包括 M行 *N列 LED颗粒的矩阵排列， 其中， 单行 LED颗粒的阴极 互联连接至第 i节点， 将各个节点连接至显示驱动电路中开关电路中的一个 N-MOS 管的漏极对应的输出引脚，单列 LED颗粒中的相同基色的阳极互联至显示驱动电路的 恒流通道组电路的恒流逻辑元件的输入端， 即单列 LED颗粒中 R基色发光二极管的 共同阳极互联连接至显示驱动电路的恒流通道组电路的恒流逻辑元件输入端； 单列 LED颗粒中 G基色发光二极管）的共同阳极互联连接至显示驱动电路的恒流通道组电 路的恒流逻辑元件输入端； 单列 LED颗粒中 B基色发光二极管的共同阳极互联连接 至显示驱动电路的恒流通道组电路的恒流逻辑元件输入端。其中， i为大于等于 1的自 然数。 在第二种连接方式中， LED显示面板中的每个 LED颗粒分别包括红色灯管、 绿 色灯管以及蓝色灯管， 其中， 每行中的各个 LED颗粒中的红色灯管的阴极、 绿色灯管 的阴极以及蓝色灯管的阴极并联连接， 与开关电路中对应的一个 N-MOS管的漏极连 接； 每列中的各个 LED颗粒的红色灯管的阳极分别并联连接， 分别与恒流通道组电路 中对应的一个恒流逻辑元件的第二端连接；每列中的各个 LED颗粒的绿色灯管的阳极 分别并联连接， 分别与恒流通道组电路中对应的一个恒流逻辑元件的第二端连接； 每 列中的各个 LED颗粒的蓝色灯管的阳极分别并联连接，分别与恒流通道组电路中对应 的一个恒流逻辑元件的第二端连接。 具体地， 该实施方式中的 LED显示面板中单行 LED颗粒的阴极还可以互联连接 至显示驱动电路中开关电路中的一个 N-MOS管的漏极对应的输出引脚， 单列 LED颗 粒中的相同基色的阳极互联至显示驱动电路的恒流通道组电路的恒流逻辑元件的输入 端， 即单列 LED颗粒中红色灯管 R基色发光二极管的共同阳极互联连接至显示驱动 电路的恒流通道组电路的恒流逻辑元件输入端； 单列 LED颗粒中 G基色发光二极管 的共同阳极互联连接至显示驱动电路的恒流通道组电路的恒流逻辑元件输入端； 单列 LED颗粒中 B基色发光二极管的共同阳极互联连接至显示驱动电路的恒流通道组电路 的恒流逻辑元件输入端。 图 9a至 9c所示的实施例中的控制电路可以包含显示控制电路和驱动控制电路， 显示驱动电路与驱动控制电路连接； 该实施例中的开关电路还可以包括第一子开关电 路和第二子开关电路， 其中， 第一子开关电路和第二子开关电路各包括一个或多个场 效应管， 且第一子开关电路和第二子开关电路中的每个场效应管的源极都分别与供电 设备的电源端或接地端连接， 其中， 第一子开关电路中的每个场效应管的漏极分别与 LED显示面板中对应行中各个 LED颗粒中的红色灯管的阳极或阴极连接， 每个场效 应管的栅极分别与供电控制端口中对应的接线端子连接，用于控制 LED显示面板的红 色灯管的供电；第二子开关电路中的每个场效应管的漏极分别与 LED显示面板中对应 行中各个 LED颗粒中的绿色灯管和蓝色灯管的阳极或阴极连接，每个场效应管的栅极 分别与供电控制端口中对应的接线端子连接，用于控制 LED显示面板的绿色灯管和蓝 色灯管的供电。 在该实施方式中， 显示驱动电路集成了第一子开关电路和第二子开关电路， 两个 子开关电路分别包括一个或多个 P-MOS管， 第一子开关电路的 P-MOS管的源极互联 可以作为显示驱动电路的外置引脚 VCCB，连接至供电设备的电源端的一个接线端子， 栅极连接到供电控制端口的红色供电控制信号，漏极连接于 LED显示面板的对应行的 LED颗粒的红色灯管的阳极（即对应行的 LED颗粒的 R基色阳极）； 第二子开关电路 的 P-MOS管的源极互联可以作为显示驱动电路的外置引脚 VCCA，连接至供电设备的 电源端的一个接线端子， 栅极连接到供电控制端口的绿色和蓝色供电控制信号， 漏极 连接于 LED显示面板的对应行的 LED颗粒的绿色灯管和蓝色灯管的阳极 （即对应行 的 LED颗粒的 G基色阳极和 B基色阳极）。 在该实施例中供电控制电路用于控制第一子开关电路中的一个场效应管打开， 以 对与第一子开关电路中的场效应管对应的 LED显示面板的行中的 LED颗粒中的红色 灯管供电； 供电控制电路还用于控制第二子开关电路中与第一子开关电路中的一个场 效应管相对应的场效应管打开，以对与第一子开关电路中的场效应管对应的 LED显示 面板行中的 LED颗粒中的绿色灯管和蓝色灯管供电；驱动控制电路用于控制恒流通道 组电路中的各个恒流逻辑元件导通， 各个恒流逻辑元件导通之后， 分别为与恒流逻辑 元件对应的 LED显示面板的列中的 LED颗粒提供电流通路， 以控制与场效应管对应 的 LED显示面板的行中的 LED颗粒的有序显示。 通过将开关电路、 LED 驱动电路和控制电路集成到显示驱动电路中， 使得在原 LED显示面板面积不变的情况下， 可以放置更多的显示驱动电路， 从而在面积一定的 LED显示器上， LED颗粒与显示驱动电路的数量比减小且提高了刷新率。 该实施例中开关电路中的场效应管可以为 P-MOS管， 且 LED显示面板可以包括 M行 N列个 LED颗粒， 每个 LED颗粒分别包括红色灯管、 绿色灯管以及蓝色灯管， 其中， 每行中第 i个 LED颗粒中的红色灯管的阳极并联连接于第 i节点， 每行中的各 个节点并联连接，分别与第一子开关电路中对应的一个 P-MOS管的漏极连接；每行中 第 j个 LED颗粒中绿色灯管的阳极和蓝色灯管的阳极并联连接于第 j节点， 每行中的 各个节点并联连接，与第二子开关电路中对应的一个 P-MOS管的漏极连接；每列中的 各个 LED颗粒的红色灯管的阴极分别并联连接，分别与恒流逻辑组电路中对应的一个 恒流逻辑元件的第二端连接； 每列中的各个 LED 颗粒的绿色灯管的阴极分别并联连 接， 分别与恒流逻辑组电路中对应的一个恒流逻辑元件的第二端连接； 每列中的各个 LED颗粒的蓝色灯管的阴极分别并联连接， 分别与恒流逻辑组电路中对应的一个恒流 逻辑元件的第二端连接。 其中， l≤i≤N， l≤j≤N， i和 j均为自然数， 红色灯管、 绿色灯 管以及蓝色灯管可以分别是 R/G/B基色发光二极管。 在该实施方式中， 显示驱动电路集成了第一子开关电路和第二子开关电路， 两个 子开关电路分别包括一个或多个 P-MOS管， 第一子开关电路的 P-MOS管的源极互联 可以作为显示驱动电路的外置引脚 VCCB，连接至供电设备的电源端的一个接线端子， 栅极连接到供电控制端口的红色供电控制信号，漏极连接于 LED显示面板的对应行的 LED颗粒的红色灯管的阳极（即对应行的 LED颗粒的 R基色阳极）； 第二子开关电路 的 P-MOS管的源极互联可以作为显示驱动电路的外置引脚 VCCA，连接至供电设备的 电源端的一个接线端子， 栅极连接到供电控制端口的绿色和蓝色供电控制信号， 漏极 连接于 LED显示面板的对应行的 LED颗粒的绿色灯管和蓝色灯管的阳极 （即对应行 的 LED颗粒的 G基色阳极和 B基色阳极）。 在该实施方式中， LED显示面板中的每行中第 i个 LED颗粒中的红色灯管的阳极 并联连接于第 i节点， 每行中的各个节点并联连接分别与第一子开关电路中对应的一 个 P-MOS管的漏极连接； 每行中第 j个 LED颗粒中绿色灯管的阳极和蓝色灯管的阳 极并联连接于第 j节点， 每行中的各个节点并联连接， 分别与第二子开关电路中对应 的一个 P-MOS管的漏极连接； 单列 LED颗粒中的相同基色的阴极互联至显示驱动电 路 1的恒流通道组电路的恒流逻辑元件的输入端， 即单列 LED颗粒中红色灯管（也即 R基色显示单元） 的共同阴极互联连接至显示驱动电路 1的恒流通道组电路的恒流逻 辑元件的输入端； 单列 LED颗粒中绿色灯管 （也即 G基色显示单元） 的共同阴极互 联连接至显示驱动电路 1的恒流通道组电路的恒流逻辑元件输入端；单列 LED颗粒中 蓝色灯管 （也即 B基色显示单元） 的共同阴极互联连接至显示驱动电路 1的恒流通道 组电路的恒流逻辑元件输入端。 在上述实施方式中， 第一子开关电路和第二子开关电路的供电电压可以不同， VCCB供电电压优选为 1.6V， 该供电电压可以低于引脚 VCCA的供电电压， 此 1.6V 的电压值由绿、蓝发光二极管的典型工作电压（3.4-3.6V)减去红色发光二极管的典型 工作电压 （1.8-2V) 所得， 这样可以对 R/G/B基色发光二极管的供电电压进行差异化 控制， 从而降低 LED显示器的功耗。 在该实施方式中， 显示驱动电路 1的供电控制电路通过供电控制端口分别控制第 —子开关电路和第二子开关电路中对应相同行的对应的 P-MOS管处于开启状态，分别 为 LED显示面板上的对应行中的 LED颗粒的 R基色发光二极管和 G/B基色发光二极 管正极供电， 驱动控制电路分别通过第一 R显示控制子端口 /第一 G显示控制子端口 / 第一 B显示控制子端口将 R显示控制信号 /G显示控制信号 /B显示控制信号输出到第 一恒流通道组电路 /第二恒流通道组电路 /第三恒流通道组电路中的各个恒流逻辑元件， 以分别控制三个恒流通道组电路中的各个恒流逻辑元件处于导通的工作状态， 从而为 对应列的 LED颗粒的 R基色阴极、 G基色阴极以及 B基色阴极提供电流通路， 并实 现 LED的有序显示。 在场效应管为 P-MOS管的情况下， LED显示面板还可以采用如下实施方式实现： LED显示面板可以包括 M行 N列个 LED颗粒， 每个 LED颗粒分别包括红色灯管、 绿色灯管以及蓝色灯管，其中，每行中的各个 LED颗粒中的红色灯管的阴极并联连接， 分别与第一子开关电路中对应的一个 P-MOS管的漏极连接； 每行中的各个 LED颗粒 中的绿色灯管的阳极和蓝色灯管的阳极并联连接， 分别与第二子开关电路中对应的一 个 P-MOS管的漏极连接； 每列中的各个 LED颗粒的红色灯管的阴极分别并联连接， 分别与恒流逻辑组电路中对应的一个恒流逻辑元件的第二端连接； 每列中的各个 LED 颗粒的绿色灯管的阴极分别并联连接， 分别与恒流逻辑组电路中对应的一个恒流逻辑 元件的第二端连接； 每列中的各个 LED颗粒的蓝色灯管的阴极分别并联连接， 分别与 恒流逻辑组电路中对应的一个恒流逻辑元件的第二端连接。 开关电路中的场效应管可以为 N-MOS管，且 LED显示面板中的 M行 N列个 LED 颗粒， 每个 LED颗粒分别包括红色灯管、 绿色灯管以及蓝色灯管， 其中， 每行中的各 个 LED 颗粒中的红色灯管的阴极并联连接， 分别与第一子开关电路中对应的一个 N-MOS管的漏极连接； 每行中的各个 LED颗粒中的绿色灯管的阴极和蓝色灯管的阴 极并联连接， 分别与第二子开关电路中对应的一个 N-MOS管的漏极连接； 每列中的 各个 LED颗粒的红色灯管的阳极分别并联连接，分别与恒流逻辑组电路中对应的一个 恒流逻辑元件的第二端连接； 每列中的各个 LED 颗粒的绿色灯管的阳极分别并联连 接， 分别与恒流逻辑组电路中对应的一个恒流逻辑元件的第二端连接； 每列中的各个 LED颗粒的蓝色灯管的阳极分别并联连接， 分别与恒流逻辑组电路中对应的一个恒流 逻辑元件的第二端连接。 另外， 在场效应管为 N-MOS管的情况下， LED显示面板中的每行中第 i个 LED 颗粒中的红色灯管的阴极并联连接于第 i节点， 每行中的各个节点并联连接， 分别与 第一子开关电路中对应的一个 N-MOS管的漏极连接； 每行中第 j个 LED颗粒中绿色 灯管的阴极和蓝色灯管的阴极并联连接于第 j节点， 每行中的各个节点并联连接， 与 第二子开关电路中对应的一个 N-MOS管的漏极连接； 每列中的各个 LED颗粒的红色 灯管的阳极分别并联连接， 分别与恒流逻辑组电路中对应的一个恒流逻辑元件的第二 端连接； 每列中的各个 LED颗粒的绿色灯管的阳极分别并联连接， 分别与恒流逻辑组 电路中对应的一个恒流逻辑元件的第二端连接；每列中的各个 LED颗粒的蓝色灯管的 阳极分别并联连接，分别与恒流逻辑组电路中对应的一个恒流逻辑元件的第二端连接。 该实施例中， 显示驱动电路集成了第一子开关电路和第二子开关电路， 两个子开 关电路分别包括一个或多个 N-MOS管，第一子开关电路的 N-MOS管的源极互联可以 作为显示驱动电路的外置引脚 GND， 连接至供电设备的电源端的一个接线端子， 栅极 连接到供电控制端口的红色供电控制信号，漏极连接于 LED显示面板的对应行的 LED 颗粒的红色灯管的阳极 （即对应行的 LED 颗粒的 R基色阳极）； 第二子开关电路的 N-MOS管的源极互联可以作为显示驱动电路的外置引脚 GND， 连接至供电设备的电 源端的一个接线端子， 栅极连接到供电控制端口的绿色和蓝色供电控制信号， 漏极连 接于 LED显示面板的对应行的 LED颗粒的绿色灯管和蓝色灯管的阳极 （即对应行的 LED颗粒的 G基色阳极和 B基色阳极）。
LED驱动电路可以与上述实施例中示出的 LED驱动电路相同， 该 LED驱动电路 中的每个恒流逻辑元件的第二端 （即输入端） 分别作为显示驱动电路的输入引脚中的 一个， 所有恒流逻辑元件的第一端 （即输出端） 内部互联， 作为显示驱动电路的 VCC 端， 连接到供电设备的电源端， 恒流逻辑元件的第三端 （即控制端） 与控制电路的驱 动控制端口连接， 用于接收 LED驱动电路的恒流控制信号。 上述实施例中的 LED驱动电路可以包括第一恒流通道组电路、第二恒流通道组电 路以及第三恒流通道组电路， 其中， 开关电路可以包括一个子开关电路或第一子开关 电路和第二子开关电路两个子开关电路， 并且其连接方式可以与上述实施例中的连接 方式相同。在该实施例中， 第一恒流通道组电路， 可以包括一个或多个恒流逻辑元件， 其中， 每个恒流逻辑元件的第一端分别与供电设备的电源端或接地端连接， 每个恒流 逻辑元件的第三端分别与驱动控制端口的第一 R显示控制子端口连接， 每个恒流逻辑 元件的第二端分别与 LED显示面板中对应列中的各个 LED颗粒中的红色灯管的阳极 或阴极连接， 用于控制 LED显示面板的红色灯管的显示； 第二恒流通道组电路， 包括 一个或多个恒流逻辑元件， 其中， 每个恒流逻辑元件的第一端分别与供电设备的电源 端或接地端连接， 每个恒流逻辑元件的第三端分别与驱动控制端口的第一 G显示控制 子端口连接，每个恒流逻辑元件的第二端分别与 LED显示面板中对应列中的各个 LED 颗粒中的绿色灯管的阳极或阴极连接， 用于控制 LED显示面板的绿色灯管的显示； 第 三恒流通道组电路， 包括一个或多个恒流逻辑元件， 其中， 每个恒流逻辑元件的第一 端分别与供电设备的电源端或接地端连接， 每个恒流逻辑元件的第三端分别与驱动控 制端口的第一 B显示控制子端口连接， 每个恒流逻辑元件的第二端分别与 LED显示 面板中对应列中的各个 LED颗粒中的蓝色灯管的阳极或阴极连接， 用于控制 LED显 示面板的蓝色灯管的显示。其中，第一恒流逻辑组电路可以是 R基色恒流通道组电路， 第二恒流逻辑组电路可以是 G基色恒流通道组电路，第三恒流逻辑组电路可以是 B基 色恒流通道组电路。 驱动控制电路用于通过第一 R显示控制子端口控制第一恒流通道组电路中的各个 恒流逻辑元件导通， 各个恒流逻辑元件导通之后， 分别为与恒流逻辑元件对应的 LED 显示面板列中的 LED颗粒中的红色灯管提供电流通路，以控制与场效应管对应的 LED 显示面板行中的 LED颗粒的红色灯管的显示； 驱动控制电路还用于通过第一 G显示 控制子端口控制第二恒流通道组电路中的各个恒流逻辑元件导通， 各个恒流逻辑元件 导通之后， 分别为与恒流逻辑元件对应的 LED显示面板列中的 LED颗粒中的绿色灯 管提供电流通路， 以控制与场效应管对应的 LED显示面板行中的 LED颗粒的绿色灯 管的显示； 驱动控制电路还用于通过第一 B显示控制子端口控制第三恒流通道组电路 中的各个恒流逻辑元件导通， 各个恒流逻辑元件导通之后， 分别为与恒流逻辑元件对 应的 LED显示面板列中的 LED颗粒中的蓝色灯管提供电流通路， 以控制与场效应管 对应的 LED显示面板行中的 LED颗粒的蓝色灯管的显示。 以场效应管为 P-MOS管为例， LED显示面板包括 M行 N列个 LED颗粒， 每个
LED颗粒分别包括红色灯管、 绿色灯管以及蓝色灯管， 其中， 每行中的各个 LED颗 粒中的红色灯管的阳极并联连接，分别与第一子开关电路中对应的一个 P-MOS管的漏 极连接； 每行中的各个 LED颗粒中的绿色灯管的阳极和蓝色灯管的阳极并联连接， 作 为 LED显示面板的阳极的一个接线端子， 与第二子开关电路中对应的一个 P-MOS管 的漏极连接； 每列中的各个 LED颗粒的红色灯管的阴极分别并联连接， 分别与第一恒 流通道组电路中对应的一个恒流逻辑元件的第二端连接；每列中的各个 LED颗粒的绿 色灯管的阴极分别并联连接， 分别与第二恒流通道组电路中对应的一个恒流逻辑元件 的第二端连接； 每列中的各个 LED颗粒的蓝色灯管的阴极分别并联连接， 分别与第三 恒流通道组电路中对应的一个恒流逻辑元件的第二端连接。 在 LED驱动电路包括三个恒流通道组电路的情况下， 与 LED驱动电路只包括一 个恒流通道组电路的情况相同，对 LED单元板上 LED颗粒的连接关系不会产生影响， 在 LED颗粒与 LED控制系统连接时， 只需要将不同的基色连接到控制该基色的恒流 通道组电路上就能够实现恒流通道为 LED颗粒提供恒流通道的目的。 从以上的描述中， 可以看出， 本发明实现了如下技术效果： 通过本申请， 在 LED 驱动电路中集成时钟延迟电路， 可以将时序控制信号延时为与数据控制信号同步的信 号， 从而不会采集错误的数据控制信号中的数据， 并且将时序控制信号的输入输出端 口内置到 LED驱动电路中， 减少了 PCB布线的数量， 解决了现有技术中 LED驱动电 路级联应用控制信号数量较多且串行输出数据延迟， 而导致 PCB布线难度高， 控制信 号的抗干扰能力相对较低且 LED显示错误的问题，实现了数据控制信号与时序控制信 号同步， 且减少 PCB布线的数量， 降低了时序控制信号对 PCB布图板上信号的影响 的效果， 从而使得 LED准确显示， 且提高了 LED单元板信号传输质量及抗干扰能力， 降低 LED单元板的布线难度。 显然， 本领域的技术人员应该明白， 上述的本发明的各模块或各步骤可以用通用 的计算装置来实现， 它们可以集中在单个的计算装置上， 或者分布在多个计算装置所 组成的网络上， 可选地， 它们可以用计算装置可执行的程序代码来实现， 从而， 可以 将它们存储在存储装置中由计算装置来执行， 或者将它们分别制作成各个集成电路模 块， 或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。 这样， 本发明 不限制于任何特定的硬件和软件结合。 以上所述仅为本发明的优选实施例而已， 并不用于限制本发明， 对于本领域的技 术人员来说， 本发明可以有各种更改和变化。 凡在本发明的精神和原则之内， 所作的 任何修改、 等同替换、 改进等， 均应包含在本发明的保护范围之内。

Claims

权 利 要 求 书
1. 一种 LED驱动电路，其特征在于，包括驱动控制电路和恒流通道组电路，其中， 所述驱动控制电路包括： 逻辑控制电路和时钟延迟电路， 其中， 所述逻辑控制电路， 与所述恒流通道组电路连接， 用于使用数据控制信号 控制所述恒流通道组电路的有序导通或截止； 以及
所述时钟延迟电路， 与所述逻辑控制电路连接， 用于获取与所述数据控制 信号同步的时序控制信号， 并输出所述时序控制信号。
2. 根据权利要求 1所述的驱动电路， 其特征在于， 所述时序控制信号包括： 移位 脉冲信号， 所述驱动控制电路的输入端包括： 移位脉冲输入端口， 所述驱动控 制电路的输出端包括： 移位脉冲输出端口， 其中， 所述时钟延迟电路包括移位 延时输入端口、 时钟延迟子电路、 以及延时输出端口， 其中，
所述移位延时输入端口， 与所述移位脉冲输入端口连接， 用于接收所述移 位脉冲信号；
所述时钟延迟子电路， 连接于所述移位延时输入端口与所述逻辑控制电路 之间， 用于使用所述时钟延迟子电路所生成的延时数据对所述移位脉冲信号进 行延时处理， 以获取与所述数据控制信号同步的移位脉冲信号； 以及
所述延时输出端口， 连接于所述时钟延迟子电路与所述移位脉冲输出端口 之间， 用于输出所述移位脉冲信号。
3. 根据权利要求 2所述的驱动电路， 其特征在于， 所述时钟延迟电路包括： 读取 装置， 其中，
所述读取装置的输入端， 与所述逻辑控制电路连接， 用于读取所述逻辑控 制电路的延时表中的延时数据； 以及
所述读取装置的输出端， 与时钟延迟子电路连接， 用于将所述延时数据发 送给所述时钟延迟子电路。
4. 根据权利要求 1所述的驱动电路， 其特征在于， 所述时序控制信号包括： 数据 锁存信号， 所述驱动控制电路的输入端包括： 数据锁存输入端口， 其中， 所述 逻辑控制电路包括锁存输入端口， 其中， 所述锁存输入端口， 与所述数据锁存输入端口连接， 用于接收所述数据锁 存信号。
5. 根据权利要求 1所述的驱动电路， 其特征在于， 所述时序控制信号包括： 使能 控制信号， 所述驱动控制电路的输入端包括： 使能控制输入端口， 其中， 所述 逻辑控制电路包括使能输入端口， 其中，
所述使能输入端口， 与所述使能控制输入端口连接， 用于接收所述使能控 制信号。
6. 根据权利要求 3至 5中任意一项所述的驱动电路， 其特征在于， 所述驱动控制 电路的输入端包括： 数据输入端口， 所述驱动控制电路的输出端包括： 数据控 制输出端口， 其中， 所述逻辑控制电路包括： 逻辑控制子电路、 第一控制输入 端口、 第一控制输出端口以及第二控制输出端口， 其中，
所述第一控制输入端口， 与所述数据输入端口连接， 用于接收数据控制信 号；
所述逻辑控制子电路， 连接于所述第一控制输入端口与所述时钟延迟电路 之间， 用于使用所述数据控制信号和所述时序控制信号生成逻辑控制信号； 所述第一控制输出端口， 与所述逻辑控制子电路连接， 并通过恒流通道控 制信号组与所述恒流通道组电路连接， 用于输出所述逻辑控制信号至所述恒流 通道组电路； 以及
所述第二控制输出端口， 连接于所述逻辑控制子电路与所述数据控制输出 端口之间， 用于输出所述数据控制信号。
7. 根据权利要求 6所述的驱动电路， 其特征在于， 所述恒流通道组电路包括一个 或多个恒流逻辑元件， 其中，
每个所述恒流逻辑元件的第一端分别与供电设备的电源端或接地端连接； 每个所述恒流逻辑元件的第二端分别与 LED 显示面板中对应列中的所述 LED颗粒的阳极或阴极连接； 以及
每个所述恒流逻辑元件的第三端分别与所述恒流通道控制信号组中对应的 接线端子连接。
8. 根据权利要求 7所述的驱动电路， 其特征在于， 所述逻辑控制子电路包括： 子处理器， 连接于所述恒流逻辑电路与所述读取装置之间， 用于读取与所 述恒流通道组电路中恒流逻辑元件的个数相对应的所述延时数据。
9. 一种 LED控制系统， 其特征在于， 包括： 显示驱动电路， 所述显示驱动电路包 括多个权利要求 1至 8中任意一项所述的 LED驱动电路，
所述显示驱动电路还包括显示控制电路， 所述显示控制电路通过驱动控制 端口分别与每个所述 LED驱动电路的控制端连接， 用于控制每个所述 LED驱 动电路的导通或截止。
10. 根据权利要求 9所述的系统， 其特征在于， 所述驱动控制端口包括： 数据输出 端口、 移位脉冲输出端口、 数据锁存输出端口、 使能控制输出端口， 其中， 第一个所述 LED驱动电路的数据输入端口与所述数据输出端口连接，用于 接收数据控制信号， 且第 i+1个 LED驱动电路的数据输入端口与第 i个 LED 驱动电路的数据控制输出端口连接， 用于接收所述数据控制信号， 其中， i 为 大于等于 1的自然数；
所述第一个 LED 驱动电路的移位脉冲输入端口与所述移位脉冲输出端口 连接， 用于接收所述移位脉冲信号， 且第 i+1个 LED驱动电路的移位脉冲输入 端口与第 i个 LED驱动电路的第二延时输出端口连接，用于接收与所述数据控 制信号同步的移位脉冲信号， 其中， i为大于等于 1的自然数；
每个所述 LED 驱动电路的数据锁存输入端口分别与所述数据锁存输出端 口连接， 用于接收数据锁存信号； 以及
每个所述 LED 驱动电路的使能控制输入端口分别与所述使能控制输出端 口连接， 用于接收使能控制信号。
11. 根据权利要求 9所述的系统， 其特征在于， 所述显示驱动电路还包括： 开关电 路， 其中，
所述开关电路和所述 LED 驱动电路中恒流通道组电路之一的第一端连接 至供电设备的电源端， 另一个的第一端连接至所述供电设备的接地端；
所述开关电路和所述 LED 驱动电路中恒流通道组电路之一的第二端与所 述 LED显示面板的阳极连接， 另一个的第二端与所述 LED显示面板的阴极连 接； 以及 所述控制电路， 包括： 供电控制电路， 其中， 所述供电控制电路， 通过供 电控制端口与所述开关电路的第三端连接， 用于控制所述开关电路的打开或闭 合.
其中， 所述开关电路用于控制对 LED显示面板的供电， 所述 LED驱动电 路用于控制所述 LED显示面板的有序显示。
12. 根据权利要求 11所述的系统，其特征在于，所述开关电路包括一个子开关电路， 所述子开关电路包括一个或多个场效应管， 其中，
每个所述场效应管的源极分别与所述供电设备的电源端或接地端连接； 每个所述场效应管的漏极分别与所述 LED 显示面板中对应行中的各个所 述 LED颗粒的阳极或阴极连接； 以及 每个所述场效应管的栅极分别与所述供电控制端口中的对应的接线端子连 接。
13. 根据权利要求 11所述的系统，其特征在于，所述开关电路包括第一子开关电路 和第二子开关电路， 其中，
所述第一子开关电路和所述第二子开关电路各包括一个或多个场效应管， 且所述第一子开关电路和所述第二子开关电路中的每个所述场效应管的源极都 分别与所述供电设备的电源端或接地端连接，
其中， 所述第一子开关电路中的每个所述场效应管的漏极分别与所述 LED 显示面板中对应行中各个所述 LED颗粒中的红色灯管的阳极或阴极连接，每个 所述场效应管的栅极分别与所述供电控制端口中对应的接线端子连接， 用于控 制所述 LED显示面板的所述红色灯管的供电； 以及
所述第二子开关电路中的每个所述场效应管的漏极分别与所述 LED 显示 面板中对应行中各个所述 LED 颗粒中的绿色灯管和蓝色灯管的阳极或阴极连 接，每个所述场效应管的栅极分别与所述供电控制端口中对应的接线端子连接， 用于控制所述 LED显示面板的所述绿色灯管和所述蓝色灯管的供电。
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