WO2014038129A1 - 両面研磨方法 - Google Patents
両面研磨方法 Download PDFInfo
- Publication number
- WO2014038129A1 WO2014038129A1 PCT/JP2013/004785 JP2013004785W WO2014038129A1 WO 2014038129 A1 WO2014038129 A1 WO 2014038129A1 JP 2013004785 W JP2013004785 W JP 2013004785W WO 2014038129 A1 WO2014038129 A1 WO 2014038129A1
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- WIPO (PCT)
- Prior art keywords
- wafer
- flatness
- double
- carrier
- peripheral surface
- Prior art date
Links
- 238000005498 polishing Methods 0.000 title claims abstract description 84
- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000011347 resin Substances 0.000 claims abstract description 50
- 229920005989 resin Polymers 0.000 claims abstract description 50
- 235000012431 wafers Nutrition 0.000 claims description 88
- 230000002093 peripheral effect Effects 0.000 claims description 61
- 239000000969 carrier Substances 0.000 claims description 12
- 238000000227 grinding Methods 0.000 claims description 6
- 239000004744 fabric Substances 0.000 claims description 4
- 230000006866 deterioration Effects 0.000 abstract description 12
- 238000007665 sagging Methods 0.000 abstract description 4
- 230000000052 comparative effect Effects 0.000 description 7
- 238000005259 measurement Methods 0.000 description 7
- 238000006073 displacement reaction Methods 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000003795 chemical substances by application Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000012670 alkaline solution Substances 0.000 description 1
- 239000008119 colloidal silica Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
Images
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/27—Work carriers
- B24B37/28—Work carriers for double side lapping of plane surfaces
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
- B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
- B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02024—Mirror polishing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
Definitions
- the present invention relates to a double-side polishing method for simultaneously polishing both surfaces of a wafer using a carrier for double-side polishing.
- FIG. 8 is a schematic diagram for explaining double-side polishing of a wafer by a general double-side polishing apparatus conventionally used.
- the carrier 102 of the double-side polishing apparatus 101 includes a holding hole 104 for holding the wafer W.
- the carrier 102 is formed to be thinner than the wafer W.
- the wafer W is inserted and held in the holding hole 104, and the upper and lower surfaces of the wafer W are sandwiched between the polishing cloths 107 provided on the opposing surfaces of the upper surface plate 105 and the lower surface plate 106.
- the carrier 102 is meshed with the sun gear 108 and the internal gear 109 and is rotated and revolved by the driving rotation of the sun gear 108.
- the upper surface plate 105 and the lower surface plate 106 are rotated reversely while supplying the polishing agent to the polishing surface, whereby both surfaces of the wafer W are simultaneously polished with the polishing cloth 107 attached to the upper and lower surface plates 105, 106. .
- the carrier 102 used in such a double-side polishing process of the wafer W is mainly made of metal.
- the resin insert 103 is attached along the inner peripheral portion of the holding hole 104 of the carrier 102 in order to protect the peripheral portion of the wafer W from damage by the metal carrier 102 (see, for example, Patent Document 1). .
- the present invention has been made in view of the above-described problems, and provides a double-side polishing method capable of suppressing deterioration of the flatness of a wafer such as an outer peripheral sag due to a change in shape of an inner peripheral surface of a resin insert of a carrier. For the purpose.
- a holding hole for holding a wafer and an inner peripheral surface arranged along the inner periphery of the holding hole and in contact with the peripheral edge of the held wafer are provided.
- the maximum height difference of irregularities on the inner peripheral surface of the insert is defined as the flatness of the inner peripheral surface, and the angle formed by the straight line connecting the upper end and the lower end of the inner peripheral surface and the straight line perpendicular to the carrier main surface
- a double-side polishing method is provided, wherein both surfaces of the wafer are polished while maintaining the flatness at 100 ⁇ m or less and the perpendicularity at 5 ° or less.
- Such a double-side polishing method can suppress the deterioration of the flatness of the wafer due to the shape change of the inner peripheral surface of the resin insert of the carrier.
- the flatness and the perpendicularity can be maintained by grinding or cutting the inner peripheral surface of the resin insert. In this way, flatness and perpendicularity can be easily maintained within the above ranges.
- the plurality of carriers can be sandwiched between the upper and lower surface plates, and both surfaces of the plurality of wafers can be polished at a time. In this way, a plurality of wafers can be polished simultaneously in one batch, and the process time can be shortened.
- the both sides of the wafer are polished while maintaining the flatness on the inner peripheral surface of the carrier resin insert to 100 ⁇ m or less and the verticality to 5 ° or less in double-side polishing of the wafer. Deterioration of wafer flatness due to surface shape change can be suppressed.
- the present invention is not limited to this.
- the inner peripheral surface of the resin insert is worn by contact with the peripheral edge of the wafer as the carrier usage time elapses, and the inner periphery of the resin insert.
- the flatness of the polished wafer is likely to deteriorate, such as unevenness formed on the surface gradually increases and sagging occurs on the outer periphery of the wafer.
- the present inventors have conducted intensive studies to solve this problem. As a result, the inventors conceived the following and completed the present invention.
- the maximum height difference of the unevenness on the inner peripheral surface is defined as the flatness of the inner peripheral surface, and the upper end and the lower end of the inner peripheral surface are connected.
- the angle between the straight line and the straight line perpendicular to the carrier main surface was defined as the perpendicularity of the inner peripheral surface.
- the inventors have found that the following problems occur when simultaneously polishing both surfaces of a plurality of wafers in one batch using a plurality of carriers (a plurality of resin inserts).
- a plurality of carriers a plurality of resin inserts.
- the difference in inner diameter between the resin inserts tends to increase.
- the polishing rate changes for each carrier, and the variation in the finished thickness between wafers polished in the same batch increases.
- the flatness of the wafer depends on the gap, which is the difference between the finished thickness of the wafer and the thickness of the carrier, so that the flatness deteriorates due to increased variations in the finished thickness.
- the carrier 2 of the double-side polishing apparatus 1 includes a holding hole 4 for holding the wafer W.
- the carrier 2 is formed to be thinner than the wafer W.
- a ring-shaped resin insert 3 is disposed along the inner periphery of the holding hole 4. The inner peripheral surface of the resin insert 3 is in contact with the peripheral edge of the wafer and protects the wafer from damage by the carrier 2.
- the wafer W is inserted and held in the holding hole 4, and the upper and lower surfaces of the wafer W are sandwiched between the polishing cloths 7 provided on the opposing surfaces of the upper surface plate 5 and the lower surface plate 6.
- the carrier 2 is meshed with the sun gear 8 and the internal gear 9, and is rotated and revolved by the driving rotation of the sun gear 8.
- the double-side polishing method of the present invention is a method for simultaneously polishing both surfaces of a wafer using such a double-side polishing apparatus.
- the flatness and the perpendicularity will be described with reference to FIGS.
- minute irregularities exist on the inner peripheral surface 10 of the resin insert 3.
- the “flatness of the inner peripheral surface” in the present invention refers to the height difference between the most concave portion a and the protruding portion b of the inner peripheral surface 10, that is, the maximum height difference (t) of the unevenness.
- the “perpendicularity of the inner peripheral surface” in the present invention means a straight line c connecting the upper end and the lower end of the inner peripheral surface 10 and a straight line d perpendicular to the carrier main surface. This is the angle ( ⁇ ) formed by.
- the inner peripheral surface of the resin insert 3 is processed so that the flatness is 100 ⁇ m or less and the verticality is 5 ° or less. To do.
- This processing can be performed by grinding using a processing device such as an NC milling machine or cutting.
- the wafer W is held in the holding hole 4 of the carrier 2 having the resin insert 3 in which the flatness of the inner peripheral surface 10 is maintained at 100 ⁇ m or less and the perpendicularity is maintained at 5 ° or less.
- the carrier 2 holding the wafer W is disposed between the upper surface plate 5 and the lower surface plate 6.
- the upper and lower polishing surfaces of the wafer W are sandwiched between the polishing cloths 7 attached to the upper surface plate 5 and the lower surface plate 6, respectively, and the upper surface plate 5 and the lower surface plate 6 are rotated in reverse directions while supplying the polishing agent to the polishing surface. By doing so, both surfaces of the wafer W are simultaneously polished with the polishing pad 7.
- polishing conditions can be the same as those of the conventional double-side polishing method.
- After polishing the wafer W measure and inspect the flatness and perpendicularity of the inner peripheral surface before polishing the next wafer W, and perform polishing while always maintaining the flatness at 100 ⁇ m or less and the perpendicularity at 5 ° or less. .
- a double-side polishing method of the present invention it is possible to suppress deterioration in flatness such as outer peripheral sagging of the wafer, which has occurred due to a shape change due to wear of the inner peripheral surface 10 of the resin insert 3 in the related art. That is, a wafer in which deterioration of ESFQRmax is suppressed can be obtained.
- the present invention is not limited to this. It is also possible to periodically perform the timing of measuring the flatness and the perpendicularity and processing the inner peripheral surface. For example, by investigating in advance the relationship between the usage time of the carrier (resin insert) and the flatness and perpendicularity of the inner peripheral surface over time, the usage time of the carrier that requires processing of the inner peripheral surface is calculated.
- the carrier usage time can be set as the above timing.
- the flatness and perpendicularity to be maintained may be 100 ⁇ m or less and 5 ° or less, respectively, and it is particularly preferable to maintain the flatness at 25 ⁇ m or less and the perpendicularity at 2 ° or less. In this way, it is possible to reliably suppress the deterioration of the flatness of the polished wafer.
- a plurality of carriers 2 each holding a wafer W can be sandwiched between upper and lower surface plates 5 and 6, and both surfaces of a plurality of wafers can be polished at a time.
- the polishing process time can be shortened and productivity can be improved.
- the “inner diameter” is an approximate circle obtained by fitting a circle obtained by measuring the displacement circumferentially along the inner peripheral surface of the resin insert using a displacement meter by the least square center method. Say the diameter.
- Difference in inner diameter means the difference between the maximum and minimum inner diameters of a plurality of carrier resin inserts used simultaneously in one batch of double-side polishing.
- a double-side polishing apparatus of a type having a plurality of holding holes and resin inserts in one carrier can also be used.
- Example 1 A silicon wafer having a diameter of 300 mm was polished on both sides. At this time, using a double-side polishing apparatus (DSP-20B manufactured by Fujikoshi Machinery Co., Ltd.) having 5 carriers each holding one wafer, 5 wafers were polished simultaneously in one batch. A polishing cloth made of urethane foam was used, and an alkaline solution containing colloidal silica as an abrasive was used.
- DSP-20B manufactured by Fujikoshi Machinery Co., Ltd.
- the measurement result of flatness is shown in FIG. 3, and the measurement result of perpendicularity is shown in FIG.
- FIGS. 3 and 4 it was found that both the flatness and the perpendicularity deteriorated with the lapse of the usage time of the carrier.
- the flatness and the perpendicularity are maintained at 100 ⁇ m or less and 5 ° or less, respectively, within a carrier usage time of 10,000 minutes (Example 1), and the resin immediately before the carrier usage time of 10,000 minutes has elapsed.
- the measurement results of the flatness and the perpendicularity of the inner peripheral surface of the insert show that the average of the five carriers has a flatness of 83.74 ⁇ m to 93.27 ⁇ m and a verticality of 4.6 ° to 4.9 ° there were.
- the carrier usage time exceeds 10,000 minutes, the flatness of the inner peripheral surface exceeds 100 ⁇ m and the verticality exceeds 5 ° (comparative example). From the above, under the above polishing conditions, in order to maintain the flatness of the inner peripheral surface of the resin insert at 100 ⁇ m or less and the perpendicularity at 5 ° or less, the carrier usage time is 10,000 minutes as the upper limit, It was found that the inner peripheral surface should be processed.
- ESFQRmax results are shown in FIGS. As shown in FIGS. 5 and 6, it was found that good ESFQRmax results were obtained in a state where the flatness was maintained at 100 ⁇ m or less and the verticality was maintained at 5 ° or less.
- the double-side polishing method of the present invention polishes both sides of the wafer while maintaining the flatness on the inner peripheral surface of the resin insert to 100 ⁇ m or less and the verticality to 5 ° or less. It was confirmed that the deterioration of the flatness of the wafer due to the shape change of the peripheral surface can be suppressed.
- Example 2 Double-side polishing of the silicon wafer was performed under the same conditions as in Example 1, and the difference in inner diameter between resin inserts in the same batch and the variation in the finished thickness of the wafer were measured. Double-side polishing was performed using a wafer having a thickness in the range of 791.2 ⁇ m to 791.3 ⁇ m. Wafer Light (manufactured by KLA-Tencor) was used for wafer thickness measurement. The results are shown in FIG. As shown in FIG. 7, when the difference in inner diameter was 0.5 mm or less, the average value of variations in the finished thickness of the wafer was as good as 0.107 ⁇ m.
- the present invention is not limited to the above embodiment.
- the above-described embodiment is an exemplification, and the present invention has any configuration that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits the same effects. Are included in the technical scope.
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Abstract
Description
図8は、従来から用いられている一般的な両面研磨装置によるウェーハの両面研磨を説明する概略図である。図8に示すように、両面研磨装置101のキャリア102はウェーハWを保持するための保持孔104を備えている。キャリア102はウェーハWより薄い厚みに形成されている。
キャリア102は、サンギヤ108とインターナルギヤ109とに噛合され、サンギヤ108の駆動回転によって自転公転される。そして、研磨面に研磨剤を供給しながら上定盤105と下定盤106とを互いに逆回転させることにより、上下定盤105、106に貼付された研磨布107でウェーハWの両面を同時に研磨する。
そこで、本発明者等がこの原因について調査したところ、キャリアの使用時間の経過とともに樹脂インサートの内周面に形成された微少な凹凸が摩耗により次第に大きくなり、これが平坦度を悪化させる原因となっていることが判明した。
このようにすれば、平面度及び垂直度を上記範囲内に容易に維持できる。
このようにすれば、キャリアの樹脂インサートの内周面の形状変化によるウェーハの平坦度の悪化を確実に抑制できる。
このようにすれば、1バッチ内で複数のウェーハを同時に研磨でき、工程時間を短縮できる。
このようにすれば、1バッチ内で複数のウェーハを同時に研磨する際、樹脂インサート間の内径の差が大きくなることによって各ウェーハの研磨速度に差が生じることを抑制でき、これによりウェーハの仕上がり厚さのバラツキ、ひいては平坦度の悪化を抑制できる。
上記したように、樹脂インサートを有するキャリアを用いたウェーハの両面研磨において、キャリアの使用時間の経過とともに樹脂インサートの内周面はウェーハの周縁部と接触することにより摩耗し、樹脂インサートの内周面に形成された凹凸が次第に大きくなり、ウェーハの外周にダレが発生するなど研磨されたウェーハの平坦度が悪化し易くなるという問題がある。
まず、樹脂インサートの内周面の凹凸の状態を評価するために、内周面における凹凸の最大高低差を内周面の平面度と定義し、内周面における上端部と下端部を結んだ直線とキャリア主面に垂直な直線とが成す角度を内周面の垂直度と定義した。この平面度が100μm以下、垂直度が5°以下に維持された状態で両面研磨を行うことにより、研磨されたウェーハの平坦度の悪化を抑制できる。樹脂インサートの内周面の平面度及び垂直度を維持するためには内周面が平坦になるように加工すれば良い。
上記内径の差を所定の範囲内に維持することによって仕上がり厚さのバラツキ、ひいては平坦度の悪化を更に抑制できる。
図1に示すように、両面研磨装置1のキャリア2はウェーハWを保持するための保持孔4を備えている。キャリア2はウェーハWより薄い厚みに形成されている。
キャリア2には、保持孔4の内周に沿ってリング状の樹脂インサート3が配置されている。樹脂インサート3の内周面はウェーハの周縁部に接し、キャリア2によるダメージからウェーハを保護する。
キャリア2は、サンギヤ8とインターナルギヤ9とに噛合され、サンギヤ8の駆動回転によって自転公転される。
まず、樹脂インサート3の内周面の平面度及び垂直度を測定する。この測定は、例えば2次元変位計を用いて行うことができる。そして、平面度が100μm以下、垂直度が5°以下となっているか検査する。
図2(A)に示すように、樹脂インサート3の内周面10には微少な凹凸が存在する。本発明における「内周面の平面度」とは、内周面10の最も凹んだ部分aと突き出した部分bの高低差、すなわち凹凸の最大高低差(t)のことを言う。
また、図2(B)に示すように、本発明における「内周面の垂直度」とは、内周面10における上端部と下端部を結んだ直線cとキャリア主面に垂直な直線dとが成す角度(θ)のことを言う。
その後、上定盤5及び下定盤6にそれぞれ貼付された研磨布7でウェーハWの上下研磨面を挟み込み、研磨面に研磨剤を供給しながら上定盤5と下定盤6とを互いに逆回転させることにより、研磨布7でウェーハWの両面を同時に研磨する。
ウェーハWの研磨後、次のウェーハWの研磨前に内周面の平面度及び垂直度を測定・検査し、常に平面度を100μm以下に、垂直度を5°以下に維持しながら研磨を行う。
このような本発明の両面研磨方法であれば、従来樹脂インサート3の内周面10の摩耗による形状変化によって発生している、ウェーハの外周ダレなどの平坦度の悪化を抑制できる。すなわち、ESFQRmaxの悪化が抑制されたウェーハを得ることができる。
この平面度及び垂直度の測定と内周面の加工を実施するタイミングを定期的に行うようにすることもできる。例えば、キャリア(樹脂インサート)の使用時間と内周面の平面度及び垂直度の経時変化の関係を予め調査しておくことで、内周面の加工が必要となるキャリアの使用時間を算出し、このキャリアの使用時間を上記タイミングとすることができる。
このようにすれば、研磨工程時間を短縮でき、生産性を向上できる。
この際、複数のキャリアのそれぞれの樹脂インサート3間の内径の差を0.5mm以内に維持しながらウェーハWの両面を研磨することが好ましい。
ここで、「内径」とは、変位計を用いて樹脂インサートの内周面に沿って円周状に変位を測定することで得られた円形を最小二乗中心法でフィッティングし、得られる近似円の直径のことを言う。
このように樹脂インサート間の内径の差を管理することで、同一バッチ内で研磨されたウェーハの仕上がり厚さを均一化でき、ウェーハの平坦度のバラツキを低減できる。
直径300mmのシリコンウェーハを両面研磨した。この際、それぞれが1枚のウェーハを保持する5枚のキャリアを有した両面研磨装置(DSP-20B 不二越機械工業社製)を用い、1バッチに5枚のウェーハを同時に研磨した。研磨布は発泡ウレタン製のものを用い、研磨剤としてコロダイルシリカを含有したアルカリ性溶液のものを用いた。
図3、4に示すように、キャリアの使用時間の経過とともに、平面度及び垂直度が共に悪化していることが分かった。また、キャリアの使用時間が10,000分以内において、平面度及び垂直度はそれぞれ100μm以下、5°以下に維持されていおり(実施例1)、キャリアの使用時間10,000分経過直前の樹脂インサートの内周面の平面度と垂直度の測定結果は、5枚のキャリアの平均で平面度が83.74μmから93.27μm、垂直度が4.6°から4.9°の範囲内であった。
以上から、上記した研磨条件では、樹脂インサート内周面の平面度を100μm以下、垂直度を5°以下に維持するため、キャリアの使用時間10,000分を上限とし、定期的に樹脂インサートの内周面の加工を行えば良いことが分かった。
以上のことから、本発明の両面研磨方法では樹脂インサートの内周面における平面度を100μm以下に、垂直度を5°以下に維持しながらウェーハの両面を研磨するので、キャリアの樹脂インサートの内周面の形状変化によるウェーハの平坦度の悪化を抑制できることが確認できた。
実施例1と同様の条件でシリコンウェーハの両面研磨を行い、同一バッチ内における樹脂インサート間の内径の差とウェーハの仕上がり厚さのバラツキを測定した。両面研磨は厚さが791.2μmから791.3μmの範囲のウェーハを用いて行った。ウェーハの厚さ測定にはWafer Sight(KLA-Tencor社製)を用いた。
結果を図7に示す。図7に示すように内径差が0.5mm以下のとき、ウェーハの仕上がり厚さのバラツキの平均値は0.107μmと良好であった。また、内径差が0.5mm以下である4点の結果について、いずれの場合もウェーハの仕上がり厚さのバラツキに大きな違いは見られず、すなわち、内径差の違いによる仕上がり厚さのバラツキの悪化は無かった。
Claims (5)
- ウェーハを保持するための保持孔と、該保持孔の内周に沿って配置され、前記保持されるウェーハの周縁部に接する内周面を有するリング状の樹脂インサートとを有するキャリアに前記ウェーハを保持し、前記キャリアを研磨布が貼付された上下の定盤で挟み込み、前記ウェーハの両面を同時に研磨する両面研磨方法であって、
前記樹脂インサートの内周面における凹凸の最大高低差を前記内周面の平面度と定義し、前記内周面における上端部と下端部を結んだ直線とキャリア主面に垂直な直線とが成す角度を前記内周面の垂直度と定義したとき、前記平面度を100μm以下に、前記垂直度を5°以下に維持しながら前記ウェーハの両面を研磨することを特徴とする両面研磨方法。 - 前記ウェーハの両面を研磨した後、前記樹脂インサートの内周面を研削加工又は切削加工することによって、前記平面度及び前記垂直度を維持することを特徴とする請求項1に記載の両面研磨方法。
- 前記平面度を25μm以下に、前記垂直度を2°以下に維持しながら前記ウェーハの両面を研磨することを特徴とする請求項1又は請求項2に記載の両面研磨方法。
- 複数の前記キャリアを前記上下の定盤で挟み込み、1度に複数のウェーハの両面を研磨することを特徴とする請求項1乃至請求項3のいずれか1項に記載の両面研磨方法。
- 前記複数のキャリアのそれぞれの前記樹脂インサート間の内径の差を0.5mm以内に維持しながら前記ウェーハの両面を研磨することを特徴とする請求項4に記載の両面研磨方法。
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US14/421,578 US9987721B2 (en) | 2012-09-06 | 2013-08-08 | Double-side polishing method |
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JP6128198B1 (ja) | 2015-12-22 | 2017-05-17 | 株式会社Sumco | ウェーハの両面研磨方法及びこれを用いたエピタキシャルウェーハの製造方法 |
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