WO2014031229A1 - Ingan channel n-polar gan hemt profile - Google Patents

Ingan channel n-polar gan hemt profile Download PDF

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Publication number
WO2014031229A1
WO2014031229A1 PCT/US2013/047766 US2013047766W WO2014031229A1 WO 2014031229 A1 WO2014031229 A1 WO 2014031229A1 US 2013047766 W US2013047766 W US 2013047766W WO 2014031229 A1 WO2014031229 A1 WO 2014031229A1
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Prior art keywords
layer
channel
ingan
polar
barrier
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PCT/US2013/047766
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French (fr)
Inventor
Vincent Gambin
Xing GU
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Northrop Grumman Systems Corporation
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Priority to JP2015528464A priority Critical patent/JP2015527749A/en
Publication of WO2014031229A1 publication Critical patent/WO2014031229A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Definitions

  • the invention relates generally to high electron mobility transistors (HEMT) and more particularly to N-polar GaN-based HEMTs.
  • HEMTs have commonly been manufactured with gallium arsenide (GaAs) but recently, the semiconductor gallium nitride (GaN) has received much attention in the production of HEMTs due to its high-power, high-frequency performance.
  • GaN semiconductor gallium nitride
  • One feature of nitride-based semiconductors like GaN is that they exhibit strong polarization due to a lack of inversion symmetry in the lattice structure, as well as the very high electronegativity of the nitrogen atom.
  • GaN presents two different faces, or polarities, which are referred to as the Ga-polar and the N-polar, based on the orientation of the crystal lattice structure.
  • An HEMT is a type of field effect transistor (FET) where the channel is formed not by a doped channel but by a junction between two materials with different band gaps. This junction is called a heterojunction and the channel resulting from the heterojunction is called a two dimensional electron gas (2DEG).
  • FET field effect transistor
  • a typical N-polar GaN HEMT structure uses a GaN channel layer as shown in FIG 1A.
  • the band diagram of an N-polar GaN HEMT is shown in FIG. IB.
  • Improved performance of a GaN HEMT can be achieved by using an InGaN channel.
  • the device performance can be improved due to intrinsic advantages of the InGaN alloy. This includes a lower electron effective mass which affords a higher electron velocity, and a larger band offset to the barrier which affords an improved carrier confinement.
  • the InGaN channel is typically grown with compromised quality. The low growth temperature of InGaN not only reduces material quality, but also requires an undesirable growth pause which adversely affects device quality. This situation is worsened by the following higher temperature AlGaN barrier growth, which overheats the InGaN channel layer to enhance phase separations, atomic diffusion and further degrade the InGaN layer quality.
  • the invention in one implementation encompasses an N-polar HEMT device having an InGaN channel.
  • This new channel layer provides improved electron transport. It has higher electron mobility and high field velocity which enables higher frequency radio frequency (RF) performance.
  • RF radio frequency
  • the invention encompasses an N-polar Ill-nitride semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation and an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer.
  • the device may also have a buffer layer between the substrate and the barrier layer.
  • the invention encompasses an N-polar Ill-nitride semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation, an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer and a cap layer deposited on the channel layer.
  • N-polar Ill-nitride semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation, an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer and a cap layer deposited on the channel layer.
  • InGaN indium gallium nitride
  • the invention encompasses an N-polar HEMT made using either of the embodiments above.
  • the invention encompasses a method of making a semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation, an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer and optionally a cap layer deposited on the channel layer.
  • a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation
  • InGaN indium gallium nitride
  • FIG. 1A is a cross-sectional view of a prior art semiconductor device profile of an N- polar HEMT with a GaN channel.
  • FIG. IB is a band diagram of the structure of FIG. 1A.
  • FIG. 2 A is a cross-sectional view of a semiconductor device profile of an N-polar HEMT with an InGaN channel.
  • FIG. 2B is a band diagram of the structure of FIG. 2A.
  • FIG. 3 A is a cross-sectional view of a semiconductor device profile of an N-polar
  • HEMT with an InGaN channel with a GaN cap layer.
  • FIG. 3B is a band diagram of the structure of FIG. 3A.
  • FIG. 4A is a specific embodiment of a semiconductor device profile of an N-polar HEMT with and InGaN channel.
  • FIG. 4B is a photoluminescence plot of the InGaN channel of FIG. 4A.
  • FIG. 5 is a cross-sectional view of a HEMT semiconductor device having gate, source and drain terminals.
  • An InGaN channel in an N-polar GaN HEMT has higher mobility, lower effective electron mass and higher electron velocity.
  • the smaller electron-phonon coupling of InGaN reduces the hot phonon scattering effects and therefore further improves electron velocity, as compared with a GaN channel profile.
  • an InGaN channel in a Ga-polar HEMT has compromised material quality.
  • FIG. 2A A first embodiment of the present invention, an N-polar HEMT device 200 having an InGaN channel, is shown in FIG. 2A.
  • the device 200 comprises silicon carbide (SiC) substrate 210.
  • SiC silicon carbide
  • GaN, silicon, AIN, sapphire, or other suitable materials could be used as substrate 210. If sapphire or silicon is used, the device would also need to include a different nucleation layer instead of AIN to provide an N-polar surface as would be understood by one of ordinary skill in the art.
  • the device also includes a GaN buffer layer 220.
  • buffer layer 220 could be made of AlGaN or eliminated entirely.
  • Device 200 also includes an AlGaN back barrier 230.
  • the buffer layer 220 or the AlGaN back barrier 230 may or may not be doped with n-type dopants, such as silicon, to eliminate the hole channel in the buffer layer.
  • AIN barrier interlayer 240 is optional depending on the application of the device.
  • the channel layer made of InGaN is shown at 250, which forms two dimensional electron gas (2DEG) 260.
  • the inventive epitaxial profile is designed such that all the high temperature processing, including the AlGaN and AIN barrier epitaxial growth, occurs before the InGaN channel.
  • the high quality of the temperature-sensitive InGaN layer is preserved, enabling a higher quality InGaN channel layer and a higher mobility InGaN channel HEMT.
  • a quaternary InAlGaN layer is typically formed due to atomic inter-diffusion. This layer increases the alloy scattering and reduces the electron mobility and device performance.
  • an aluminum removal growth process is added to prevent the atomic inter- diffusion and maintain a sharp InGaN/AlGaN or InGaN/AIN interface. This improved growth process facilitates the improved electrical channel mobility.
  • the parameters of the InGaN channel profile of device 200 can be chosen with a high degree of freedom, depending on device parameters and applications.
  • the proportion of indium in the InGaN channel 250 ranges from 1% to 30% and the InGaN channel thickness may vary from 1 to 50 nm.
  • the proportion of aluminum in the AlGaN back barrier 230 ranges from 20% to 100% and the AlGaN back barrier thickness may vary between 2nm and 50nm.
  • the electron mobility of the InGaN channel HEMT 200 may be higher than 1600 cm2/Vs.
  • the InGaN channel can be grown at a much higher temperature than a GaN channel at the same level, which not only improves material quality but also avoids a growth pause near the channel growth layer. Due to the inverted structure of the N-polar HEMT, the high temperature AlGaN back barrier is grown before the InGaN channel, thus reducing the overall thermal budget of the InGaN channel and leading to high quality InGaN channel formation.
  • FIG. 2B shows the band diagram through the structure in FIG. 2A, plotting the Fermi level Ep, conduction band energy Ec and valence band energy Ey through each layer of the device.
  • the 2DEG is formed at the InGaN and A1N interface due to polarization and the large band offset, and the density of the 2DEG is determined by the aluminum composition in the AlGaN back barrier and the thickness of the AlGaN, A1N and InGaN layers.
  • an N-polar HEMT device 300 includes a substrate layer 310, GaN buffer layer 320, AlGaN barrier layer 330, A1N barrier interlayer 340, channel layer 350 and 2DEG 360 similarly to device 200 of FIG. 2A.
  • Device 300 also includes GaN cap layer 370. This embodiment provides a double confinement for the 2DEG.
  • device 300 includes a GaN buffer layer 320.
  • buffer layer 320 could be made of AlGaN or eliminated entirely.
  • Device 300 also includes an AlGaN back barrier layer 330.
  • A1N barrier layer 340 is optional depending on the application of the device.
  • the channel layer made of InGaN is shown at 350, which forms two dimensional electron gas (2DEG) 360.
  • FIG. 3B shows the band diagram through the structure in FIG. 3A, plotting the Fermi level Ep, conduction band energy Ec and valence band energy Ey through each layer of the device 300.
  • the 2DEG 360 is formed at the InGaN and A1N interface. Compared with a GaN channel profile, the band offset of the InGaN profile is larger and therefore provides a better electron confinement which leads to superior device quality.
  • the density of the 2DEG 360 is determined by aluminum composition in the AlGaN back barrier 330 , the indium composition of the InGaN channel and the thickness of AlGaN, A1N and InGaN channel.
  • an N-polar HEMT device 400 includes a substrate 410, GaN buffer layer 420, AlGaN barrier layer 430, A1N barrier interlayer 440, InGaN channel layer 450, 2DEG 460, GaN cap layer 470 similarly to device 300 of FIG. 3A.
  • Device 400 also includes GaN spacer layer 480. This embodiment provides a double confinement for the 2DEG 460 with both interfaces containing GaN.
  • device 400 also includes the GaN buffer layer 420.
  • buffer layer 420 could be made of AlGaN or eliminated entirely.
  • Device 400 also includes an AlGaN barrier layer 430.
  • A1N barrier layer 440 is optional depending on the application of the device.
  • the channel layer made of InGaN is shown at 450, which forms two dimensional electron gas (2DEG) 460.
  • FIG. 4B A photoluminescence spectrum plot of the N-polar InGaN channel layer 450 is shown in FIG. 4B. From this figure, it can be seen that InGaN with up to 20% indium composition has been grown at the channel temperature which is not possible for Ga-polar, indicating the intrinsic advantage of the epitaxially grown N-polar InGaN profile.
  • device 500 includes an SiC substrate 510, a 5nm thick buffer layer 520 made of GaN doped with Si, an Alc ⁇ sGaN barrier layer 530, an A1N barrier inter layer 440, an InGaN channel layer 550, a 2DEG layer 560 and a GaN cap layer 570.
  • Various alternatives may be used for certain layers as explained above for FIGS. 2 - 4.
  • the device 500 is formed by means of source terminal 580, drain terminal 590 and gate terminal 585 located on the surface of GaN cap layer 570.
  • a variety of methods can be used to create the devices of FIGS 2A, 3A, 4A and 5. These methods include molecular beam epitaxy (MBE) processes, metal organic chemical vapor deposition (MOCVD) processes, and atomic layer deposition (ALD) processes, or any suitable deposition process for nitride-based semiconductor devices.
  • MBE molecular beam epitaxy
  • MOCVD metal organic chemical vapor deposition
  • ALD atomic layer deposition
  • Numerous alternative implementations of the present invention exist. Specific design options can be chosen to control the electron density and device parameters. For example, numerous different channel compositions of the form In x Gai_ x N where x varies from 0 to 100% may be used. The thickness of the InGaN channel may also vary within a range of lnm to 50nm. The device may also include GaN heterojunction cladding at the top, bottom or both sides of the InGaN channel layer. Further variations include an optional InGaAIN back barrier and an optional AlGaN buffer.

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Abstract

Disclosed is an N-polar high electron mobility transistor (HEMT) device having an InGaN channel for the formation of a two dimensional electron gas (2DEG) layer. This new channel layer provides improved electron transport. It has higher electron mobility and high field velocity which enables higher frequency radio frequency (RF) performance. The device may also include a GaN cap layer deposited on top of the InGaN channel layer which provides a double confinement for the 2DEG.

Description

INGAN CHANNEL N-POLAR GAN HEMT PROFILE
STATEMENT OF GOVERNMENT RIGHTS
[01] The Government of the United States of America has rights in this invention pursuant to Government Contract No. HR0011-09-C-0132 (DARPA).
TECHNICAL FIELD
[02] The invention relates generally to high electron mobility transistors (HEMT) and more particularly to N-polar GaN-based HEMTs.
BACKGROUND
[03] HEMTs have commonly been manufactured with gallium arsenide (GaAs) but recently, the semiconductor gallium nitride (GaN) has received much attention in the production of HEMTs due to its high-power, high-frequency performance. One feature of nitride-based semiconductors like GaN is that they exhibit strong polarization due to a lack of inversion symmetry in the lattice structure, as well as the very high electronegativity of the nitrogen atom. Thus, GaN presents two different faces, or polarities, which are referred to as the Ga-polar and the N-polar, based on the orientation of the crystal lattice structure.
[04] An HEMT is a type of field effect transistor (FET) where the channel is formed not by a doped channel but by a junction between two materials with different band gaps. This junction is called a heterojunction and the channel resulting from the heterojunction is called a two dimensional electron gas (2DEG). A typical N-polar GaN HEMT structure uses a GaN channel layer as shown in FIG 1A. The band diagram of an N-polar GaN HEMT is shown in FIG. IB.
[05] Improved performance of a GaN HEMT can be achieved by using an InGaN channel. Using an InGaN channel, the device performance can be improved due to intrinsic advantages of the InGaN alloy. This includes a lower electron effective mass which affords a higher electron velocity, and a larger band offset to the barrier which affords an improved carrier confinement. However, for a Ga-polar HEMT, the InGaN channel is typically grown with compromised quality. The low growth temperature of InGaN not only reduces material quality, but also requires an undesirable growth pause which adversely affects device quality. This situation is worsened by the following higher temperature AlGaN barrier growth, which overheats the InGaN channel layer to enhance phase separations, atomic diffusion and further degrade the InGaN layer quality.
[06] Thus, a need exists for a GaN HEMT with an InGaN channel with an improved layer profile and epitaxial growth technique to fully exploit the intrinsic advantages of the InGaN alloy.
SUMMARY
[07] The invention in one implementation encompasses an N-polar HEMT device having an InGaN channel. This new channel layer provides improved electron transport. It has higher electron mobility and high field velocity which enables higher frequency radio frequency (RF) performance.
[08] In one embodiment, the invention encompasses an N-polar Ill-nitride semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation and an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer. The device may also have a buffer layer between the substrate and the barrier layer.
[09] In another embodiment, the invention encompasses an N-polar Ill-nitride semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation, an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer and a cap layer deposited on the channel layer.
[10] In another embodiment, the invention encompasses an N-polar HEMT made using either of the embodiments above.
[11] In yet another embodiment, the invention encompasses a method of making a semiconductor device having a substrate, a barrier layer deposited on the side of the substrate that causes the barrier layer to have an N-polar orientation, an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer and optionally a cap layer deposited on the channel layer.
DESCRIPTION OF THE DRAWINGS
[12] Features of example implementations of the invention will become apparent from the description, the claims, and the accompanying drawings in which:
[13] FIG. 1A is a cross-sectional view of a prior art semiconductor device profile of an N- polar HEMT with a GaN channel.
[14] FIG. IB is a band diagram of the structure of FIG. 1A.
[15] FIG. 2 A is a cross-sectional view of a semiconductor device profile of an N-polar HEMT with an InGaN channel.
[16] FIG. 2B is a band diagram of the structure of FIG. 2A.
[17] FIG. 3 A is a cross-sectional view of a semiconductor device profile of an N-polar
HEMT with an InGaN channel with a GaN cap layer.
[18] FIG. 3B is a band diagram of the structure of FIG. 3A.
[19] FIG. 4A is a specific embodiment of a semiconductor device profile of an N-polar HEMT with and InGaN channel.
[20] FIG. 4B is a photoluminescence plot of the InGaN channel of FIG. 4A. [21] FIG. 5 is a cross-sectional view of a HEMT semiconductor device having gate, source and drain terminals.
DETAILED DESCRIPTION
[22] An InGaN channel in an N-polar GaN HEMT has higher mobility, lower effective electron mass and higher electron velocity. In particular, the smaller electron-phonon coupling of InGaN reduces the hot phonon scattering effects and therefore further improves electron velocity, as compared with a GaN channel profile. As explained above, an InGaN channel in a Ga-polar HEMT has compromised material quality.
[23] A first embodiment of the present invention, an N-polar HEMT device 200 having an InGaN channel, is shown in FIG. 2A. The device 200 comprises silicon carbide (SiC) substrate 210. As an alternative, GaN, silicon, AIN, sapphire, or other suitable materials could be used as substrate 210. If sapphire or silicon is used, the device would also need to include a different nucleation layer instead of AIN to provide an N-polar surface as would be understood by one of ordinary skill in the art.
[24] The device also includes a GaN buffer layer 220. As an alternative, buffer layer 220 could be made of AlGaN or eliminated entirely. Device 200 also includes an AlGaN back barrier 230. The buffer layer 220 or the AlGaN back barrier 230 may or may not be doped with n-type dopants, such as silicon, to eliminate the hole channel in the buffer layer. AIN barrier interlayer 240 is optional depending on the application of the device. The channel layer made of InGaN is shown at 250, which forms two dimensional electron gas (2DEG) 260.
[25] The inventive epitaxial profile is designed such that all the high temperature processing, including the AlGaN and AIN barrier epitaxial growth, occurs before the InGaN channel. Thus, the high quality of the temperature-sensitive InGaN layer is preserved, enabling a higher quality InGaN channel layer and a higher mobility InGaN channel HEMT.
[26] In the 2DEG region, between the InGaN channel and AlGaN or A1N barrier, a quaternary InAlGaN layer is typically formed due to atomic inter-diffusion. This layer increases the alloy scattering and reduces the electron mobility and device performance. In this invention, an aluminum removal growth process is added to prevent the atomic inter- diffusion and maintain a sharp InGaN/AlGaN or InGaN/AIN interface. This improved growth process facilitates the improved electrical channel mobility.
[27] The parameters of the InGaN channel profile of device 200 can be chosen with a high degree of freedom, depending on device parameters and applications. In a preferred embodiment, the proportion of indium in the InGaN channel 250 ranges from 1% to 30% and the InGaN channel thickness may vary from 1 to 50 nm. The proportion of aluminum in the AlGaN back barrier 230 ranges from 20% to 100% and the AlGaN back barrier thickness may vary between 2nm and 50nm. The electron mobility of the InGaN channel HEMT 200 may be higher than 1600 cm2/Vs.
[28] For an N-polar HEMT, the InGaN channel can be grown at a much higher temperature than a GaN channel at the same level, which not only improves material quality but also avoids a growth pause near the channel growth layer. Due to the inverted structure of the N-polar HEMT, the high temperature AlGaN back barrier is grown before the InGaN channel, thus reducing the overall thermal budget of the InGaN channel and leading to high quality InGaN channel formation.
[29] FIG. 2B shows the band diagram through the structure in FIG. 2A, plotting the Fermi level Ep, conduction band energy Ec and valence band energy Ey through each layer of the device. The 2DEG is formed at the InGaN and A1N interface due to polarization and the large band offset, and the density of the 2DEG is determined by the aluminum composition in the AlGaN back barrier and the thickness of the AlGaN, A1N and InGaN layers.
[30] A second embodiment is shown in FIG. 3A. In this embodiment, an N-polar HEMT device 300 includes a substrate layer 310, GaN buffer layer 320, AlGaN barrier layer 330, A1N barrier interlayer 340, channel layer 350 and 2DEG 360 similarly to device 200 of FIG. 2A. Device 300 also includes GaN cap layer 370. This embodiment provides a double confinement for the 2DEG.
[31] Similar to device 200 of FIG 2A, device 300 includes a GaN buffer layer 320. As an alternative, buffer layer 320 could be made of AlGaN or eliminated entirely. Device 300 also includes an AlGaN back barrier layer 330. A1N barrier layer 340 is optional depending on the application of the device. The channel layer made of InGaN is shown at 350, which forms two dimensional electron gas (2DEG) 360.
[32] FIG. 3B shows the band diagram through the structure in FIG. 3A, plotting the Fermi level Ep, conduction band energy Ec and valence band energy Ey through each layer of the device 300. The 2DEG 360 is formed at the InGaN and A1N interface. Compared with a GaN channel profile, the band offset of the InGaN profile is larger and therefore provides a better electron confinement which leads to superior device quality. The density of the 2DEG 360 is determined by aluminum composition in the AlGaN back barrier 330 , the indium composition of the InGaN channel and the thickness of AlGaN, A1N and InGaN channel.
[33] Another embodiment of an N-polar HEMT device is shown in FIG 4A. In this embodiment, an N-polar HEMT device 400 includes a substrate 410, GaN buffer layer 420, AlGaN barrier layer 430, A1N barrier interlayer 440, InGaN channel layer 450, 2DEG 460, GaN cap layer 470 similarly to device 300 of FIG. 3A. Device 400 also includes GaN spacer layer 480. This embodiment provides a double confinement for the 2DEG 460 with both interfaces containing GaN. [34] Similarly to the devices 200 and 300, device 400 also includes the GaN buffer layer 420. As an alternative, buffer layer 420 could be made of AlGaN or eliminated entirely. Device 400 also includes an AlGaN barrier layer 430. A1N barrier layer 440 is optional depending on the application of the device. The channel layer made of InGaN is shown at 450, which forms two dimensional electron gas (2DEG) 460.
[35] A photoluminescence spectrum plot of the N-polar InGaN channel layer 450 is shown in FIG. 4B. From this figure, it can be seen that InGaN with up to 20% indium composition has been grown at the channel temperature which is not possible for Ga-polar, indicating the intrinsic advantage of the epitaxially grown N-polar InGaN profile.
[36] A specific embodiment of an N-polar HEMT is shown in FIG. 5. In this embodiment, device 500 includes an SiC substrate 510, a 5nm thick buffer layer 520 made of GaN doped with Si, an Alc^sGaN barrier layer 530, an A1N barrier inter layer 440, an InGaN channel layer 550, a 2DEG layer 560 and a GaN cap layer 570. Various alternatives may be used for certain layers as explained above for FIGS. 2 - 4. The device 500 is formed by means of source terminal 580, drain terminal 590 and gate terminal 585 located on the surface of GaN cap layer 570.
[37] A variety of methods can be used to create the devices of FIGS 2A, 3A, 4A and 5. These methods include molecular beam epitaxy (MBE) processes, metal organic chemical vapor deposition (MOCVD) processes, and atomic layer deposition (ALD) processes, or any suitable deposition process for nitride-based semiconductor devices.
[38] Numerous alternative implementations of the present invention exist. Specific design options can be chosen to control the electron density and device parameters. For example, numerous different channel compositions of the form InxGai_xN where x varies from 0 to 100% may be used. The thickness of the InGaN channel may also vary within a range of lnm to 50nm. The device may also include GaN heterojunction cladding at the top, bottom or both sides of the InGaN channel layer. Further variations include an optional InGaAIN back barrier and an optional AlGaN buffer.
[39] The steps or operations described herein are just for example. There may be many variations to these steps or operations without departing from the spirit of the invention. For instance, the steps may be performed in a differing order, or steps may be added, deleted, or modified.
[40] Although example implementations of the invention have been depicted and described in detail herein, it will be apparent to those skilled in the relevant art that various modifications, additions, substitutions, and the like can be made without departing from the spirit of the invention and these are therefore considered to be within the scope of the invention as defined in the following claims.

Claims

CLAIMS We claim:
1. An N-polar oriented group Ill-nitride semiconductor device, comprising; a substrate;
a barrier layer deposited on the substrate; and
an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer.
2. The device of claim 1 wherein the channel layer comprises an indium composition between approximately 1% and 30% and a thickness between approximately 1 nm and 50 nm.
3. The device of claim 1 wherein the barrier layer comprises AlGaN.
4. The device of claim 3 wherein the AlGaN barrier layer comprises an aluminum composition between approximately 20% and 100% and a thickness between approximately 2 nm and 50 nm.
5. The device of claim 1 further comprising a buffer layer of gallium nitride (GaN) or aluminum gallium nitride (AlGaN).
6. The device of claim 1 further comprising a barrier interlayer of aluminum nitride (A1N) between the barrier layer and the channel layer.
7. The device of claim 1 further comprising a cap layer of GaN deposited on the InGaN channel layer.
8. The device of claim 7 wherein the cap layer is 3nm thick.
9. An N-polar high electron mobility transistor (HEMT) comprising:
a substrate;
a barrier layer deposited on the substrate; an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer;
an N-polar cap layer deposited on the channel layer;
a source electrode deposited on top of the cap layer;
a drain electrode deposited on top of the cap layer;
a gate electrode deposited above the channel layer, between the source and drain electrodes.
10. The device of claim 9 wherein the InGaN channel layer comprises an indium composition between approximately 1% and 30% and a thickness between approximately 1 nm and 50 nm.
11. The device of claim 9 wherein the barrier layer comprises AlGaN.
12. The device of claim 1 1 wherein the AlGaN barrier layer comprises an aluminum composition between approximately 20% and 100% and a thickness between approximately 2 nm and 50 nm.
13. The device of claim 9 further comprising a buffer layer of gallium nitride (GaN) or aluminum gallium nitride (AlGaN).
14. The device of claim 13 wherein the substrate is further comprised of silicon carbide (SiC) and the buffer layer is deposited on the C-polar side of the substrate.
15. The device of claim 13 wherein the substrate is comprised of sapphire and the device further comprises a nucleation layer between the substrate and the buffer layer.
16. The device of claim 9 further comprising a barrier interlayer of aluminum nitride (A1N) between the barrier layer and the channel layer.
17. A method for fabricating an N-polar group Ill-nitride device comprising the following steps:
forming a substrate; forming a group III nitride barrier layer on the side of the substrate layer, wherein the barrier layer is selected for its bandgap properties; and
forming an N-polar InGaN channel layer on the barrier layer, wherein the channel layer has a band gap smaller than the barrier layer.
18. The method of claim 17 wherein the InGaN channel layer comprises an indium composition between approximately 1% and 30% and a thickness between approximately 1 nm and 50 nm.
19. The method of claim 17 wherein the barrier layer is comprised of AlGaN having an aluminum composition between approximately 20% and 100% and a thickness between approximately 2 nm and 50 nm.
20. The method of claim 17 further comprising the step of forming a buffer layer between the substrate and the barrier layer.
21. The method of claim 17 further comprising the step of forming a barrier interlayer of aluminum nitride (AIN) between the barrier layer and the channel layer.
22. The method of claim 17 further comprising the steps of:
forming a cap layer on the channel layer;
forming a source electrode and a drain electrode of an HEMT on the cap layer; and forming a gate electrode above the channel layer, between the source and drain electrodes.
PCT/US2013/047766 2012-08-24 2013-06-26 Ingan channel n-polar gan hemt profile WO2014031229A1 (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015191088A1 (en) * 2014-06-13 2015-12-17 Intel Corporation High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer
CN110767747A (en) * 2019-10-28 2020-02-07 北京华进创威电子有限公司 Enhanced GaN-based high electron mobility transistor material structure
CN112687738A (en) * 2020-12-24 2021-04-20 晶能光电（江西）有限公司 N-polar AlGaN/GaN HEMT device and growth method thereof
US11557668B2 (en) 2018-04-25 2023-01-17 Sumitomo Electric Device Innovations, Inc. High electron mobility transistor with reverse arrangement of channel layer and barrier layer
CN116978944A (en) * 2023-09-15 2023-10-31 江西兆驰半导体有限公司 High electron mobility transistor and preparation method thereof

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6418032B2 (en) * 2015-03-27 2018-11-07 富士通株式会社 Semiconductor device
JP7074282B2 (en) * 2018-04-25 2022-05-24 住友電工デバイス・イノベーション株式会社 High electron mobility transistor
JP7069486B2 (en) * 2018-04-25 2022-05-18 住友電工デバイス・イノベーション株式会社 High electron mobility transistor

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011003808A (en) * 2009-06-19 2011-01-06 Nec Corp Field effect transistor and method of manufacturing the same
US20110210378A1 (en) * 2009-09-30 2011-09-01 Sumitomo Electric Industries, Ltd. High electron mobility transistor, epitaxial wafer, and method of fabricating high electron mobility transistor
WO2011132284A1 (en) * 2010-04-22 2011-10-27 富士通株式会社 Semiconductor device, method for manufacturing same, and power supply device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011003808A (en) * 2009-06-19 2011-01-06 Nec Corp Field effect transistor and method of manufacturing the same
US20110210378A1 (en) * 2009-09-30 2011-09-01 Sumitomo Electric Industries, Ltd. High electron mobility transistor, epitaxial wafer, and method of fabricating high electron mobility transistor
WO2011132284A1 (en) * 2010-04-22 2011-10-27 富士通株式会社 Semiconductor device, method for manufacturing same, and power supply device
US20130077352A1 (en) * 2010-04-22 2013-03-28 Fujitsu Limited Semiconductor device and method of manufacturing the same, and power supply apparatus

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
LAWRENCE SELVARAJ S ET AL: "MOCVD grown normally-OFF type AlGaN/GaN HEMTs on 4 inch Si using p-InGaN cap layer with high breakdown", DEVICE RESEARCH CONFERENCE (DRC), 2010, IEEE, PISCATAWAY, NJ, USA, 21 June 2010 (2010-06-21), pages 135 - 136, XP031734718, ISBN: 978-1-4244-6562-0 *

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015191088A1 (en) * 2014-06-13 2015-12-17 Intel Corporation High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer
US9935191B2 (en) 2014-06-13 2018-04-03 Intel Corporation High electron mobility transistor fabrication process on reverse polarized substrate by layer transfer
US11557668B2 (en) 2018-04-25 2023-01-17 Sumitomo Electric Device Innovations, Inc. High electron mobility transistor with reverse arrangement of channel layer and barrier layer
CN110767747A (en) * 2019-10-28 2020-02-07 北京华进创威电子有限公司 Enhanced GaN-based high electron mobility transistor material structure
CN112687738A (en) * 2020-12-24 2021-04-20 晶能光电（江西）有限公司 N-polar AlGaN/GaN HEMT device and growth method thereof
CN116978944A (en) * 2023-09-15 2023-10-31 江西兆驰半导体有限公司 High electron mobility transistor and preparation method thereof
CN116978944B (en) * 2023-09-15 2023-12-01 江西兆驰半导体有限公司 High electron mobility transistor and preparation method thereof

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