TW201417278A - InGaN channel N-polar GaN HEMT profile - Google Patents

InGaN channel N-polar GaN HEMT profile Download PDF

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TW201417278A
TW201417278A TW102124013A TW102124013A TW201417278A TW 201417278 A TW201417278 A TW 201417278A TW 102124013 A TW102124013 A TW 102124013A TW 102124013 A TW102124013 A TW 102124013A TW 201417278 A TW201417278 A TW 201417278A
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channel
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Vincent Gambin
Xing Gu
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Northrop Grumman Systems Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7782Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET
    • H01L29/7783Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with confinement of carriers by at least two heterojunctions, e.g. DHHEMT, quantum well HEMT, DHMODFET using III-V semiconductor material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003Nitride compounds

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Abstract

Disclosed is an N-polar high electron mobility transistor (HEMT) device having an InGaN channel for the formation of a two dimensional electron gas (2DEG) layer. This new channel layer provides improved electron transport. It has higher electron mobility and high field velocity which enables higher frequency radio frequency (RF) performance. The device may also include a GaN cap layer deposited on top of the InGaN channel layer which provides a double confinement for the 2DEG.

Description

具有InGaN通道之N-極性GaN HEMT(高電子移動率電晶體)形廓 N-polar GaN HEMT (High Electron Mobility Transistor) profile with InGaN channels 政府權利的聲明 Statement of government rights

根據政府合約第HR0011-09-C-0132(DARPA)號,美利堅合眾國政府具有本發明之權利。 According to Government Contract No. HR0011-09-C-0132 (DARPA), the Government of the United States of America has the rights of the present invention.

本發明大體上關於高電子移動率電晶體(HEMT),更特別的是關於N-極性之以GaN為底質的HEMT。 The present invention relates generally to high electron mobility transistor (HEMT), and more particularly to N-polar GaN-based HEMT.

HEMT長久以來經常使用砷化鎵(GaAs)製造,但近來半導體氮化鎵(GaN)因其高功率、高頻率性能而在HEMT之製造中受到注意。以氮化物為底質之半導體(如GaN)的特徵之一係彼等因晶格結構中缺乏反轉對稱性以及氮原子之非常高陰電性而展現強極化作用。如此,GaN根據晶格結構之定向而呈現兩個不同面(或極性),其係稱為Ga-極性及N-極性。 HEMT has long been manufactured using gallium arsenide (GaAs), but recently semiconductor gallium nitride (GaN) has attracted attention in the manufacture of HEMT due to its high power and high frequency performance. One of the characteristics of nitride-based semiconductors (such as GaN) is that they exhibit strong polarization due to the lack of reverse symmetry in the lattice structure and the very high electrical and electrical properties of the nitrogen atoms. As such, GaN exhibits two different faces (or polarities) depending on the orientation of the lattice structure, which are referred to as Ga-polar and N-polar.

HEMT為其中通道並非藉由摻雜之通道形成而是藉由介於兩種具有不同能帶隙之材料之間的接面形成之場效電晶體(FET)類型。該接面係稱為異質接面,且由該異質接面形成之通道稱為二維電子氣(2DEG)。典型之N-極性GaN HEMT結構使用圖1A中所示之GaN通道層。N-極性GaN HEMT之能帶圖係示於圖1B。 A HEMT is a field effect transistor (FET) type in which a channel is formed not by a doped channel but by a junction between two materials having different band gaps. The junction is referred to as a heterojunction, and the channel formed by the heterojunction is referred to as a two-dimensional electron gas (2DEG). A typical N-polar GaN HEMT structure uses the GaN channel layer shown in Figure 1A. The energy band diagram of the N-polar GaN HEMT is shown in Figure 1B.

GaN HEMT之改良的性能可藉由使用InGaN通道達成。使用InGaN通道,可因InGaN合金的固有優點而改良裝置性能。此包括提供較高電子速度之較低電子有效質量,及提供改良的載子侷限之較大能帶偏移至阻障。然而,就Ga-極性HEMT而言,通常生長品質受損之InGaN通道。InGaN之低生長溫度不只降低材料品質,亦需要對於裝置品質有負面影響之不想要的生長暫停。此狀態因接下來的較高溫AlGaN阻障生長而惡化,該較高溫AlGaN阻障生長使InGaN通道層過熱而增加相分離、原子擴散及進一步使該InGaN層品質劣化。 The improved performance of GaN HEMTs can be achieved by using InGaN channels. Using InGaN channels, device performance can be improved due to the inherent advantages of InGaN alloys. This includes lower electronically effective masses that provide higher electron velocities, and larger energy band offsets to barriers that provide improved carrier limitations. However, in the case of a Ga-polar HEMT, an InGaN channel of which quality is generally damaged is grown. The low growth temperature of InGaN not only reduces material quality, but also unwanted growth pauses that negatively impact device quality. This state is exacerbated by the subsequent higher temperature AlGaN barrier growth, which overheats the InGaN channel layer to increase phase separation, atomic diffusion, and further degrade the quality of the InGaN layer.

因此,存在對於具有改良的層形廓之InGaN通道的GaN HEMT以及完全開發該InGaN合金之固有優點的磊晶生長技術之需求。 Therefore, there is a need for a GaN HEMT having an improved layer profile of InGaN channels and an epitaxial growth technique that fully exploits the inherent advantages of the InGaN alloy.

本發明之一實施方式包括具有InGaN通道之N-極性HEMT裝置。此新穎的通道層提供改良的電子傳輸。其具有較高電子移動率及高場速度,此使得能獲得更 高頻率的射頻(RF)性能。 One embodiment of the invention includes an N-polar HEMT device having an InGaN channel. This novel channel layer provides improved electron transport. It has a high electron mobility and a high field speed, which makes it possible to obtain more High frequency radio frequency (RF) performance.

在一具體實例中,本發明包括N-極性第III族氮化物半導體裝置,其具有基板,沉積在該基板之使阻障層具有N-極性定向的一側上之阻障層,及沉積在該阻障層上的氮化銦鎵(InGaN)之N-極性通道層。該裝置亦具有介於該基板與該阻障層之間的緩衝層。 In one embodiment, the invention includes an N-polar Group III nitride semiconductor device having a substrate deposited on a barrier layer of the substrate on a side of the barrier layer having an N-polar orientation, and deposited on An N-polar channel layer of indium gallium nitride (InGaN) on the barrier layer. The device also has a buffer layer between the substrate and the barrier layer.

在另一具體實例中,本發明包括N-極性第III族氮化物半導體裝置,其具有基板,沉積在該基板之使阻障層具有N-極性定向的一側上之阻障層,及沉積在該阻障層上的氮化銦鎵(InGaN)之N-極性通道層,及沉積在該通道層上之頂蓋層。 In another embodiment, the invention includes an N-polar Group III nitride semiconductor device having a substrate deposited on a barrier layer of the substrate on a side of the barrier layer having an N-polar orientation, and deposition An N-polar channel layer of indium gallium nitride (InGaN) on the barrier layer, and a cap layer deposited on the channel layer.

在另一具體實例中,本發明包括使用上述任一具體實例所製成之N-極性HEMT。 In another embodiment, the invention includes an N-polar HEMT made using any of the above specific examples.

在又另一具體實例中,本發明包括製造具有基板,沉積該基板之使阻障層具有N-極性定向的一側上之阻障層,及沉積在該阻障層上的氮化銦鎵(InGaN)之N-極性通道層,及隨意地沉積在該通道層上之頂蓋層的半導體裝置之方法。 In yet another embodiment, the invention includes fabricating a barrier layer having a substrate on which a barrier layer has an N-polar orientation, and an indium gallium nitride deposited on the barrier layer A method of an N-polar channel layer of (InGaN) and a semiconductor device of a cap layer randomly deposited on the channel layer.

200/300/400‧‧‧N-極性HEMT裝置 200/300/400‧‧‧N-polar HEMT device

210/310/410/510‧‧‧碳化矽(SiC)基板 210/310/410/510‧‧‧Carbide (SiC) substrate

220/320/420/520‧‧‧GaN緩衝層 220/320/420/520‧‧‧GaN buffer layer

230‧‧‧AlGaN背阻障 230‧‧‧AlGaN back barrier

240/340/440/540‧‧‧AlN阻障中間層 240/340/440/540‧‧‧AlN barrier intermediate layer

250/350/450/550‧‧‧InGaN通道層 250/350/450/550‧‧‧InGaN channel layer

260/360/460/560‧‧‧二維電子氣(2DEG) 260/360/460/560‧‧‧Two-dimensional electronic gas (2DEG)

330/430‧‧‧AlGaN阻障層 330/430‧‧‧AlGaN barrier layer

370/470/570‧‧‧GaN頂蓋層 370/470/570‧‧‧GaN cap layer

480‧‧‧GaN間隔層 480‧‧‧GaN spacer

500‧‧‧裝置 500‧‧‧ device

530‧‧‧Al0.45GaN阻障層 530‧‧‧Al 0.45 GaN barrier layer

580‧‧‧源極端子 580‧‧‧ source terminal

590‧‧‧汲極端子 590‧‧‧汲 Extreme

585‧‧‧閘極端子 585‧‧ ‧ gate terminal

從說明、申請專利範圍及圖式使本發明實例實施的特徵變得更明顯,該等圖式中:圖1A為具有GaN通道之N-極性HEMT的先前技術半導體形廓之橫斷面圖。 Features of the examples of the present invention are more apparent from the description, claims, and drawings in which: FIG. 1A is a cross-sectional view of a prior art semiconductor profile of an N-polar HEMT having a GaN channel.

圖1B為圖1A之結構的能帶圖。 Figure 1B is an energy band diagram of the structure of Figure 1A.

圖2A為具有InGaN通道之N-極性HEMT的半導體形廓之橫斷面圖。 2A is a cross-sectional view of a semiconductor profile of an N-polar HEMT having an InGaN channel.

圖2B為圖2A之結構的能帶圖。 2B is an energy band diagram of the structure of FIG. 2A.

圖3A為具有GaN頂蓋層的具有InGaN通道之N-極性HEMT的半導體形廓之橫斷面圖。 3A is a cross-sectional view of a semiconductor profile of an N-polar HEMT having an InGaN channel with a GaN cap layer.

圖3B為圖3A之結構的能帶圖。 Figure 3B is an energy band diagram of the structure of Figure 3A.

圖4A為具有InGaN通道之N-極性HEMT的半導體形廓之特定具體實例。 4A is a specific embodiment of a semiconductor profile of an N-polar HEMT having an InGaN channel.

圖4B為圖4A之InGaN通道的光致發光圖。 4B is a photoluminescence diagram of the InGaN channel of FIG. 4A.

圖5為具有閘極、源極及汲極端子之HEMT半導體裝置的橫斷面圖。 Figure 5 is a cross-sectional view of a HEMT semiconductor device having gate, source and drain terminals.

在N-極性GaN HEMT中之InGaN通道具有較高移動率、較低有效電子質量及較高電子速度。特別是,InGaN之較小電子-聲子偶合減少熱聲子散射效果,因此相較於GaN通道形廓,進一步改良電子速度。如前文解釋,Ga-極性HEMT中之InGaN通道具有受損之材料品質。 InGaN channels in N-polar GaN HEMTs have higher mobility, lower effective electron mass, and higher electron velocity. In particular, the smaller electron-phonon coupling of InGaN reduces the thermal phonon scattering effect, thus further improving the electron velocity compared to the GaN channel profile. As explained above, the InGaN channel in the Ga-polar HEMT has a damaged material quality.

本發明之第一具體實例中,具有InGaN通道之N-極性HEMT裝置200係示於圖2A。裝置200包含碳化矽(SiC)基板210。可使用GaN、矽、AlN、藍寶石或其他適用材料作為基板210的替代品。若使用藍寶石或 矽,如熟悉本技術之人士所暸解,裝置亦需要包括代替AlN之不同成核層以提供N-極性表面。 In a first embodiment of the invention, an N-polar HEMT device 200 having an InGaN channel is shown in Figure 2A. Device 200 includes a tantalum carbide (SiC) substrate 210. GaN, germanium, AlN, sapphire or other suitable materials may be used as an alternative to the substrate 210. If using sapphire or As is known to those skilled in the art, the device also needs to include a different nucleation layer in place of AlN to provide an N-polar surface.

該裝置亦包括GaN緩衝層220。或者可使用由AlGaN所製成之緩衝層220或完全予以消除。裝置200亦包括AlGaN背阻障230。該緩衝層220或AlGaN背阻障230可摻雜或可不摻雜n型摻雜劑(諸如矽)以消除該緩衝層中之電洞通道。視裝置之應用而隨意存在有AlN阻障中間層240。由InGaN所製成之通道層係顯示於250,其形成二維電子氣(2DEG)260。 The device also includes a GaN buffer layer 220. Alternatively, the buffer layer 220 made of AlGaN may be used or completely eliminated. Device 200 also includes an AlGaN back barrier 230. The buffer layer 220 or the AlGaN back barrier 230 may or may not be doped with an n-type dopant such as germanium to eliminate hole channels in the buffer layer. The AlN barrier intermediate layer 240 is optionally present depending on the application of the device. A channel layer made of InGaN is shown at 250, which forms a two-dimensional electron gas (2DEG) 260.

本發明之磊晶形廓係設計成使所有高溫處理(包括AlGaN及AlN阻障磊晶生長)係在InGaN通道之前發生。如此,保有溫度敏感性的InGaN層之高品質,使得能獲得較高品質的InGaN通道層及較高移動率之InGaN通道的HEMT。 The epitaxial profile of the present invention is designed such that all high temperature processing (including AlGaN and AlN barrier epitaxial growth) occurs before the InGaN channel. Thus, the high quality of the temperature-sensitive InGaN layer enables a higher quality InGaN channel layer and a higher mobility InGaN channel HEMT.

在2DEG區中,在介於InGaN通道與AlGaN或AlN阻障之間,通常因原子相互擴散而形成四元InAlGaN層。該層增加該合金之散射及降低電子移動率及裝置性能。本發明中,增加鋁移除生長程序以防止原子相互擴散及維持輪廓分明的InGaN/AlGaN或InGaN/AlN界面。該改良的生長程序促進改良的電通道移動率。 In the 2DEG region, between the InGaN channel and the AlGaN or AlN barrier, a quaternary InAlGaN layer is usually formed by interdiffusion of atoms. This layer increases the scattering of the alloy and reduces electron mobility and device performance. In the present invention, an aluminum removal growth procedure is added to prevent interdiffusion of atoms and maintain a well-defined InGaN/AlGaN or InGaN/AlN interface. This improved growth procedure promotes improved electrical channel mobility.

裝置200之InGaN通道形廓的參數可高度自由地選擇,視裝置參數及應用而定。在較佳具體實例中,InGaN通道250中之銦的比例範圍從1%至30%,且該InGaN通道厚度可從1至50nm。AlGaN背阻障230中之 鋁的比例範圍從20%至100%,且該AlGaN背阻障厚度可在2nm與50nm之間。InGaN通道HEMT200之電子移動率可高於1600cm2/Vs。 The parameters of the InGaN channel profile of device 200 are highly selectable, depending on device parameters and application. In a preferred embodiment, the ratio of indium in the InGaN channel 250 ranges from 1% to 30%, and the thickness of the InGaN channel can range from 1 to 50 nm. The proportion of aluminum in the AlGaN back barrier 230 ranges from 20% to 100%, and the thickness of the AlGaN back barrier can be between 2 nm and 50 nm. The electron mobility of the InGaN channel HEMT 200 can be higher than 1600 cm 2 /Vs.

就N-極性HEMT而言,InGaN通道可在遠高於同層之GaN通道的溫度下生長,其不只改良材料品質,亦避免接近該通道生長層之生長暫停。因N-極性HEMT之倒置結構之故,高溫AlGaN背阻障係在InGaN通道之前生長,如此減少該InGaN通道的整體熱積存(thermal budget),並且導致形成高品質InGaN通道。 In the case of N-polar HEMTs, InGaN channels can be grown at temperatures well above the GaN channels of the same layer, which not only improves material quality, but also avoids growth pauses near the growth layer of the channel. Due to the inverted structure of the N-polar HEMT, the high temperature AlGaN back barrier is grown before the InGaN channel, thus reducing the overall thermal budget of the InGaN channel and resulting in the formation of high quality InGaN channels.

圖2B顯示通過圖2A中之結構的能帶圖,其繪製通過該裝置每一層之費米能階EF、傳導帶能EC及價帶能EV。2DEG係因極化及大能帶偏移而在InGaN與AlN之界面形成,且該2DEG之密度係由AlGaN背阻障中之鋁組成以及該AlGaN、AlN及InGaN層的厚度決定。 2B shows an energy band diagram through the structure of FIG. 2A, which plots the Fermi level E F , the conduction band energy E C , and the valence band energy E V through each layer of the device. The 2DEG is formed at the interface between InGaN and AlN due to polarization and large band offset, and the density of the 2DEG is determined by the aluminum composition in the AlGaN back barrier and the thickness of the AlGaN, AlN, and InGaN layers.

第二具體實例係示於圖3A。在該具體實例中,類似圖2A之裝置200,N-極性HEMT裝置300包括基板層310、GaN緩衝層320、AlGaN阻障層330、AlN阻障中間層340、通道層350及2DEG 360。裝置300亦包括GaN頂蓋層370。此具體實例提供2DEG之雙重侷限。 A second specific example is shown in Figure 3A. In this particular example, similar to the apparatus 200 of FIG. 2A, the N-polar HEMT device 300 includes a substrate layer 310, a GaN buffer layer 320, an AlGaN barrier layer 330, an AlN barrier intermediate layer 340, a channel layer 350, and a 2DEG 360. Device 300 also includes a GaN cap layer 370. This specific example provides the dual limitations of 2DEG.

類似圖2A之裝置200,裝置300包括GaN緩衝層320。或者,可使用由AlGaN所製成之緩衝層320或完全予以消除。裝置300亦包括AlGaN背阻障層330。視裝置之應用而隨意存在AlN阻障層340。由InGaN所製成 之通道層係顯示於350,其形成二維電子氣(2DEG)360。 Like device 200 of FIG. 2A, device 300 includes a GaN buffer layer 320. Alternatively, a buffer layer 320 made of AlGaN may be used or completely eliminated. Device 300 also includes an AlGaN back barrier layer 330. The AlN barrier layer 340 is optionally present depending on the application of the device. Made of InGaN The channel layer is shown at 350, which forms a two-dimensional electron gas (2DEG) 360.

圖3B顯示通過圖3A中之結構的能帶圖,其繪製通過該裝置300每一層之費米能階EF、傳導帶能EC及價帶能EV。2DEG 360係在InGaN與AlN之界面形成。與GaN通道形廓相較,InGaN形廓的能帶偏移較大,因此提供更佳之電子侷限,此導致較優之裝置品質。2DEG 360之密度係由AlGaN背阻障330中之鋁組成、InGaN之銦組成以及AlGaN、AlN及InGaN通道的厚度決定。 3B shows an energy band diagram through the structure of FIG. 3A, which plots the Fermi level E F , the conduction band energy E C , and the valence band energy E V through each layer of the device 300. 2DEG 360 is formed at the interface between InGaN and AlN. Compared to the GaN channel profile, the InGaN profile has a larger energy band offset, thus providing better electronic limitations, which results in superior device quality. The density of 2DEG 360 is determined by the aluminum composition of the AlGaN back barrier 330, the indium composition of InGaN, and the thickness of the AlGaN, AlN, and InGaN channels.

N-極性HEMT裝置之另一具體實例係示於圖4A。在該具體實例中,類似圖3A之裝置300,N-極性HEMT裝置400包括基板410、GaN緩衝層420、AlGaN阻障層430、AlN阻障中間層440、InGaN通道層450、2DEG 460、GaN頂蓋層470。裝置400亦包括GaN間隔層480。該具體實例在含有GaN的兩個界面提供2DEG 460的雙重侷限。 Another specific example of an N-polar HEMT device is shown in Figure 4A. In this specific example, similar to the device 300 of FIG. 3A, the N-polar HEMT device 400 includes a substrate 410, a GaN buffer layer 420, an AlGaN barrier layer 430, an AlN barrier intermediate layer 440, an InGaN channel layer 450, 2DEG 460, GaN. Cover layer 470. Device 400 also includes a GaN spacer layer 480. This particular example provides a dual limitation of 2DEG 460 at both interfaces containing GaN.

類似裝置200及300,裝置400亦包括GaN緩衝層420。或者,可使用由AlGaN所製成之緩衝層420或完全予以消除。裝置400亦包括AlGaN阻障層430。視裝置之應用而隨意存在AlN阻障層440。由InGaN所製成之通道層係顯示於450,其形成二維電子氣(2DEG)460。 Similar to devices 200 and 300, device 400 also includes a GaN buffer layer 420. Alternatively, a buffer layer 420 made of AlGaN may be used or completely eliminated. Device 400 also includes an AlGaN barrier layer 430. The AlN barrier layer 440 is optionally present depending on the application of the device. A channel layer made of InGaN is shown at 450, which forms a two-dimensional electron gas (2DEG) 460.

N-極性InGaN通道層450之光致發光光譜圖係示於圖4B。從該圖可看出,具有至高達20%銦組成的 InGaN在對Ga-極性而言不可能的通道溫度生長,表示磊晶生長之N-極性InGaN形廓的固有優點。 The photoluminescence spectrum of the N-polar InGaN channel layer 450 is shown in Fig. 4B. As can be seen from the figure, it has a composition of up to 20% indium. InGaN grows at a channel temperature that is not possible for Ga-polarity, indicating the inherent advantages of epitaxially grown N-polar InGaN profiles.

N-極性HEMT之明確具體實例係示於圖5。在該具體實例中,裝置500包括SiC基板510、5nm厚之由摻雜Si的GaN所製成的緩衝層520、Al0.45GaN阻障層530、AlN阻障中間層540、InGaN通道層550及2DEG層560及GaN頂蓋層570。如前文圖2至4所解釋,可針對特定層使用各種不同替代品。裝置500係利用位在GaN頂蓋層570之表面上的源極端子580、汲極端子590及閘極端子585形成。 A clear specific example of the N-polar HEMT is shown in FIG. In this specific example, the device 500 includes a SiC substrate 510, a buffer layer 520 made of 5 nm thick GaN doped with GaN, an Al 0.45 GaN barrier layer 530, an AlN barrier intermediate layer 540, an InGaN channel layer 550, and 2DEG layer 560 and GaN cap layer 570. As explained in Figures 2 through 4 above, a variety of different alternatives can be used for a particular layer. Device 500 is formed using source terminal 580, gate terminal 590, and gate terminal 585 located on the surface of GaN cap layer 570.

可使用各式各樣方法產生圖2A、3A、4A及5之裝置。該等方法包括分子束磊晶(MBE)法、金屬有機化學氣相沉積(MOCVD)法及原子層沉積(ALD)法,或任何適用於以氮化物為底質之半導體裝置的沉積法。 The apparatus of Figures 2A, 3A, 4A and 5 can be produced using a wide variety of methods. These methods include molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MOCVD), and atomic layer deposition (ALD), or any deposition method suitable for nitride-based semiconductor devices.

存在眾多本發明之替代實施方法。可選擇特定設計選項以控制電子密度及裝置參數。例如,可使用InxGa1-xN形式(其中x從0至100%)之眾多不同通道組成。該InGaN通道之厚度亦可在1nm至50nm之範圍內變化。該裝置亦包括在該InGaN通道層之頂部、底部或兩側的GaN異質接面覆層。其他變化包括隨意的InGaAlN背阻障層及隨意的AlGaN緩衝層。 There are numerous alternative implementations of the invention. Specific design options can be selected to control electron density and device parameters. For example, a number of different channels of the In x Ga 1-x N form (where x is from 0 to 100%) can be used. The thickness of the InGaN channel can also vary from 1 nm to 50 nm. The device also includes a GaN heterojunction coating on top, bottom or both sides of the InGaN channel layer. Other variations include a random InGaAlN back barrier layer and a random AlGaN buffer layer.

本文所述之步驟或操作僅為舉例。在不違背本發明之精神的情況下,該等步驟及操作有許多變化。例如,該等步驟可以不同順序進行,或可添加、刪除或修改 步驟。 The steps or operations described herein are merely examples. There are many variations in the steps and operations without departing from the spirit of the invention. For example, the steps can be performed in a different order, or can be added, deleted, or modified. step.

雖然本文已詳細描述及說明本發明之實例實施,但對於熟悉相關技術之人士而言很明顯地可在不違背本發明精神的情況下可製造各種修改、添加、替代等,因此該等修改、添加、替代被視為在如以下主張權項中所界定的發明範圍內。 Although the example implementation of the present invention has been described and illustrated in detail, it will be apparent to those skilled in the art that various modifications, additions, substitutions and the like can be made without departing from the spirit of the invention. Additions, substitutions are considered to be within the scope of the invention as defined in the following claims.

200‧‧‧N-極性HEMT裝置 200‧‧‧N-polar HEMT device

210‧‧‧碳化矽(SiC)基板 210‧‧‧Carbide (SiC) substrate

220‧‧‧GaN緩衝層 220‧‧‧GaN buffer layer

230‧‧‧AlGaN背阻障 230‧‧‧AlGaN back barrier

240‧‧‧AlN阻障中間層 240‧‧‧AlN barrier intermediate layer

250‧‧‧InGaN通道層 250‧‧‧InGaN channel layer

260‧‧‧二維電子氣(2DEG) 260‧‧‧Two-dimensional electronic gas (2DEG)

Claims (22)

一種N-極性定向的第III族氮化物半導體裝置,其包含:基板;沉積在該基板上之阻障層;及沉積在該阻障層上之氮化銦鎵(InGaN)的N-極性通道層。 An N-polar oriented Group III nitride semiconductor device comprising: a substrate; a barrier layer deposited on the substrate; and an N-polar channel of indium gallium nitride (InGaN) deposited on the barrier layer Floor. 如申請專利範圍第1項之裝置,其中該通道層包含介於約1%與30%之間的銦組成及介於約1nm與50nm之間的厚度。 The device of claim 1, wherein the channel layer comprises between about 1% and 30% indium composition and a thickness between about 1 nm and 50 nm. 如申請專利範圍第1項之裝置,其中該阻障層包含AlGaN。 The device of claim 1, wherein the barrier layer comprises AlGaN. 如申請專利範圍第3項之裝置,其中該AlGaN阻障層包含介於約20%與100%之間的鋁組成及介於約2nm與50nm之間的厚度。 The device of claim 3, wherein the AlGaN barrier layer comprises between about 20% and 100% aluminum composition and a thickness between about 2 nm and 50 nm. 如申請專利範圍第1項之裝置,其另外包含氮化鎵(GaN)或氮化鋁鎵(AlGaN)之緩衝層。 The device of claim 1, further comprising a buffer layer of gallium nitride (GaN) or aluminum gallium nitride (AlGaN). 如申請專利範圍第1項之裝置,其另外包含介於該阻障層與該通道層之間的氮化鋁(AlN)之阻障中間層。 The device of claim 1, further comprising a barrier intermediate layer of aluminum nitride (AlN) interposed between the barrier layer and the channel layer. 如申請專利範圍第1項之裝置,其另外包含沉積在該InGaN通道層上之GaN的頂蓋層。 The device of claim 1, further comprising a cap layer of GaN deposited on the InGaN channel layer. 如申請專利範圍第7項之裝置,其中該頂蓋層為3nm厚。 The device of claim 7, wherein the cap layer is 3 nm thick. 一種N-極性高電子移動率電晶體(HEMT),其包 含:基板;沉積在該基板上之阻障層;沉積在該阻障層上之氮化銦鎵(InGaN)的N-極性通道層;沉積在該通道層上之N-極性頂蓋層;沉積在該頂蓋層頂部上之源極;沉積在該頂蓋層頂部上之汲極;沉積在該通道層上方且介於該源極與汲極之間的閘極。 An N-polar high electron mobility transistor (HEMT) package And comprising: a substrate; a barrier layer deposited on the substrate; an N-polar channel layer of indium gallium nitride (InGaN) deposited on the barrier layer; and an N-polar cap layer deposited on the channel layer; a source deposited on top of the cap layer; a drain deposited on top of the cap layer; a gate deposited above the channel layer and interposed between the source and the drain. 如申請專利範圍第9項之裝置,其中該InGaN通道層包含介於約1%與30%之間的銦組成及介於約1nm與50nm之間的厚度。 The device of claim 9, wherein the InGaN channel layer comprises between about 1% and 30% indium composition and a thickness between about 1 nm and 50 nm. 如申請專利範圍第9項之裝置,其中該阻障層包含AlGaN。 The device of claim 9, wherein the barrier layer comprises AlGaN. 如申請專利範圍第11項之裝置,其中該AlGaN阻障層包含介於約20%與100%之間的鋁組成及介於約2nm與50nm之間的厚度。 The device of claim 11, wherein the AlGaN barrier layer comprises between about 20% and 100% aluminum composition and a thickness between about 2 nm and 50 nm. 如申請專利範圍第9項之裝置,其另外包含氮化鎵(GaN)或氮化鋁鎵(AlGaN)之緩衝層。 The device of claim 9, which additionally comprises a buffer layer of gallium nitride (GaN) or aluminum gallium nitride (AlGaN). 如申請專利範圍第13項之裝置,其中該基板另外由碳化矽(SiC)所組成,且該緩衝層係沉積在該基板的C-極性側上。 The device of claim 13, wherein the substrate is additionally composed of tantalum carbide (SiC), and the buffer layer is deposited on the C-polar side of the substrate. 如申請專利範圍第13項之裝置,其中該基板由藍 寶石所組成,且該裝置在該基板與該緩衝層之間另外包含成核層。 The device of claim 13, wherein the substrate is blue A gemstone is formed, and the device additionally includes a nucleation layer between the substrate and the buffer layer. 如申請專利範圍第9項之裝置,其另外包含介於該阻障層與該通道層之間的氮化鋁(AlN)之阻障中間層。 The device of claim 9, further comprising a barrier intermediate layer of aluminum nitride (AlN) interposed between the barrier layer and the channel layer. 一種製造N-極性的第III族氮化物裝置之方法,其包括以下步驟:形成基板;在該基板層之側上形成第III族氮化物阻障層,其中該阻障層係針對其能帶隙性質而選擇;及在該阻障層上形成N-極性InGaN通道層,其中該通道層具有小於該阻障層之能帶隙。 A method of fabricating an N-polar Group III nitride device, comprising the steps of: forming a substrate; forming a Group III nitride barrier layer on a side of the substrate layer, wherein the barrier layer is directed to an energy band thereof Selecting a gap property; and forming an N-polar InGaN channel layer on the barrier layer, wherein the channel layer has an energy band gap smaller than the barrier layer. 如申請專利範圍第17項之方法,其中該InGaN通道層包含介於約1%與30%之間的銦組成及介於約1nm與50nm之間的厚度。 The method of claim 17, wherein the InGaN channel layer comprises between about 1% and 30% indium composition and a thickness between about 1 nm and 50 nm. 如申請專利範圍第17項之方法,其中該阻障層係由具有介於約20%與100%之間的鋁組成之AlGaN所組成,且其厚度介於約2nm與50nm之間。 The method of claim 17, wherein the barrier layer is composed of AlGaN having an aluminum composition of between about 20% and 100%, and has a thickness of between about 2 nm and 50 nm. 如申請專利範圍第17項之方法,其另外包括在該基板與該阻障層之間形成緩衝層的步驟。 The method of claim 17, further comprising the step of forming a buffer layer between the substrate and the barrier layer. 如申請專利範圍第17項之方法,其另外包括在介於該阻障層與該通道層之間形成氮化鋁(AlN)之阻障中間層的步驟。 The method of claim 17, further comprising the step of forming a barrier intermediate layer of aluminum nitride (AlN) between the barrier layer and the channel layer. 如申請專利範圍第17項之方法,其另外包括以下 步驟:在該通道層上形成頂蓋層;在該頂蓋層上形成HEMT之源極及汲極;及在該通道層上方且介於該源極與汲極之間形成閘極。 For example, the method of claim 17 of the patent scope additionally includes the following Step: forming a cap layer on the channel layer; forming a source and a drain of the HEMT on the cap layer; and forming a gate above the channel layer and between the source and the drain.
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