JP2004260114A - Compound semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a compound semiconductor which makes a leakage current in a gate electrode hard to be generated without spoiling element characteristics particular to a GaN compound. <P>SOLUTION: An electron supply layer 110 of a HEMT1 is composed of Al<SB>x</SB>Ga<SB>1-x</SB>N, and a channel layer 119 is composed of GaN. The surface of the electron supply layer 110 on the gate electrode side is covered with a cap layer 112 composed of Al<SB>y</SB>Ga<SB>1-y</SB>N (y>x), and the gate electrode 108 is formed on the cap layer 112. <P>COPYRIGHT: (C)2004,JPO&NCIPI

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a compound semiconductor device, and more particularly to a compound semiconductor device applied to a high-speed field effect transistor using a semiconductor heterojunction.
[0002]
[Prior art]
[Patent Document 1]
JP, 2002-57158, A
2. Description of the Related Art In recent years, HEMT (High Electron Mobility Transistor) is a high-speed semiconductor device that has been widely used for high frequency use. HEMT is a kind of MES-FET (Metal-Semiconductor Field Effect Transistor), and a device using a GaAs / AlGaAs heterojunction has been put to practical use. Due to its excellent microwave and millimeter wave characteristics, it is widely used as a low-noise and high-speed FET for satellite broadcast receivers and the like. The main part thereof is, specifically, a semiconductor multi-layer structure in which a non-doped GaAs channel layer (i-GaAs layer) is heterojuncted with an n-type doped AlGaAs electron supply layer. Since GaAs has a higher electronegativity than AlGaAs, some of the electrons flow from the n-type AlGaAs electron supply layer into the i-GaAs channel layer, and an inverted triangular potential is closer to the i-GaAs channel layer than the heterojunction interface. A well is formed. In this potential well, electrons are confined in a form spatially separated from donor impurities to form a two-dimensional electron gas (hereinafter, referred to as “2DEG”) layer that is hardly affected by impurity scattering. . As a result, electrons in the i-GaAs channel layer exhibit extremely high electron mobility along the heterojunction interface, and a high-speed field-effect transistor can be realized.
[0004]
On the other hand, in recent years, a HEMT using a GaN-based compound instead of a GaAs-based compound (hereinafter referred to as a GaN-based HEMT) has attracted attention as a next-generation high-speed FET. Since GaN-based compounds have a wide band gap and high saturation electron mobility estimated from the effective electron mass, there is a possibility of realizing a high-frequency device that can operate at higher temperature with higher output voltage and higher voltage. (For example, Patent Document 1). The gate electrode of the GaN-based HEMT is formed as a Schottky barrier electrode, similarly to the GaAs-based HEMT. For example, the barrier height Vhi of the Schottky junction shown in FIG. 2 changes according to the polarity or voltage level of the voltage applied to the gate electrode, and the depletion layer region around the gate electrode expands according to the barrier height Vhi. Can be changed to control the current between the source and the drain.
[0005]
[Problems to be solved by the invention]
However, the GaN-based HEMT has a problem in that current leakage is likely to occur in the gate electrode. It is an object of the present invention to provide a compound semiconductor device in which current leakage at a gate electrode is less likely to occur without impairing device characteristics unique to a GaN-based compound.
[0006]
[Means for Solving the Problems and Functions / Effects]
In order to solve the above-mentioned problems, a compound semiconductor device of the present invention includes an electron supply layer made of a nitride of a group III element containing Ga as an essential component, a channel layer receiving supply of electrons from the electron supply layer, A gate electrode comprising a Schottky electrode on the supply layer,
The electron supply layer is made of _Al x _{Ga 1-x} N, In addition, the channel layer is made of nitride of high Group III element of GaN mixed crystal ratio than the electron supply layer, and further,
The electron supply layer, positions of the side surface of the gate _{electrode, Al y Ga 1-y N} ( However, y> x) becomes covered with a cap layer made of a gate electrode is formed on the cap layer It is characterized by becoming.
[0007]
By employing the above-described structure, it is possible to realize a compound semiconductor device in which current leakage hardly occurs in the gate electrode while sufficiently taking out device characteristics unique to the GaN-based compound.
[0008]
Al x _Ga 1-x _N, the higher AlN mixed crystal ratio x increases, the greater the band gap energy Eg as shown in FIG. 2, this barrier height Vhi formed at the interface between the bonded Schottky electrode also Get higher. Therefore, _if the AlN mixed crystal ratio x of Al _x Ga ₁ -xN to which the Schottky electrode is joined is made sufficiently high, the withstand voltage of the gate electrode can be improved and the current leakage can be effectively suppressed. I do. When the electron supply layer is formed of Al _x Ga _1-x N, increasing the AlN mixed crystal ratio x to a certain value or more increases the triangular potential on the channel layer side to enhance the electron confinement effect, and thus the formation. It is also important to increase the electron density of the 2DEG layer to increase the output of the device.
[0009]
Moreover, the current leakage suppression in gate, the cap layer is a gate contact layer, it is desirable that the crystal defects become a direct cause of current leakage is not possible form, the cap layer Al _y Ga _{1- The} configuration with _yN may be advantageous in this respect as well. That is, according to recent research, when synthesizing a GaN-based compound, N vacancies are likely to be formed in the surface layer of the compound, and the formation of dangling bond levels and the like caused by the N vacancies causes current leakage. It is speculated that this is the main cause. To configure the cap layer in the present invention is relatively high _Al y _{Ga 1-y} N in AlN mole fraction y, since the _Al y _{Ga 1-y} N is high equilibrium vapor pressure, vapor Decomposition hardly occurs even during growth. Therefore, it is conceivable that N vacancies, which are presumed to be the cause of current leakage, are less likely to occur in the junction region of the gate electrode, which advantageously works to suppress current leakage.
[0010]
Here, when the AlN mixed crystal ratio x of the electron supply layer is increased, an important effect contributing to an increase in the triangular potential depth is a piezo polarization effect due to a lattice matching strain between the electron supply layer and the channel layer. Since the lattice constant of Al x _Ga 1-x _N by increasing the AlN mixed crystal ratio x is reduced, enlarged lattice constant difference between the high channel layer of GaN mixed crystal ratio between the channel layer is lattice matched The elastic stress field due to the strain and the resulting piezo polarization effect also appear greatly. However, when the AlN mixed crystal ratio x is excessively high, the lattice constant difference from the channel layer becomes too large, and misfit dislocations are introduced to cause lattice relaxation. In such a state, the piezo polarization effect is sharply reduced, and triangular potential is not significantly formed, so that a high-output device cannot be obtained.
[0011]
Therefore, when the gate electrode is formed in the electron supply layer, if the AlN mixed crystal ratio x of the entire electron supply layer is excessively increased while giving priority to an increase in the barrier height, the above-described lattice relaxation occurs and triangular potential is formed. It leads to insufficiency. Therefore, in the present invention, the AlN mixed crystal ratio x of the electron supply layer is kept appropriately low so as not to cause lattice relaxation between the electron supply layer and the channel layer, and the surface side on which the gate electrode is formed is made of AlN mixed crystal. covered with a cap layer made of a high specific _{y Al y Ga 1-y N} , it is desirable to form a gate electrode on the capping layer. As a result, the piezo effect between the electron supply layer and the channel layer is sufficiently increased, and a deep triangular potential essential for a high-power element can be formed.
[0012]
The cap layer can form the AlN mixed crystal ratio y constant in the layer thickness direction. Such a cap layer has an advantage that it can be easily formed. On the other hand, the cap layer may be formed such that the AlN mixed crystal ratio y decreases in the layer thickness direction as it approaches the electron supply layer. According to this aspect, since the lattice constant does not change rapidly between the cap layer and the electron supply layer, lattice relaxation between the electron supply layer and the electron supply layer is less likely to occur, and the introduction of misfit dislocations and the like is suppressed. . Further, the AlN mixed crystal ratio y can be set higher on the gate electrode formation side. As a result, it is possible to increase the barrier height while suppressing the introduction of misfit dislocations and the like due to lattice relaxation, so that it is possible to more effectively improve the gate breakdown voltage and suppress current leakage.
[0013]
The cap layer includes a first layer having an AlN mixed crystal ratio y set to a first value y1 and a second layer having an AlN mixed crystal ratio y set to a second value y2 different from the first value. May be configured to have a structure in which are alternately stacked. According to this structure, the gate withstand voltage characteristic is improved by the potential barrier effect formed between the first layer and the second layer, and current leakage can be further reduced. In particular, if the first layer having a high AlN mixed crystal ratio y is arranged in contact with the gate electrode and the AlN mixed crystal ratio y of the second layer is set lower than this, lattice relaxation (and consequently introduction of misfit dislocations and the like) can be achieved. ) Can be increased while the barrier height can be increased, so that the gate breakdown voltage can be improved and the current leakage can be more effectively suppressed.
[0014]
When the compound semiconductor element is configured as an FET such as a HEMT, a drain electrode and a source electrode are formed separately from the gate electrode. Further, the compound semiconductor device of the present invention can be configured such that the drain electrode and the source electrode are arranged so as to penetrate the cap layer and directly contact the electron supply layer. Thus, the ohmic junction between the drain electrode and the source electrode can be improved, and the increase in series resistance at the electrode junction interface can be suppressed.
[0015]
Further, the gate electrode can be formed directly in contact with the cap layer. According to this structure, a good Schottky barrier can be easily formed between the gate electrode and the cap layer, and the effect of suppressing a current leak described later by securing the barrier height can be made more remarkable.
[0016]
On the other hand, the compound semiconductor device of the present invention can be configured as follows. That is, the semiconductor device has a passivation layer made of an insulating nitride which covers the surface of the cap layer, has a smaller thickness than the cap layer, and has a lower saturated vapor pressure than AlN, and has a gate electrode on the surface of the passivation layer. To form If the passivation layer is formed of an insulating nitride such as Si ₃ N ₄ having a smaller saturated vapor pressure than AlN, the formation of N vacancies and the like on the contact surface of the gate electrode is further suppressed by the passivation effect. In addition, the effect of suppressing current leakage in the gate electrode can be further enhanced.
[0017]
When the channel layer is made of GaN, the electron supply layer has an AlN mixed crystal ratio x of 0.15 or more and 0.25 or less, and the cap layer has an AlN mixed crystal ratio y of more than 0.25 and 1 or less. It can be configured. By doing so, the piezo effect between the electron supply layer and the channel layer can be sufficiently increased, and the triangular potential forming the 2DEG layer on the channel layer side can be formed deeply, and current leakage of the gate electrode hardly occurs. be able to. If any of them is out of the range, the above effects may not be sufficiently exhibited.
[0018]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
FIG. 1 schematically shows a stacked structure of an HEMT 1 which is an example of a field-effect transistor of the present invention. The HEMT 1 is obtained by forming an element layer 103 on a single crystal substrate 101 made of SiC or sapphire via a buffer layer 102 made of GaN by a heteroepitaxial growth method. Specifically, a well-known vapor phase growth method, for example, a MOVPE (Metalorganic Vapor Phase Epitaxy) method is used.
[0019]
Element layer 103 from the side close to the buffer layer 102, _Al x Ga ₁ channel layer 119 made of undoped GaN, the spacer layer 105, Si or the like made of undoped _Al x _{Ga 1-x} N doped with n-type electron supply layer 110 made of _-x N, and _Al y _{Ga 1-y} N (However, y> x) in which a cap layer 112 made of are laminated in this order. Then, a gate electrode 108 is formed on the cap layer 112. In this embodiment, the gate electrode 108 is formed in direct contact with the cap layer 112.
[0020]
Further, the drain electrode 106 and the source electrode 107 are arranged so as to penetrate the cap layer 112 and directly contact the electron supply layer 110. The drain electrode 106 and the source electrode 107 are formed of a metal (for example, Ti / Al) that forms an ohmic junction with the electron supply layer 110, and the gate electrode 108 forms a Schottky junction with the cap layer 112. Respectively (for example, Pd / Au). Note that the spacer layer 105 is for preventing impurities such as Si, which is an n-type dopant, from diffusing into the GaN channel layer 119 already formed when the n-type AlGaN electron supply layer 110 is grown. is there.
[0021]
A triangular potential is formed between the spacer layer 105 and the channel layer 119 on the channel layer 119 side of the heterojunction interface. Within this triangular potential, electrons are confined in a form spatially separated from donor impurities (Si in the electron supply layer 110) to form a two-dimensional electron gas (2DEG) layer. Then, a voltage is applied between the drain electrode 106 and the source electrode 107, and while the current value is controlled by the gate electrode 108, a current is applied between the drain electrode 106 and the source electrode 107 via the GaN channel layer 119. Do.
[0022]
The AlN mixed crystal ratio x of the electron supply layer 110 is set to an appropriately low value, specifically, 0.15 or more and 0.25 or less so that lattice relaxation between the electron supply layer 110 and the channel layer 119 does not occur. On the other hand, the AlN mixed crystal ratio y of the cap layer 112 covering the surface side of the electron supply layer 110 on which the gate electrode 108 is formed is adjusted to a higher value, for example, higher than 0.25 and 1 or less. By doing so, the piezo effect between the electron supply layer 110 and the channel layer 119 can be sufficiently increased, and the triangular potential forming the 2DEG layer on the channel layer 119 side can be formed deeply. Is also unlikely to occur. In this embodiment, the drain electrode 106 and the source electrode 107 are in direct contact with the electron supply layer 110. In particular, the cap layer 112 can be made of AlN (that is, the AlN mixed crystal ratio y is set to 1) in order to further enhance the current leak suppressing effect of the gate electrode 108.
[0023]
By setting the AlN mixed crystal ratio y to be higher in the cap layer 112, in FIG. 2, the band gap Eg of the semiconductor layer to which the gate electrode 108 is joined increases, and the barrier height Vhi of the Schottky barrier increases. Therefore, current leakage in the gate electrode 108 can be suppressed.
[0024]
The thickness of the cap layer 112, from the viewpoint of made more reliable current leakage suppressing effect, good for a 5nm or more, it is desirable in particular composed of non-doped Al y _Ga 1-y _N. On the other hand, in order not to cause an excessive increase in series resistance due to the cap layer 112, the thickness is preferably set to 25 nm or less.
[0025]
In the HEMT 1 shown in FIG. 1, the cap layer 112 is formed such that the AlN mixed crystal ratio y is constant in the layer thickness direction as shown in FIG. Such a cap layer 112 has an advantage that it can be easily formed. On the other hand, as shown in FIG. 4, the cap layer 112 may be formed such that the AlN mixed crystal ratio y decreases as approaching the electron supply layer 110 in the layer thickness direction. According to this aspect, since the lattice constant does not change abruptly between the cap layer 112 and the electron supply layer 110, lattice relaxation between the cap layer 112 and the electron supply layer 110 is unlikely to occur, and the formation of the gate electrode 108 on the side where the gate electrode 108 is formed is difficult. The AlN mixed crystal ratio y can be set higher, and the entire thickness of the cap layer 112 can be increased. Either of these contributes to a further improvement in the effect of suppressing current leakage. In FIG. 4, the AlN mixed crystal ratio y of the cap layer 112 is gradually decreased toward the electron supply layer 110, but may be continuously decreased.
[0026]
Further, as shown in FIG. 5, the cap layer 112 includes a first layer 110a in which the AlN mixed crystal ratio y is set to the first value y1 and a second layer 110a in which the AlN mixed crystal ratio y is different from the first value. The second layer 110b set to the value y2 may be configured to have a structure in which the second layer 110b is alternately stacked. In the embodiment of FIG. 5, the first layer 110a having a high AlN mixed crystal ratio y is disposed in contact with the gate electrode 108, and the AlN mixed crystal ratio y of the second layer 110b is set lower than this (that is, y1). > Y2).
[0027]
Next, as in the HEMT 100 of FIG. 6, a passivation layer 113 made of an insulating nitride having a smaller thickness than the cap layer 112 is provided while covering the surface of the cap layer 112. The gate electrode 108 may be formed. If the passivation layer 113 is formed of an insulating nitride, such as Si ₃ N _4, having a smaller saturation vapor pressure than AlN, the formation of N vacancies and the like on the contact surface of the gate electrode 108 is further enhanced by the passivation effect. Thus, the effect of suppressing current leakage in the gate electrode 108 can be further enhanced. If the thickness of the passivation layer 113 is excessively large, the tendency of the gate electrode 108 to pass through the MIS junction between the passivation layer 113 and the cap layer 112 is increased, and the control characteristics of the gate electrode are far from Schottky junction characteristics. It will be. Therefore, even when the passivation layer 113 is formed, its thickness is adjusted so that the above-described problem does not occur.
[Brief description of the drawings]
FIG. 1 is a schematic view showing one embodiment of a compound semiconductor device of the present invention.
FIG. 2 is a diagram schematically showing a junction band structure of a Schottky electrode.
FIG. 3 is a schematic view showing an embodiment in which the AlN mixed crystal ratio y of the cap layer is constant in the layer thickness direction.
FIG. 4 is a schematic diagram showing an aspect in which the AlN mixed crystal ratio y of the cap layer is reduced as approaching the electron supply layer.
FIG. 5 is a schematic view showing an embodiment in which layers having different AlN mixed crystal ratios y are alternately stacked to form a cap layer.
FIG. 6 is a schematic view showing a first modification of the compound semiconductor device of the present invention.
[Explanation of symbols]
1,100 HEMT (compound semiconductor device)
106 Drain electrode 107 Source electrode 108 Gate electrode 110 Electron supply layer 112 Cap layer 113 Passivation layer

Claims (8)

An electron supply layer made of a nitride of a Group III element that essentially contains Ga, a channel layer receiving supply of electrons from the electron supply layer, and a gate electrode made of a Schottky electrode on the electron supply layer,
Said electron supply layer is made of _Al x _{Ga 1-x} N, In addition, the channel layer is made of nitride of high Group III element of GaN mixed crystal ratio than the electron supply layer, and further,
Said electron supply layer, the surface on the side position of the gate _{electrode, Al y Ga 1-y N} ( However, y> x) becomes covered with a cap layer made of, the gate electrode to the cap layer A compound semiconductor device characterized by being formed. 2. The compound semiconductor device according to claim 1, wherein the cap layer is formed such that an AlN mixed crystal ratio y is constant in a layer thickness direction. 2. The compound semiconductor device according to claim 1, wherein the cap layer is formed such that the AlN mixed crystal ratio y decreases in the layer thickness direction as the electron supply layer approaches the electron supply layer. 3. The cap layer includes a first layer having an AlN mixed crystal ratio y set to a first value y1 and a second layer having an AlN mixed crystal ratio y set to a second value y2 different from the first value. 2. The compound semiconductor device according to claim 1, wherein the compound semiconductor device has a structure in which layers are alternately stacked. A drain electrode and a source electrode are formed separately from the gate electrode, and the drain electrode and the source electrode are arranged so as to penetrate the cap layer and directly contact the electron supply layer. The compound semiconductor device according to claim 1. The compound semiconductor device according to claim 1, wherein the gate electrode is formed directly in contact with the cap layer. A passivation layer that covers the surface of the cap layer, is smaller in thickness than the cap layer, and is made of an insulating nitride having a lower saturated vapor pressure than AlN; and the gate electrode is formed on the surface of the passivation layer. The compound semiconductor device according to any one of claims 1 to 5, wherein the compound semiconductor device is formed. The channel layer is made of GaN, the electron supply layer has an AlN mixed crystal ratio x of 0.15 or more and 0.25 or less, and the AlN mixed crystal ratio y of the cap layer is higher than 0.25 and 1 or less. The compound semiconductor device according to claim 1, wherein:

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