WO2014029190A1 - 基于黒硅的高性能mems热电堆红外探测器及其制备方法 - Google Patents

基于黒硅的高性能mems热电堆红外探测器及其制备方法 Download PDF

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Publication number
WO2014029190A1
WO2014029190A1 PCT/CN2013/000065 CN2013000065W WO2014029190A1 WO 2014029190 A1 WO2014029190 A1 WO 2014029190A1 CN 2013000065 W CN2013000065 W CN 2013000065W WO 2014029190 A1 WO2014029190 A1 WO 2014029190A1
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thermal
silicon germanium
layer
silicon
substrate
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PCT/CN2013/000065
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English (en)
French (fr)
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毛海央
欧文
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江苏物联网研究发展中心
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Priority to US14/412,408 priority Critical patent/US9222837B2/en
Publication of WO2014029190A1 publication Critical patent/WO2014029190A1/zh

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/10—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors
    • G01J5/12—Radiation pyrometry, e.g. infrared or optical thermometry using electric radiation detectors using thermoelectric elements, e.g. thermocouples
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/02—Microstructural systems; Auxiliary parts of microstructural devices or systems containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS]
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
    • B81C1/00111—Tips, pillars, i.e. raised structures
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01J—MEASUREMENT OF INTENSITY, VELOCITY, SPECTRAL CONTENT, POLARISATION, PHASE OR PULSE CHARACTERISTICS OF INFRARED, VISIBLE OR ULTRAVIOLET LIGHT; COLORIMETRY; RADIATION PYROMETRY
    • G01J5/00—Radiation pyrometry, e.g. infrared or optical thermometry
    • G01J5/02—Constructional details
    • G01J5/0215—Compact construction
    • G01J5/022—Monolithic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/10—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects
    • H10N10/17—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects operating with only the Peltier or Seebeck effects characterised by the structure or configuration of the cell or thermocouple forming the device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
    • H10N10/80—Constructional details
    • H10N10/85—Thermoelectric active materials
    • H10N10/851—Thermoelectric active materials comprising inorganic compositions
    • H10N10/855—Thermoelectric active materials comprising inorganic compositions comprising compounds containing boron, carbon, oxygen or nitrogen
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B2201/00—Specific applications of microelectromechanical systems
    • B81B2201/02—Sensors
    • B81B2201/0278—Temperature sensors

Definitions

  • thermopile infrared detector based on silicon germanium and preparation method thereof
  • the invention relates to an infrared detector and a preparation method thereof, in particular to a high-performance MEMS thermoelectric infrared detector based on silicon germanium and a preparation method thereof, and belongs to the technical field of MEMS infrared detectors. Background technique
  • thermopile infrared detector is a typical device in the field of sensing detection. It is one of the core components of sensor detectors such as temperature sensor, rms converter, gas sensor, and thermal flowmeter. At the same time, Small-sized thermopile infrared detectors can also be constructed with infrared focal plane array (FPA) devices for infrared imaging.
  • FPA focal plane array
  • Thermopile infrared detectors have measurable constant radiation compared to infrared detectors based on other operating principles (such as pyroelectric infrared detectors and thermistor infrared detectors), no need to apply bias voltage, no need to ⁇ Waves are more suitable for obvious integrated advantages such as mobile applications and field applications.
  • MEMS thermopile infrared detectors are very important for achieving a wider range of infrared detection applications. Their civilian and military applications have broad prospects, and their commercial value and market potential are enormous. It can be said that the research and development work on MEMS thermopile infrared detectors has formed a new high-tech industry growth point in the 21st century. It is foreseeable that MEMS thermopile infrared detectors will become more widely used in many aspects of sensing detection. In particular, with the growing maturity of MEMS technology, including device design, manufacturing, packaging and testing, MEMS thermopile infrared detectors will become even more important.
  • Response rate and detection rate are two important performance indicators for describing infrared detectors, which determine the potential of infrared detectors in different fields.
  • the response rate is the ratio of the output electrical signal of the device to the incident infrared radiation power, which characterizes the sensitivity of the infrared detector in response to infrared radiation, and at the same time greatly affects the detection rate.
  • the temperature difference between the hot and cold ends of the thermocouple strip is an important parameter that reflects the device's response rate and detection rate.
  • the thermal conduction structure between the cold end and the base material and between the hot end and the infrared absorption region; considering the electrical series connection between the thermocouples, the thermal conduction structure is also It needs to have the function of electrical isolation at the same time.
  • thermopile infrared detector generally uses the substrate as a heat sink body, so that the cold end of the thermal coupler directly connects with the substrate, and the hot end and the absorption region are directly connected, because the substrate and the absorption region material may It has a certain conductivity, so the direct connection method will affect the output characteristics of the thermopile infrared detector, and ultimately affect the performance of the device.
  • thermopile infrared detectors For thermopile infrared detectors whose structure (including thermal conduction/electric isolation structure), size parameters, and thermocouple materials have been determined, the response rate and detection rate depend on the absorption efficiency of the infrared absorption region for infrared radiation. Silicon nitride film is often used as the material of the infrared absorption region in the research of infrared detectors. However, the highest infrared absorption efficiency of silicon nitride in the wavelength range of 1-12 ⁇ is only about 35%, and further, based on silicon nitride. The thermopile infrared detector of the infrared absorption layer cannot obtain a high response rate and detection rate.
  • the absorption efficiency of the infrared absorption region should be increased.
  • infrared detectors researchers have developed a variety of materials or structures that have high absorption rates and can serve as infrared absorption regions.
  • gold black has a good infrared absorption effect due to its nano-rough structure on the surface, and because of its low heat capacity, it has become a popular material in the research of infrared detectors.
  • the response rate and detection rate of the device can be correspondingly increased.
  • the preparation process of gold black involves processes such as metal evaporation and agglomeration of metal nanoparticles, the process is complicated, and its compatibility with CMOS process is also poor. Generally, it can only be fabricated after the device structure is processed. The surface of the structure. In view of this, the production of large quantities of detectors with black gold as the absorption zone is limited.
  • the 1/4 wavelength resonant structure maximizes the absorption efficiency of the infrared absorption region by utilizing the resonance effect produced by the thickness of the dielectric layer matching the 1/4 wavelength of the incident infrared light.
  • the detector with the 1/4 wavelength resonant structure as the absorption region can only sense the infrared radiation whose center wavelength is a certain value.
  • the process parameters are extremely strict when preparing a 1/4 wavelength resonant structure. If there is a slight mismatch between the thickness of the dielectric layer and the wavelength, the infrared absorption efficiency will be greatly attenuated.
  • Black silicon is a forest-like large-area nanocolumn/needle structure that was once considered a revolutionary new material in the electronics industry. Compared to conventional silicon materials, black silicon has a very high absorption efficiency for light in the near-infrared range.
  • various methods for preparing black silicon have been proposed, including high energy femtosecond laser assisted etching, metal catalytic electrochemical etching, and plasma dry etching. For the comprehensive consideration of processing cost, process convenience and process compatibility, the method of preparing black silicon by plasma dry etching is most commonly used in conventional semiconductor processes.
  • thermopile infrared detector infrastructure including dielectric support film, thermopile, metal junction structure, etc.
  • the ⁇ -Si or Poly-Si layer is deposited on the surface by plasma enhanced chemical vapor deposition (PECVD) technology, subjected to high energy ion implantation, followed by incomplete dry etching, and then processed into black silicon. And the position of the absorption zone is patterned, and finally the device structure is released.
  • PECVD plasma enhanced chemical vapor deposition
  • the fabrication of black silicon utilizes incomplete etching, so the controllability of the structure and size parameters of black silicon is low; and high energy ion implantation of the silicon material layer is required to introduce defects before preparing black silicon. , thus increasing the complexity of the process.
  • the method adopts the technical idea of "black silicon first, release after", so it is necessary to strictly protect black silicon from damage during the structure release process.
  • black silicon still has the physical and chemical properties of silicon materials, so it is easily destroyed by corrosive gases during the subsequent XeF 2 dry release process; and because the nanostructures in black silicon have a certain height and a high density, conventional methods are used. , such as film deposition protection or glue protection, can not achieve effective protection.
  • the object of the present invention is to overcome the deficiencies in the prior art, and provide a high-performance MEMS thermopile infrared detector based on silicon germanium and a preparation method thereof, which has a simple structure and is easy to implement, and is convenient for monolithic integration, response rate and detection rate. High, compatible with CMOS technology, wide range of applications, safe and reliable.
  • the silicon germanium-based high performance MEMS thermoelectric pair infrared detector includes a substrate; the substrate is provided with a release barrier band, and the release barrier band has a thermal isolation cavity therein.
  • An infrared absorption region of silicon germanium is disposed directly above the thermal isolation cavity, and the infrared absorption region of the silicon germanium is located on the release barrier band; the outer ring of the infrared absorption region of the silicon germanium is provided with a plurality of thermopile, silicon germanium infrared absorption region Outside The thermopile of the ring is connected in series to each other and electrically connected to each other.
  • thermopile connected in series is provided with a metal electrode for outputting the detection voltage; the thermopile forms a detection hot end corresponding to one end of the infrared absorption region adjacent to the silicon, thermoelectricity
  • the stack corresponds to an end away from the infrared absorption region of the silicon germanium to form a detection cold end; the detection cold end of the thermopile is connected to the substrate through the first thermal conduction isolation structure and the thermal conductor under the first thermal conduction isolation structure.
  • the thermal conductor is located outside the isolation cavity and is located between the release barrier and the substrate, and the first thermal conduction isolation structure is embedded in the release barrier; the hot end of the thermop is electrically isolated by the second thermal conduction
  • the structure is in contact with the silicon germanium infrared absorption region, and the second thermal conduction isolation structure is supported on the release barrier.
  • the silicon germanium infrared absorption region is square, and the outer side of the silicon germanium infrared absorption region is provided with four sets of thermopile which are uniformly distributed.
  • the silicon germanium infrared absorption region includes a silicon germanium structure formed by reactive ion etching of a silicon germanium material body and a corrosion release channel penetrating through the silicon germanium infrared absorption region, and the corrosion release channel is in communication with the thermal isolation cavity.
  • the thermopile includes a P-type thermocouple strip and an N-type thermocouple strip corresponding to the P-type thermocouple strip; the P-type thermocouple strip and the N-type thermocouple strip are located on the release barrier strip; The detection cold end, the P-type thermal coupler and the N-type thermal coupler are all in contact with the first thermal conduction isolation structure, and the P-type thermal coupler passes through the second connection line and the N-type thermocouple in the adjacent thermocouple.
  • the electrical connection of the strip; the P-type thermocouple strip and the N-type thermal coupler are both in contact with the second thermal conduction isolation structure and electrically connected through the first connection line.
  • the silicon germanium material body is prepared on a release barrier by LPCVD or PECVD deposition.
  • the materials of the first thermal conduction isolation structure and the second thermal conduction isolation structure each include Si 3 N 4 .
  • a method for preparing a high performance MEMS thermopile infrared detector based on silicon germanium, the method for preparing the MEMS thermopile infrared detector comprises the following steps:
  • thermal conductor depositing a thermal conductor above the substrate contact window, and depositing a thermal conductor mask layer on the thermal conductor, the thermal conductor covering the substrate protective layer and filling the substrate contact window; d And selectively masking and etching the thermal conductor mask layer to form a thermal conductor etching window on the thermal conductor mask layer, the thermal conductor etching window penetrating the thermal conductor mask layer, and in the substrate contact window Inner side; etching the thermal conductor to the substrate protective layer by using a thermal conductor etching window to obtain a thermal conductor through hole;
  • the support layer is filled in the thermal conductor through hole and the thermal conductor etching window, and covers the thermal conductor mask layer to form a release on the substrate a barrier band structure and a dielectric support film;
  • thermal conduction isolation layer g. selectively masking and etching the thermal conductive isolation layer to form a layer on the support layer a thermally conductive isolation block and a second thermal conduction isolation block, the first thermal conduction isolation block is located in the support layer, and the second thermal conduction isolation block is located on the support layer.
  • thermal coupler between the first thermal conduction electrically insulating block and the second thermal conduction isolation spacer adjacent to the first thermal conduction isolation block, the thermal coupler comprising an N-type thermocouple Strip and P-type thermal coupler, the cold end of the hot coupler is in contact with the first thermal conduction isolation block, and the hot end of the probe is in contact with the second thermal conduction isolation block;
  • thermal barrier protection layer above the thermal coupler, the region covered by the thermal barrier protection layer comprises a thermal coupler and a first thermal conduction isolation spacer; and the adjacent second thermal conduction is electrically isolated Depositing a silicon germanium material body between the blocks, wherein the silicon germanium material body is in contact with the second thermally conductive electrically isolated spacer;
  • thermopile sputtering a metal layer on the substrate on which the electrical connection via is formed, the metal layer being filled in the electrical connection via, selectively masking and etching the metal layer, so that the thermopile is detected in the heat.
  • the N-type thermal coupler and the P-type thermal coupler in the thermocouple are electrically connected through the first connecting line, and the P-type thermal coupler passes through the second connecting line and the adjacent thermal coupler in forming the cold end of the thermopile detecting.
  • the inner N-type thermal coupler is electrically connected, and the first electrical connecting body is formed outside the first thermal conductive isolation structure;
  • a passivation layer on the surface of the substrate, the region covered by the passivation layer comprises a silicon germanium material body, a first connecting line, a second connecting line and a first electrical connecting body;
  • the passivation layer is used as the sidewall material layer of the surface roughness of the silicon germanium material body, and the reactive silicon ion (RIE) is applied to the silicon germanium material body to form the silicon germanium infrared absorption region based on the germanium silicon structure, and simultaneously form The second electrical connector.
  • RIE reactive silicon ion
  • a silicon germanium shielding layer is coated on the inner wall of the release hole.
  • the P-type thermocouple strip and the N-type thermocouple strip are located on the release barrier strip structure, and the P-type thermocouple strip and the N-type thermocouple strip are both formed with the first thermal guide in forming the thermopile detection cold end.
  • the electrically conductive isolation block is in contact with each other; and the P-type thermal coupler and the N-type thermal coupler are both in contact with the second thermal conduction isolation structure at the hot end of the thermopile detection.
  • the material of the metal layer includes Al.
  • black silicon has high infrared absorption efficiency in a large wavelength range, the applicable wavelength range of the device is large, and the detector with the 1/4 wavelength resonant structure as the absorption region is overcome only for a single wavelength range. Insufficient.
  • the preparation process of the invention adopts the technical idea of "release first, black silicon after the line", and effectively overcomes the problem that the black silicon structure is easily damaged in the "black silicon first, release after” technique.
  • the detector obtained by the invention is designed and fabricated separately on the cold end/hot end of the thermopile, which is beneficial to further improve the performance of the device.
  • the processing of the device is fully compatible with the CMOS process, which facilitates monolithic integrated fabrication of the sensor structure and test circuit.
  • thermopile infrared detector provided by the invention has good process compatibility, easy structure realization, convenient monolithic integration, high response rate and high detection rate, and can be used in temperature sensors, gas sensors, heat fluxes. Wide range and practical applications in metering sensor assemblies and systems.
  • FIG. 15 are cross-sectional views showing the steps of a specific implementation process of the present invention, wherein
  • Figure 1 is a cross-sectional view showing a substrate protective layer formed on a substrate.
  • Figure 2 is a cross-sectional view of the present invention after forming a substrate contact window.
  • Figure 3 is a cross-sectional view showing the formation of a thermal conductor mask layer of the present invention.
  • FIG. 4 is a cross-sectional view of the present invention after forming a through hole of a heat conductor in a heat conductor.
  • Figure 5 is a cross-sectional view of the present invention after forming a release barrier strip structure.
  • Figure 6 is a cross-sectional view of the present invention after forming a thermally conductive separator layer.
  • Figure 7 is a cross-sectional view showing the first thermally conductive electrically isolated spacer and the second thermally conductive electrically isolated spacer of the present invention.
  • Figure 8 is a cross-sectional view showing the thermal coupler of the present invention.
  • Figure 9 is a cross-sectional view showing the deposition of a silicon germanium material in the present invention.
  • Figure 10 is a cross-sectional view showing the electrical connection through-holes of the present invention.
  • Figure 11 is a cross-sectional view showing the first connection line, the second connection line, and the first electrical connector in the present invention.
  • Figure 12 is a cross-sectional view of the present invention after depositing a passivation layer.
  • Figure 13 is a cross-sectional view of the present invention after forming a release aperture and applying a release barrier to the inner wall of the release aperture.
  • Figure 14 is a cross-sectional view of the present invention after the heat conductor is released to form a thermally isolated cavity.
  • Figure 15 is a cross-sectional view showing the formation of a silicon germanium infrared absorption region based on a germanium silicon structure in accordance with the present invention.
  • Figure 16 is a scanning electron micrograph of silicon germanium according to the present invention and its infrared absorption spectrum.
  • Figure 17 is a schematic view showing the structure of the present invention.
  • the present invention is based on a silicon germanium-based high-performance MEMS thermoelectric pair infrared detector, comprising a substrate 101; the substrate 101 is provided with a release barrier strip 2, and the release barrier strip 2 has a thermal isolation chamber therein.
  • the body 1403 is provided with a silicon-silicon infrared absorption region 1 directly above the thermal isolation cavity 1403, the silicon-silicon infrared absorption region 1 is located on the release barrier band 2; and a plurality of thermopiles are disposed outside the silicon-silicon infrared absorption region 1
  • the thermopiles on the outer side of the silicon-silicon infrared absorption region 1 are connected in series and then electrically connected to each other.
  • thermopile connected in series is provided with a metal electrode 8 for outputting the detection voltage; the thermopile corresponds to the infrared absorption region adjacent to the silicon germanium.
  • One end of 1 forms a detecting hot end, and the thermopile forms a detecting cold end corresponding to an end away from the silicon-silicon infrared absorption region 1; the detecting cold end of the thermopile is energized by the first thermal conduction isolation structure 4 and the first thermal conduction
  • the thermal conductor 303 under the isolation structure 4 is connected to the substrate 101.
  • the thermal conductor 303 is located outside the thermal isolation cavity 1403 and between the release barrier 2 and the substrate 101.
  • the first thermal conduction isolation structure 4 is embedded.
  • the materials of the first thermal conduction isolation structure 4 and the second thermal conduction isolation structure 3 all include Si 3 N 4 ; the first thermal pathway electrically isolating structure 4 and the second thermal conduction electrically isolating structure 3 can The function of thermal conduction and the function of electrical isolation are achieved, so that the temperature of the detection cold end of the thermopile is consistent with the temperature of the substrate 101, and the hot end of the detection of the thermopile receives the infrared absorption of silicon by the second thermal channel isolation structure 3. Zone 1 absorbs heat to improve the response and sensitivity of the infrared detector.
  • the silicon-infrared infrared absorption region 1 is square, and the outer side of the silicon-silicon infrared absorption region 1 is provided with four groups of uniformly distributed thermopiles; the four groups of thermopiles are symmetrically distributed in the silicon-silicon infrared absorption region 1
  • the outer side; the silicon-silicon infrared absorption region 1 can also adopt other shapes, such as a rectangular shape, a circular shape, a quadrangular compensation shape, and the like, and the thermopile is correspondingly distributed according to the shape of the silicon-silicon infrared absorption region 1.
  • the thermopile is electrically connected through a metal connecting line 7 to form a resistance characteristic.
  • thermopiles on the outer side of the silicon-silicon infrared absorption region 1 are electrically connected in series, the heat detected by the entire detector is outputted as a voltage through the two metal electrodes 8, and the change in voltage can reflect the silicon-infrared infrared.
  • the silicon germanium infrared absorbing region 1 in the embodiment of the present invention includes a silicon germanium material body 909 using a rough polysilicon (Poly-Si) surface as a side wall material supporting structure, and a silicon germanium structure formed by combining high selectivity ratio RIE. 1509 and a corrosion release channel 9 penetrating through the silicon-silicon infrared absorption region 1, and the corrosion release channel 9 is in communication with the thermal isolation cavity 1403.
  • the thermopile includes a plurality of P-type thermal couplers 5 and N-type thermocouple strips 6 corresponding to the P-type thermocouple strips 5; P-type thermocouple strips 5 and a thermocouple formed between the N-type thermocouple strips 6 corresponding to the P-type thermocouple strips 5; the P-type thermocouple strips 5 and the N-type thermocouple strips 6 are located on the release barrier strip 3; detection in the thermopile Cold end, P-type thermocouple strip 5 and N-type thermocouple strip 6 Contacting the first thermal conduction isolation structure 4, and the P-type thermal coupler 5 is electrically connected to the N-type thermal coupler 6 in the adjacent thermocouple through the second connection line 1111; at the hot end of the thermopile detection Both the P-type thermal coupler 5 and the N-type thermal coupler 6 are in contact with the second thermal conduction isolation structure 3, and are electrically connected through the first connection line 1109.
  • the release barrier strip 2 in FIG. 17 corresponds to the release barrier strip structure 503 of FIG. 5, and the first thermal conduction isolation structure 4 corresponds to the first thermal conduction isolation spacer 705 of FIG. 7, and the second thermal conduction is performed.
  • the electrically isolating structure 3 corresponds to the second thermally conductive electrically isolated spacer 706.
  • thermopile infrared detector structure can be realized by the following process steps.
  • the process steps are conventional methods; the reagents and materials, if none Special instructions are available from commercial sources. Specifically, including - a, providing a substrate 101, and providing a substrate protective layer 102 on the surface of the substrate 101;
  • a SiO 2 material layer is grown on the surface of the substrate 101 by dry oxygen oxidation to form a substrate protective layer 102 having a thickness of 5000 A and a dry oxidation temperature of 950 °. C, the content of oxygen is 60%; the substrate 101 is made of a conventional material, and the material of the substrate 101 is silicon.
  • the substrate protection layer 102 is selectively masked and etched to form a substrate contact window 202 over the substrate 101, the substrate contact window 202 penetrating through the substrate protection layer 102;
  • a photoresist is spin-coated on the surface of the substrate protection layer 102, and a plurality of openings of the photoresist are formed by a photolithography process at a position corresponding to the cold end of the thermal coupler.
  • the width of the opening is 16 ⁇ m. Each length is 50 ⁇ , the total length is about 700 ⁇ ; subsequently, using RIE (Reactive Ion Etching) Si0 2 technology to transfer the opening pattern on the photoresist onto the substrate protection layer 102, forming a substrate contact window 202;
  • RIE Reactive Ion Etching
  • the LPCVD Poly-Si is formed on the substrate protective layer 102 on which the opening has been formed to form the thermal conductor 303, and the thermal conductor mask layer 304 is obtained by the LPCVD process.
  • the material of the thermal conductor mask layer 304 is Si0 2 . .
  • the thickness of the thermal conductor 304 is ⁇ , and the thickness of the thermal conductor mask layer 304 is 1000 ⁇ . Since the thickness of the thermal conductor 304 is much thicker than that of the lower substrate protective layer 102, the thermal conductor 303 can completely fill the substrate contact window 202 to form a Poly-Si thermal conductor filling structure 302.
  • thermal conductor mask layer 304 selectively masking and etching the thermal conductor mask layer 304 to form a thermal conductor etch window 404 on the thermal conductor mask layer 304, the thermal conductor etch window 404 penetrating the thermal conductor mask layer 304, And the inside of the substrate contact window 202; the thermal conductor 303 is etched through the thermal conductor etching window 404 to the substrate protection layer 102, to obtain a thermal conductor through hole 403;
  • a photoresist is spin-coated on the surface of the thermal conductor mask layer 304, and a closed opening is formed on the photoresist by a photolithography process, and then the photoresist is closed on the opening by RIE Si0 2 .
  • the pattern is transferred to the thermal conductor mask layer 304 to form a closed gate pattern on the heat conductor mask layer 304, that is, a heat conductor etching window 404; using oxygen plasma dry method to remove glue and sulfuric acid/hydrogen peroxide wet method to remove glue Method for removing photoresist on the surface of the silicon wafer; RIE Poly-Si will be on the thermal conductor mask layer 304
  • the closed opening pattern is transferred to the heat conductor 303 to form a closed opening pattern on the heat conductor 303, that is, a heat conductor through hole 403, and the heat conductor through hole 403 is formed to have a width of 8000 ⁇ .
  • a support layer 505 on the thermal conductor mask layer 304 depositing a support layer 505 on the thermal conductor mask layer 304, the support layer 505 is filled in the thermal conductor through hole 403 and the thermal conductor etching window 404, and covered on the thermal conductor mask layer 304, Forming a release barrier strip structure 503 and a dielectric support film 504 over the substrate 101;
  • a Si0 2 layer is deposited by LPCVD techniques to form a support layer 505, the support layer 505
  • the thickness of the support layer 505 can completely fill the thermal conductor through hole 403 and the heat conductor etching window 404 to form the 8 ⁇ 2 release barrier structure 503, and simultaneously form the dielectric support film structure 504; here, the release barrier band Structure 503 corresponds to release barrier strip 2 of Figure 17 for forming a subsequent release barrier strip 2.
  • a photoresist is spin-coated on the support layer 505, and a plurality of opening patterns of the photoresist are formed at a position corresponding to the cold end of the desired thermal strip by a photolithography process, and the width of each of the openings is The length is 15 ⁇ and 50 ⁇ respectively ;
  • the opening pattern on the photoresist is transferred to the support layer 505 by using the RIE Si0 2 technology to form the thermal electrification isolation opening 605 on the support layer 505;
  • the oxygen plasma dry method is used for degumming and sulfuric acid/hydrogen peroxide
  • the wet-gel-bonding method is used to remove the photoresist on the surface of the silicon wafer; subsequently, the Si 3 N 4 layer is deposited on the support layer 505 by LPCVD to form a thermally conductive isolation layer 606, which is electrically conductive.
  • the spacer layer 606 has a thickness of 5000 ⁇ .
  • thermal conduction isolation layer 606 selectively masking and etching the thermal conductive isolation layer 606 to form a first thermal conduction isolation block 705 and a second thermal conduction isolation block 706 on the support layer 505, A thermal conductive isolation spacer 705 is located in the support layer 505, and a second thermal conduction isolation spacer 706 is disposed on the support layer 505. As shown in FIG. 7, the photoresist is spin-coated on the thermal conduction isolation isolation layer 606.
  • first thermal conduction isolation isolation block 705 has a width of 18 ⁇ m and a length of 80 ⁇ m
  • the second thermal conduction isolation block 706 has a width of 18 ⁇ m and a length of 80 ⁇ m.
  • oxygen plasma is used to remove the glue
  • the sulfuric acid/hydrogen peroxide wet-gel combination method is used to remove the photoresist on the surface of the silicon wafer.
  • a thermal coupler 811 is disposed between the first thermal conduction isolation block 705 and the second thermal conduction isolation block 706 adjacent to the first thermal conduction isolation block 705, and the thermal coupler 811
  • the N-type thermocouple strip 6 and the P-type thermocouple strip 5 are included, and the detecting cold end of the thermocouple strip 811 is in contact with the first thermal conduction isolation block 705, and the detecting hot end of the thermocouple strip 811 is electrically connected to the second thermal conduction.
  • the electrical isolation block 706 is in contact;
  • a layer of Poly-Si having a thickness of 2000 A is deposited by LPCVD on the substrate 101 on which the first thermally conductive isolation structure 4 and the second thermally conductive isolation structure 3 have been implemented.
  • N-type and P-type doping are respectively performed at different positions of the Poly-Si layer, wherein the doping concentrations of the P-type and the N-type Poly-Si are 8el8 cm' 3 and 4el9 cm -3 , respectively, and the doping energy is 30, respectively. KeV and 80 KeV.
  • the doping concentration of the N-type thermocouple strip 6 and the P-type thermocouple strip 5 is low, so that the Seebeck coefficient of the thermal coupler is high, thereby further improving the performance of the device.
  • the thermal coupler of the existing thermopile infrared detector adopts a higher doping concentration, and the doping concentration of the thermal coupler is higher than the doping concentration in the embodiment of the present invention. Since the thermal couplers of the existing thermopile infrared detectors all adopt high doping concentration, the resistance of the infrared detector is relatively small, which is beneficial to reduce the noise of the device; but the high doping concentration makes the thermal coupler race The Becker coefficient is reduced, thus affecting the detection sensitivity of the device.
  • the logarithm of the thermocouple is often increased, but the result of such processing increases the resistance value of the device, which in turn increases the noise.
  • a lower doping concentration is employed, so that the detection sensitivity of the device can be effectively improved; in order to reduce the noise of the infrared detector, the logarithm of the thermocouple is reduced in the structure of the present invention.
  • the detection sensitivity of the infrared detector is improved by using a thermocouple with a low doping concentration, and the logarithm of the thermocouple is reduced to reduce the noise of the detector.
  • the doping concentration thermocouple of the present invention is used.
  • the detection sensitivity of the strip to the entire infrared detector is greater than the reduction of the sensitivity of the thermocouple pair to the detection sensitivity, that is, the detection sensitivity of the infrared detector can be improved in the embodiment of the invention.
  • a photoresist is spin-coated on the N-type and P-type doped Poly-Si layers, and a photoresist pattern is formed at a position corresponding to the thermal coupler by a photolithography process; the photoresist is formed by RIE Poly-Si technology The pattern is transferred to the Poly-Si layer to form a thermal coupler 811.
  • the thermocouple strip 811 includes an N-type thermocouple strip 6 and a P-type thermocouple strip 5; the N-type thermocouple strip 6 and the corresponding P-type thermocouple strip 5 thermocouples are formed, and the N-type thermocouple strip 6 and the P-type thermocouple strip 5 form a parallel juxtaposition structure, and the detection cold end 807 of the thermocouple strip 811 is connected to the first thermal conduction isolation block 705 to detect heat.
  • the end 810 ⁇ crosses the pattern of the second thermal conduction isolation block 706; finally, the photoresist on the surface of the silicon wafer is removed by an oxygen plasma dry degumming and a sulfuric acid/hydrogen peroxide wet debonding method.
  • the thermal coupler has a width of 3 ⁇ m and a length of 125 ⁇ , and a logarithm of 20, which is symmetrically placed along the circumference of the square silicon silicon infrared absorption region 1.
  • the ⁇ -type thermal coupler 5 and the ⁇ -type thermocouple strip 6 formed by the invention are located on the release barrier strip structure 503; at the detection cold end, the ⁇ -type thermal coupler 5 and the ⁇ -type thermocouple strip 6 are both associated with the first heat
  • the conductive isolation spacers 705 are in contact with each other; at the detection hot end, the ⁇ -type thermal coupler 5 and the ⁇ -type thermal coupler 6 are both in contact with the second thermal conduction isolation structure 3.
  • a thermal strip protection layer 908 is disposed above the thermal coupler strip 811, and the area covered by the thermal strip protection layer 908 includes a thermal coupler strip 811 and a first thermal conduction isolation block 705;
  • a silicon germanium material body 909 is formed between the two thermally conductive isolation spacers 706, and the silicon germanium material body 909 is in contact with the second thermal conduction isolation spacer 706;
  • the thermal protection layer 908 of the LPCVD 2000 A As shown in FIG. 9, on the substrate 101 of the structure of the thermal coupler 811, the thermal protection layer 908 of the LPCVD 2000 A, the material of the thermal protection layer 908 is Si0 2; on the thermal protection layer 908 The photoresist is spin-coated, and a large-area photoresist pattern is formed in the region of the thermal coupler 811 by a photolithography process; the photoresist pattern is transferred to the thermal barrier protection layer 908 by the RIE Si0 2 technique, and the thermal coupler The protective layer 908 completely covers the first thermal conduction isolation block 705, and the second thermal conduction isolation spacer 706 at the hot end of the thermal strip is not completely covered by the thermal protection layer 908, and the exposed portion has a size width of 9 ⁇ m.
  • the thermal barrier protection layer 908 covers half of the second thermal conduction isolation isolation block 706, and the thermal barrier protection layer 908 does not completely cover the second thermal channel electrical isolation block 706, mainly to ensure the contact between the silicon germanium material body 909 and the second thermal channel electrical isolation block 706, so as to ensure that the heat absorbed by the silicon germanium infrared absorption region 1 is subsequently passed through the second heat.
  • the channel electrical isolation block 706 can be conducted to the thermocouple, and the area of the thermal barrier protection layer 908 covering the second thermal conduction isolation isolation block 706 can also be set as needed, as long as the heat absorbed by the silicon-silicon infrared absorption region 1 can be ensured.
  • the second thermal path electrical isolation block 706 can be conducted to the thermocouple;
  • the photoresist on the surface of the silicon wafer is removed by an oxygen plasma dry degumming and a sulfuric acid/hydrogen peroxide wet gel removal method; thereafter, a silicon germanium material body 909 having a thickness of ⁇ is deposited by a PECVD technique,
  • the material of the silicon material body 909 is Poly-Si, and the pattern of the silicon germanium material body 909 is formed at a position where the absorption region is required to be formed.
  • the patterned silicon germanium material body 909 also crosses the second layer at the hot end of the thermocouple strip.
  • the thermal conduction is electrically isolated to the structure 3, as shown by the cross-sectional area 910 in the figure; the photoresist on the surface of the silicon wafer is removed by a combination of oxygen plasma dry stripping and sulfuric acid/hydrogen peroxide wet stripping.
  • the PECVD black push material body 909 has a furnace tube temperature of 270 ° C, a power of 170 W, a pressure of 400 mTorr, and a flow rate of 300 sccm (standard-state cubic centimeter per minute).
  • thermal strip protection layer 908 selectively masking and etching the thermal strip protection layer 908 to form an electrical connection via 1008 for connecting the thermal strip 811 over the substrate 101;
  • a photoresist is spin-coated on the surface of the substrate 101, and a gate of a photoresist pattern is formed by photolithography at a position corresponding to the position at which the electrical connection via is desired to be formed, and then the light is irradiated by RIE Si0 2 technique.
  • the opening pattern on the engraved adhesive is transferred to the thermal protection layer 908 to form an opening pattern of the thermal protection layer 908, that is, to electrically connect the through holes 1008.
  • the oxygen plasma is used to remove the glue and the sulfuric acid/hydrogen peroxide.
  • the wet-gel-bonding method removes the photoresist on the surface of the silicon wafer.
  • thermocouple strip 6 sputtering a metal layer on the substrate 101 on which the electrical connection via 1008 is formed, the metal layer being filled in the electrical connection via 1008, selectively masking and etching the metal layer, so that the formed Detecting the cold end, the N-type thermocouple strip 6 and the P-type thermocouple strip 5 in the thermocouple strip 811 are electrically connected through the first connecting line 1109, and at the detecting hot end, the P-type thermocouple strip 5 passes through the second connection.
  • the wire 1111 is electrically connected to the N-type thermocouple strip 6 in the adjacent thermocouple strip 811, and the first electrical connection body 1110 is formed outside the first thermal conduction isolation structure 705;
  • an A1 metal layer is sputtered on the substrate 101 on which the electrical connection via 1008 is formed, and the A1 metal layer is patterned by a photolithography process at a position where the electrical connection is desired and the position of the metal electrode.
  • a first connection line 1109, a second connection line 1111, and a first electrical connection body 1110 are formed; then the photoresist on the surface of the silicon wafer is removed by organic cleaning.
  • the outermost second connecting line 1111 is for electrically connecting with the metal connecting wire 7 and the metal electrode 8, and the first electrical connecting body 1110 corresponds to the metal electrode 8, for forming the metal electrode 8.
  • thermopile When the embodiment of the present invention is connected in series, the P-type thermal coupler 5 in the thermopile and the N-type thermocouple strip 6 in the adjacent thermopile are electrically connected through the first connecting line 1109, and subsequently connected in sequence to form a thermopile.
  • the detecting hot end is formed to obtain the detecting hot end of the thermopile in the desired detector, and the detecting cold end is similar.
  • the passivation layer 1211 covering region includes a silicon germanium material body 909, a first connecting line 1109, a second connecting line 1111, and a first electrical connecting body 1110. ;
  • a SiO 2 layer having a thickness of 1000 A was deposited by a PECVD technique on the substrate 101 on which the metal connection was realized to form a passivation layer 1211.
  • m. selectively masking and etching the passivation layer 1211 to form a silicon germanium etch window 1311 on the passivation layer 1211 on the silicon germanium material body 909, and the silicon germanium material body 909 is etched through the germanium silicon etch window 1311. Etching until the thermal conduction body 303 directly under the silicon germanium etching window 1311 is etched to form a release hole 1309;
  • a photoresist is spin-coated on the passivation layer 1211, and the photoresist is subjected to a photolithography process in the device corresponding to the inside of the absorption region, the region between the thermocouple and the thermal coupler, and the closed opening.
  • a photoresist opening is formed in a large area of the enclosed area except for the thermal coupler region and the absorptive region; subsequently, the opening pattern of the photoresist is respectively performed by RIE Si0 2 , RIE Poly-Si and RIE Si0 2 techniques, respectively Transfer to different material layers, that is, to form a release hole 1309 and a silicon germanium etching window 1311; in order to protect the subsequent formation of the silicon-silicon infrared absorption region 1 region, Poly-Si is not damaged by the released gas, and silicon germanium is required to be formed.
  • the sidewall of the release hole 1309 in the region of the infrared absorption region 1 is coated with a release shielding layer 1312 by photolithography, and the shielding layer 1312 is released as a photoresist, and the thickness of the sidewall portion releasing shielding layer 1312 is 2 ⁇ m, and the coating is further applied.
  • the size of the release hole 1309 after the release of the occlusion layer 1312 is reduced.
  • the silicon germanium etching window 1311 and the release hole 1309 form a corrosion release channel 9.
  • the heat conductor 303 in the device structure isotropically etched by the XeF 2 dry etching technique, and the poly of the heat conductor 303 is passed through the corrosion release channel 9.
  • the -Si material is etched away, thereby forming a thermally isolated cavity 1403.
  • the silicon germanium occlusion layer 1412 in FIG. 14 corresponds to the release occlusion layer 1312 in FIG.
  • the rough silicon germanium material body 909 and the passivation layer 1211 covering the surface of the silicon germanium material body 909 can be used as the side wall material layer of the surface roughness of the silicon germanium body 909, using a RIE Poly.
  • -Si technology processing black silicon structure 1509, silicon germanium structure 1509 is a needle-like or columnar structure; during anisotropic etching, the passivation layer 1211 on the first electrical connector 1110 is completely etched, thereby exposing the second
  • the electrical connector 1510 finally obtains a novel MEMS thermopile infrared detector with black silicon as the material of the absorption region.
  • the overall structure is shown in FIG.
  • the preparation of the black silicon infrared absorption region 1 in the present invention utilizes a rough Poly-Si surface as a side wall support structure, and is realized by an anisotropic etching technique with a high selectivity ratio.
  • black silicon infrared absorption is prepared.
  • the black silicon material body 909 of the region 1 (the material of the black silicon material body 909 is a Poly-Si) layer can be deposited and grown by PECVD or LPCVD techniques.
  • the second electrical connector 1510 is consistent with the first electrical connector 1110, and corresponds to the metal electrode 8 of FIG. 17, and is used to detect the result of detecting the entire thermopile infrared detecting structure. Output.
  • response rate is 577 V/W
  • detection rate is S ⁇ SES cmHz ⁇ 1
  • thermal response time is 82.9 ms
  • noise density is 91 nV/ Hz 1/2 .
  • the infrared absorption energy of the silicon-silicon infrared absorption region 1 absorbs the heat of the infrared rays, and the heat absorbed by the silicon-silicon infrared absorption region 1 is conducted to the silicon-silicon infrared absorption region through the second thermal conduction isolation structure 3
  • the detection cold end of the thermopile is connected to the substrate 101 through the first thermal conduction isolation structure 4 and the thermal conductor 303, so that the temperature of the cold junction is consistent with the temperature of the substrate 101, and reaches the electricity.
  • the role of isolation is the role of isolation.
  • thermocouple strip 6 and the P-type thermocouple strip 5 in the thermopile form a thermocouple structure.
  • the temperature difference between the hot end of the thermopile and the detected cold end will generate a certain potential difference at the cold end, in the thermopile.
  • the voltage is outputted through the metal electrode 8, and the output voltage is judged to achieve the required detection process.
  • the invention adopts the silicon germanium infrared absorption region 1, and the black silicon has high infrared absorption efficiency and high response rate and high detection rate, thereby overcoming the detector response rate and detection of the material with Si 3 N 4 as the absorption region.
  • the rate is not high. Since the preparation of black silicon does not have very strict requirements on process parameters (such as the thickness of Si0 2 grown, the thickness of Poly-Si, the time and thickness of etching, etc.), the structure of the infrared detector based on black silicon is easier to implement, thereby overcoming the The detector with the 1/4 wavelength resonant structure as the absorption region has too high requirements for the process parameters and then the controllability of the performance parameters is poor.
  • the device has a wide applicable wavelength range, and overcomes the problem that the detector with the 1/4 wavelength resonant structure as the absorption region is only suitable for a single wavelength range. .
  • the preparation process of the invention adopts the technical idea of "release first, black silicon after the line", and effectively overcomes the problem that the black silicon structure is easily damaged in the "black silicon first, release after” technique.
  • the detector of the invention performs the design and fabrication of the thermal conduction isolation structure on the detection cold end and the detection hot end of the thermopile, which is beneficial to further improve the performance of the device.
  • the device's processing is fully compatible with the CMOS process, which facilitates monolithic integrated fabrication of the sensor structure and test circuitry.
  • the novel high-performance MEMS thermopile infrared detector provided by the invention has good process compatibility, easy structure realization, convenient monolithic integration, high response rate and high detection rate, and can be used in temperature sensors, gas sensors, heat flow meters, etc. A wide range of practical applications are available in sensing probe assemblies and systems.

Abstract

一种基于黒硅的高性能MEMS热电红外探测器及其制备方法，红外探测器包括衬底（101）；衬底（101）上设有释放阻挡带（2），释放阻挡带（2）内具有热隔离腔体（1403），热隔离腔体（1403）的正上方设有黒硅红外吸收区（1），黒硅红外吸收区（1）的外侧设有热电堆，黒硅红外吸收区外侧的热电堆相互串接后电连接成一体，相互串接的热电堆上设有用于将探测结果输出的金属电极（8）；热电堆的探测冷端通过第一热导通电隔离结构（4）及第一热导通电隔离结构（4）下方的热传导体（303）与衬底（101）相连，热传导体（303）位于热隔离腔体（1403）的外侧；热电堆的探测热端通过第二热导通电隔离结构（3）与黒硅红外吸收区（1）相接触。该结构简单易于实现，便于单片集成，响应率及探测率高，与CMOS工艺兼容，适用范围广，安全可靠。

Description

基于黒硅的高性能 MEMS热电堆红外探测器及其制备方法 技术领域
本发明涉及一种红外探测器及其制备方法， 尤其是一种基于黒硅的高性能 MEMS热电红外探测器及其制备方法， 属于 MEMS红外探测器的技术领域。 背景技术
MEMS热电堆红外探测器是传感探测领域的一种典型器件， 是组成温度传 感器、 均方根转换器、 气敏传感器、 热流量计等传感探测器件的核心部件之一， 与此同时， 小尺寸热电堆红外探测器还可构建红外焦平面阵列（FPA)器件实现 红外成像。 热电堆红外探测器与基于其它工作原理的红外探测器 （如热释电型 红外探测器和热敏电阻型红外探测器等） 相比具有可测恒定辐射量、 无需加偏 置电压、 无需斩波器、 更适用于移动应用与野外应用等明显的综合优点。 因而， MEMS热电堆红外探测器对于实现更为宽广的红外探测应用具有非常重要的意 义，其民用、军用前景广阔，商业价值和市场潜力非常巨大。可以说，关于 MEMS 热电堆红外探测器的研究开发工作已形成 21世纪一个新的高技术产业增长点。 可以预见， MEMS热电堆红外探测器将在传感探测的众多方面形成更加广泛的 应用。 特别是， 随着微机电技术， 包括器件设计、 制造、 封装和测试等技术手 段的日益成熟， MEMS热电堆红外探测器将凸显更加重要的地位。
响应率和探测率是描述红外探测器的两个重要性能指标， 决定了红外探测 器在不同领域的应用潜力。 其中， 响应率是器件输出电信号与入射红外辐射功 率的比值， 表征了红外探测器响应红外辐射的灵敏度， 同时又很大程度地影响 着探测率的值。 对热电堆红外探测器而言， 热偶条热端与冷端之间的温度差是 反映器件响应率和探测率大小的一个重要参数。 为了增大温度差以提高器件的 响应率和探测率， 需要尽可能保持冷端温度与基底温度相一致， 同时热端能有 效传递红外吸收区所吸收的热量至热偶条。 为了达到这一效果， 在冷端与基底 材料之间以及热端与红外吸收区之间制作热导通结构就显得十分必要； 考虑到 热电偶之间电学串联的特点， 该热导通结构还需同时具备电学隔离的作用。 现 有的热电堆红外探测器一般将衬底作为热沉体， 使热偶条的冷端与衬底直接搭 连， 又使热端与吸收区直接搭连， 因为衬底和吸收区材料可能具有一定的导电 能力， 因而采用这种直接搭连的方法将影响热电堆红外探测器的输出特性， 最 终影响器件的性能。
对于结构（包括热导通 /电隔离结构)、尺寸参数以及热偶材料等均已确定的 热电堆红外探测器， 其响应率和探测率的值取决于红外吸收区对红外辐射的吸 收效率。 氮化硅薄膜在红外探测器的研究中常用作红外吸收区的材料， 然而氮 化硅在 1-12μιη波长范围内所能达到的最高红外吸收效率仅为 35%左右， 进而， 基于氮化硅红外吸收层的热电堆红外探测器无法获得很高的响应率和探测率。 鉴于此， 要提高探测器的响应率和探测率， 应增大红外吸收区的吸收效率。 在 对红外探测器进行研究的数十年中， 科研人员已经开发出了多种具有高吸收率 且可作为红外吸收区的材料或结构。 其中， 金黑因其表面的纳米粗糙结构而具 有很好的红外吸收效果， 又因其热容较低， 进而在红外探测器的研究中成为一 种倍受欢迎的材料。 采用金黑材料为红外吸收区时， 器件的响应率和探测率可 相应提高。 然而， 金黑的制备工艺涉及到金属蒸发和金属纳米颗粒的凝集等工 序， 过程较为复杂， 并且其与 CMOS工艺的兼容性也较差， 一般只能在器件结 构加工完成后再将其制作在结构的表面。 鉴于此， 以黑金为吸收区的探测器其 大批量的生产就受到了限制。 1/4波长谐振结构利用介质层厚度与入射红外光波 的 1/4波长相匹配时所产生的谐振效果使红外吸收区的吸收效率达到最大。 然 而， 受谐振条件的制约， 以 1/4波长谐振结构为吸收区的探测器只能敏感中心波 长为某一特定值的红外辐射。此外，制备 1/4波长谐振结构时对工艺参数的要求 极其严格苛刻， 若介质层厚度与波长之间稍有不匹配， 将造成红外吸收效率的 极大衰减。
黑硅是一种呈森林状的大面积纳米柱 /针结构， 曾被认为是电子产业界的一 种革命性新材料。 相比于传统的硅材料， 黑硅对近红外波段的光具有极高的吸 收效率。 目前己提出的制备黑硅的方法多种多样， 包括如高能量飞秒激光辅助 刻蚀、 金属催化电化学腐蚀以及等离子体干法刻蚀等。 出于加工成本、 工艺便 捷程度以及工艺兼容性等多方面的综合考虑， 用等离子体干法刻蚀技术制备黑 硅的方法在常规半导体工艺中最常使用。 已有研究人员报道将黑硅用作红外吸 收层材料来提高热电堆红外探测器件性能的方法： 在形成热电堆红外探测器的 基础结构 （包括介质支撑膜、 热电堆、 金属连接结构等） 之后， 通过等离子体 增强化学气相沉积（PECVD)技术在表面淀积生长 α-Si或 Poly-Si层， 对其进行 高能量离子注入， 随后进行不完全干法刻蚀， 进而将其处理成黑硅并在吸收区 位置图形化， 最后进行器件结构的释放。 该方法中， 黑硅的制作利用了不完全 刻蚀， 因此黑硅的结构和尺寸参数的可控性较低； 并且在制备黑硅之前需要对 硅材料层进行高能量的离子注入以引入缺陷， 因而增加了工艺的复杂程度。 另 外， 该方法在 PECVD cc-Si或 Poly-Si层之后， 采用了 "黑硅先行， 释放后行"的 技术思路， 因此在结构释放过程中需要严格保护黑硅免受破坏。 然而， 黑硅仍 具硅材料的物理、 化学性质， 因此在后续 XeF2干法释放过程中易受腐蚀气体破 坏； 又因为黑硅中纳米结构具有一定的高度且密度较大， 采用常规的方法， 如 薄膜淀积保护或涂胶保护， 均不能实现有效的保护。
发明内容
本发明的目的是克服现有技术中存在的不足， 提供一种基于黒硅的高性能 MEMS热电堆红外探测器及其制备方法， 其结构简单易于实现， 便于单片集成， 响应率及探测率高， 与 CMOS工艺兼容， 适用范围广， 安全可靠。
按照本发明提供的技术方案， 所述基于黒硅的高性能 MEMS热电对红外探 测器， 包括衬底； 所述衬底上设有释放阻挡带， 所述释放阻挡带内具有热隔离 腔体， 所述热隔离腔体的正上方设有黒硅红外吸收区， 所述黒硅红外吸收区位 于释放阻挡带上； 黒硅红外吸收区的外圈设有若千热电堆， 黒硅红外吸收区外 圈的热电堆相互串接后电连接成一体， 相互串接的热电堆上设有用于将探测电 压输出的金属电极； 所述热电堆对应邻近黒硅红外吸收区的一端形成探测热端， 热电堆对应远离黒硅红外吸收区的一端形成探测冷端； 热电堆的探测冷端通过 第一热导通电隔离结构及所述第一热导通电隔离结构下方的热传导体与衬底相 连， 热传导体位于隔离腔体的外部， 并位于释放阻挡带及衬底之间， 第一热导 通电隔离结构嵌置于释放阻挡带内； 热电堆的探测热端通过第二热导通电隔离 结构与黒硅红外吸收区相接触， 第二热导通电隔离结构支撑于释放阻挡带上。
所述黒硅红外吸收区呈正方形， 黒硅红外吸收区的外侧设有四组均勾分布 的热电堆。
所述黒硅红外吸收区包括将黒硅材料体利用反应离子刻蚀形成的黒硅结构 及贯通所述黒硅红外吸收区的腐蚀释放通道， 所述腐蚀释放通道与热隔离腔体 相连通。
所述热电堆包括 P型热偶条及与所述 P型热偶条对应配合的 N型热偶条； 所述 P型热偶条与 N型热偶条位于释放阻挡带上； 在热电堆的探测冷端， P型 热偶条及 N型热偶条均与第一热导通电隔离结构相接触， 且 P型热偶条通过第 二连接线与邻近热电偶内的 N型热偶条电连接； 在热电堆的探测热端， 所述 P 型热偶条与 N型热偶条均与第二热导通电隔离结构相接触， 且通过第一连接线 电连接。
所述黒硅材料体通过 LPCVD或 PECVD淀积方法制备在释放阻挡带上。 所述第一热导通电隔离结构及第二热导通电隔离结构的材料均包括 Si3N4。 一种基于黒硅的高性能 MEMS热电堆红外探测器的制备方法，所述 MEMS 热电堆红外探测器的制备方法包括如下步骤：
a、 提供衬底， 并在所述衬底的表面上设置衬底保护层；
b、选择性地掩蔽和刻蚀上述衬底保护层，以在衬底上方形成衬底接触窗口， 所述衬底接触窗口贯通衬底保护层；
c、 在上述衬底接触窗口上方淀积热传导体， 并在所述热传导体上淀积热传 导体掩膜层， 所述热传导体覆盖于衬底保护层上并填充在衬底接触窗口内； d、 选择性地掩蔽和刻蚀上述热传导体掩膜层， 以在热传导体掩膜层上形成 热传导体刻蚀窗口， 所述热传导体刻蚀窗口贯通热传导体掩膜层， 并在衬底接 触窗口的内侧； 利用热传导体刻蚀窗口刻蚀热传导体直至衬底保护层， 得到热 传导体通孔；
e、 在上述热传导体掩膜层上淀积支撑层， 所述支撑层填充于热传导体通孔 及热传导体刻蚀窗口内， 并覆盖于热传导体掩膜层上， 以在衬底上方形成释放 阻挡带结构及介质支撑膜；
f、 选择性地掩蔽和刻蚀支撑层， 以在支撑层内形成热导通电隔离开口， 所 述热导通电隔离开口贯通支撑层并位于释放阻挡带结构的外侧； 在上述支撑层 上方淀积热导通电隔离体层， 所述热导通电隔离体层填充于热导通隔离幵口内， 并覆盖于支撑层上；
g、选择性地掩蔽和刻蚀上述热导通电隔离体层， 以在上述支撑层上形成第 一热导通电隔离块及第二热导通电隔离块， 所述第一热导通电隔离块位于支撑 层内， 第二热导通电隔离块位于支撑层上 ·，
h、在上述第一热导逋电隔离块及与所述第一热导通电隔离块邻近的第二热 导通电隔离块间设置热偶条， 所述热偶条包括 N型热偶条及 P型热偶条， 热偶 条的探测冷端与第一热导通电隔离块相接触， 热偶条的探测热端与第二热导通 电隔离块相接触；
i、 在上述热偶条上方设置热偶条保护层， 所述热偶条保护层覆盖的区域包 括热偶条及第一热导通电隔离块； 在相邻的第二热导通电隔离块之间淀积黒硅 材料体， 所述黒硅材料体与第二热导通电隔离块相接触；
j、 选择性地掩蔽和刻蚀上述热偶条保护层， 以在衬底上方形成用于连接热 偶条所需的电连接通孔；
k、 在上述已制作电连接通孔的衬底上溅射金属层， 所述金属层填充在上述 电连接通孔内， 选择性地掩蔽和刻蚀上述金属层， 使得在形成热电堆探测热端， 热电偶内的 N型热偶条与 P型热偶条通过第一连接线电连接， 并在形成热电堆 探测冷端， P型热偶条通过第二连接线与相邻热偶条内的 N型热偶条电连接， 且在第一热导通电隔离结构的外侧形成第一电连接体；
1、在上述衬底表面上淀积钝化层，所述钝化层覆盖的区域包括黒硅材料体、 第一连接线、 第二连接线及第一电连接体；
m、选择性地掩蔽和刻蚀上述钝化层， 以在黒硅材料体上的钝化层上形成黒 硅刻蚀窗口， 利用黒硅刻蚀窗口对黒硅材料体进行刻蚀， 直至刻蚀到黒硅刻蚀 窗口正下方的热传导体， 以形成释放孔；
n、 利用释放阻挡带结构释放黒硅材料体正下方的热传导体， 以得到热隔离 腔体；
0、 利用钝化层作为黒硅材料体表面粗糙结构的侧墙材料层， 对黒硅材料体 采用一次反应离子刻蚀 （RIE)， 以形成基于黒硅结构的黒硅红外吸收区， 同时 形成第二电连接体。
所述步骤 m和步骤 η·中， 在释放孔的内壁上涂覆黒硅遮挡层。
述步骤 h中， 所述 P型热偶条与 N型热偶条位于释放阻挡带结构上， 在形 成热电堆探测冷端， P型热偶条及 N型热偶条均与第一热导通电隔离块相接触; 在形成热电堆探测热端， 所述 P型热偶条与 N型热偶条均与第二热导通电隔离 结构相接触。
所述步骤 k中， 金属层的材料包括 Al。
本发明的优点：
1、 采用黒硅红外吸收区， 因黑硅的红外吸收效率高进而具有高响应率、 高 探测率等性能特点， 从而克服了以 Si3N4为吸收区材料的探测器响应率、探测率 不高的问题。
2、 因黑硅的制备对工艺参数（如所生长 Si02、 Poly-Si厚度， 刻蚀的时间及 厚度等）没有非常苛刻的要求， 因此基于黑硅的红外探测器件结构更易于实现， 从而克服了以 1/4波长谐振结构为吸收区的探测器对工艺参数的要求过髙继而 性能参数可控性差的缺陷。
3、 因黑硅在较大波长范围内都具有很高的红外吸收效率， 因此该器件的适 用波长范围大，克服了以 1/4波长谐振结构为吸收区的探测器仅适用于单一波长 范围的不足。
4、本发明的制备过程采用"释放先行，黑硅后行"的技术思路,有效克服了"黑 硅先行， 释放后行"技术方法中黑硅结构易受损的问题。
5、本发明得到的探测器在热电堆的冷端 /热端分别进行了热导通电隔离结构 的设计与制作， 有利于进一步提高器件的性能。
6、该器件的加工过程与 CMOS工艺完全兼容， 因而有利于传感器件结构和 测试电路的单片集成制造。
7、 由本发明提供的新型高性能 MEMS热电堆红外探测器具有工艺兼容性 好， 器件结构易于实现， 便于单片集成， 响应率、 探测率高等特点， 可在温度 传感器、 气敏传感器、 热流量计等传感探测器件与系统中获得广泛和实际的应 用。
附图说明
图 1〜图 15为本发明具体实施工艺步骤剖视图， 其中
图 1为本发明在衬底上形成衬底保护层后的剖视图。
图 2为本发明形成衬底接触窗口后的剖视图。
图 3为本发明形成热传导体掩膜层后的剖视图。
图 4为本发明在热传导体内形成热传导体通孔后的剖视图。
图 5为本发明形成释放阻挡带结构后的剖视图。
图 6为本发明形成热导通电隔离体层后的剖视图。
图 7为本发明形成第一热导通电隔离块与第二热导通电隔离块后的剖视图。 图 8为本发明形成热偶条后的剖视图。
图 9为本发明淀积形成黒硅材料体后的剖视图。
图 10为本发明形成电连接通孔后的剖视图。
图 11为本发明形成第一连接线、 第二连接线及第一电连接体后的剖视图。 图 12为本发明淀积钝化层后的剖视图。
图 13为本发明形成释放孔并在释放孔内壁涂覆释放遮挡层后的剖视图。 图 14为本发明释放热传导体形成热隔离腔体后的剖视图。
图 15为本发明形成基于黒硅结构的黒硅红外吸收区后的剖视图。
图 16为本发明黒硅的扫描电镜照片及其红外吸收光谱图。
图 17为本发明的结构示意图。
附图标记说明： 1-黒硅红外吸收区、 2-释放阻挡带、 3-第二热导通电隔离结 构、 4-第一热导通电隔离结构、 5-P型热偶条、 6-N型热偶条、 7-金属连接线、 8-金属电极、 9-腐蚀释放通道、 101-衬底、 102-衬底保护层、 202-衬底接触窗口、 302-热传导体填充结构、 303-热传导体、 304-热传导体掩膜层、 403-热传导体通 孔、 404-热传导体刻蚀窗口、 503-释放阻挡带结构、 504-介质支撑膜、 505-支撑 层、 605-热导通电隔离开口、 606-热导通电隔离体层、 705-第一热导通电隔离块、 706-第二热导通电隔离块、 807-热偶条冷端、 810-热偶条热端、 811-热偶条、 908- 热偶条保护层、 909-黒硅材料体、 910-趴跨区域、 1008-电连接通孔、 1109-第一 连接线、 1110-第一电连接体、 1111-第二连接线、 1211-钝化层、 1309-释放孔、 1311-黒硅刻蚀窗口、 1312-释放遮挡层、 1403-热隔离腔体、 1412-黒硅遮挡层、 1509-黒硅结构及 1510-第二电连接体。
具体实施方式
下面结合具体附图和实施例对本发明作进一步说明。
如图 17所示： 本发明基于黒硅的高性能 MEMS热电对红外探测器， 包括 衬底 101 ; 所述衬底 101上设有释放阻挡带 2， 所述释放阻挡带 2内具有热隔离 腔体 1403， 所述热隔离腔体 1403的正上方设有黒硅红外吸收区 1 , 所述黒硅红 外吸收区 1位于释放阻挡带 2上； 黒硅红外吸收区 1的外侧设有若干热电堆， 黒硅红外吸收区 1 外侧的热电堆相互串接后电连接成一体， 相互串接的热电堆 上设有用于将探测电压输出的金属电极 8;所述热电堆对应邻近黒硅红外吸收区 1的一端形成探测热端，热电堆对应远离黒硅红外吸收区 1的一端形成探测冷端; 热电堆的探测冷端通过第一热导通电隔离结构 4及所述第一热导通电隔离结构 4 下方的热传导体 303与衬底 101相连， 热传导体 303位于热隔离腔体 1403的外 侧， 并位于释放阻挡带 2及衬底 101之间， 第一热导通电隔离结构 4嵌置于释 放阻挡带 2内； 热电堆的探测热端通过第二热导通电隔离结构 3与黒硅红外吸 收区 1相接触， 第二热导通电隔离结构 3支撑于释放阻挡带 2上。
所述第一热导通电隔离结构 4及第二热导通电隔离结构 3 的材料均包括 Si3N4; 通过第一热通道电隔离结构 4及第二热导通电隔离结构 3能够达到热导 通的作用及电隔离的作用， 以使得热电堆的探测冷端温度与衬底 101 的温度保 持一致，热电堆的探测热端通过第二热通道电隔离结构 3接收黒硅红外吸收区 1 吸收的热量， 以提高红外探测器的响应率及灵敏度。
本发明实施例中所述黒硅红外吸收区 1呈正方形， 黒硅红外吸收区 1的外 侧设有四组均匀分布的热电堆； 四组热电堆两两对称分布于黒硅红外吸收区 1 的外侧； 黒硅红外吸收区 1 还可以采用其他形状， 如长方形、 圆形、 四角补偿 形等所需的形状， 热电堆根据黒硅红外吸收区 1 的形状对应分布。 热电堆间通 过金属连接线 7电连接， 形成电阻特性。 黒硅红外吸收区 1外侧的热电堆相互 串接电连接成一体后， 通过两个金属电极 8将整个探测器探测的热量以电压的 形式向外输出， 通过电压的变化能够反映出黒硅红外吸收区 1吸收的红外热量。
本发明实施例中所述黒硅红外吸收区 1包括将黒硅材料体 909利用粗糙多 晶硅 （Poly-Si) 表面可作为侧墙材料支撑结构的特性， 并结合高选择比 RIE形 成的黒硅结构 1509及贯通所述黒硅红外吸收区 1的腐蚀释放通道 9， 所述腐蚀 释放通道 9与热隔离腔体 1403相连通。
如图 15所示： 本发明具体实施方式中， 所述热电堆包括若干 P型热偶条 5 及与所述 P型热偶条 5对应配合的 N型热偶条 6; P型热偶条 5及与 P型热偶条 5对应配合的 N型热偶条 6间形成热电偶； 所述 P型热偶条 5与 N型热偶条 6 位于释放阻挡带 3上； 在热电堆的探测冷端， P型热偶条 5及 N型热偶条 6均 与第一热导通电隔离结构 4相接触， 且 P型热偶条 5通过第二连接线 1111与邻 近热电偶内的 N型热偶条 6电连接； 在热电堆的探测热端， 所述 P型热偶条 5 与 N型热偶条 6均与第二热导通电隔离结构 3相接触， 且通过第一连接线 1109 电连接。 图 17中的释放阻挡带 2相当于图 5中的释放阻挡带结构 503， 第一热 导通电隔离结构 4相当于图 7中的第一热导通电隔离块 705,第二热导通电隔离 结构 3相当于第二热导通电隔离块 706。
如图 1〜图 15所示:上述热电堆红外探测器结构可以采用下述工艺步骤实现， 下述实施例中， 如无特殊说明， 工艺步骤均为常规方法； 所述试剂和材料， 如无 特殊说明， 均可从商业途径获得。 具体地包括 - a、 提供衬底 101， 并在所述衬底 101的表面上设置衬底保护层 102;
如图 1所示， 在衬底 101的表面通过干氧氧化的方式生长 Si02材料层， 以 形成衬底保护层 102，衬底保护层 102的厚度为 5000A,干氧氧化时温度为 950°C， 氧气的含量为 60%; 所述衬底 101采用常规的材料， 衬底 101的材料包括硅。
b、 选择性地掩蔽和刻蚀上述衬底保护层 102， 以在衬底 101上方形成衬底 接触窗口 202， 所述衬底接触窗口 202贯通衬底保护层 102;
如图 2所示： 在衬底保护层 102的表面旋涂光刻胶， 并通过光刻工艺在对 应所需形成热偶条冷端的位置形成光刻胶的多段开口图形， 开口的宽度为 16μιη, 每段长度为 50μιη， 总长度为大约 700μηι; 随后， 采用 RIE (反应离子刻 蚀） Si02技术将光刻胶上的开口图形转移到衬底保护层 102上， 形成衬底接触 窗口 202; 最后， 利用氧等离子体干法去胶以及硫酸 /双氧水湿法去胶相结合的 方法去除硅片表面的光刻胶。
c、在上述衬底接触窗口 202上方淀积热传导体 303，并在所述热传导体 303 上淀积热传导体掩膜层 304，所述热传导体 303覆盖于衬底保护层 102上并填充 在衬底接触窗口 202内；
如图 3所示， 在已经形成开口的衬底保护层 102上 LPCVD Poly-Si以形成 热传导体 303, 并利用 LPCVD工艺得到热传导体掩膜层 304， 热传导体掩膜层 304的材料为 Si02。 其中， 热传导体 304的厚度为 Ιμπι, 热传导体掩膜层 304 的厚度为 1000 Α。 由于热传导体 304的厚度较其下衬底保护层 102厚很多， 因 此热传导体 303能完全填充衬底接触窗口 202, 形成 Poly-Si的热传导体填充结 构 302。
d、选择性地掩蔽和刻蚀上述热传导体掩膜层 304，以在热传导体掩膜层 304 上形成热传导体刻蚀窗口 404，所述热传导体刻蚀窗口 404贯通热传导体掩膜层 304， 并在衬底接触窗口 202的内侧； 利用热传导体刻蚀窗口 404刻蚀热传导体 303直至衬底保护层 102， 得到热传导体通孔 403;
如图 4所示， 在热传导体掩膜层 304的表面旋涂光刻胶， 并通过光刻工艺 在光刻胶上形成封闭开口， 随后利用 RIE Si02的方法将光刻胶上封闭开口的图 形转移到热传导体掩膜层 304上， 形成热传导体掩膜层 304上的封闭幵口图形 即热传导体刻蚀窗口 404; 利用氧等离子体干法去胶以及硫酸 /双氧水湿法去胶 相结合的方法去除硅片表面的光刻胶； RIE Poly-Si将热传导体掩膜层 304上的 封闭开口图形转移到热传导体 303上， 形成热传导体 303上的封闭开口图形即 热传导体通孔 403， 所形成热传导体通孔 403的宽度为 8000 A。
e、 在上述热传导体掩膜层 304上淀积支撑层 505， 所述支撑层 505填充于 热传导体通孔 403及热传导体刻蚀窗口 404内， 并覆盖于热传导体掩膜层 304 上， 以在衬底 101上方形成释放阻挡带结构 503及介质支撑膜 504;
如图 5所示， 在己经形成热传导体通孔 403和热传导体刻蚀窗口 404的衬 底 101上， 通过 LPCVD技术淀积生长 Si02层， 以形成支撑层 505， 所述支撑层 505的厚度为 5000 A, 支撑层 505能完全填充热传导体通孔 403和热传导体刻 蚀窗口 404， 形成 8^)2释放阻挡带结构 503， 并同时形成介质支撑膜结构 504; 此处， 释放阻挡带结构 503与图 17中的释放阻挡带 2相对应， 用于形成后续的 释放阻挡带 2。
f、 选择性地掩蔽和刻蚀支撑层 505， 以在支撑层 505内形成热导通电隔离 开口 605， 所述热导通电隔离开口 605贯通支撑层 505并位于释放阻挡带结构 503的外侧； 在上述支撑层 505上方淀积热导通电隔离体层 606， 所述热导通电 隔离体层 606填充于热导通电隔离开口 605内， 并覆盖于支撑层 605上；
如图 6所示， 在支撑层 505上旋涂光刻胶， 并通过光刻工艺在对应于所需 热偶条冷端的位置形成光刻胶的多个开口图形， 每个开口图形的宽度和长度分 别为 15μπι和 50μιη;利用 RIE Si02技术将光刻胶上的开口图形转移到支撑层 505 上形成支撑层 505上的热通电隔离开口 605;利用氧等离子体干法去胶以及硫酸 /双氧水湿法去胶相结合的方法去除硅片表面的光刻胶； 随后， 通过 LPCVD技 术在支撑层 505上淀积生长 Si3N4层， 以形成热导通电隔离层 606， 热导通电隔 离层 606的厚度为 5000 A。
g、 选择性地掩蔽和刻蚀上述热导通电隔离体层 606, 以在上述支撑层 505 上形成第一热导通电隔离块 705及第二热导通电隔离块 706，所述第一热导通电 隔离块 705位于支撑层 505内， 第二热导通电隔离块 706位于支撑层 505上； 如图 7所示， 在热导通电隔离层 606上旋涂光刻胶， 并通过光刻工艺在对 应于热偶条冷端和热端的位置分别形成多个光刻胶的图形； 利用 RIE Si3N4技术 将光刻胶上的图形转移到热导通电隔离层 606上，形成第一热导通电隔离块 705 和第二热导通电隔离块 706， 分别对应于图 17中的第一热导通电隔离结构 4和 第二热导通电隔离结构 3，、其中， 第一热导通电隔离块 705的宽度为 18μιη， 长 度为 80μιη， 第二热导通电隔离块 706的宽度为 18μιη, 长度为 80μιη; 最后， 利 用氧等离子体干法去胶以及硫酸 /双氧水湿法去胶相结合的方法去除硅片表面的 光刻胶。
h、在上述第一热导通电隔离块 705及与所述第一热导通电隔离块 705邻近 的第二热导通电隔离块 706间设置热偶条 811 ,所述热偶条 811包括 N型热偶条 6及 P型热偶条 5， 热偶条 811的探测冷端与第一热导通电隔离块 705相接触， 热偶条 811的探测热端与第二热导通电隔离块 706相接触；
如图 8所示，在已实现第一热导通电隔离结构 4和第二热导通电隔离结构 3 的衬底 101上通过 LPCVD技术淀积生长一层厚度为 2000 A的 Poly-Si层， 在 Poly-Si层的不同位置分别实现 N型和 P型掺杂， 其中， P型和 N型 Poly-Si的 掺杂浓度分别为 8el8 cm'3和 4el9 cm-3, 掺杂的能量分别为 30 KeV和 80 KeV。 本发明实施例中， N型热偶条 6、 P型热偶条 5的掺杂浓度低， 因而热偶条的赛 贝克系数高， 进而有利于提高器件的性能。 现有的热电堆红外探测器的热偶条 采用较高的掺杂浓度， 且热偶条的掺杂浓度均高于本发明实施例中的掺杂浓度。 由于现有热电堆红外探测器的热偶条均采用高掺杂浓度， 所以得到红外探测器 的电阻比较小， 进而有利于减小器件的噪声； 但是高的掺杂浓度使得热偶条的 赛贝克系数减小， 因此会影响到器件的探测灵敏度； 为了提高器件的灵敏度， 往往增大热电偶的对数， 但这样处理的结果又使器件的电阻值增大， 进而也增 大了噪声。 本发明中采用了较低的掺杂浓度， 因而可以有效提高器件的探测灵 敏度； 为了降低得到红外探测器的噪声， 本发明的结构中减少热电偶的对数。 本发明实施例中， 通过采用低掺杂浓度的热电偶来提高红外探测器的探测灵敏 度， 同时减少热电偶的对数来降低探测器的噪声； 实验表明， 采用本发明掺杂 浓度的热偶条对整个红外探测器探测灵敏度的提高量大于减少热电偶对数对探 测灵敏度的降低量， 即本发明实施例中能够提升得到红外探测器的探测灵敏度。
在 N型和 P型掺杂后的 Poly-Si层上旋涂光刻胶，并通过光刻工艺在热偶条 对应的位置形成光刻胶的图形； 利用 RIE Poly-Si 技术将光刻胶图形转移到 Poly-Si层上， 形成热偶条 811， 所述热偶条 811包括 N型热偶条 6及 P型热偶 条 5; N型热偶条 6与对应的 P型热偶条 5间形成热电偶， N型热偶条 6与 P型 热偶条 5间形成平行并列的结构， 热偶条 811的探测冷端 807与第一热导通电 隔离块 705相接， 探测热端 810趴跨半个第二热导通电隔离块 706的图形； 最 后， 利用氧等离子体干法去胶以及硫酸 /双氧水湿法去胶相结合的方法去除硅片 表面的光刻胶。 其中， 热偶条的宽度为 3μπι, 长度均为 125μτη， 对数为 20， 沿 着正方形黒硅红外吸收区 1的四周对称放置。
本发明形成的所述 Ρ型热偶条 5与 Ν型热偶条 6位于释放阻挡带结构 503 上； 在探测冷端， Ρ型热偶条 5及 Ν型热偶条 6均与第一热导通电隔离块 705 相接触； 在探测热端， 所述 Ρ型热偶条 5与 Ν型热偶条 6均与第二热导通电隔 离结构 3相接触。
i、 在上述热偶条 811 上方设置热偶条保护层 908， 所述热偶条保护层 908 覆盖的区域包括热偶条 811及第一热导通电隔离块 705;同时在相邻的第二热导 通电隔离块 706之间淀积形成黒硅材料体 909，所述黒硅材料体 909与第二热导 通电隔离块 706相接触；
如图 9所示， 在已经实现热偶条 811结构的衬底 101上 LPCVD 2000 A的 热偶条保护层 908，热偶条保护层 908的材料为 Si02;在热偶条保护层 908上旋 涂光刻胶， 并通过光刻工艺在热偶条 811 所在区域形成大面积的光刻胶图形； 利用 RIE Si02技术将光刻胶图形转移到热偶条保护层 908上，热偶条保护层 908 完全覆盖于第一热导通电隔离块 705，而位于热偶条热端的第二热导通电隔离块 706不被热偶条保护层 908完全覆盖，露出部分的尺寸宽度为 9μιη;本发明实施 例中， 热偶条保护层 908覆盖第二热导通电隔离块 706的一半， 热偶条保护层 908不完全覆盖第二热通道电隔离块 706， 主要是保证黒硅材料体 909与第二热 通道电隔离块 706的接触， 以保证后续形成黒硅红外吸收区 1吸收的热量通过 第二热通道电隔离块 706能传导到热电偶上， 热偶条保护层 908覆盖第二热导 通电隔离块 706 的面积还可以根据需要来设置， 只要能保证黒硅红外吸收区 1 吸收的热量通过第二热通道电隔离块 706能传导到热电偶上即可；
之后， 利用氧等离子体干法去胶以及硫酸 /双氧水湿法去胶相结合的方法去 除硅片表面的光刻胶； 此后， 通过 PECVD技术淀积生长厚度为 Ιμιη的黒硅材 料体 909， 黒硅材料体 909的材料为 Poly-Si, 并在所需形成吸收区位置形成黒 硅材料体 909的图形化， 该图形化的黒硅材料体 909同样趴跨在位于热偶条热 端的第二热导通电隔离结构 3上， 如图中趴跨区域 910所示； 利用氧等离子体 干法去胶以及硫酸 /双氧水湿法去胶相结合的方法去除硅片表面的光刻胶。其中， PECVD黑推材料体 909时炉管温度为 270 °C， 功率为 170 W, 压力 400 mTorr, 娃烧流量为 300 sccm (standard-state cubic centimeter per minute )。
j、 选择性地掩蔽和刻蚀上述热偶条保护层 908， 以在衬底 101上方形成用 于连接热偶条 811所需的电连接通孔 1008;
如图 10所示， 在衬底 101表面旋涂光刻胶， 并在对应于所需形成电连接通 孔的位置通过光刻形成光刻胶图形的幵口， 随后利用 RIE Si02技术将光刻胶上 的幵口图形转移到热偶条保护层 908上， 形成热偶条保护层 908的开口图形， 也即电连接通孔 1008; 最后， 利用氧等离子体干法去胶以及硫酸 /双氧水湿法去 胶相结合的方法去除硅片表面的光刻胶。
k、 在上述已制作电连接通孔 1008的衬底 101上溅射金属层， 所述金属层 填充在上述电连接通孔 1008内， 选择性地掩蔽和刻蚀上述金属层， 使得在形成 的探测冷端，热偶条 811内的 N型热偶条 6与 P型热偶条 5通过第一连接线 1109 电连接， 并在形成的探测热端， P型热偶条 5通过第二连接线 1111与相邻热偶 条 811内的 N型热偶条 6电连接， 且在第一热导通电隔离结构 705的外侧形成 第一电连接体 1110;
如图 11所示， 在制作了电连接通孔 1008的衬底 101上溅射 A1金属层， 并 通过光刻工艺使 A1金属层在所需形成电连接的位置和金属电极的位置图形化， 形成第一连接线 1109、第二连接线 1111和第一电连接体 1110; 随后采用有机清 洗的方法去除硅片表面的光刻胶。 最外侧的第二连接线 1111用于实现与金属连 接线 7和金属电极 8电连接， 第一电连接体 1110与金属电极 8相对应， 用于形 成金属电极 8。本发明实施例串接时，热电堆内的 P型热偶条 5与相邻热电堆内 的 N型热偶条 6通过第一连接线 1109电连接， 后续依次连接， 形成热电堆。本 发明实施例中， 形成的探测热端是指制备得到所需探测器中热电堆的探测热端， 形成的探测冷端类同。
1、 在上述衬底 101的表面上淀积钝化层 1211， 所述钝化层 1211覆盖区域 包括黒硅材料体 909、第一连接线 1109、第二连接线 1111及第一电连接体 1110;
如图 12所示， 在实现了金属连接的衬底 101上采用 PECVD技术淀积生长 厚度为 1000 A的 Si02层， 以形成钝化层 1211。 m、 选择性地掩蔽和刻蚀上述钝化层 1211， 以在黒硅材料体 909上的钝化 层 1211上形成黒硅刻蚀窗口 1311， 利用黒硅刻蚀窗口 1311对黒硅材料体 909 进行刻蚀， 直至刻蚀到黒硅刻蚀窗口 1311正下方的热传导体 303， 以形成释放 孔 1309;
如图 13所示， 在钝化层 1211上旋涂光刻胶， 通过光刻工艺使光刻胶在器 件中对应于吸收区区域内部、 热偶条与热偶条之间的区域以及封闭开口所围面 积内除热偶条区域和吸收区区域外的大面积区域中形成光刻胶的开口； 随后， 分别利用 RIE Si02、 RIE Poly-Si和 RIE Si02技术将光刻胶的开口图形转移到不 同的材料层上， 也即形成释放孔 1309和黒硅刻蚀窗口 1311 ; 为了保护后续形成 黒硅红外吸收区 1区域内的 Poly-Si不被释放气体损坏， 在所需形成黒硅红外吸 收区 1的区域内部的释放孔 1309侧壁通过光刻涂覆一层释放遮挡层 1312，释放 遮挡层 1312为光刻胶， 侧壁位置释放遮挡层 1312的厚度为 2μιη， 进而该涂覆 了释放遮挡层 1312后的释放孔 1309的尺寸缩小。 本发明实施例中， 黒硅刻蚀 窗口 1311及释放孔 1309—起形成了腐蚀释放通道 9。
η、 利用释放阻挡带结构 503释放黒硅材料体 909正下方的热传导体 303， 以得到热隔离腔体 1403;
如图 14所示： 由于热传导体 303的材料为 Poly-Si， 因此采用 XeF2干法刻 蚀技术各向同性刻蚀器件结构中的热传导体 303，通过腐蚀释放通道 9将热传导 体 303的 Poly-Si材料腐蚀掉， 进而形成热隔离腔体 1403。 图 14中的黒硅遮挡 层 1412与图 13中的释放遮挡层 1312对应一致。
o、 利用钝化层 1211作为黒硅材料体 909表面粗糙结构的侧墙材料层， 对 黒硅材料体 909采用一次 RIE, 以形成基于黒硅结构 1509的黒硅红外吸收区 1， 同时形成第二电连接体 1510。
如图 15所示， 利用粗糙的黒硅材料体 909及覆盖黒硅材料体 909表面的钝 化层 1211可作为黒硅材枓体 909表面粗糙结构的侧墙材料层的特点， 采用一次 RIE Poly-Si技术加工黑硅结构 1509，黒硅结构 1509为针状或柱状结构；在各向 异性刻蚀过程中，第一电连接体 1110上的钝化层 1211被完全刻蚀，进而露出第 二电连接体 1510，最终得到以黑硅为吸收区材料的新型 MEMS热电堆红外探测 器， 总体结构示意图如图 17所示。 本发明中黑硅红外吸收区 1的制备利用了粗 糙的 Poly-Si表面可作为侧墙支撑结构的特性， 并结合高选择比的各向异性刻蚀 技术实现， 本发明中制备黑硅红外吸收区 1的黑硅材料体 909 (黑硅材料体 909 的材料为 Poly-Si) 层可以采用 PECVD或 LPCVD技术淀积生长得到。
其中黑硅结构 1509的扫描电镜照片及其红外吸收光谱如图 16所示。 本发 明实施例中， 第二电连接体 1510与第一电连接体 1110相对应一致， 并与图 17 中的金属电极 8相对应一致， 用于将整个热电堆红外探测结构探测的结果向外 输出。
由上述方法得到的红外探测器， 其主要性能参数的理论计算结果为： 响应 率为 577 V/W; 探测率为 S^SES cmHz^ 1; 热响应时间为 82.9 ms; 噪声密度 为 91 nV/Hz1/2。 如图 1~17所示： 工作时， 通过黒硅红外吸收区 1吸收红外线的热量， 黒硅 红外吸收区 1吸收的热量通过第二热导通电隔离结构 3传导到黒硅红外吸收区 1 两侧的热电堆上， 热电堆的探测冷端通过第一热导通电隔离结构 4及热传导体 303与衬底 101相连， 以使得冷端温度与衬底 101的温度保持一致， 并达到电隔 离的作用。 热电堆内的 N型热偶条 6与 P型热偶条 5形成热电偶结构， 热电堆 的探测热端吸收热量后与探测冷端的温度差会在冷端产生一定的电势差， 热电 堆内的多个热电偶串接后通过金属电极 8 向外输出电压， 通过输出电压判断达 到所需的检测过程。
本发明采用黒硅红外吸收区 1， 因黑硅的红外吸收效率高进而具有高响应 率、 高探测率等性能特点， 从而克服了以 Si3N4为吸收区材料的探测器响应率、 探测率不高的问题。 因黑硅的制备对工艺参数 （如所生长 Si02、 Poly-Si厚度， 刻蚀的时间及厚度等） 没有非常苛刻的要求， 因此基于黑硅的红外探测器件结 构更易于实现，从而克服了以 1/4波长谐振结构为吸收区的探测器对工艺参数的 要求过高继而性能参数可控性差的缺陷。 因黑硅在较大波长范围内都具有很高 的红外吸收效率， 因此该器件的适用波长范围大， 克服了以 1/4波长谐振结构为 吸收区的探测器仅适用于单一波长范围的不足。 本发明的制备过程采用"释放先 行， 黑硅后行"的技术思路， 有效克服了"黑硅先行， 释放后行"技术方法中黑硅 结构易受损的问题。 本发明探测器在热电堆的探测冷端、 探测热端分别进行了 热导通电隔离结构的设计与制作， 有利于进一步提高器件的性能。 该器件的加 工过程与 CMOS工艺完全兼容， 因而有利于传感器件结构和测试电路的单片集 成制造。 由本发明提供的新型高性能 MEMS热电堆红外探测器具有工艺兼容性 好， 器件结构易于实现， 便于单片集成， 响应率、 探测率高等特点， 可在温度 传感器、 气敏传感器、 热流量计等传感探测器件与系统中获得广泛和实际的应 用。

Claims

权 利 要 求 书
1、 一种基于黒硅的高性能 MEMS热电对红外探测器， 包括衬底 （101 ); 其特征是： 所述衬底 （101 ) 上设有释放阻挡带 （2)， 所述释放阻挡带 （2) 内 具有热隔离腔体（1403), .所述热隔离腔体（1403) 的正上方设有黒硅红外吸收 区 （1 )， 所述黒硅红外吸收区 （1 ) 位于释放阻挡带 （2) 上； 黒硅红外吸收区
( 1 ) 的外侧设有若干热电堆， 黒硅红外吸收区 （1 ) 外侧的热电堆相互串接后 电连接成一体， 相互串接的热电堆上设有用于将探测电压输出的金属电极（8); 所述热电堆对应邻近黒硅红外吸收区 （1 ) 的一端形成探测热端， 热电堆对应远 离黒硅红外吸收区 （1 ) 的一端形成探测冷端； 热电堆的探测冷端通过第一热导 通电隔离结构 （4) 及所述第一热导通电隔离结构 （4) 下方的热传导体（303) 与衬底 （101 ) 相连， 热传导体 （303 ) 位于热隔离腔体 （1403) 的外侧， 并位 于释放阻挡带 （2)及衬底 （101 )之间， 第一热导通电隔离结构 （4) 嵌置于释 放阻挡带 （2) 内； 热电堆的探测热端通过第二热导通电隔离结构 （3 ) 与黒硅 红外吸收区 （1 ) 相接触， 第二热导通电隔离结构 （3 ) 支撑于释放阻挡带 （2) 上。
2、 根据权利要求 1所述的基于黒硅的高性能 MEMS热电对红外探测器， 其特征是： 所述黒硅红外吸收区 （1 ) 呈正方形， 黒硅红外吸收区 （1 ) 的外侧 设有四组均匀分布的热电堆。
3、 根据权利要求 1所述的基于黒硅的高性能 MEMS热电对红外探测器， 其特征是： 所述黒硅红外吸收区 （1 ) 包括将黒硅材料体 （909) 利用反应离子 刻蚀形成的黒硅结构 （1509)及贯通所述黒硅红外吸收区 （1 ) 的腐蚀释放通道
(9), 所述腐蚀释放通道 （9) 与热隔离腔体 （1403) 相连通。
4、 根据权利要求 1所述的基于黒硅的高性能 MEMS热电对红外探测器， 其特征是： 所述热电堆包括 P型热偶条 （5) 及与所述 P型热偶条（5)对应配 合的 N型热偶条 （6); 所述 P型热偶条（5) 与 N型热偶条（6)位于释放阻挡 带 （3)上； 在热电堆的探测冷端， P型热偶条（5)及 N型热偶条（6)均与第 一热导通电隔离结构 （4)相接触， 且 P型热偶条 （5)通过第二连接线 （1111 ) 与邻近热电偶内的 N型热偶条（6)电连接； 在热电堆的探测热端， 所述 P型热 偶条（5)与 N型热偶条（6)均与第二热导通电隔离结构（3)相接触， 且通过 第一连接线 （1109) 电连接。
5、 根据权利要求 3所述的基于黒硅的高性能 MEMS热电对红外探测器， 其特征是： 所述黒硅材料体（909)通过 LPCVD或 PECVD淀积方法制备在释 放阻挡带 （2) 上。
6、 根据权利要求 1所述的基于黒硅的高性能 MEMS热电对红外探测器， 其特征是： 所述第一热导通电隔离结构 （4) 及第二热导通电隔离结构 （3 ) 的 材料均包括 Si3N4。
7、 一种基于黒硅的高性能 MEMS热电堆红外探测器的制各方法， 其特征 是， 所述 MEMS热电堆红外探测器的制备方法包括如下步骤：
(a)、提供衬底（101)，并在所述衬底（101)的表面上设置衬底保护层（102);
(b)、 选择性地掩蔽和刻蚀上述衬底保护层 （102)， 以在衬底 （101)上方 形成衬底接触窗口 （202)， 所述衬底接触窗口 （202) 贯通衬底保护层 （102);
(c)、 在上述衬底接触窗口 （202)上方淀积热传导体 （303)， 并在所述热 传导体 （303) 上淀积热传导体掩膜层 （304)， 所述热传导体 （303) 覆盖于衬 底保护层 （102) 上并填充在衬底接触窗口 （202) 内；
(d)、 选择性地掩蔽和刻蚀上述热传导体掩膜层 （304)， 以在热传导体掩 膜层 （304) 上形成热传导体刻蚀窗口 （404)， 所述热传导体刻蚀窗口 （404) 贯通热传导体掩膜层 （304)， 并在衬底接触窗口 （202) 的内侧； 利用热传导体 刻蚀窗口 （404) 刻蚀热传导体 （303) 直至衬底保护层 （102), 得到热传导体 通孔（403);
(e)、在上述热传导体掩膜层（304)上淀积支撑层（505)，所述支撑层（505) 填充于热传导体通孔 （403) 及热传导体刻蚀窗口 （404) 内， 并覆盖于热传导 体掩膜层 （304) 上， 以在衬底 （101) 上方形成释放阻挡带结构 （503)及介质 支撑膜 （504);
(f)、 选择性地掩蔽和刻蚀支撑层 （505), 以在支撑层 （505) 内形成热导 通电隔离开口 （605)， 所述热导通电隔离开口 （605) 贯通支撑层 （505) 并位 于释放阻挡带结构 （503) 的外侧； 在上述支撑层 （505) 上方淀积热导通电隔 离体层 （606)， 所述热导通电隔离体层 （606) 填充于热导通隔离开口 （605) 内， 并覆盖于支撑层 （505) 上；
(g)、 选择性地掩蔽和刻蚀上述热导通电隔离体层 （606)， 以在上述支撑 层 （505) 上形成第一热导通电隔离块（705) 及第二热导通电隔离块 （706)， 所述第一热导通电隔离块 （705) 位于支撑层 （505) 内， 第二热导通电隔离块
(706)位于支撑层 (505) 上；
(h)、 在上述第一热导通电隔离块 （705) 及与所述第一热导通电隔离块 (705) 邻近的第二热导通电隔离块 （706) 间设置热偶条 （811)， 所述热偶条 (811)包括 N型热偶条（6)及 P型热偶条（5)， 热偶条（811) 的探测冷端与 第一热导通电隔离块 （705) 相接触， 热偶条 （811) 的探测热端与第二热导通 电隔离块 （706) 相接触；
(i)、 在上述热偶条 （811) 上方设置热偶条保护层 （908)， 所述热偶条保 护层 （908) 覆盖的区域包括热偶条 （811) 及第一热导通电隔离块 （705); # 同时在相邻的第二热导通电隔离块（706)之间淀积黒硅材料体（909)， 所述黒 硅材料体（909) 与第二热导通电隔离块（706) 相接触；
(p、 选择性地掩蔽和刻蚀上述热偶条保护层 （908)， 以在衬底 （101) 上 方形成用于连接热偶条 （811) 所需的电连接通孔 （1008);
(k)、 在上述己制作电连接通孔（1008) 的衬底 （101) 上溅射金属层， 所 述金属层填充在上述电连接通孔（1008) 内， 选择性地掩蔽和刻蚀上述金属层， 使得在形成热电堆的探测热端， 热电偶内的 N型热偶条（6)与 P型热偶条（5) 通过第一连接线 （1109) 电连接； 在形成热电堆的探测冷端， P型热偶条 （5) 通过第二连接线（1111 )与相邻热电偶内的 N型热偶条（6) 电连接， 且在第一 热导通电隔离结构 （705) 的外侧形成第一电连接体 （1110);
(1)、在上述衬底（101 )的表面上淀积钝化层（1211 )， 所述钝化层（1211 ) 覆盖的区域包括黒硅材料体 （909)、 第一连接线 （1109)、 第二连接线 （1111 ) 及第一电连接体 （1110);
(m)、 选择性地掩蔽和刻蚀上述钝化层 （1211 )， 以在黒硅材料体 （909) 上的钝化层 （1211 ) 上形成黒硅刻蚀窗口 （1311 )， 利用黒硅刻蚀窗口 （1311 ) 对黒硅材料体 （909)进行刻蚀， 直至刻蚀到黒硅刻蚀窗口 （1311 ) 正下方的热 传导体 (303), 以形成释放孔 ( 1309)；
(n)、 利用释放阻挡带结构 （503)释放黒硅材料体 （909) 正下方的热传 导体 （303)， 以得到热隔离腔体（1403);
(o)、 利用钝化层 （1211 ) 作为黒硅材料体 （909) 表面粗糙结构的侧墙材 料层， 对黒硅材料体 （909) 采用一次 RIE， 以形成基于黒硅结构 （1509) 的黒 硅红外吸收区 （1 )， 同时形成第二电连接体 （1510)。
8、 根据权利要求 7所述的基于黒硅的高性能 MEMS热电堆红外探测器的 制备方法， 其特征是： 所述步骤 （m)和步骤 （n) 中， 在释放孔 （1309) 的内 壁上涂覆黒硅遮挡层 （1412)。
9、 根据权利要求 7所述的基于黒硅的高性能 MEMS热电堆红外探测器的 制备方法， 其特征是： 所述步骤 （h) 中， 所述 P型热偶条 （5) 与 N型热偶条
(6)位于释放阻挡带结构 （503) 上； 在形成热电堆的探测冷端， P型热偶条 (5)及 N型热偶条（6)均与第一热导通电隔离块（705)相接触； 在形成热电 堆的探测热端， 所述 P型热偶条（5) 与 N型热偶条（6)均与第二热导通电隔 离结构 （3 ) 相接触。
10、 根据权利要求 7所述的基于黒硅的高性能 MEMS热电堆红外探测器的 制备方法， 其特征是： 所述步骤 （k) 中， 金属层的材料包括 Al。
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