WO2014026593A1 - 等离子体加工设备 - Google Patents

等离子体加工设备 Download PDF

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Publication number
WO2014026593A1
WO2014026593A1 PCT/CN2013/081384 CN2013081384W WO2014026593A1 WO 2014026593 A1 WO2014026593 A1 WO 2014026593A1 CN 2013081384 W CN2013081384 W CN 2013081384W WO 2014026593 A1 WO2014026593 A1 WO 2014026593A1
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WO
WIPO (PCT)
Prior art keywords
chuck
tray
electrode
plasma processing
wafer
Prior art date
Application number
PCT/CN2013/081384
Other languages
English (en)
French (fr)
Inventor
李玉站
栾大为
韦刚
李东三
刘利坚
张宝辉
高福宝
雷唤晨
刘海鹰
李宗兴
Original Assignee
北京北方微电子基地设备工艺研究中心有限责任公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by 北京北方微电子基地设备工艺研究中心有限责任公司 filed Critical 北京北方微电子基地设备工艺研究中心有限责任公司
Publication of WO2014026593A1 publication Critical patent/WO2014026593A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
    • H01L21/6833—Details of electrostatic chucks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32715—Workpiece holder

Definitions

  • the invention belongs to the field of conductor processing, and particularly relates to a plasma processing equipment
  • Plasma processing equipment is a common device for processing semiconductors and devices. Moreover, in order to improve the processing efficiency of the plasma processing apparatus, a plurality of wafers having a small size are often placed on a larger-sized support surface, and then the tray is placed on the upper surface of the chuck of the plasma processing chamber to perform wafer processing on the wafer. Processing.
  • the temperature control method is to send a refrigerant gas such as helium gas to the back surface of the wafer (that is, the side opposite to the processed surface of the wafer), and to transfer the refrigerant gas to adjust the temperature of the wafer.
  • a refrigerant gas such as helium gas
  • the pressing unit is disposed in the edge area of the processed surface of the wafer, so that the force of the fast edge area of the wafer is oriented toward the direction of the card.
  • FIG. 1 A schematic cross- sectional view of a portion of the structure of an ft-sub-body processing apparatus for a conventional electrostatic adsorption process is shown in FIG. 1.
  • the tray 102 is hosted on the upper surface of the tray support 101, and the wafer S It is placed on the upper surface of the tray 102.
  • the electrostatic absorption electrode 106 is provided in the tray 102, and the electrostatic suction electrode 106 passes through the spring type terminal and the li.SC (l ectroStat ic Chuck , electrostatic chuck ) Electrically connected to the power supply 105 for isolating
  • the sub-body environment supplies power to the electric electrode 106, and a house conduction morning is formed on the upper surface of the wafer S, so that there is a difference between the wafer S and the electrostatic absorption electrode 106, and the crystal S is fixed on the tray 102 from the i3 ⁇ 4.
  • Upper surface. The area on the upper surface of the tray 1.02 that is not covered by the wafer S is covered with a cover 103.
  • the upper surface of the cover 1.03 is provided with a mechanical device ⁇ ⁇ ( ⁇ , assisting the machine A iP 1.0 and the tray 102 II It is fixed on the upper surface of the tray support table 10.1.
  • the surface of the tray 102, but the fixing of the tray 1.02 still requires the use of a mechanical ring 1.04.
  • the wafer fixing method used in the plasma processing apparatus shown in Fig. 1 still inevitably has the following problems. : complex structure, high production costs, for shoving troublesome mechanical parts are easily damaged and park maintenance work affect the processing efficiency of the plasma processing equipment, like a Summary
  • the present invention provides a plasma processing apparatus which has a structure of a wafer and a tray which is low in cost and is not easily deteriorated.
  • the technical solution adopted to solve the above technical problem is to provide a plasma processing apparatus, including a reaction chamber, a laser power source, a direct current, a top electrode, and a wafer disposed in the reaction chamber opposite to each other with the upper electrode.
  • Supporting device on the way, the electric waste is electrically connected to the excitation radio frequency to generate a plasma in the reaction chamber
  • the wafer supporting device comprises a tray carrying the wafer and a card holder, and the tray A is provided in the tray, The tray is placed on the chuck and electrically insulated between the two, and the tray and the path card are electrically connected to the same end, and the card has a chuck electrode, and the chuck power Grounded so that there is a voltage difference between the tray and the cartridge and between the tray and the wafer 3
  • the DC power supply includes a positive output terminal, a negative output ⁇ , and a common end, and the common end is grounded; or 'the DC power source includes a positive terminal and a common terminal, and the common terminal is grounded; or, The DC power supply includes a negative terminal and a common terminal, and the common terminal Wherein, the DC is connected to the positive terminal and the output terminal, and the power is electrically connected to the positive terminal of the DC power source, and the negative shuttle is grounded; or the tray electrode and the device The negative power output terminal of the DC power source is electrically connected, and the pole input terminal is grounded. Or, a filter circuit is connected to the frequency of the chuck electrode and the ground.
  • the A wave circuit is high frequency high voltage &
  • the wave circuit is a filter circuit with a radio frequency attenuation less than l Odli
  • n inductors comprising n inductors and n capacitors, wherein the n inductors are connected in series, the n capacitors are connected in parallel, the n inductors are connected in parallel with the 11 capacitors, and the J capacitors are connected in parallel.
  • One end is grounded, n" l is an integer.
  • the tray is made of a conductive material, and the surface of the conductive material is coated with an insulating material, the electrical material is used as a tray electrode;
  • the chuck is made of a conductive material, and the conductive material is The surface is coated with an insulating material as the chuck electrode
  • the insulating material is salty and insulating on the surface of the conductive material.
  • the insulation is often formed on the surface of the electrified material by smear or anodization.
  • the food is made of an insulating material, and a tray electrode is embedded inside the insulating material, the tray electrode is made of a conductive material;
  • the card is made of an insulating material, and a chuck electrode is embedded inside the insulating material.
  • the card is electrically drawn and made of conductive material.
  • said card equipped with a first card Ang Ang Ang coolant channel for cooling the card in the first chuck fans refrigerant passage into the first coolant medium for cooling the card ounces ⁇
  • the card there is a second fused refrigerant passage extending through the thickness direction thereof.
  • a chuck-shaped groove is arranged on the upper surface of the chuck, and the shaped groove is connected with the second chuck refrigerant passage; the tray is provided with a refrigerant passage extending through the thickness direction thereof.
  • the tray refrigerant channel communicates with the chuck disk, and the second cold medium shield is sequentially supplied to the back surface of the wafer via the second card refrigerant channel, the chuck-shaped E7 slot and the tray refrigerant channel to cool the wafer.
  • the ion processing apparatus further comprises a cover plate, the cover plate is placed on the bearing surface of the pallet, and a positioning hole penetrating the thickness thereof is provided in the right of the cover, and the cover is protected by the support
  • the surface of the wafer is not bombarded by the plasma; the platform is disposed at a position opposite to the positioning hole, and the wafer is disposed at the 3 ⁇ 4 end of the boss.
  • the material of the wafer is covered with gemstone, silicon or oxidized silicon.
  • the plasma processing apparatus places the tray on the upper surface of the chuck, the tray and the chuck are electrically insulated, and the tray and the chuck are both connected to the plasma, and the tray is provided with a tray.
  • An electrode wherein the chuck has a chuck electrode, and the tray electrode is electrically connected to the positive output terminal of the straight 3 ⁇ 4 electric power or the negative end of the negative electrode, and the card electrode is grounded, so that there is a voltage difference between the support and the chuck, that is, Causing an electrostatic adsorption force between the tray and the chuck to fix the tray to the upper surface of the chuck; and causing an electrical difference between the tray and the wafer, that is, electrostatic attraction between the tray and the wafer, Therefore, the wafer is fixed on the upper surface of the tray, and the method of fixing the wafer and the tray is not easy to operate, has high reliability, and has the advantages of simple structure, low cost and damage, etc.
  • FIG. 1 is a schematic cross-sectional view showing a part of a structure of a plasma processing apparatus for fixing a wafer by electrostatic attraction;
  • Figure 2 is a schematic cross-sectional view showing a partial structure of a plasma processing apparatus for carrying out the present invention
  • FIG. 3 is a schematic diagram of another filter power supply provided by the present invention.
  • Circumference 4 is a schematic cross-sectional view showing a part of the structure of a plasma processing apparatus provided by the present invention.
  • the plasma processing apparatus comprises a 20, grounded counter i chamber 20 of the reaction chamber.
  • a card 23 at the bottom of the reaction chamber 20 and a tray 21. for carrying the wafer S.
  • the tray 21 is placed on the upper surface of the chuck 23.
  • a DC power source 24 and a radio frequency power source are provided outside the reaction chamber 20. 3 ⁇ 4, wherein the irritating RF power source uses a pre-excitation plasma U), and the DC power supply 3 ⁇ 4 24 is used to provide energy for fixing the wafer S and the tray 21.
  • the cassette 23 is mainly made of a conductive material such as metal, and an insulating a conductive material is formed on the surface of the conductive material as a chuck electrode (or a chuck electrostatic absorbing electrode).
  • the insulating layer is made of an insulating material, and the insulating layer can be formed on the surface of the conductive material by spraying or anodizing. Insulating material disposed on the surface of the conductive material T to achieve the object of the chuck 23 and the electrical insulation between 2 Torr He 1, and the chuck 23 electrically rim 3 of between 10 and 20 Meat plasma reaction chamber
  • the tray 21 is mainly made of a conductive material such as metal, and an insulating layer is formed on the surface of the conductive material.
  • the insulating layer is made of an insulating material, and the insulating layer can be formed on the surface of the conductive material by spraying or anodic vaporization.
  • the conductive material is used as a tray electrode (or a tray electrostatic adsorption electrode). Similar to the chuck 23, the purpose of providing a recording material on the surface of the conductive material is to achieve electrical insulation between the holder 21 and the chuck 23, and to make the susceptor 21 Electrical insulation between the plasma 10 and the antibacterial
  • the chuck 23 can also be mainly made of an insulating material, and a chuck electrode made of a conductive material such as metal is buried in the insulating material.
  • the tray 21 can also be mainly made of an insulating material.
  • a top electrode made of a conductive material such as metal is embedded in the insulating material
  • the conductive material used for the chuck electrostatic adsorption electrode and the electrostatic adsorption electrode in the above-mentioned implementation may be a metal material such as 4 or the like, and the insulating material may be quartz or ceramic.
  • the straight 3 ⁇ 4 battery includes a positive terminal, a negative terminal, and a common terminal (or intermediate point CT), and the JL common terminal is directly grounded, or the common terminal is passed through the machine.
  • the tray electrode is electrically connected to the negative terminal of the main current 24; the card electrode is electrically connected to the common terminal of the DC power supply 24, or directly to ground.
  • the tray electrode can also be electrically connected to the positive terminal of the DC current 3 ⁇ 4 2 Connection; the chuck is electrically connected to the common terminal of DC 3 ⁇ 4 24, or directly grounded
  • a surface of the wafer S is electrically conductive, and the direct current 24 supplies electric power to the tray electrode so that there is an electric A difference between the tray 21 and the wafer S, and electrostatic attraction is generated between the tray 21 and the wafer S.
  • electrostatic attraction is generated between the tray 21 and the wafer S.
  • a 3 ⁇ 4 wave circuit can be connected in series between the DC power source 24 and the carrier electrode.
  • the 3 ⁇ 4 filter circuit 30 includes a first filter inductor L21 and a first 3 ⁇ 4 wave capacitor C21.
  • One end of the first chopper inductor L21 is electrically connected to the tray as the first terminal of the wave circuit 30, and the other end serves as the filter circuit 30.
  • the second carrier terminal is connected to the cathode of the direct current 24 .
  • One end of the first 3 ⁇ 4 wave capacitor C21 is grounded, and the other end is connected to the second end of the wave circuit and the negative pole of the DC power source 24.
  • a filter circuit 3 ⁇ , 3 ⁇ 4 3 ⁇ 4 wave circuit 3 can be connected in series between the card electrode and the ground (the common end of the DC power source 24) (there are a first terminal and a second terminal, wherein, the first terminal of the i-filter circuit 30' refers to the end of the front-wave circuit 30' connected to the ⁇ electrode; the second terminal of the ⁇ 4 wave circuit 30' refers to the wave circuit 30' and The end of the ground (or DC 24) is connected as shown in the circle 2, the 3 ⁇ 4 wave circuit: 30 ⁇ ' includes the second * wave inductor L22 and the second filter capacitor C22, and the second t wave inductor L22 and the second Chopper Capacitor C22 with Chuck Electric Branch and Ground (or DC).
  • the connection of the common terminal of 3 ⁇ 4 24 is similar to the connection method of the first 3 ⁇ 4 wave inductor L21 and the first 3 ⁇ 4 wave capacitor C21 described above and the negative electrode of the carrier electrode and the DC power source 24, and no longer entertained here.
  • the filter circuit 30" shown in the square 3 may be used instead of the filter circuit 30 in the enclosure 2, and the first terminal and the second terminal, wherein the food filter
  • the first terminal of the circuit 30" refers to the end of the filter circuit 30 "connected to the carrier electrode; the second terminal of the filter circuit 30" refers to the *wave circuit 30" is connected to the DC terminal 24 That end.
  • the filter circuit 3 ⁇ in the embodiment includes a first chopper inductor L21, a second filter inductor L22, a first It wave capacitor C21, and a second filter capacitor, wherein the first 3 ⁇ 4 wave inductor L21 and The second 3 ⁇ 4 wave inductor L22 is connected in series, and the end of the first wave inductor L21 and the second wave inductor L22 that are not connected to each other serves as the first terminal and the second terminal of the 3 ⁇ 4 wave circuit 30", respectively, and respectively Connecting the tray electrode and the negative pole of the DC power source 24, the first filter capacitor C21 and the second filter capacitor C22 are connected in parallel, one end of the first filter capacitor C2 1 and the second 3 ⁇ 4 capacitor C22 is grounded, and the other end is connected to the second of the wave circuit 30" wiring.
  • n is an integer of "1”
  • i3 ⁇ 4 and n inductors are connected in series
  • n capacitors are connected in parallel
  • ⁇ inductors are connected in series and then connected in parallel with ⁇ capacitors
  • ⁇ One end of the capacitor is connected in parallel, so that the wave circuit of this structure can be used to prevent the RF energy from being externally replaced.
  • the filter circuit includes n inductors and n capacitors, and 11 inductors are connected in series, n capacitors are connected in parallel, and n inductors are connected in series and then connected in parallel with n capacitors, and one end of the n capacitors is connected in parallel, wherein 11 is greater than An integer equal to 1
  • wave circuit used in the implementation of the technology needs to meet the RF attenuation of less than 10 dl.
  • Juxtaposition although the above two types of filter circuits are exemplified: 3 ⁇ 4 wave circuit 30 and 3 ⁇ 4 wave circuit 3 (combination of ⁇ and 3 ⁇ 4 wave circuit 30", the 3 ⁇ 4 wave power of the present invention is not limited to the above Two forms, but can be constructed as inductors, resistors, and
  • the filter circuit can also be used in high-energy and high-voltage circuits.
  • any wave circuit that avoids RF energy passing through the loop can be used in the present invention.
  • the temperature of the wafer S, the tray 2 1. and the cassette 23 is easily increased to affect the shield of the film, and therefore, it is necessary to utilize the cold medium shield wafer S, the tray 21 and the card. S degree of the disk 23.
  • the cold medium can be either a refrigerant liquid or a refrigerant gas.
  • the first tray refrigerant passage 23a for cooling the chuck 23 is provided in the chuck 2:3.
  • the first chuck refrigerant passage 23a may be disposed in a plurality of thickness directions along the chuck 23.
  • the blind hole is in the form of a blind hole, and the blind opening is provided on the bottom surface of the cassette 23; alternatively, the first chuck refrigerant passage 23a may also be arranged in the form of a connected bad-shaped 1HJ or spiral groove
  • the first cold medium can be passed into the first chuck refrigerant passage 23a to cool the chuck 23.
  • the first cold medium can be cold medium, specifically, the cold medium can be fluorine cooled.
  • a plurality of chuck passes H extending through the chuck 23 in the thickness direction and serving as the second card refrigerant passage 23b are provided in the chuck 23, and a plurality of edges are provided in the tray 2 1
  • the thickness direction penetrates the tray 21 and serves as a tray through hole for the refrigerant passage 21a.
  • a chuck "shaped W groove A, a second card" is formed on the upper surface of the chuck 23 (i.e., the bearing surface for carrying the tray 21).
  • the disk refrigerant passage 23b and the tray refrigerant passage 21a respectively extend in the direction of the rhythm of the chuck 23 and the thickness direction of the tray 21 to the cassette ring W groove A, that is, the chuck annular recess A will be the second card refrigerant passage 23b is connected to the tray refrigerant passage 2 ia.
  • the second refrigerant medium is supplied to the back surface of the wafer S via the second card i refrigerant passage 23b, the chuck ring groove ⁇ , and the tray refrigerant passage 21a, thereby permeable to the wafer S.
  • the second refrigerant is made of a refrigerant gas, and the refrigerant gas may be an inert gas such as gas.
  • a ring The groove B is opposite to the chuck "shaped groove A, the card" groove A and the tray-shaped groove B ensure that the second card refrigerant passage 23b and the tray refrigerant passage 21a communicate, and the second refrigerant allows the second refrigerant to smoothly enter the tray Refrigerant channel 2 iaont
  • the chuck 23 is provided with a plurality of second chuck refrigerant passages 23b communicating with the chuck "shaped west slot A, and a plurality of tray refrigerant passages 2 ia are provided in the tray 21, so that the assistance is increased.
  • the second chuck refrigerant passage 23b and the tray refrigerant passage 21a can not only adjust the temperature more efficiently, but also improve the uniformity of the temperature of each of the cassette 23, the tray 21 and the wafer S in the process of processing the wafer.
  • the surface portion of the tray 21 i.e., the portion of the tray 1 that is not covered by the wafer S) is exposed to the plasma.
  • the plasma processing apparatus provided in the embodiment further includes Cover right 25, cover right 25 is made of ceramic or quartz material, which is stacked on the bearing surface of the crucible 1 and fixed by screwing (not shown) with the tortoise 21, and the screw is made of ceramic material. 25 has a positioning 25a extending through its thickness, and the wafer S is embedded in the positioning 25a. It is to be noted that, by the lid electrode 25 overlapping the tray 21, the position U of the positioning hole 25a is the position of the wafer S on the surface of the tray 21.
  • the positioning 2 provided on the cover plate 25 is advantageous Improve loading efficiency of the wafer S is easy to understand, the positioning hole 25a should be equal to or slightly larger than the inner diameter to the outer diameter of the wafer S ⁇ Yat preferably, the cover 25 is equal to the right outer diameter or slightly larger than the outer diameter 21 of the tray In this way, at least a part of the load-bearing surface of the carrier 21 can be blocked from being exposed in the plasma 10 environment, thereby avoiding the plasma 10 wide tray 2 i.
  • a projection 2 ic is provided on the bearing surface of the tray 21, and the projection 2 ic is opposed to the positioning iL 25a, and the wafer S is placed on the top end of the projection 2 ic .
  • a plurality of bosses 21c are provided on the bearing surface of the tray 21, and correspondingly, a plurality of positioning holes 25a are provided in the cover, and the number of the positioning holes 25a and the boss 21c are arranged. The number is equal.
  • the lower surface of the susceptor 21 is equal to or slightly fired to the diameter of the upper surface of the chuck 23, so that the tray 21 can completely cover the card 2 and is securely coupled with the card angling 23
  • the upper electrode includes an inductive carrier ring (not shown), the inductor * coil is disposed above the window 27, and the shield window 27 is disposed at the top of the reaction chamber 20.
  • the inductor-coupled coil is connected to the RF power supply 13 through the first matching unit 12, and the bias RF power supply 1.8 is connected to the chuck 23 through the second matching S 17 , and the RF power input RF RF energy is input into the reaction chamber 20 .
  • the process gas is subjected to an ionized salty ft body 10 beta bias RF power source 18 for generating a radio frequency bias on the surface of the wafer S to attract ions to process the surface of the wafer S.
  • the RF power source 13 and the bias RF power source 18 are two independent RF power sources.
  • the present invention is not inconsistent.
  • the excitation RF power source 13 and the bias RF terminal 18 can also use a bias power supply crane, but the injection I power supply needs to have two independent radio frequency transmission ends. .
  • the DC power supply 24 includes a positive terminal, a negative terminal, and a common terminal, and the common grounding wearer is grounded via the casing; in practical applications, the DC power is also Other structures can be used.
  • DC 3 ⁇ 4 24 can include only the positive terminal and the common terminal, and in use, connect the tray electrode to the positive terminal, connect the chuck electrode to the common terminal, or directly ground.
  • the direct current 24 may include only the negative terminal and the common terminal, and in use, connect the battery power to the negative terminal, connect the chuck to the common terminal or directly to the ground.
  • the DC power supply 24 may only include the positive electrode.
  • the fork can connect the chuck electrode to the ft pole to connect the negative terminal to the ground; Or, connect the tray electrode to the negative terminal, and you can ground the card electrode directly, and the fork can clamp the battery. Connected to the positive electrode terminal and the positive electrode is grounded.
  • the plasma processing apparatus provided by the above embodiment may be an LE1) engraving machine for real
  • IT0 indium telluride physical vapor deposition equipment
  • ⁇ film wafers can be basket jewel substrates, or other processed parts of the village shield, for example, the chip's talent shield Can be ⁇ or ⁇
  • the power in the tray 21 is connected to the positive power of the DC power source 24, and the voltage of the tray power to ground (GKD) is set to be El, and E1 is equal to the voltage IL between the DC power source 24 and the ground (GND).
  • GKD tray power to ground
  • E1 is equal to the voltage IL between the DC power source 24 and the ground (GND).
  • a first capacitor Ci is formed between the chuck electrode and the tray electrode, and a second capacitor C2 is formed between the anode electrode and the upper surface of the wafer S. Since the upper surface of the wafer S is approximately grounded, and the chuck electrode is grounded (GD), A capacitor C1 and a second capacitor C2 are in a parallel relationship assuming that the distance between the chuck electrode and the tray electrode is dl, and the large separation between the tray electrode and the upper surface of the wafer S is d2 e , according to Coulomb's law, at the card
  • the electrostatic adsorption force between the electrode and the susceptor electrode ie, between the chuck 23 and the carrier 21) is 1 ⁇ :
  • the electrostatic adsorption force between the tray electrode (i.e., tray 21) and the wafer S is:
  • the first capacitor C1 and the second capacitor C2 are in a parallel relationship, so that the voltage difference between the card electrode and the carrier electrode and the voltage difference between the tray electrode and the wafer S are both E, therefore, the card Electrostatic adsorption force between the disk 23 and the tray 21 and the tray 21 and the wafer
  • the tray 2i carries a plurality of wafers S.
  • a number of 13bs 21c equal to the number of wafers S are provided on the carrying surface of the trays 2, and the wafers 25 are also provided on the cover sheets 25.
  • each of the bosses 21c and the positioning holes 25a corresponds to one wafer S, that is, each of the positioning holes 25a to one wafer S Positioning, the JL wafer S is placed at the « end of the ⁇ stage 21c
  • the above I sub-body processing equipment places the support on the card, electrically insulates between the tray and the chuck, and electrically insulates between the tray and the chuck and the plasma, and positive output of the A-electrode and the DC power supply.
  • the terminal or the negative ⁇ ⁇ terminal is electrically connected, the chuck electrode is grounded, so that there is a voltage difference between the tray and the cassette, that is, an electrostatic force is generated between the tray and the cartridge, thereby fixing the bracket to the cassette.

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  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

一种等离子体加工设备，其包括反应腔室（20）、激励射频电源（13）、直流电源（24），上电极以及与上电极彼此相对地设置在反应腔室内的晶片支撑装置，该上电极与激励射频电源连接以在反应腔室内产生等离子体（10）。晶片支撑装置包括承载晶片的托盘（21）以及卡盘（23），在托盘内设有托盘电极，托盘放置于卡盘上且二者之间电绝缘，且托盘和卡盘均与等离子体电绝缘，托盘电极与所述直流电源的正极输出端或负极输出端电连接，卡盘内设有卡盘电极，卡盘电极接地，以使托盘和卡盘之间以及托盘和晶片之间均存在电压差。等离子体加工设备不仅容易操作、可靠性高，而且具有结构简单、成本低，不易损坏等优点。

Description

等离子体加工设备 技术领域
本发明屬于卒导体加工领域， 具体涉及一种等离子体加工设备
背景技术
等离子 加工设备是加工半导体.器件的常 设备。 而且, 为了提高 等离子 加工设备的加工效率，常将多片尺寸较小的晶片放置在尺寸较 大的托 表面， 再将托盘放入等离子体处理腔室的卡盘的上表面， 以对 晶片进行加工处理。
在实际加工过程中，等离子体容易使晶片的温度超过工艺所需的温 度， 园此需要对晶片的温度迸行控制。 的温度控制方式是向晶片的 背面 (即， 与晶片的被加工面相对的那一面）次送堵如氦气等的冷媒气 体， 并传助冷媒气体对晶片的温度透行调节„ 通常， 为了将晶片固定在 托盘上并防止冷媒气体泄漏，一般是在晶片的被加工面上的边缘区城内 设置按压单元， 使其对晶片的速缘区域 加朝向卡盎方向的作用力》 然 在实际应用中， 途种方法存在着实施麻烦、 稳定性差、 冷却效杲不理 想等问题； 另外， 按压单元需要占捶晶片的被加工面上的部分空间， 这 将减小晶片的有效加工面积。 闺 1 为现有的一种利 Λ静电吸附作用来 定晶片的等 ft子体加工设备 的部分结构的剖面示意围 Λ 如图 1 所示， 托盘 102敌置在托盘支撑台 101的上表面, 晶片 S敛置在托盘 102的上表面。 在托盘 102内设有静 电吸»电极 106， 静电吸酎电极 106 通过弹簧式端子与 li.SC ( l ectroStat i c Chuck , 静电卡盘） 用供电电源 105 电连接 在等离
1 子体坏境申， 对 电 附电极 106供电， 在晶片 S的上表面会形成一屋 导电晨， 使得晶片 S和静电吸 »电极 106之间存在电 差， 从 i¾将晶 S固定在托盘 102的上表面。 在托盘 1.02的上表面上的未被晶片 S覆盖 的区城覆盖有盖权 103„ 在盖 1.03的上表面设置有权械 ϋ ί(Μ， 措 助于像机械 A iP 1.0 而将托盘 102 II定在托盘支撑台 10.1的上表面《 托盘 102的表面，但托盘 1.02的固定 仍需要采用机械 环 1.04 » 因此， 图 1 所示等离子体加工设备所用的晶片固定方式仍然不可避免地存在 下述问题： 结构复杂、 制作成本高、 搡作麻烦、 机械部件易损坏并园维 修工作 影响等离子体加工设备的加工效率， 等等 a 发明内容
为至少解决上述问题之一， 本发明提供一种等离子体加工设备， 其 ¾定晶片和托盘的結构 举， 成本低， 而且不易 ¾坏„
解决上迷技术问题的所采用的技术方案是提供一种等离子 加工 设备， 包括反应腔室、 激屬射频电源、 直流电 ¾， 上电极以及与所迷上 电极彼此相对地设置在反应腔室内的晶片支撑装置，所途上电圾与所述 激励射频电 连接以在所迷反应腔室内产生等离子^，所述晶片支撑装 置包括承载晶片的托盘以及卡盎， 在所述托盘内设有托 A电极， 所迷托 盘放置于所述卡盘上且二者之间电绝缘，且所途托盘和所途卡盘均与等 端电连接， 所述卡 内设有卡盘电极， 所述卡盘电权接地， 以使所述托 盘和所述卡轰之间以及所迷托盘和所述晶片之间均存在电压差 3
其中， 所述直流电源包括正极输出端、 负极输出鴣和公共端， 所途 公共端接地； 或者' 所途直流电源包括正极榆 ώ端和. 共端， 所迷公共 端接地； 或者, 所述直流电源包括负极論 ώ端和公共端， 所述公共端接 其中， 所迷直流 括正极榆 ώ端和資极输出端， 所迷托 电被 与所迷直流电源的正极 出端电连接， 所述负梭输 ώ端接地； 或者， 所 述托盘电极与所述直流电源的负权输出端电连接， 所述 极输 Λ端接 地。 或， 在所迷卡盘电极与地之闳率接有滤波电路
其中， 所迷 A波电路为高频高压电 &
其中， 所迷 *波电路为射频衰减小于 l Odli的滤波电路
其中， 包括 n个电感和 n个电容， 所迷 n个电感串联， 所述 n个电 容并联, 所述 n个电感率联后再与所述 11个电容并联， 并 JL所迷 n个电 容并联 的一端接地， n》 l的整数。
其中， 所述托盘采用导电村料制作， 并在所述导电材料的表面包覆 绝缘材料， 所述 电材料作为所迷托盘电极； 所述卡盘采 导电材料制 作, 并在所述导电材料的表面包覆绝缘材料， 所述导电材料作为所述卡 盘电极
其中， 所迷绝缘材料在所迷导电材料的表面形咸绝缘
其中，所迷绝缘屡是通过啧涂或阳极氧化的方式形成于夺电材料表 面。
其中， 所述托食采用绝缘材料制作， 并在所述绝缘材料内部埋设托 盘电极，所述托盘电极采用导电材料制作；所述卡 采用绝缘材料制作， 并在所迷绝缘材料内部埋设卡盘电极， 所述卡 电拔采 Λ导电 料制 作。
其中， 在所述卡盎内设有用于冷却卡盎的第一卡盎冷媒通道， 在所 迷第一卡盘冷媒通道 通入第一冷媒介质对所述卡盎进行冷却 β
其中， 在所迷卡盎内还设有贯穿其厚度方向的第二 盎冷媒通道， 在所途卡盘的上表面设有卡盘 形凹槽，所迷卡 《形凹槽与所迷第二 卡盘冷媒通道连通； 在所迷托盘内设有贯穿其厚度方向的托 冷媒通 道， 所述托 冷媒通道与.所迷卡盘《形 槽连通， 第二冷媒介盾依次经 由第二卡盎冷媒通道、卡盘 形 E7槽以及托盘冷媒通道供給到晶片的背 面， 以对晶片进行冷却„
其中， 离子体加工设备还包括盖板， 所述盖板置于所途托盍的承载 面上， 在所达盖权内设有贯穿其厚度的定位孔， 所述盖权 于保护托 承栽面上未敌置晶片的区域免受等离子体的轰击；在所述托盘的承载面 且与所述定位孔相对位置设有 Λ台， 所迷晶片设置在所述凸台的 ¾端》 其中，所連等离子 加工设 为 L D刻蚀机或者 ΠΌ物理气相 设备 :：
其中， 所迷晶片的材 为蓋宝石、 硅或氧化.硅
本发明具有以下有益致杲：
本发明提供的等离子体加工设备， 将托盍放置于卡盘的上表面， 托 盘和卡盘之间电绝缘， 且托盘和卡盘均与等离子体电 fe缘， 在所述托盘 肉设有托盘电极， 所述卡蠱内设有卡盘电极， 托盘电极与直 ¾电¾的正 极输出端或负极输 fe端电连接， 卡 电极接地， 以使托盍和卡盘之闰存 在电压差， 即， 在托盘和卡盘之间产生静电吸附力， 从而将托盘固定予 卡盘的上表面； 以及使托 ά和晶片之间存在电 差， 即， 在托盍和晶片 之间产生静电吸附力， 从而将晶片固定在托盘的上表面， 这种固定晶片 和托盘的方式不 容易操作、可靠性高， 而且还具有結构简举、成本低 不易損坏等优点《 附图说明
图 1 为现有的一种利用静电吸 作用来固定晶片的等离子体加工 设备的部分结构的剖面示意图；
4 图 2 为本发嚷实施倒提 的等离子体加工设备的部分 构的剖面 示意国；
图 3为本发明实抱 提供的另一滤波电蔡的原理围；
围 4 为本发 另一实 倒提供的等离子体加工设备的部分结构的 剖面示意图。
附困标记：
10 等离子体 12 第一匹 i& H
13 激 射频电源 17 第二匹配器
18 偏压射频电源 20 反应腔室
21 托盘 21a 托盘冷媒通道
21c 凸台 23 卡
23a 第一卡盘冷媒通道 23b 第二卡盘冷媒通道
24 直流电源 2b .... 献
25a 定位 L 27 介质窗
30、 30 , , Mi " 滤波电路
101 托 J:支 4掌台 102 托盘
103 盖权 104 机械压环
105 ESC用供电电 106 静电吸»电极
A 卡盘 形凹槽 B 托盘 II形 EI槽
S 芯片
L2.1 第一滤波电感 C21 第一 波电容
L22 第二 *波电感 C22 第二滤波电容 具体实施方式
为使本领域的技术人员更好地理解本发明的技术方案，下面结合 图对本发明实施例提供的等离予体加工设备透行详细描达 π 谤参阅图 2， 其为本发 ¾|实 ife倒提供的等离子本加工设备的部分結 构的刳面示意 S ¾ 如围 2所示， 等离子 加工设备包括反应腔室 20， 反 i 腔室 20接地„ 在反应腔室 20 内的底部设有卡盎 23， 用于承载晶 片 S的托盘 21.放置在卡盘 23的上表面。 在反应腔室 20的外部设有直 流电源 24和激籍射频电 ¾，其中，激暴射频电源用予激复等离子体 U) , 直流电 ¾ 24用于提供固定晶片 S和托盘 21的能量
在本实施例中， 卡盍 23主要采用金属等导电材料制作， 且在导电 材料的表面 成有绝缘 a 导电材料作为卡盘电极（或称卡盘静电吸 ff† 电极）使用。 绝缘层由绝缘材料制作， 绝缘层可以通过喷涂或阳极氧化 等方式形成于导电材料表面。在导电材料的表面设置绝缘材料的目的是 为 T实现卡盘 23与托盍 2 1之间电绝缘， 以及使卡盘 23与反应 室 20 肉的等离子体 10之间电 缘3
托盘 21主要采用金属等导电材料制作， 且在导电材料的表面形成 有绝缘层 绝缘层由絶缘材料制作， 絶缘.层可以通过喷涂或阳极氣化等 方式形成于导电材料表面。 导电材料作为托盘电极（或称托盘静电吸附 电极） 使用 与卡盘 23类似， 在导电材料的表面设置绝錄材料的目的 是为了实现托 21与卡盘 23之间电绝缘， 以及使托盎 21与反.应腔宣 20肉的等离子体 10之间电绝缘
在另一实施倒中， 卡盘 23也可以主要采用绝缘材料制作， 并在绝 缘材料内部埋设由金属等导电材料制作而咸的卡盘电极 类似地，托 i 21 也可以主要采用绝缘材料制作， 并在绝缘材料内部埋设由金属等导 电材料制作而成的托 电极
其中，上述实施倒中的卡盘静电吸附电极和托 静电吸酎电极所采 用的导电 料可以是 4 等金属材料， 绝缘材料可以是石英或陶瓷等
在本实 例中， 直¾电¾ 24包括正极接 端、 负极接 端以及公 共端 （或称之为中间点 CT ), 而 JL公共端直接接地， 或者公共端经由机 壳而接地„ 托盘电极与皇流电 24的负极接线端电连接； 卡盎电极与 直流电源 24的公共端电连接， 或者直接接地„ 当然， 托盘电极也可以 与直流电¾ 2 的正极接线端电连接；卡盘与直流电 ¾ 24的公共端电连 接， 或者直接接地
在等离子 环境中， 晶片 S 的表面形成一层导电 ， 直流电 24 向托盍电极提供电能， 以使托盘 21和晶片 S之间存在电 A差， 并在托 盘 21和晶片 S之间产生静电吸附力，以将晶片 S 定于托盘 21的上表 面。 同时， 使托盘 21和卡盘 2:3之同存在电 差， 并在托 A 21和卡盘 23之间产生静电 »力， 以将托盘 21固定于卡盘 23的上表面。
本实施例在直流电源 24 与托蠱电极之间还可以串接一 ¾波电路
30 , 用以透免射频能量通过回蔡外泄而造成射频能量衰减， 以及避免对 其它 ϋ件造成射颜干扰 =该滤波电路 30具有第一接幾 ¾和第二接线 , 其中， ¾1波电路 30的第一接线端指的是 滤波电路 30与托盍电极相 连接的那一端； *波电路 30的第二接线端指的是 ¾ 波电路 30与直流 电¾ 2 相连接的那一端 如围 2所示， ¾滤波电路 30包括第一滤波电 感 L21和第一 ¾波电容 C21 ,第一瀘波电感 L21的一端作为 波电路 30 的第一接线端与托盘电 连接， 另一端作为滤波电路 30的第二接载端 与直流电 24的负极连接。 第一 ¾波电容 C21的一端接地， 另一端与 波电路的第二接幾端及直流电源 24的负极相連接
类似地， 本实 例中也可以在卡愈电极和地 （ 者直流电源 24的 公共端） 之间串接一滤波电路 3ίΤ ， ¾ ¾波电路 3(Τ 真有第一接线端 和第二接线端， 其中， i袭滤波电路 30 ' 的第一接线端指的是前 *波电 路 30 ' 与 盍电极相连接的那一端； ¾波电路 30 ' 的第二接载端指的 是 波电路 30 ' 与地 （或者直流电涯 24 )相连接的那一端 如围 2 所示， 该 ¾波电路 :30 ·' 包括第二 *波电感 L22和第二濾波电容 C22 , 并 且第二t波电感 L22和第二 ϋ波电容 C22与卡盘电枝和地（或者直流电 ¾ 24的公共端 ) 的连接方式类似于上文介紹的第一 ¾波电感 L21和第 一 ¾波电容 C21与托盍电极和直流电源 24的负极的连接方式， 在此不 再贅迷
在另一实施例中， 可以采用围 3 所示的滤波电路 30 " 来替代围 2 中的滤波电路 30 i貪 ¾1波电路 30 " 同样具有第一接线端和第二接线端， 其中， 食滤波电路 30 " 的第一接载端指的是¾滤波电路 30 " 与托 电 极相连接的那一端； 滤波电路 30 " 的第二接线端指的是该 *波电路 30 " 与直流电涯 24相连接的那一端。 如圏 ： i所示， 本实施例中的滤波 电路 3ϋ " 包括第一 Α波电感 L21、第二滤波电感 L22、第一 It波电容 C21 和第二滤波电容 其中， 第一 ¾波电感 L21和第二 ¾波电感 L22串 联,并且第一 波电感 L21和第二 *波电感 L22彼 Λ不互相连接的那一 端分別作为该 ¾波电路 30 " 的第一接线端和第二接线端， 并分别连接 托盘电极和直流电源 24的负极„第一滤波电容 C21和第二滤波电容 C22 并联， 第一滤波电容 C2 1和第二 ¾波电容 C22的一端接地， 另一端连接 波电路 30 " 的第二接线 。 实际上， 只要滤波电路包括 π个电感和 η 个电容， n为》 1的整数， i¾且， n个电感串联， n个电容并联， 并且 η 个电感串联后再与 η个电容并联， 且 π个电容并联后的一端接地， 那么 这种结构的 波电路就均可用予防止射频能量外 换言之， 在实际应 用中， 可以采用这样的滤波电路来替代围 2 中的 ft波电路 30， 即, t 滤波电路包括 n个电感和 n个电容， 且 11个电感拳联， n个电容并联， 并且 n个电感串联后再与 n个电容并联， n个电容并联后的一端接地， 其中， 11为大于等于 1的整数
在实际应用中，上迷实施^所采用的 ¾|波电路需要満足射频衰减小 于 10dl 的奈件。 并置， 尽管上文权 举了两种形式的滤波电路： ¾波 电路 30与¾波电路 3(Γ 的组合以及 ¾波电路 30 " ， 是本发明可采 的 ¾波电 并不局限于上途两种形式， 而是可以被构造成电感、 电阻和
8 电容的任意 ί且合形式„ 当然， 滤波电路也可以采用高颜高 Α电& 事实 上，凡是 ¾够避免射频能量通过囬路外》的處波电路均可以 用于本发 明
在等离子体加工工艺辻程中， 晶片 S、 托盘 2 1.和卡盍 23的温度容 易升高而影响薄膜的盾量， 因此， 这就需要利用冷媒介盾 ϋ节晶片 S、 托盘 21和卡盘 23的 S度。 其中， 冷媒介质既可以是冷媒液本， 又可以 是冷媒气体
在本实施例中，在卡盘 2:3内设有用于冷却卡盘 23的第一^ ^盘冷媒 通道 23a„ ¾第一卡盘冷媒通道 23a可以设置成多个沿卡盘 23的厚度 方向廷伸的盲孔的形式， 并且所迷盲 的开口设置于卡盍 23的底面； 或者，该第一卡盘冷媒通道 23a也可以设置成一个联通的坏形 1HJ糟或者 螺旋线 ϋ槽的形式。 在工艺过程中， 可以在第一卡盘冷媒通道 23a 肉通入第一冷媒介 以对卡盘 23进行冷却。 第一冷媒介质可以为冷媒 体， 具体地， 该冷媒 体可以是氟冷却 ' „
在另一实施例中， 在卡盘 23内 设有多个沿厚度方向贯穿卡盘 23 且用作第二卡 冷媒通道 23b的卡盘通 H 且， 在托 2 1内还设有 多个沿厚度方向贯穿托盘 21且用作托 冷媒通道 21 a的托盘通孔， 在 卡盘 23的上表面 (即, 用于承载托盘 21的承载面 )形成有卡盘《形 W 槽 A , 第二卡盘冷媒通道 23b和托盘冷媒通道 21 a分別沿卡盘 23的犀 度方向和托盘 21 的厚度方向而延伸至 卡盍环形 W槽 A , 即， 卡盘环 形凹櫓 A将第二卡盎冷媒通道 23b和托盘冷媒通道 2 ia连通。 这样, 在 实际工艺过程中， 第二冷媒介 像次经由第二卡 i冷媒通道 23b、 卡盘 环 凹槽 Λ以及托盘冷媒通道 21a而供給到晶片 S的背面，从而对晶片 S透行冷却。 第二冷媒令质为冷媒气体， 冷媒气体可以为氣气等 性气 体。
优逸地， 在托蠱 21 的下表面形成有托盎环 ffiJ禮 B , 托盍环形 槽 B与卡盘《形凹槽 A相对， 卡 》 凹槽 A和托盘》形凹槽 B可 以确保第二卡 冷媒通道 23b和托盘冷媒通道 21a连通，并使第二冷媒 令 更顺利地迸入托 冷媒通道 2 i a„
优遶地， 在卡盘 23内设有多个与卡盘《形西槽 A连通的第二卡盘 冷媒通道 23b , 在托盘 21 肉设有多个托盘冷媒通道 2 ia， 这样， 措助多 个第二卡盘冷媒通道 23b和托盘冷媒通道 21 a, 不仅可以更高效地调节 温度， 而且可以提高卡盍 23、 托盘 21及晶片 S各自的温度的均勾性„ 在对晶片加工的过程中，橾露在等离子体 10†的托盘 21的表面部 分（即， 托盘 1上的未被晶片 S覆盖的部分）容^受等离子体 10義 。 为此， 本实施例提供的等离子 加工设备还包括盖权 25， 盖权 25 采用陶瓷或石英材料制作，其叠置在 盍 1的承载面，并通过螺打（图 中未示出）与托愈 21固定， 螺钉采用陶瓷材料制作。 在盖板 25 有 贯穿其厚度的定位 25a， 晶片 S被嵌置在定位 25a内。 需要说 的 是， 由亍盖极 25与托盘 21 叠置， 定位孔 25a的位置 U 为晶片 S在托盘 21表面的位置， 因此设置在盖板 25上的定位 2 有利予提高晶片 S 的装载效率 不难理解， 定位孔 25a的内径尺寸应等于或略大予晶片 S 的外径尺寸 β 优逸地， 盖权 25的外径尺寸等于或略大于托 21的外径 尺寸，这样可以将至少是托盍 21的承载面中的棵露在等离子体 10环境 中的耶一部分遮挡， 从而避免等离子体 10廣 托盘 2 i。
本实施倒申， 在托盘 21的承载面上还设有凸台 2 ic , 凸台 2 ic与 定位 iL 25a相对， 晶片 S放置在凸台 2 ic的顶端。 为了使托 21能够 承载多个晶片 S , 在托盘 21的承载面设有多个凸台 21c , 对应地， 在盖 ¾ 25肉设置多个定位孔 25a, 定位孔 25a的数量与凸台 21c.的数量相 等。
在本实 例中，托盎 21下表面的直 等于或略火予卡盘 23上表面 的直径， 以使托盘 21能够完全覆盖住卡盎 2 并和卡盎 23之间可靠密
10 封， 这样不仗可以防止冷媒介盾 露， 而且可以防止等离子体损伤 盘
23的上表面。
在本实 例中， 如围 2所示， 上电极包括电感 合载圈 （围中未示 出）， 电感 *合线圈设置在介 窗 27的上方， 介盾窗 27设置在反应腔 室 20的顶部„ 电感鵪合线圈通过第一匹配器 12与激 射频电 13连 接， 偏压射频电源 1.8通过第二匹配 S 17与卡盘 23连接， 激纖射频电 ¾ 13向反应腔室 20内输入射频能量，使工艺气体被电离形咸等 ft子体 10β 偏压射频电源 18用于在晶片 S表面产生射频偏压以吸引离子对晶 片 S的表面进行加工。
需要指 ώ的是， 尽管在上述实施例中， 激励射频电源 13和偏压射 频电源 18为两个相互独立的射频电源。 但本发明并不局 于 Λ , 在实 际 t用中，激励射频电源 13和偏压射频电涯 18也可以采用一个射偏电 源鶴、 但 射 I电源需设有两个独立的射频 率输 端。
需要 明的是， 尽管在上迷实 例中， 直流电源 24 包括正极接幾 端、 负极接线端以及公共端， 且 共端接地戴者公共^经由 壳接地； 是在实际应用中， 直流电 ¾ 24也可以采用其它結构„ 如， 直流电 ¾ 24可以仅包括正极接幾端和公共端， 并且在使用时， 将托盘电极与 正极接线端连接， 将卡盘电极与公共端连接或者直接接地。 又如， 直流 电 24可以仅包括负极接 端和公共端， 并且在使用时， 将托盘电权 与负极接线端连接， 将卡盘电挺与公共端连接或者直接接地。 再如， 直 流电源 24可以仅包括正极接幾端和负极接錢端， 并且在使用时, 将托 盘电极与正极接线 连接， 并且既可以将 盘电极直接接地， 叉可以将 卡盘电极接 ft极接幾端弄将负极接线端接地； 或者, 将托盘电极与负极 接线端连接， 并且既可以将卡盎电极直接接地， 叉可以将卡盍电极接正 极接线端并将正极接线端接地。
上述实施例提供的等离子体加工设备可以为 LE1)刻 机，用于实
1 1 刻蝕工艺； 或者为 IT0 (铟 氚化物）物理气相 积设备， 用于制备 ΠΌ 薄膜 晶片可以是篮宝石衬底，也可以是其它村盾的被加工 S件，例如， 晶片的才才盾也可以为珪或氧化珪„
下面介绍本实 例中， 托盘 21.与晶片 S之间的静电 »力以及托 盘 21.与卡盘 23之间的静电? 力„
将托盘 21中的托 电. 与直流电源 24的正挺接通， 设托盘电权 对地 （GKD) 电压为 El, E1等于直流电源 24对地（GND)之间的电压 IL 当反.应腔室 20内的等离子体启《后， 在晶片 S的上表面会形成一 导 电屋， 导电 与地（G D)之间的电压为 1ΐ2„由于等离子^的电阻很小， Ε2 似等于零 闺此，托盘电极和晶片 S的上表面之间的电圧 Ε3=Ε1 1ί2 « Ei=E, 卡盘 23中的卡金电极与直流电源 M的负极接通， 托盘电极和 卡盘电极之间的电压差为 E。
卡盘电极和托盘电极之间形成第一电容 Ci， 托盎电极和晶片 S 的 上表面之间形成第二电容 C2， 由于晶片 S的上表面近似接地， 而且卡 盘电极接地（G D) , 第一电容 C1和第二电容 C2为并联关系 假设卡盘 电极和托盘电极之间的距离为 dl, 托盘电极和晶片 S 的上表面之间的 巨离为 d2e 那么， 根据庫伦定律， 在卡 电极和托盎电极之间 （即， 卡盘 23和托蛊 21之间） 的静电吸附力1 ^为：
Figure imgf000014_0001
在托盘电极 (即, 托 21) 和晶片 S之间的静电吸附力 为：
" 2d2 " 1 - 2d,, '
由上可知， 由予第一电容 C1和第二电容 C2为并联关系， 使得卡盎 电极和托垚电极之间的电压差以及托盘电极和晶片 S 之间的电压差均 为 E, 因此， 卡盘 23和托盘 21之间的静电吸附力 ^以及托盘 21和晶片
12 S之间的静电 附力 2较大 β
围 4 为本发嗎另一实施例提供的等离子体加工设备的部分结构的 剖面示意围。 如图 4所示， 托盘 2 i承载有多个晶片 S , 对应地， 在托 盘 2 1的承载面上设有与晶片 S数量相等的 1¾台 21 c , 在盖板 25上同样 设有与晶片 S数量相等的定位 fL 25 a， 而且定位 25a的设置位置与凸 台 21 c的位置相对 使用时，每一凸台 21c和定位孔 25a对应一晶片 S , 即每一定位孔 25a对一个晶片 S进行定位， JL晶片 S放置在 β台 21c的 «端
上述实 例提供的等 I子体加工设备， 将托 放置于卡 上，托盘 和卡盘之间电绝緣， 且托盘和卡盘与等离子体之间电绝缘， 托 A电极与 直流电源的正极输出端或负极 ί τ ώ端电连接， 卡盘电极接地， 以使托盘 和卡盍之间存在电压差， 即, 在托盘和卡盒之间产生静电 酎力， 从而 将托盍固定于卡盍的上表面； 以及使托盘和晶片之间存在电压差， 即， 在托盘和晶片之间产生静电吸附力， 从而将晶片固定在托盘的上表面， 这种固定晶片和托盘的方式不 容易搡作、 可靠 高， 而且结构'简車、 成本低、 不易損坏。
可以理解的是，以上实施方式仅仅是为了 i 明本发明的原理而采用 的示例性实^方弍， 然 本发明并不局限于此„对于本领域内的普通技 术人员而言， 在不 离本发明的精神和实 if的情况下， 可以做 Λ各种变 和改进， 这些变型和改进也複为本发明的保 范围
13

Claims

利 耍 求 书
1、 一种等离子 加工设备， 包括反应腔室、 激 射频电源、 直流电源， 上电极 及与所述上电权彼此相对地设置在反应腔室内的晶片支撑装置 5所 述上电极与所述激最射频电源连接以在所連反应腔宣内产生等离子体，所述 晶片支撑装置 fc括承载晶片的托盘以及辛 ， 在所述托盘肉设有托盘电极， 其特征在于， 所迷托 放置于所述卡盘上且二者之间电绝缘， 且所速托盘和 所述卡盘均与等离子体电绝緣，所述托盘电极与所迷直 ¾电 ¾的正极输出端 或负极 ίΐτώ端电连接 所述卡盘内设有卡盘电极， 所述卡盘电极接地， 以使 所述托盍和所迷卡金之间以及所 盘和所述晶片之间均存在电压羞。
2、 根据权利要求 1所迷的等离子体加工设备， 其特粗在于， 所述皇 电源包括正极输出端、 负极翰出瑞和公共 ， 所迷公共端接地； 或者. 所迻 直流电 ¾包括正极输 ώ端和公共端， 所述公共端接地； 或者， 所述直流电¾ 包括.负极 ώ端和公共 ， 所述公共端接地
3、 根振 利要求 1所述的等离子体加工设备， 其特 在于， 所迷皇 ¾ 电源包括正极揄 Λ端和负极榆出端，所迷托蠱电极与所述直流电源的 i£极 «Γ ώ端电连接， 所述负极输 ώ端接地； 或者， 所述托盘电极与所述直^电源的 禽极输出端电连接， 所述正极输出端接地
4、 根据权利要求 1所述的等离子体加工设备， 其特 在于， 在所述托 盘电极和所述直流电源之间串接有處波电路； 和 /或， 在所述卡盘电极与地 之间串接有滤波电路„
5、 根擔权利要求 4所述的等离子体加工设备 其特 在于， 所述滤波 电路为高频高压电 &
6、 根据权利要求 4所述的等离子体加工设备， 其特枉在于， 所迷滤波 电路为射频衰减小于 4 OdB的滤、波电路
7、 根 权利要求 6所述的等离子体加工设备， 其特 在于， 包括 11个 电感和 11个电容， 所途 11个电感串联， 所述 n个电容并联， 所速 11个电感串 联后再与所述 n个电容并联， 并且所迷 11个电容并联后的一端接地， ιι》1 的整数
8、 根握权利要求 1所述的等离子体加工设备， 其特 在于， 所述托 A 采用导电材料制作， 并在所述导电材料的表面包覆绝缘材料， 所述导电材料 作为所述托盘电极；
所途卡盘采用导电材料制作， 并在所述导电材料的表面包覆绝缘材料， 所迷导电材料作为所述卡盘电級 ,.
9、 艮据权利要求 8所迷的等离子体加工设备， 其特^在于， 所迷绝缘 材料在所述导电材料的表面形成绝缘层
10、根据权利要求 9所迷的等离子体加工设备， 其特征在于， 所述绝缘 层是通过喷涂或阳极氡化的方式形成于导电材料表面
11、根据权利要求 1所述的等离子体加工设备， 其特征在于， 所述托 ά 采用绝缘封料制作， 并在所述绝缘村料肉部埋设托盎电被， 所述托盘电极采 用导电 料制作；
所迷卡 采用绝缘材料制作， 并在所述绝缘 斜内部埋设卡盘电极，所 达卡盘电拔采用导电树料制作。
12 , 根据权利要求 1所迷的等离子体加工设备， 其特 在于， 在所迷卡 盘内设有用于冷 卡盘的第一卡盘冷媒通道，在所迷第一卡盘冷媒通道内通 入第一冷某今 对所迷卡盍逃行冷 p。
13、根椐枕利要求 1所述的等离子体加工设备， 其特 在予， 在所述卡 内还设有贯穿其厚度方向的第二卡盘冷媒通道，在所述卡 的上表面设有 卡盘 形凹槽， 所述卡 形 槽与所述第二卡盍冷媒通道连通；
在所述 ¾盘 设有贯穿其厚度方向的托盘冷媒通道，所迷托盘冷媒通道 与所迷卡盘 槽连通， 第二冷媒介廣依次经由第二 f盍冷媒通道、 卡盘 坏形凹槽以及托盎冷媒通道供給到晶片的背面， 以对晶片进行冷却„
14 , 根据权利要求 1所述的等离子体加工设备， 其特 在于， 还包括盖 ， 所述盖挺置于所述托盘的承载面上， 在所述盖板内设有贯穿其厚度的定 击；
在所迷托盍的承载面且与所述定位孔相对位置设有凸台 ,所述晶片设置 在所述凸台的顶端
1 5、 根据权利要求〗所迷的等离子体加工设备， 其特 在亍， 所迷等离 子体加工设备为 LED刻蚀机或者 ITO物理气相沉 设备 β
16、 根据权利要求 1所述的等离子体加工设备， 其特粗在予， 所途晶片 的材质为蓋宝石、 或氧化 。
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