WO2014017273A1 - Package for housing semiconductor element, and semiconductor device - Google Patents

Package for housing semiconductor element, and semiconductor device Download PDF

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Publication number
WO2014017273A1
WO2014017273A1 PCT/JP2013/068518 JP2013068518W WO2014017273A1 WO 2014017273 A1 WO2014017273 A1 WO 2014017273A1 JP 2013068518 W JP2013068518 W JP 2013068518W WO 2014017273 A1 WO2014017273 A1 WO 2014017273A1
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor element
package
ceramic laminate
housing
metal substrate
Prior art date
Application number
PCT/JP2013/068518
Other languages
French (fr)
Japanese (ja)
Inventor
真広 辻野
Original Assignee
京セラ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to JP2014526839A priority Critical patent/JP5873174B2/en
Publication of WO2014017273A1 publication Critical patent/WO2014017273A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/44—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements the complete device being wholly immersed in a fluid other than air
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
    • H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02—Details
    • H01L31/0203—Containers; Encapsulations, e.g. encapsulation of photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/022—Mountings; Housings
    • H01S5/02208—Mountings; Housings characterised by the shape of the housings
    • H01S5/02216—Butterfly-type, i.e. with electrode pins extending horizontally from the housings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/024—Arrangements for thermal management
    • H01S5/02469—Passive cooling, e.g. where heat is removed by the housing as a whole or by a heat pipe without any active cooling element like a TEC

Definitions

  • the present invention relates to a semiconductor element storage package and a semiconductor device.
  • CMOS complementary metal-oxide-semiconductor
  • semiconductor elements such as semiconductor laser diodes and photodiodes, integrated circuits such as IC chips and LSIs, and semiconductor element storage for storing semiconductor elements and integrated circuits Packages are known (for example, Japanese Patent Application Laid-Open No. 2001-319984).
  • a semiconductor device is configured by housing a semiconductor element in such a package and assembling the semiconductor element so as to be electrically connected to the outside of the package.
  • a connector for electrical connection with the outside is incorporated in a frame surrounding the semiconductor element.
  • the semiconductor element storage package has been studied how to efficiently dissipate the heat generated by the semiconductor element to the outside. Due to the heat generated by the semiconductor element, the temperature of the region surrounded by the frame body may become high, and the package itself may be destroyed.
  • An object of the present invention is to provide a package for housing a semiconductor element and a semiconductor device capable of reducing the possibility of the package being destroyed by heat.
  • a package for housing a semiconductor element includes a ceramic laminate having a through-hole penetrating vertically, and a heat dissipating member fitted in the through-hole and having a mounting region for mounting a semiconductor element.
  • the semiconductor element storage package includes a frame provided on the ceramic laminated body so as to surround the heat radiating member, and an opening provided on the lower surface of the ceramic laminated body for exposing the lower surface of the heat radiating member.
  • the metal substrate which has this.
  • a semiconductor device includes the semiconductor element storage package, a semiconductor element mounted in the mounting region, and a lid on the frame.
  • FIG. 1 is an overview perspective view showing a lower surface of a semiconductor device according to an embodiment of the present invention.
  • FIG. 2 is a schematic perspective view showing the inside of the semiconductor device according to the embodiment of the present invention.
  • FIG. 3 is an exploded perspective view of a package for housing a semiconductor device according to an embodiment of the present invention.
  • FIG. 4 is a top view showing the inside of the semiconductor device according to the embodiment of the present invention.
  • FIG. 5 is a bottom view showing the bottom surface of the semiconductor device according to the embodiment of the present invention.
  • FIG. 6 is a side view showing a side surface of the semiconductor device according to the embodiment of the present invention.
  • FIG. 7 is a cross-sectional view showing the inside of the semiconductor device according to one embodiment of the present invention.
  • FIG. 8 is a cross-sectional view showing the inside of a semiconductor device according to a modification.
  • FIG. 9 is a bottom view showing a bottom surface of a semiconductor device according to a modification.
  • the semiconductor device 1 is a device for processing an electrical signal from the outside with a semiconductor element and outputting the same to the outside.
  • a semiconductor element 2 such as an IC, an LSI, a light emitting diode, a semiconductor laser diode, or a photodiode is mounted. It is used to do.
  • the semiconductor element 2 is mounted on the base 2a.
  • the pedestal 2 a is provided in the mounting region R inside the semiconductor element storage package 3.
  • the base 2a mounts the semiconductor element 2 and can adjust the height position of the semiconductor element 2.
  • the pedestal 2a is made of an insulating material, and electrical wiring that is electrically connected to the semiconductor element 2 is formed on the upper surface of the pedestal 2a.
  • the semiconductor device 1 includes a semiconductor element 2, a semiconductor element storage package 3, and a lid 4.
  • the semiconductor element storage package 3 includes a ceramic laminate 31 having a through-hole H penetrating vertically, a heat dissipation member 32 having a mounting region R for mounting the semiconductor element 2 fitted in the through-hole H, and a ceramic laminate.
  • a metal frame 34 having a frame 33 provided so as to surround the heat radiating member 32 on the surface 31 and an opening A that is provided on the lower surface of the ceramic laminate 31 and exposes the lower surface of the heat radiating member 32 is provided.
  • the semiconductor element storage package 3 further includes a connector member 35 on the side surface of the ceramic laminate 31 for electrically connecting the inside of the frame 33 and the outside of the frame 33.
  • the ceramic laminate 31 is a plate-like body having through holes H that penetrate vertically.
  • the ceramic laminate 31 includes a plurality of insulating layers such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a glass ceramic. Layers are stacked. Further, the heat radiating member 32 having the mounting region R in which the semiconductor element 2 is mounted fits into the through hole H of the ceramic laminate 31.
  • the ceramic laminate 31 is a rectangular plate-like body, and has four corners chamfered in plan view.
  • the ceramic laminate 31 does not include a chamfered portion, and the length of one side is set to, for example, 10 mm or more and 50 mm or less.
  • the ceramic laminate 31 is set to have a vertical thickness of, for example, 1 mm or more and 6 mm or less.
  • the ceramic laminate 31 has a rectangular parallelepiped through-hole H formed therein.
  • the through hole H is set to have a side length of, for example, 5 mm or more and 30 mm or less in plan view. Further, the length of the through hole H in the vertical direction is, for example, not less than 1 mm and not more than 6 mm, and matches the thickness of the ceramic laminate 31 in the vertical direction.
  • a wiring conductor 36 is formed on the upper surface of the ceramic laminate 31 by sintering a metal paste containing a metal such as molybdenum or manganese.
  • the wiring conductor 36 is formed from the upper surface of the ceramic laminate 31 to the lower surface of the ceramic laminate 31 through the ceramic laminate 31.
  • the heat dissipating member 32 is provided by being fitted in the through hole H of the ceramic laminate 31.
  • the heat dissipation member 32 dissipates heat generated by the semiconductor element 2 to the outside.
  • the heat dissipation member 32 is made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials.
  • the heat radiating member 32 is manufactured in a predetermined shape by using a conventionally known metal processing method such as rolling or punching for an ingot obtained by casting a molten metal material into a mold and solidifying it.
  • the heat conductivity of the heat radiating member 32 is set to 15 W / (m ⁇ K) or more and 450 W / (m ⁇ K) or less, for example.
  • the thermal expansion coefficient of the heat radiating member 32 is set to, for example, 3 ⁇ 10 ⁇ 6 / K or more and 28 ⁇ 10 ⁇ 6 / K or less.
  • the heat radiating member 32 is sized to fit in the through hole H and is formed in a rectangular parallelepiped shape.
  • the heat radiating member 32 has a side length of, for example, 5 mm to 30 mm in plan view.
  • the length of the heat dissipation member 32 in the vertical direction is, for example, 1 mm or more and 8 mm or less, and the size of the through hole H such that the lower surface of the heat dissipation member 32 contacts the external mounting substrate and the metal substrate 34. It corresponds to the thickness of.
  • the heat dissipating member 32 is sized to fit in the through hole H, and the height position of the upper surface is set lower than the height position of the upper opening edge of the through hole H. Even if the semiconductor element 2 is mounted on the mounting region R on the heat dissipation member 32 by making the height position of the upper surface of the heat dissipation member 32 lower than the height position of the upper opening edge of the through hole H, the upper surface of the semiconductor element 2 The height position of the semiconductor device housing package 3 and the semiconductor device 1 can be reduced in thickness in the vertical direction.
  • the heat radiation member 32 is set so that the height position of the lower surface is the same as the height position of the lower opening edge of the through hole H.
  • the lower surface of the heat radiating member 32 is connected to an external mounting substrate via a joining member such as solder or brazing material.
  • a joining member such as solder or brazing material.
  • the joining member is accommodated in the lower opening edge of the through hole H, the joining property and mounting property of the semiconductor device 1 to the mounting substrate can be improved.
  • a frame 33 is provided on the upper surface of the ceramic laminate 31 so as to surround the mounting region R.
  • the frame body 33 is provided continuously along the outer edge of the ceramic laminate 31.
  • the frame body 33 is a frame-shaped member and protects the semiconductor element 2 from the outside.
  • the frame 33 is provided on the ceramic laminate 31 so as to surround the mounting region R on which the semiconductor element 2 is mounted.
  • the frame 33 is composed of, for example, a plurality of insulating layers such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a glass ceramic. Laminated.
  • the frame 33 may be formed integrally with the ceramic laminate 31 or may be formed separately from the ceramic laminate 31.
  • the frame 33 may be made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials.
  • a joining member such as solder or brazing material.
  • the frame 33 has a vertical thickness of, for example, 0.3 mm or more and 6 mm or less, and is set to be larger than the thickness of the semiconductor element 2.
  • the frame 33 is chamfered at four corners in plan view.
  • the frame 33 does not include a chamfered portion in plan view, and the length of one side of the outer edge is set to, for example, 10 mm or more and 50 mm or less.
  • the frame 33 is set to have a length of one side of the inner edge of, for example, 8 mm or more and 48 mm or less in plan view.
  • the connector member 35 is for connecting a coaxial terminal.
  • the connector member 35 can connect an external coaxial terminal to electrically connect the inside of the frame 33 and the outside of the frame 33.
  • the connector member 35 is provided on the side surface of the ceramic laminate 31 as shown in FIGS.
  • the connector member 35 has a cylindrical tubular body 351 and an internal conductor 353 made of a rod-shaped conductor provided on the central axis via an insulating member 352 such as glass.
  • the connector member 35 is fitted into a through portion of the side wall of the frame body 33.
  • the inner conductor 353 is made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials, and is electrically connected to the semiconductor element 2.
  • the connector member 35 may not be provided on the side wall of the frame 33 as long as it can electrically connect the inside of the frame 33 and the outside of the frame 33.
  • the connector member 35 may be provided on the side surface of the ceramic laminate 31, and the internal conductor 353 may be connected to the wiring conductor 36 formed on the upper surface of the ceramic laminate 31.
  • the metal substrate 34 is provided on the lower surface of the ceramic laminate 31.
  • the metal substrate 34 has an opening A that exposes the lower surface of the heat dissipation member 32.
  • the metal substrate 34 is for connecting the semiconductor element housing package 3 to an external mounting substrate through a bonding material such as solder, brazing material, glass bonding material, or resin bonding material.
  • the metal substrate 34 is made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials.
  • the metal substrate 34 is manufactured in a predetermined shape by using a conventionally known metal processing method such as rolling or punching for an ingot obtained by casting and solidifying a molten metal material into a mold.
  • the thermal conductivity of the metal substrate 34 is set to, for example, 15 W / (m ⁇ K) or more and 450 W / (m ⁇ K) or less.
  • the thermal expansion coefficient of the metal substrate 34 is set to, for example, 3 ⁇ 10 ⁇ 6 / K or more and 28 ⁇ 10 ⁇ 6 / K or less.
  • the opening A of the metal substrate 34 has a rectangular shape and is sized to expose the lower surface of the heat dissipation member 32.
  • the length of one side of the opening A corresponds to the length of one side of the heat radiation member 32, and is set to, for example, 5 mm or more and 30 mm or less.
  • the length of the opening A in the vertical direction is set to, for example, 1 mm or more and 5 mm or less, and matches the thickness of the metal substrate 34 in the vertical direction.
  • the metal substrate 34 is formed with the opening A that exposes the lower surface of the heat radiating member 32, so that the heat generated by the semiconductor element 2 is transmitted to the heat radiating member 32, and the external surface is exposed from the lower surface of the heat radiating member 32 exposed from the opening A. Can be dissipated towards.
  • the metal substrate 34 has a hole B1 (first hole) that exposes a part of the lower surface of the ceramic laminate 31 between the connector member 35 and the opening A when viewed from the lower surface. Part).
  • the first hole B1 has a rectangular shape, and the length of one side is set to, for example, 1 mm or more and 30 mm or less.
  • the connector member 35 tends to concentrate heat due to the current flowing through the coaxial terminal, and the heat from the semiconductor element 2 generated when the semiconductor device 1 is operated is the heat radiating member 32, the ceramic laminate 31, the metal substrate.
  • the metal substrate 34 on the lower surface of the ceramic laminate 31 tends to be peeled off from the outer peripheral portion, or due to thermal stress caused by the difference in thermal expansion coefficient between the frame body 33 and the connector member 35, Peeling or cracking may occur in the vicinity. Therefore, by providing the first hole B1 between the connector member 35 and the heat radiating member 32 when viewed from the bottom, even if the metal substrate 34 is thermally expanded and contracted, the thermal stress is different from that of the ceramic laminate 31. Similarly, heat from the semiconductor element 2 generated when the semiconductor device 1 is operated is hardly applied between the metal substrate 34 and the outer peripheral portion of the joint portion between the ceramic laminate 31 and the metal substrate 34 or the frame 33. It can be made difficult to be conducted near the joint between the connector member 35 and the connector member 35.
  • the stress due to thermal deformation of the metal substrate 34 causes the metal substrate 34, the ceramic laminate 31, and the like. It can be made difficult to communicate during.
  • the metal substrate 34 is formed with a notch C that exposes the edge of the lower surface of the ceramic laminate 31. As shown in FIG. 5, the notches C are provided on three sides of the metal substrate 34 except for one side of the ceramic laminate 31 on which the connector member 35 is disposed. Lead terminals 37 are provided on the lower surface of the ceramic laminate 31 where the notches C of the metal substrate 34 are formed. Note that the plurality of lead terminals 37 are spaced apart so as to be electrically insulated from each other.
  • the metal substrate 34 has a convex portion 34 a whose outer edge extends in four directions when viewed from below.
  • the convex portions 34 a extend toward the four corners of the ceramic laminate 31. Further, at least one portion is recessed toward the inside of the outer edge of the ceramic laminate 31 between the convex portions 34 a.
  • a lead terminal 37 is provided on the lower surface of the ceramic laminate 31 in the recess of the metal substrate 34.
  • the dent corresponds to the portion where the notch C is formed.
  • a metal layer connected to a plurality of via conductors corresponding to the plurality of lead terminals 37 is provided on the lower surface of the ceramic laminate 31.
  • Each of the plurality of lead terminals 37 is connected to a metal layer connected to each via conductor.
  • the plurality of via conductors are electrically connected to the semiconductor element 2 mounted on the upper surface of the ceramic multilayer body 31 via the wiring conductor 36 through the ceramic multilayer body 31.
  • the lead terminal 37 is bonded to a metal layer electrically connected to the lower surface of the ceramic laminate 31 via a via conductor, for example, via a bonding member such as solder or brazing material.
  • a plurality of through conductors 38 are provided along the vertical direction.
  • the plurality of through conductors 38 are connected to the upper surface of the metal substrate 34 at the lower ends of the through conductors 38.
  • the plurality of through conductors 38 are electrically connected to a part of the wiring pattern formed on the upper surface of the ceramic laminate 31.
  • the heat in the region surrounded by the frame 33 can be transmitted from a part of the wiring pattern to the metal substrate 34 through the through conductor 38. As a result, the heat in the frame 33 can be easily released toward the outside.
  • the through conductors 38 may be provided on both sides of the heat radiating member 32 in a sectional view.
  • the through conductor 38 By providing the through conductor 38 in the vicinity of the side surface of the heat radiating member 32, heat transmitted from the heat radiating member 32 into the ceramic laminate 31 can be easily transmitted to the metal substrate 34 and the mounting substrate by the through conductor 38. As a result, it is possible to suppress the heat radiating member 34 from becoming high temperature and to prevent the heat radiating member 34 from thermally expanding and destroying the ceramic laminate 31.
  • the heat transmitted from the semiconductor element 2 to the heat radiating member 32 can be transmitted to the through conductors 38 on both sides with little deviation from the both side surfaces of the heat radiating member 32.
  • the metal substrate 34 has a hole B2 (also referred to as a second hole) that exposes a part of the lower surface of the ceramic laminate 31 between the opening A and the notch C.
  • the second hole B2 has a rectangular shape, and the length of one side is set to, for example, 1 mm or more and 25 mm or less.
  • An opening A is provided between the pair of second holes B2.
  • the lead terminal 37 tends to concentrate heat due to the current flowing through the lead terminal 37, and the heat from the semiconductor element 2 generated when the semiconductor device 1 is operated is heat radiating member 32, ceramic laminate 31, metal By conducting the substrate 34, heat is easily transmitted around the notch C of the metal substrate 34.
  • the thermal stress from the lead terminal 37 can be easily relieved and generated when the semiconductor device 1 is operated. Therefore, it is possible to make it difficult to conduct heat from the semiconductor element 2 to the notch C. Then, thermal stress is applied between the ceramic laminate 31 and the metal substrate 34 to suppress the metal substrate 34 from being peeled off, or to suppress cracks generated at the joint between the ceramic laminate 31 and the metal substrate 34. You can do it.
  • a lid 4 is provided on the frame 33 so as to cover the semiconductor element 2.
  • the lid body 4 hermetically seals a region surrounded by the frame body 33.
  • the lid 4 is made of, for example, a metal such as copper, tungsten, iron, nickel, or cobalt, an alloy containing a plurality of these metals, an aluminum oxide sintered body, a mullite sintered body, or a silicon carbide sintered body. It consists of ceramics such as an aluminum nitride sintered body, a silicon nitride sintered body, or glass ceramics.
  • the lid 4 is joined to the upper surface of the frame 33 via a joining member such as solder or brazing material.
  • the region surrounded by the frame 33 is filled with a vacuum state or nitrogen gas, and the region surrounded by the frame 33 is hermetically sealed by providing the lid 4 on the frame 33. can do.
  • the lid 4 is placed on the frame 33 in a predetermined atmosphere, and the seal ring joined onto the sealing conductor pattern of the frame 33 and the sealing member of the lid 33 are welded to each other. It is attached on the frame 33 by applying an electric current to the lid 33 and performing seam welding.
  • the lid 33 can be attached via a bonding material such as a brazing material, a glass bonding material, or a resin bonding material.
  • a heat dissipation member 32 is provided in the through hole H of the ceramic laminate 31, and an opening is provided so that the lower surface of the heat dissipation member 32 is exposed on the lower surface of the ceramic laminate 31.
  • a metal substrate 34 provided with the part A is provided.
  • the heat transmitted from the semiconductor element 2 is easily dissipated to the outside, so that it is possible to suppress the occurrence of cracks due to the concentration of thermal stress on the ceramic laminate 31, the frame 33, or the connector member 35.
  • By efficiently dissipating the heat generated by the element 2 to the outside it is possible to provide the semiconductor element housing package 3 and the semiconductor device 1 that can reduce the risk of the package being destroyed.
  • the heat radiating member 32 has a size that allows the heat radiating member 32 to fit into the through hole H, and the lower surface is a lower portion of the through hole H as long as the thickness of the metal substrate 34 is also taken into consideration. You may protrude below the height position of an opening edge.
  • the heat radiating member 32 is formed with an extending portion 32a extending laterally at the lower end of the side surface. The vertical thickness of the extending portion 32a matches the vertical thickness of the metal substrate 34.
  • the upper surface of the extending portion 32 a is connected to the lower surface of the ceramic laminate 31.
  • the heat radiating member 32 By providing the extended portion 32a in the heat radiating member 32, it is easy to align the heat radiating member 32 with the through hole H, the heat radiating member 32 can be provided at a desired position, and the area of the lower surface of the heat radiating member 32 is reduced.
  • the area of the upper surface of the heat radiating member 32 can be made larger, and the heat radiating member 32 can be stably mounted on an external substrate.
  • the extension part 32a can increase the connection area between the heat dissipation member 32 and the ceramic laminate 31 by connecting the upper surface of the extension part 32a to the lower surface of the ceramic laminate 31, and the heat dissipation member 32 is thermally expanded. Therefore, it is possible to prevent the ceramic laminate 31 from being detached.
  • the lower surface of the heat radiating member 32 may be disposed below the lower surface of the ceramic laminate 31, and the lower surface of the heat radiating member 32 may be, for example, solder or brazing material,
  • a bonding material such as a glass bonding material or a resin bonding material
  • the bonding property of the semiconductor device 1 to the mounting substrate is improved by increasing the volume of the bonding material provided between the metal substrate 34 and the mounting substrate.
  • the inside of the frame 33 is hermetically sealed, and the heat generated by the semiconductor element 2 is easily transmitted to the heat radiating member 32.
  • the heat transmitted to the heat radiating member 32 is dissipated from the lower surface of the heat radiating member 32 via the heat radiating member 32 toward the external mounting substrate via the connecting member.
  • thermal stress due to the difference in thermal expansion coefficient is likely to occur in the ceramic laminate 31, the frame 33, or the connector member 35.
  • the connector member 35 is joined to the frame body 33 by a brazing material, or when the lid body 4 is joined by seam welding via a seal ring joined to the upper surface of the frame body 33.
  • the first hole B1 is provided between the connector member 35 and the opening A, which is short from the connector member 35.
  • the metal substrate 34 is less likely to be thermally deformed. Further, in each manufacturing process in which heat is applied to the semiconductor element storage package 3 and the semiconductor device 1, thermal stress due to thermal expansion and contraction of the metal substrate 34 is reduced by the first hole B 1, and the metal substrate 34 is While being able to suppress peeling from the ceramic laminate 31, it is possible to suppress cracks generated in the ceramic laminate 31. Even if the heat generated in the lead terminal 37 is transmitted to the metal substrate 34, the second hole B2 is provided between the notch C and the opening A, which is short from the lead terminal 37.
  • the metal substrate 34 is less likely to be thermally deformed. Further, in each manufacturing process in which heat is applied to the semiconductor element housing package 3 and the semiconductor device 1, thermal stress due to thermal expansion and contraction of the metal substrate 34 is reduced by the second hole B 2, and the metal substrate 34 is While being able to suppress peeling from the ceramic laminate 31, it is possible to suppress cracks generated in the ceramic laminate 31. Furthermore, in the first hole B1, since the metal substrate 34 and the ceramic laminate 31 are not joined, bonding failure due to voids generated in solder or the like joining the ceramic laminate 31 and the metal substrate 34, or voids The metal substrate 34 can be prevented from peeling off from the ceramic laminate 31 due to the thermal stress as the starting point, and cracks generated in the ceramic laminate 31 can be suppressed.
  • FIG. 9 is a bottom view of the semiconductor device 1 according to a modification. 9 is a portion of the outer edge of the ceramic laminate 31 that is covered with the metal substrate 34x.
  • the metal substrate 34 x may not have the size of the convex portion 34 a within the outer edge of the ceramic laminate 31.
  • the convex portion 34 a of the metal substrate 34 x may extend outward from the outer edge of the ceramic laminate 31. Since the protrusion 34a extends outward from the outer edge of the ceramic laminate 31, the semiconductor device 1 is mounted on a desired mounting substrate while confirming the four corners and the outer peripheral portion of the metal substrate 34 in a top view. Can be mounted and mounted in position.
  • the protruding portion 34 a is provided with an overhang portion 341 a extending in a direction along the lead terminal 37.
  • the overhang portion 341 a is provided with a space from the lead terminal 37.
  • the overhang portion 341 a extends perpendicular to the end surface of the ceramic laminate 31.
  • the overhang portion 341a overhangs, for example, with a length of 1 mm or more and 3 mm or less with reference to the end surface of the ceramic laminate 31. Since the protruding portion 34a has the overhang portion 341a, the lead terminal 37 is protected by the overhang portion 341a, and it is possible to reduce the possibility that the tip of the lead terminal 37 is deformed by applying force.
  • the space between the convex portions 34 a may be linear and may be formed inside the outer edge of the ceramic laminate 31.
  • One side of the outer edge of the metal substrate 34 is linear, and is located on the inner side of the outer edge of the ceramic laminate 31, thereby suppressing warping that occurs on one side of the outer edge of the metal substrate 34 between the convex portions 34 a. Can do.
  • the semiconductor element storage package 3 may be provided with a cylindrical fixing member capable of fixing an optical fiber or a translucent member instead of the connector member 35, and the frame member 33 is provided with a fixing member.
  • the semiconductor device 1 capable of inputting and outputting optical signals inside and outside the semiconductor element housing package 3 can be obtained.
  • the ceramic laminate 31 is prepared. If the ceramic laminate 31 is made of, for example, an aluminum oxide sintered body, an organic binder, a plasticizer, a solvent, or the like is added to and mixed with raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide. A mixture is obtained. And a some green sheet is produced from a mixture.
  • a high melting point metal powder such as tungsten or molybdenum is prepared, and an organic binder, a plasticizer, a solvent or the like is added to and mixed with the powder to obtain a metal paste. Then, a metallized pattern to be the wiring conductor 36, a metallized pattern to which the lead terminal 37 is bonded, a via conductor, a heat dissipation member 32, and a metallized pattern to be bonded to the metal substrate 34 to the ceramic green sheet to be the ceramic laminate 31, respectively.
  • the ceramic laminate 31 can be prepared by printing and filling in a pattern and arrangement and laminating a plurality of ceramic green sheets.
  • the metal substrate 34 is formed by punching a plate made of an Fe—Ni—Co alloy using a press machine, thereby forming an opening A, a notch C, a first hole B1, and a second hole B2. can do. In this way, the metal substrate 34 can be prepared.
  • the frame 33 is produced by laminating a plurality of ceramic green sheets and forming a through hole as the mounting region R in advance by punching or the like in order to mount the semiconductor element 2. be able to.
  • the frame 33 is laminated on the upper surface of the ceramic laminate 31 so that the through hole surrounds the mounting region R.
  • the frame 33 is provided with a metallized pattern to which the connector member 35 is joined at a predetermined position on the side surface.
  • the ceramic laminate 31 and the frame 33 can be integrally formed by firing simultaneously at a predetermined temperature.
  • the metal substrate 34 is connected to the metallized pattern formed on the lower surface of the prepared ceramic laminate 31 via a brazing material, and at the same time, the metal substrate 34 is formed on the lower surface of the ceramic laminate 31 exposed from the notch C of the metal substrate 34.
  • a plurality of lead terminals 37 are connected to the metallized pattern via a brazing material.
  • the connector member 35 is connected to the metallized pattern formed on the side surface of the prepared frame 33 through a brazing material. Further, a seal ring is connected to the frame 33 via a brazing material. In this manner, the semiconductor element storage package 3 can be manufactured.
  • the semiconductor element 2 is mounted in the mounting region R of the semiconductor element storage package 3.
  • the semiconductor element 2 and the wiring conductor 36 can be electrically connected.
  • the semiconductor device 1 can be manufactured by connecting the lid 4 to the frame 33 via the seal ring in a state in which the airtightness in the frame 33 is maintained.

Abstract

A package (3) for housing a semiconductor element is provided with: a ceramic laminated body (31) having a through hole (H) that vertically penetrates the ceramic laminated body; and a heat dissipating member (32), which is fitted in the through hole (H), and which has a mounting region (R) where a semiconductor element (2) is to be mounted. Furthermore, the package (3) is provided with: a frame body (33) that is provided on the ceramic laminated body (31) such that the frame body surrounds the heat dissipating member (32); and a metal substrate (34), which is provided on the lower surface of the ceramic laminated body (31), and which has an opening (A) from which the lower surface of the heat dissipating member (32) is exposed.

Description

半導体素子収納用パッケージおよび半導体装置Semiconductor element storage package and semiconductor device
　本発明は、半導体素子収納用パッケージおよび半導体装置に関する。 The present invention relates to a semiconductor element storage package and a semiconductor device.
　従来から、光通信や高速信号処理の分野等で使用される、半導体レーザダイオードまたはフォトダイオード等の半導体素子やＩＣチップやＬＳＩ等の集積回路、半導体素子や集積回路を収納するための半導体素子収納用パッケージが知られている（例えば、特開２００１－３１９９８４号公報）。なお、このようなパッケージの内部に半導体素子を収納して、半導体素子をパッケージの外部と電気的に接続されるように組み立てることにより半導体装置が構成される。なお、このような半導体素子収納用パッケージは、外部と電気的に接続するためのコネクタが、半導体素子を取り囲む枠体に組み込まれている。 Conventionally used in the fields of optical communication and high-speed signal processing, etc. Semiconductor elements such as semiconductor laser diodes and photodiodes, integrated circuits such as IC chips and LSIs, and semiconductor element storage for storing semiconductor elements and integrated circuits Packages are known (for example, Japanese Patent Application Laid-Open No. 2001-319984). Note that a semiconductor device is configured by housing a semiconductor element in such a package and assembling the semiconductor element so as to be electrically connected to the outside of the package. In such a semiconductor element storage package, a connector for electrical connection with the outside is incorporated in a frame surrounding the semiconductor element.
　半導体素子収納用パッケージは、半導体素子が発する熱を如何に外部に効率よく放熱するかが研究されている。半導体素子の発する熱によって、枠体で囲まれる領域の温度が高温になって、パッケージ自体が破壊される虞がある。 The semiconductor element storage package has been studied how to efficiently dissipate the heat generated by the semiconductor element to the outside. Due to the heat generated by the semiconductor element, the temperature of the region surrounded by the frame body may become high, and the package itself may be destroyed.
　本発明は、パッケージが熱によって破壊される虞を低減することが可能な半導体素子収納用パッケージおよび半導体装置を提供することを目的とする。 An object of the present invention is to provide a package for housing a semiconductor element and a semiconductor device capable of reducing the possibility of the package being destroyed by heat.
　本発明の一実施形態に係る半導体素子収納用パッケージは、上下に貫通する貫通孔を有するセラミック積層体と、前記貫通孔に嵌められた、半導体素子を実装する実装領域を有する放熱部材を備えている。さらに、半導体素子収納用パッケージは、前記セラミック積層体上に前記放熱部材を取り囲むように設けられた枠体と、前記セラミック積層体の下面に設けられた、前記放熱部材の下面を露出する開口部を有する金属基板を備えている。 A package for housing a semiconductor element according to an embodiment of the present invention includes a ceramic laminate having a through-hole penetrating vertically, and a heat dissipating member fitted in the through-hole and having a mounting region for mounting a semiconductor element. Yes. Further, the semiconductor element storage package includes a frame provided on the ceramic laminated body so as to surround the heat radiating member, and an opening provided on the lower surface of the ceramic laminated body for exposing the lower surface of the heat radiating member. The metal substrate which has this.
　本発明の一実施形態に係る半導体装置は、前記半導体素子収納用パッケージと、前記実装領域に実装された半導体素子と、前記枠体上に蓋体を備えている。 A semiconductor device according to an embodiment of the present invention includes the semiconductor element storage package, a semiconductor element mounted in the mounting region, and a lid on the frame.
図１は、本発明の一実施形態に係る半導体装置の下面を示した概観斜視図である。FIG. 1 is an overview perspective view showing a lower surface of a semiconductor device according to an embodiment of the present invention. 図２は、本発明の一実施形態に係る半導体装置の内部を示した概観斜視図である。FIG. 2 is a schematic perspective view showing the inside of the semiconductor device according to the embodiment of the present invention. 図３は、本発明の一実施形態に係る半導体素子収納用パッケージの分解斜視図である。FIG. 3 is an exploded perspective view of a package for housing a semiconductor device according to an embodiment of the present invention. 図４は、本発明の一実施形態に係る半導体装置の内部を示した上面図である。FIG. 4 is a top view showing the inside of the semiconductor device according to the embodiment of the present invention. 図５は、本発明の一実施形態に係る半導体装置の下面を示した下面図である。FIG. 5 is a bottom view showing the bottom surface of the semiconductor device according to the embodiment of the present invention. 図６は、本発明の一実施形態に係る半導体装置の側面を示した側面図である。FIG. 6 is a side view showing a side surface of the semiconductor device according to the embodiment of the present invention. 図７は、本発明の一実施形態に係る半導体装置の内部を示した断面図である。FIG. 7 is a cross-sectional view showing the inside of the semiconductor device according to one embodiment of the present invention. 図８は、一変形例に係る半導体装置の内部を示した断面図である。FIG. 8 is a cross-sectional view showing the inside of a semiconductor device according to a modification. 図９は、一変形例に係る半導体装置の下面を示した下面図である。FIG. 9 is a bottom view showing a bottom surface of a semiconductor device according to a modification.
　以下、本発明の一実施形態に係る半導体素子収納用パッケージおよび半導体装置について、図面を参照しながら説明する。 Hereinafter, a semiconductor element storage package and a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
　＜半導体装置の構成＞
　半導体装置１は、外部からの電気信号を半導体素子で信号処理して外部に出力するための装置であって、例えばＩＣ、ＬＳＩ、発光ダイオード、半導体レーザダイオードまたはフォトダイオード等の半導体素子２を実装するのに用いるものである。半導体素子２は、台座２ａ上に実装される。台座２ａは、半導体素子収納用パッケージ３の内部の実装領域Ｒに設けられる。台座２ａは、半導体素子２を実装するものであって、半導体素子２の高さ位置を調整することができる。台座２ａは、絶縁材料からなり、台座２ａの上面に半導体素子２と電気的に接続される電気配線が形成されている。 <Configuration of semiconductor device>
The semiconductor device 1 is a device for processing an electrical signal from the outside with a semiconductor element and outputting the same to the outside. For example, a semiconductor element 2 such as an IC, an LSI, a light emitting diode, a semiconductor laser diode, or a photodiode is mounted. It is used to do. The semiconductor element 2 is mounted on the base 2a. The pedestal 2 a is provided in the mounting region R inside the semiconductor element storage package 3. The base 2a mounts the semiconductor element 2 and can adjust the height position of the semiconductor element 2. The pedestal 2a is made of an insulating material, and electrical wiring that is electrically connected to the semiconductor element 2 is formed on the upper surface of the pedestal 2a.
　半導体装置１は、半導体素子２と、半導体素子収納用パッケージ３および蓋体４を備えている。半導体素子収納用パッケージ３は、上下に貫通する貫通孔Ｈを有するセラミック積層体３１と、貫通孔Ｈに嵌められた、半導体素子２を実装する実装領域Ｒを有する放熱部材３２と、セラミック積層体３１上に放熱部材３２を取り囲むように設けられた枠体３３と、セラミック積層体３１の下面に設けられた、放熱部材３２の下面を露出する開口部Ａを有する金属基板３４を備えている。また、半導体素子収納用パッケージ３は、セラミック積層体３１の側面に、枠体３３内と枠体３３外とを電気的に接続するコネクタ部材３５をさらに備えている。 The semiconductor device 1 includes a semiconductor element 2, a semiconductor element storage package 3, and a lid 4. The semiconductor element storage package 3 includes a ceramic laminate 31 having a through-hole H penetrating vertically, a heat dissipation member 32 having a mounting region R for mounting the semiconductor element 2 fitted in the through-hole H, and a ceramic laminate. A metal frame 34 having a frame 33 provided so as to surround the heat radiating member 32 on the surface 31 and an opening A that is provided on the lower surface of the ceramic laminate 31 and exposes the lower surface of the heat radiating member 32 is provided. The semiconductor element storage package 3 further includes a connector member 35 on the side surface of the ceramic laminate 31 for electrically connecting the inside of the frame 33 and the outside of the frame 33.
　セラミック積層体３１は、上下に貫通する貫通孔Ｈを有する板状体である。セラミック積層体３１は、例えば、酸化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化アルミニウム質焼結体、窒化珪素質焼結体またはガラスセラミックス等の絶縁層を複数層積層したものである。また、セラミック積層体３１の貫通孔Ｈには、半導体素子２を搭載する実装領域Ｒを有する放熱部材３２が嵌まる。 The ceramic laminate 31 is a plate-like body having through holes H that penetrate vertically. The ceramic laminate 31 includes a plurality of insulating layers such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a glass ceramic. Layers are stacked. Further, the heat radiating member 32 having the mounting region R in which the semiconductor element 2 is mounted fits into the through hole H of the ceramic laminate 31.
　セラミック積層体３１は、矩形状の板状体であって、平面視して、四隅が面取りされている。セラミック積層体３１は、面取りされている箇所を含めず、一辺の長さが例えば１０ｍｍ以上５０ｍｍ以下に設定されている。また、セラミック積層体３１は、上下方向の厚みが例えば１ｍｍ以上６ｍｍ以下に設定されている。 The ceramic laminate 31 is a rectangular plate-like body, and has four corners chamfered in plan view. The ceramic laminate 31 does not include a chamfered portion, and the length of one side is set to, for example, 10 mm or more and 50 mm or less. The ceramic laminate 31 is set to have a vertical thickness of, for example, 1 mm or more and 6 mm or less.
　また、セラミック積層体３１は、直方体状の貫通孔Ｈが形成されている。貫通孔Ｈは、平面視して一辺の長さが、例えば５ｍｍ以上３０ｍｍ以下に設定されている。また、貫通孔Ｈの上下方向の長さが、例えば１ｍｍ以上６ｍｍ以下であって、セラミック積層体３１の上下方向の厚みと一致している。 Further, the ceramic laminate 31 has a rectangular parallelepiped through-hole H formed therein. The through hole H is set to have a side length of, for example, 5 mm or more and 30 mm or less in plan view. Further, the length of the through hole H in the vertical direction is, for example, not less than 1 mm and not more than 6 mm, and matches the thickness of the ceramic laminate 31 in the vertical direction.
　また、セラミック積層体３１の上面には、モリブデンまたはマンガン等の金属を含む金属ペーストを焼結して成る配線導体３６が形成されている。配線導体３６は、セラミック積層体３１の上面からセラミック積層体３１内をとおって、セラミック積層体３１の下面にまで形成されている。 Further, a wiring conductor 36 is formed on the upper surface of the ceramic laminate 31 by sintering a metal paste containing a metal such as molybdenum or manganese. The wiring conductor 36 is formed from the upper surface of the ceramic laminate 31 to the lower surface of the ceramic laminate 31 through the ceramic laminate 31.
　放熱部材３２は、セラミック積層体３１の貫通孔Ｈに嵌めて設けられている。放熱部材３２は、半導体素子２の発する熱を外部に放散するものである。放熱部材３２は、例えば、銅、鉄、タングステン、モリブデン、ニッケルまたはコバルト等の金属材料、あるいはこれらの金属材料を含有する合金から成る。放熱部材３２は、溶融した金属材料を型枠に鋳込んで固化させたインゴットに対して、従来周知の圧延加工または打ち抜き加工等の金属加工法を用いることで、所定形状に製作される。なお、放熱部材３２の熱伝導率は、例えば１５Ｗ／（ｍ・Ｋ）以上４５０Ｗ／（ｍ・Ｋ）以下に設定されている。放熱部材３２の熱膨張係数は、例えば３×１０－６／Ｋ以上２８×１０－６／Ｋ以下に設定されている。 The heat dissipating member 32 is provided by being fitted in the through hole H of the ceramic laminate 31. The heat dissipation member 32 dissipates heat generated by the semiconductor element 2 to the outside. The heat dissipation member 32 is made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials. The heat radiating member 32 is manufactured in a predetermined shape by using a conventionally known metal processing method such as rolling or punching for an ingot obtained by casting a molten metal material into a mold and solidifying it. In addition, the heat conductivity of the heat radiating member 32 is set to 15 W / (m · K) or more and 450 W / (m · K) or less, for example. The thermal expansion coefficient of the heat radiating member 32 is set to, for example, 3 × 10 −6 / K or more and 28 × 10 −6 / K or less.
　放熱部材３２は、貫通孔Ｈに嵌まる大きさであって、直方体状に形成されている。放熱部材３２は、平面視して一辺の長さが、例えば５ｍｍ以上３０ｍｍ以下に設定されている。また、放熱部材３２の上下方向の長さが、例えば１ｍｍ以上８ｍｍ以下であって、放熱部材３２の下面が半導体装置１を外部の実装基板に接するような貫通孔Ｈの大きさおよび金属基板３４の厚さに対応している。 The heat radiating member 32 is sized to fit in the through hole H and is formed in a rectangular parallelepiped shape. The heat radiating member 32 has a side length of, for example, 5 mm to 30 mm in plan view. In addition, the length of the heat dissipation member 32 in the vertical direction is, for example, 1 mm or more and 8 mm or less, and the size of the through hole H such that the lower surface of the heat dissipation member 32 contacts the external mounting substrate and the metal substrate 34. It corresponds to the thickness of.
　放熱部材３２は、図７に示すように、貫通孔Ｈに嵌まる大きさであって、上面の高さ位置が、貫通孔Ｈの上部開口縁の高さ位置よりも低く設定されている。放熱部材３２の上面の高さ位置を貫通孔Ｈの上部開口縁の高さ位置よりも低くすることで、半導体素子２を放熱部材３２上の実装領域Ｒに実装しても半導体素子２の上面の高さ位置を低くすることができ、半導体素子収納用パッケージ３および半導体装置１の上下方向の厚みを小さくすることができる。 As shown in FIG. 7, the heat dissipating member 32 is sized to fit in the through hole H, and the height position of the upper surface is set lower than the height position of the upper opening edge of the through hole H. Even if the semiconductor element 2 is mounted on the mounting region R on the heat dissipation member 32 by making the height position of the upper surface of the heat dissipation member 32 lower than the height position of the upper opening edge of the through hole H, the upper surface of the semiconductor element 2 The height position of the semiconductor device housing package 3 and the semiconductor device 1 can be reduced in thickness in the vertical direction.
　また、放熱部材３２は、図７に示すように、下面の高さ位置が、貫通孔Ｈの下部開口縁の高さ位置と同じ高さとなるように設定されている。放熱部材３２の下面の高さ位置を貫通孔Ｈの下部開口縁の高さ位置とすることで、放熱部材３２の下面を外部の実装基板に、例えば半田またはろう材等の接合部材を介して接続することができる。ひいては、接合部材が実装基板上に漏れ広がろうとするのを、貫通孔Ｈの下部開口縁内に収めることができ、実装基板において予期しない電気的ショート等の不具合が発生するのを抑制することができる。また、接合部材は、貫通孔Ｈの下部開口縁内に収められることから、半導体装置１の実装基板への接合性や実装性を向上することができる。 Further, as shown in FIG. 7, the heat radiation member 32 is set so that the height position of the lower surface is the same as the height position of the lower opening edge of the through hole H. By setting the height position of the lower surface of the heat radiating member 32 to the height position of the lower opening edge of the through hole H, the lower surface of the heat radiating member 32 is connected to an external mounting substrate via a joining member such as solder or brazing material. Can be connected. As a result, it is possible to keep the joining member from leaking and spreading on the mounting board within the lower opening edge of the through hole H, and to suppress the occurrence of an unexpected electric short circuit or the like in the mounting board. Can do. Further, since the joining member is accommodated in the lower opening edge of the through hole H, the joining property and mounting property of the semiconductor device 1 to the mounting substrate can be improved.
　また、セラミック積層体３１の上面には、実装領域Ｒを取り囲むように枠体３３が設けられている。枠体３３は、セラミック積層体３１の外縁に沿って連続して設けられている。枠体３３は、枠状部材であって、半導体素子２を外部から保護するものである。枠体３３は、半導体素子２を実装する実装領域Ｒを囲むようにセラミック積層体３１上に設けられる。枠体３３は、例えば、酸化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化アルミニウム質焼結体、窒化珪素質焼結体またはガラスセラミックス等の絶縁層を複数層積層したものである。なお、枠体３３は、セラミック積層体３１と一体的に形成されていてもよいし、セラミック積層体３１と別個独立に形成されていてもよい。また、枠体３３は、例えば、銅、鉄、タングステン、モリブデン、ニッケルまたはコバルト等の金属材料、あるいはこれらの金属材料を含有する合金から成るものでもよい。セラミック積層体３１と枠体３３とが別個独立に形成された場合、セラミック積層体３１と枠体３３とは、例えば半田またはろう材等の接合部材を介して接合される。 Further, a frame 33 is provided on the upper surface of the ceramic laminate 31 so as to surround the mounting region R. The frame body 33 is provided continuously along the outer edge of the ceramic laminate 31. The frame body 33 is a frame-shaped member and protects the semiconductor element 2 from the outside. The frame 33 is provided on the ceramic laminate 31 so as to surround the mounting region R on which the semiconductor element 2 is mounted. The frame 33 is composed of, for example, a plurality of insulating layers such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide sintered body, an aluminum nitride sintered body, a silicon nitride sintered body, or a glass ceramic. Laminated. The frame 33 may be formed integrally with the ceramic laminate 31 or may be formed separately from the ceramic laminate 31. The frame 33 may be made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials. When the ceramic laminate 31 and the frame 33 are formed separately and independently, the ceramic laminate 31 and the frame 33 are joined via a joining member such as solder or brazing material.
　また、枠体３３は、上下方向の厚みが例えば０．３ｍｍ以上６ｍｍ以下であって、半導体素子２の厚みよりも大きく設定されている。また、枠体３３は、平面視して、四隅が面取りされている。枠体３３は、平面視して、面取りされている箇所を含めず、外縁の一辺の長さが例えば１０ｍｍ以上５０ｍｍ以下に設定されている。また、枠体３３は、平面視して、内縁の一辺の長さが例えば８ｍｍ以上４８ｍｍ以下に設定されている。 Further, the frame 33 has a vertical thickness of, for example, 0.3 mm or more and 6 mm or less, and is set to be larger than the thickness of the semiconductor element 2. The frame 33 is chamfered at four corners in plan view. The frame 33 does not include a chamfered portion in plan view, and the length of one side of the outer edge is set to, for example, 10 mm or more and 50 mm or less. Further, the frame 33 is set to have a length of one side of the inner edge of, for example, 8 mm or more and 48 mm or less in plan view.
　コネクタ部材３５は、同軸端子を接続するためのものである。コネクタ部材３５は、外部の同軸端子を接続して、枠体３３内と枠体３３外とを電気的に接続することができる。コネクタ部材３５は、図６、７に示すように、セラミック積層体３１の側面に設けられる。コネクタ部材３５は、円筒状の筒体３５１と、その中心軸にガラス等の絶縁部材３５２を介して設けられた棒状導体からなる内部導体３５３とを有している。コネクタ部材３５は、枠体３３の側壁の貫通箇所に嵌められる。内部導体３５３は、例えば、銅、鉄、タングステン、モリブデン、ニッケルまたはコバルト等の金属材料、あるいはこれらの金属材料を含有する合金から成り、半導体素子２と電気的に接続される。そして、半導体素子２と内部導体３５３との間で電気信号が伝わる。なお、コネクタ部材３５は、枠体３３内と枠体３３外とを電気的に接続することができれば、枠体３３の側壁に設けなくてもよい。例えば、コネクタ部材３５は、セラミック積層体３１の側面に設け、セラミック積層体３１の上面に形成された配線導体３６に内部導体３５３を接続した構造としてもよい。 The connector member 35 is for connecting a coaxial terminal. The connector member 35 can connect an external coaxial terminal to electrically connect the inside of the frame 33 and the outside of the frame 33. The connector member 35 is provided on the side surface of the ceramic laminate 31 as shown in FIGS. The connector member 35 has a cylindrical tubular body 351 and an internal conductor 353 made of a rod-shaped conductor provided on the central axis via an insulating member 352 such as glass. The connector member 35 is fitted into a through portion of the side wall of the frame body 33. The inner conductor 353 is made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials, and is electrically connected to the semiconductor element 2. An electrical signal is transmitted between the semiconductor element 2 and the internal conductor 353. The connector member 35 may not be provided on the side wall of the frame 33 as long as it can electrically connect the inside of the frame 33 and the outside of the frame 33. For example, the connector member 35 may be provided on the side surface of the ceramic laminate 31, and the internal conductor 353 may be connected to the wiring conductor 36 formed on the upper surface of the ceramic laminate 31.
　金属基板３４は、セラミック積層体３１の下面に設けられる。金属基板３４は、放熱部材３２の下面を露出する開口部Ａを有している。金属基板３４は、半導体素子収納用パッケージ３を外部の実装基板に、例えば半田やろう材、ガラス接合材または樹脂接合材等の接合材を介して接続するものである。金属基板３４は、例えば、銅、鉄、タングステン、モリブデン、ニッケルまたはコバルト等の金属材料、あるいはこれらの金属材料を含有する合金から成る。金属基板３４は、溶融した金属材料を型枠に鋳込んで固化させたインゴットに対して、従来周知の圧延加工または打ち抜き加工等の金属加工法を用いることで、所定形状に製作される。なお、金属基板３４の熱伝導率は、例えば１５Ｗ／（ｍ・Ｋ）以上４５０Ｗ／（ｍ・Ｋ）以下に設定されている。金属基板３４の熱膨張係数は、例えば３×１０－６／Ｋ以上２８×１０－６／Ｋ以下に設定されている。 The metal substrate 34 is provided on the lower surface of the ceramic laminate 31. The metal substrate 34 has an opening A that exposes the lower surface of the heat dissipation member 32. The metal substrate 34 is for connecting the semiconductor element housing package 3 to an external mounting substrate through a bonding material such as solder, brazing material, glass bonding material, or resin bonding material. The metal substrate 34 is made of, for example, a metal material such as copper, iron, tungsten, molybdenum, nickel, or cobalt, or an alloy containing these metal materials. The metal substrate 34 is manufactured in a predetermined shape by using a conventionally known metal processing method such as rolling or punching for an ingot obtained by casting and solidifying a molten metal material into a mold. The thermal conductivity of the metal substrate 34 is set to, for example, 15 W / (m · K) or more and 450 W / (m · K) or less. The thermal expansion coefficient of the metal substrate 34 is set to, for example, 3 × 10 −6 / K or more and 28 × 10 −6 / K or less.
　金属基板３４の開口部Ａは、図５に示すように、矩形状であって放熱部材３２の下面を露出する大きさに形成されている。開口部Ａの一辺の長さは、放熱部材３２の一辺の長さと対応しており、例えば５ｍｍ以上３０ｍｍ以下に設定されている。開口部Ａの上下方向の長さは、例えば１ｍｍ以上５ｍｍ以下に設定されており、金属基板３４の上下方向の厚みと一致している。金属基板３４は、放熱部材３２の下面を露出する開口部Ａが形成されていることで、半導体素子２の発する熱が放熱部材３２に伝わり、開口部Ａから露出した放熱部材３２の下面から外部に向かって放散することができる。 As shown in FIG. 5, the opening A of the metal substrate 34 has a rectangular shape and is sized to expose the lower surface of the heat dissipation member 32. The length of one side of the opening A corresponds to the length of one side of the heat radiation member 32, and is set to, for example, 5 mm or more and 30 mm or less. The length of the opening A in the vertical direction is set to, for example, 1 mm or more and 5 mm or less, and matches the thickness of the metal substrate 34 in the vertical direction. The metal substrate 34 is formed with the opening A that exposes the lower surface of the heat radiating member 32, so that the heat generated by the semiconductor element 2 is transmitted to the heat radiating member 32, and the external surface is exposed from the lower surface of the heat radiating member 32 exposed from the opening A. Can be dissipated towards.
　また、金属基板３４は、図５に示すように、下面視してコネクタ部材３５と開口部Ａとの間に、セラミック積層体３１の下面の一部を露出する、孔部Ｂ１（第１孔部ともいう）が形成されている。第１孔部Ｂ１は、図５に示すように、矩形状であって一辺の長さが、例えば１ｍｍ以上３０ｍｍ以下に設定されている。コネクタ部材３５は、同軸端子に流れる電流に起因して熱が集中しやすく、また、半導体装置１を作動させる際に発生する半導体素子２からの熱が放熱部材３２やセラミック積層体３１、金属基板３４を伝導することによって、セラミック積層体３１の下面の金属基板３４が外周部から剥離しようとしたり、枠体３３とコネクタ部材３５との熱膨張係数差に起因して生じる熱応力により、接合部付近に剥がれやクラックが生じたりする。そこで、第１孔部Ｂ１が、下面視してコネクタ部材３５と放熱部材３２との間に設けることで、金属基板３４が熱膨張、熱収縮を起こしても、熱応力がセラミック積層体３１と金属基板３４との間に加わりにくく、同様に半導体装置１を作動させる際に発生する半導体素子２からの熱は、セラミック積層体３１と金属基板３４との接合部の外周部や、枠体３３とコネクタ部材３５との接合部付近に伝導され難くすることができる。このように、熱が発生しやすい、コネクタ部材３５と放熱部材３２との間に、第１孔部Ｂ１を設けることで、金属基板３４の熱変形による応力が金属基板３４とセラミック積層体３１との間に伝わりにくくすることができる。 In addition, as shown in FIG. 5, the metal substrate 34 has a hole B1 (first hole) that exposes a part of the lower surface of the ceramic laminate 31 between the connector member 35 and the opening A when viewed from the lower surface. Part). As shown in FIG. 5, the first hole B1 has a rectangular shape, and the length of one side is set to, for example, 1 mm or more and 30 mm or less. The connector member 35 tends to concentrate heat due to the current flowing through the coaxial terminal, and the heat from the semiconductor element 2 generated when the semiconductor device 1 is operated is the heat radiating member 32, the ceramic laminate 31, the metal substrate. 34, the metal substrate 34 on the lower surface of the ceramic laminate 31 tends to be peeled off from the outer peripheral portion, or due to thermal stress caused by the difference in thermal expansion coefficient between the frame body 33 and the connector member 35, Peeling or cracking may occur in the vicinity. Therefore, by providing the first hole B1 between the connector member 35 and the heat radiating member 32 when viewed from the bottom, even if the metal substrate 34 is thermally expanded and contracted, the thermal stress is different from that of the ceramic laminate 31. Similarly, heat from the semiconductor element 2 generated when the semiconductor device 1 is operated is hardly applied between the metal substrate 34 and the outer peripheral portion of the joint portion between the ceramic laminate 31 and the metal substrate 34 or the frame 33. It can be made difficult to be conducted near the joint between the connector member 35 and the connector member 35. Thus, by providing the first hole B <b> 1 between the connector member 35 and the heat dissipation member 32, where heat is likely to be generated, the stress due to thermal deformation of the metal substrate 34 causes the metal substrate 34, the ceramic laminate 31, and the like. It can be made difficult to communicate during.
　金属基板３４は、セラミック積層体３１の下面の縁を露出する切欠きＣが形成されている。切欠きＣは、図５に示すように、コネクタ部材３５が配置されているセラミック積層体３１の一辺を除いて、金属基板３４の三辺に設けられている。セラミック積層体３１の下面であって、金属基板３４の切欠きＣが形成されている箇所に、リード端子３７が設けられている。なお、複数のリード端子３７は、それぞれ電気的に絶縁するように間を空けて配置されている。 The metal substrate 34 is formed with a notch C that exposes the edge of the lower surface of the ceramic laminate 31. As shown in FIG. 5, the notches C are provided on three sides of the metal substrate 34 except for one side of the ceramic laminate 31 on which the connector member 35 is disposed. Lead terminals 37 are provided on the lower surface of the ceramic laminate 31 where the notches C of the metal substrate 34 are formed. Note that the plurality of lead terminals 37 are spaced apart so as to be electrically insulated from each other.
　また、金属基板３４は、図５に示すように、下面視して、外縁が四方に向かって延在した凸部３４ａを有している。凸部３４ａは、セラミック積層体３１の四隅に向かって延在している。また、凸部３４ａ同士の間において、少なくとも一箇所は、セラミック積層体３１の外縁の内側に向かって凹んでいる。そして、セラミック積層体３１の下面であって、金属基板３４の凹みに、リード端子３７が設けられている。ここで、凹みが切欠きＣが形成された箇所に相当する。 Further, as shown in FIG. 5, the metal substrate 34 has a convex portion 34 a whose outer edge extends in four directions when viewed from below. The convex portions 34 a extend toward the four corners of the ceramic laminate 31. Further, at least one portion is recessed toward the inside of the outer edge of the ceramic laminate 31 between the convex portions 34 a. A lead terminal 37 is provided on the lower surface of the ceramic laminate 31 in the recess of the metal substrate 34. Here, the dent corresponds to the portion where the notch C is formed.
　また、セラミック積層体３１の下面には、複数のリード端子３７に対応して複数のビア導体と接続される金属層が設けられている。そして、複数のリード端子３７のそれぞれが各ビア導体と接続される金属層に接続されている。複数のビア導体は、セラミック積層体３１内をとおってセラミック積層体３１の上面に実装される半導体素子２と配線導体３６を介して電気的に接続される。リード端子３７は、ビア導体を介してセラミック積層体３１の下面に電気的に接続された金属層に対して、例えば半田またはろう材等の接合部材を介して接合される。 Further, a metal layer connected to a plurality of via conductors corresponding to the plurality of lead terminals 37 is provided on the lower surface of the ceramic laminate 31. Each of the plurality of lead terminals 37 is connected to a metal layer connected to each via conductor. The plurality of via conductors are electrically connected to the semiconductor element 2 mounted on the upper surface of the ceramic multilayer body 31 via the wiring conductor 36 through the ceramic multilayer body 31. The lead terminal 37 is bonded to a metal layer electrically connected to the lower surface of the ceramic laminate 31 via a via conductor, for example, via a bonding member such as solder or brazing material.
　また、セラミック積層体３１内には、上下方向に沿って複数の貫通導体３８が設けられている。また、複数の貫通導体３８は、貫通導体３８の下端が、金属基板３４の上面に接続される。複数の貫通導体３８は、一部がセラミック積層体３１の上面に形成された配線パターンの一部と電気的に接続されている。そして、枠体３３によって囲まれた領域内の熱を配線パターンの一部から貫通導体３８を介して金属基板３４に伝えることができる。その結果、枠体３３内の熱を外部に向かって放熱しやすくすることができる。 In the ceramic laminate 31, a plurality of through conductors 38 are provided along the vertical direction. The plurality of through conductors 38 are connected to the upper surface of the metal substrate 34 at the lower ends of the through conductors 38. The plurality of through conductors 38 are electrically connected to a part of the wiring pattern formed on the upper surface of the ceramic laminate 31. The heat in the region surrounded by the frame 33 can be transmitted from a part of the wiring pattern to the metal substrate 34 through the through conductor 38. As a result, the heat in the frame 33 can be easily released toward the outside.
　また、貫通導体３８は、図７、８に示すように、断面視して放熱部材３２の両側にそれぞれ設けられていてもよい。放熱部材３２の側面の近傍に貫通導体３８を設けることで、放熱部材３２からセラミック積層体３１内に伝わる熱を、貫通導体３８によって金属基板３４や実装基板に伝えやすくすることができる。その結果、放熱部材３４が高温になるのを抑え、放熱部材３４が熱膨張してセラミック積層体３１を破壊するのを抑制することができる。さらに、放熱部材３２を間に挟んで貫通導体３８を設けることで、半導体素子２から放熱部材３２に伝わる熱を放熱部材３２の両側面から偏り少なく両側の貫通導体３８に伝えることができる。その結果、放熱部材３２が歪な形で熱膨張を起こすのを低減し、セラミック積層体３１が破壊されるのを抑制することができる。 Further, as shown in FIGS. 7 and 8, the through conductors 38 may be provided on both sides of the heat radiating member 32 in a sectional view. By providing the through conductor 38 in the vicinity of the side surface of the heat radiating member 32, heat transmitted from the heat radiating member 32 into the ceramic laminate 31 can be easily transmitted to the metal substrate 34 and the mounting substrate by the through conductor 38. As a result, it is possible to suppress the heat radiating member 34 from becoming high temperature and to prevent the heat radiating member 34 from thermally expanding and destroying the ceramic laminate 31. Further, by providing the through conductor 38 with the heat radiating member 32 interposed therebetween, the heat transmitted from the semiconductor element 2 to the heat radiating member 32 can be transmitted to the through conductors 38 on both sides with little deviation from the both side surfaces of the heat radiating member 32. As a result, it is possible to reduce the thermal expansion of the heat dissipating member 32 in a distorted form, and to suppress the ceramic laminate 31 from being destroyed.
　金属基板３４は、開口部Ａと切欠きＣとの間に、セラミック積層体３１の下面の一部を露出する、孔部Ｂ２（第２孔部ともいう）が形成されている。第２孔部Ｂ２は、図５に示すように、矩形状であって一辺の長さが、例えば１ｍｍ以上２５ｍｍ以下に設定されている。一対の第２孔部Ｂ２の間には、開口部Ａが位置するように設けられている。リード端子３７は、リード端子３７に流れる電流に起因して熱が集中しやすく、また、半導体装置１を作動させる際に発生する半導体素子２からの熱が放熱部材３２やセラミック積層体３１、金属基板３４を伝導することによって、金属基板３４の切欠きＣの周囲には、熱が伝わりやすい。そこで、切欠きＣと開口部Ａとの間に、第２孔部Ｂ２を設けることで、リード端子３７からの熱応力を緩和しやすくすることができるとともに、半導体装置１を作動させる際に発生する半導体素子２からの熱を切欠きＣに伝導し難くすることができる。そして、セラミック積層体３１と金属基板３４との間に熱応力が加わり、金属基板３４が剥離しようとするのを抑制したり、セラミック積層体３１や金属基板３４との接合部に生じるクラックを抑制したりすることができる。 The metal substrate 34 has a hole B2 (also referred to as a second hole) that exposes a part of the lower surface of the ceramic laminate 31 between the opening A and the notch C. As shown in FIG. 5, the second hole B2 has a rectangular shape, and the length of one side is set to, for example, 1 mm or more and 25 mm or less. An opening A is provided between the pair of second holes B2. The lead terminal 37 tends to concentrate heat due to the current flowing through the lead terminal 37, and the heat from the semiconductor element 2 generated when the semiconductor device 1 is operated is heat radiating member 32, ceramic laminate 31, metal By conducting the substrate 34, heat is easily transmitted around the notch C of the metal substrate 34. Therefore, by providing the second hole B2 between the notch C and the opening A, the thermal stress from the lead terminal 37 can be easily relieved and generated when the semiconductor device 1 is operated. Therefore, it is possible to make it difficult to conduct heat from the semiconductor element 2 to the notch C. Then, thermal stress is applied between the ceramic laminate 31 and the metal substrate 34 to suppress the metal substrate 34 from being peeled off, or to suppress cracks generated at the joint between the ceramic laminate 31 and the metal substrate 34. You can do it.
　また、枠体３３上には、半導体素子２を覆うように蓋体４が設けられる。蓋体４は、枠体３３で囲まれる領域を気密封止するものである。蓋体４は、例えば、銅、タングステン、鉄、ニッケルまたはコバルト等の金属、あるいはこれらの金属を複数種含む合金、あるいは酸化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化アルミニウム質焼結体、窒化珪素質焼結体またはガラスセラミックス等のセラミックスから成る。また、蓋体４は、枠体３３の上面に、例えば半田またはろう材等の接合部材を介して接合される。 Also, a lid 4 is provided on the frame 33 so as to cover the semiconductor element 2. The lid body 4 hermetically seals a region surrounded by the frame body 33. The lid 4 is made of, for example, a metal such as copper, tungsten, iron, nickel, or cobalt, an alloy containing a plurality of these metals, an aluminum oxide sintered body, a mullite sintered body, or a silicon carbide sintered body. It consists of ceramics such as an aluminum nitride sintered body, a silicon nitride sintered body, or glass ceramics. The lid 4 is joined to the upper surface of the frame 33 via a joining member such as solder or brazing material.
　枠体３３で囲まれた領域は、真空状態または窒素ガス等が充填されており、蓋体４を枠体３３上に設けることで、枠体３３で囲まれる領域を気密封止された状態にすることができる。蓋体４は、所定雰囲気で、枠体３３上に載置され、枠体３３の封止用導体パターン上に接合されたシールリングと蓋体３３の封止部材とが溶接されるように所定電流を蓋体３３に印加して、シーム溶接を行なうことにより枠体３３上に取り付けられる。また、蓋体３３は、例えばろう材、ガラス接合材または樹脂接合材等の接合材を介して取り付けることができる。 The region surrounded by the frame 33 is filled with a vacuum state or nitrogen gas, and the region surrounded by the frame 33 is hermetically sealed by providing the lid 4 on the frame 33. can do. The lid 4 is placed on the frame 33 in a predetermined atmosphere, and the seal ring joined onto the sealing conductor pattern of the frame 33 and the sealing member of the lid 33 are welded to each other. It is attached on the frame 33 by applying an electric current to the lid 33 and performing seam welding. The lid 33 can be attached via a bonding material such as a brazing material, a glass bonding material, or a resin bonding material.
　本実施形態に係る半導体装置１および半導体素子収納用パッケージ３は、セラミック積層体３１の貫通孔Ｈに放熱部材３２を設け、セラミック積層体３１の下面に放熱部材３２の下面を露出するように開口部Ａを設けた金属基板３４が設けられている。枠体３３で囲まれる実装領域Ｒに実装される半導体素子２が発する熱が、放熱部材３２を介して外部に放散されやすい構造とすることで、パッケージが破壊される虞を低減することができる。そして、半導体素子２から伝わる熱が外部に放熱されやすくすることで、セラミック積層体３１、枠体３３またはコネクタ部材３５に熱応力が集中してクラックが発生するのを抑制することができ、半導体素子２の発する熱を外部に効率よく放散することで、パッケージが破壊される虞を低減することが可能な半導体素子収納用パッケージ３および半導体装置１を提供することができる。 In the semiconductor device 1 and the semiconductor element housing package 3 according to the present embodiment, a heat dissipation member 32 is provided in the through hole H of the ceramic laminate 31, and an opening is provided so that the lower surface of the heat dissipation member 32 is exposed on the lower surface of the ceramic laminate 31. A metal substrate 34 provided with the part A is provided. By adopting a structure in which the heat generated by the semiconductor element 2 mounted in the mounting region R surrounded by the frame body 33 is easily dissipated to the outside through the heat dissipation member 32, the possibility that the package is broken can be reduced. . The heat transmitted from the semiconductor element 2 is easily dissipated to the outside, so that it is possible to suppress the occurrence of cracks due to the concentration of thermal stress on the ceramic laminate 31, the frame 33, or the connector member 35. By efficiently dissipating the heat generated by the element 2 to the outside, it is possible to provide the semiconductor element housing package 3 and the semiconductor device 1 that can reduce the risk of the package being destroyed.
　また、放熱部材３２は、図８に示すように、放熱部材３２が貫通孔Ｈに嵌まる大きさであって、金属基板３４の厚みも考慮した厚みであれば、下面が貫通孔Ｈの下部開口縁の高さ位置よりも下方に突出していてもよい。放熱部材３２は、側面の下端に側方に延在された延在部３２ａが形成されている。なお、延在部３２ａの上下方向の厚みは、金属基板３４の上下方向の厚みと一致している。そして、延在部３２ａの上面は、セラミック積層体３１の下面に接続されている。放熱部材３２に延在部３２ａが設けられることで、放熱部材３２の貫通孔Ｈに対する位置合わせが容易となり、放熱部材３２を所望の位置に設けることができるとともに、放熱部材３２の下面の面積を放熱部材３２の上面の面積よりも大きくすることができ、放熱部材３２を外部の基板に対して、安定して実装することができる。延在部３２ａは、延在部３２ａの上面をセラミック積層体３１の下面に接続することで、放熱部材３２とセラミック積層体３１の接続面積を大きくすることができ、放熱部材３２が熱膨張してセラミック積層体３１から外れようとするのを抑制することができる。このように、放熱部材３２の下面は、図８に示すように、セラミック積層体３１の下面より下方に位置するように配置されてもよく、放熱部材３２の下面が、例えば半田やろう材、ガラス接合材または樹脂接合材等の接合材を介して外部の実装基板に接続されることにより、半導体素子２の発する熱を外部の実装基板に効率よく伝達させることができる。さらには、金属基板３４と実装基板との間に設けられる接合材の体積が増加することにより、半導体装置１の実装基板への接合性が向上する。 Further, as shown in FIG. 8, the heat radiating member 32 has a size that allows the heat radiating member 32 to fit into the through hole H, and the lower surface is a lower portion of the through hole H as long as the thickness of the metal substrate 34 is also taken into consideration. You may protrude below the height position of an opening edge. The heat radiating member 32 is formed with an extending portion 32a extending laterally at the lower end of the side surface. The vertical thickness of the extending portion 32a matches the vertical thickness of the metal substrate 34. The upper surface of the extending portion 32 a is connected to the lower surface of the ceramic laminate 31. By providing the extended portion 32a in the heat radiating member 32, it is easy to align the heat radiating member 32 with the through hole H, the heat radiating member 32 can be provided at a desired position, and the area of the lower surface of the heat radiating member 32 is reduced. The area of the upper surface of the heat radiating member 32 can be made larger, and the heat radiating member 32 can be stably mounted on an external substrate. The extension part 32a can increase the connection area between the heat dissipation member 32 and the ceramic laminate 31 by connecting the upper surface of the extension part 32a to the lower surface of the ceramic laminate 31, and the heat dissipation member 32 is thermally expanded. Therefore, it is possible to prevent the ceramic laminate 31 from being detached. Thus, as shown in FIG. 8, the lower surface of the heat radiating member 32 may be disposed below the lower surface of the ceramic laminate 31, and the lower surface of the heat radiating member 32 may be, for example, solder or brazing material, By being connected to an external mounting substrate via a bonding material such as a glass bonding material or a resin bonding material, the heat generated by the semiconductor element 2 can be efficiently transmitted to the external mounting substrate. Furthermore, the bonding property of the semiconductor device 1 to the mounting substrate is improved by increasing the volume of the bonding material provided between the metal substrate 34 and the mounting substrate.
　枠体３３内は、気密封止されており、半導体素子２の発する熱が、放熱部材３２に伝わりやすい。放熱部材３２に伝わった熱は、放熱部材３２を介して放熱部材３２の下面から接続部材を介して外部の実装基板に向かって放散される。また、半導体素子収納用パッケージ３および半導体装置１の製造工程において負荷される熱により、セラミック積層体３１、枠体３３またはコネクタ部材３５に、熱膨張係数差に起因した熱応力が生じやすい。例えば、コネクタ部材３５が枠体３３にろう材によって接合される際や、枠体３３の上面に接合されたシールリングを介して蓋体４をシーム溶接によって接合する際である。 The inside of the frame 33 is hermetically sealed, and the heat generated by the semiconductor element 2 is easily transmitted to the heat radiating member 32. The heat transmitted to the heat radiating member 32 is dissipated from the lower surface of the heat radiating member 32 via the heat radiating member 32 toward the external mounting substrate via the connecting member. In addition, due to heat applied in the manufacturing process of the semiconductor element housing package 3 and the semiconductor device 1, thermal stress due to the difference in thermal expansion coefficient is likely to occur in the ceramic laminate 31, the frame 33, or the connector member 35. For example, when the connector member 35 is joined to the frame body 33 by a brazing material, or when the lid body 4 is joined by seam welding via a seal ring joined to the upper surface of the frame body 33.
　また、コネクタ部材３５に発生する熱が金属基板３４に伝わっても、コネクタ部材３５からの距離が短い、コネクタ部材３５と開口部Ａとの間に、第１孔部Ｂ１が設けられているため、金属基板３４が熱変形しにくくなっている。また、半導体素子収納用パッケージ３および半導体装置１に熱が加えられるそれぞれの製造工程おいて、第１孔部Ｂ１によって金属基板３４の熱膨張、熱収縮による熱応力が低減され、金属基板３４がセラミック積層体３１から剥離しようとするのを抑制することができるとともに、セラミック積層体３１に生じるクラックを抑制することができる。また、リード端子３７に発生する熱が金属基板３４に伝わっても、リード端子３７からの距離が短い、切欠きＣと開口部Ａとの間に、第２孔部Ｂ２が設けられているため、金属基板３４が熱変形しにくくなっている。また、半導体素子収納用パッケージ３および半導体装置１に熱が加えられるそれぞれの製造工程おいて、第２孔部Ｂ２によって金属基板３４の熱膨張、熱収縮による熱応力が低減され、金属基板３４がセラミック積層体３１から剥離しようとするのを抑制することができるとともに、セラミック積層体３１に生じるクラックを抑制することができる。さらに、第１孔部Ｂ１では、金属基板３４とセラミック積層体３１とは接合されていないため、セラミック積層体３１と金属基板３４とを接合する半田等に発生するボイドによる接合不良や、ボイドを起点とした熱応力によってセラミック積層体３１から金属基板３４が剥がれることを抑制できるとともに、セラミック積層体３１に生じるクラックを抑制することができる。 Even if the heat generated in the connector member 35 is transmitted to the metal substrate 34, the first hole B1 is provided between the connector member 35 and the opening A, which is short from the connector member 35. The metal substrate 34 is less likely to be thermally deformed. Further, in each manufacturing process in which heat is applied to the semiconductor element storage package 3 and the semiconductor device 1, thermal stress due to thermal expansion and contraction of the metal substrate 34 is reduced by the first hole B 1, and the metal substrate 34 is While being able to suppress peeling from the ceramic laminate 31, it is possible to suppress cracks generated in the ceramic laminate 31. Even if the heat generated in the lead terminal 37 is transmitted to the metal substrate 34, the second hole B2 is provided between the notch C and the opening A, which is short from the lead terminal 37. The metal substrate 34 is less likely to be thermally deformed. Further, in each manufacturing process in which heat is applied to the semiconductor element housing package 3 and the semiconductor device 1, thermal stress due to thermal expansion and contraction of the metal substrate 34 is reduced by the second hole B 2, and the metal substrate 34 is While being able to suppress peeling from the ceramic laminate 31, it is possible to suppress cracks generated in the ceramic laminate 31. Furthermore, in the first hole B1, since the metal substrate 34 and the ceramic laminate 31 are not joined, bonding failure due to voids generated in solder or the like joining the ceramic laminate 31 and the metal substrate 34, or voids The metal substrate 34 can be prevented from peeling off from the ceramic laminate 31 due to the thermal stress as the starting point, and cracks generated in the ceramic laminate 31 can be suppressed.
　なお、本発明は上述の形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更、改良等が可能である。上述した実施形態に係る半導体装置と同様な部分については、同一の符号を付して適宜説明を省略する。図９は、一変形例に係る半導体装置１の下面図である。なお、図９の一点鎖線は、セラミック積層体３１の外縁のうち、金属基板３４ｘによって覆われている箇所である。金属基板３４ｘは、凸部３４ａがセラミック積層体３１の外縁以内の大きさでなくてもよい。金属基板３４ｘは、図９に示すように、凸部３４ａが、セラミック積層体３１の外縁よりも外方にまで延在していてもよい。凸部３４ａが、セラミック積層体３１の外縁よりも外方に延在していることで、上面視にて金属基板３４の四隅および外周部を確認しながら、半導体装置１を実装基板の所望の位置に載置し、実装することができる。 It should be noted that the present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the gist of the present invention. Parts similar to those of the semiconductor device according to the above-described embodiment are denoted by the same reference numerals, and description thereof is omitted as appropriate. FIG. 9 is a bottom view of the semiconductor device 1 according to a modification. 9 is a portion of the outer edge of the ceramic laminate 31 that is covered with the metal substrate 34x. The metal substrate 34 x may not have the size of the convex portion 34 a within the outer edge of the ceramic laminate 31. As shown in FIG. 9, the convex portion 34 a of the metal substrate 34 x may extend outward from the outer edge of the ceramic laminate 31. Since the protrusion 34a extends outward from the outer edge of the ceramic laminate 31, the semiconductor device 1 is mounted on a desired mounting substrate while confirming the four corners and the outer peripheral portion of the metal substrate 34 in a top view. Can be mounted and mounted in position.
　また、凸部３４ａには、リード端子３７に沿った方向に延在された張出部３４１ａが設けられている。張出部３４１ａは、リード端子３７とは間を空けて設けらえている。張出部３４１ａは、セラミック積層体３１の端面に対して垂直に延在している。張出部３４１ａは、例えば、セラミック積層体３１の端面を基準に、例えば１ｍｍ以上３ｍｍ以下の長さで張り出している。凸部３４ａが張出部３４１ａを有することで、リード端子３７が張出部３４１ａによって保護され、リード端子３７の先端に力が加わって変形する虞を少なくできる。 Further, the protruding portion 34 a is provided with an overhang portion 341 a extending in a direction along the lead terminal 37. The overhang portion 341 a is provided with a space from the lead terminal 37. The overhang portion 341 a extends perpendicular to the end surface of the ceramic laminate 31. The overhang portion 341a overhangs, for example, with a length of 1 mm or more and 3 mm or less with reference to the end surface of the ceramic laminate 31. Since the protruding portion 34a has the overhang portion 341a, the lead terminal 37 is protected by the overhang portion 341a, and it is possible to reduce the possibility that the tip of the lead terminal 37 is deformed by applying force.
　また、凸部３４ａ同士の間は、直線状であって、セラミック積層体３１の外縁よりも内側に形成されていてもよい。金属基板３４の外縁の一辺が直線状であって、セラミック積層体３１の外縁よりも内側に位置することで、凸部３４ａ同士の間における金属基板３４の外縁の一辺に生じる反りを抑制することができる。 Further, the space between the convex portions 34 a may be linear and may be formed inside the outer edge of the ceramic laminate 31. One side of the outer edge of the metal substrate 34 is linear, and is located on the inner side of the outer edge of the ceramic laminate 31, thereby suppressing warping that occurs on one side of the outer edge of the metal substrate 34 between the convex portions 34 a. Can do.
　また、半導体素子収納用パッケージ３は、コネクタ部材３５に替えて、光ファイバーや透光性部材を固定することができる筒状の固定部材が設けられてもよく、枠体３３に固定部材が設けられることにより、半導体素子収納用パッケージ３の内外で光信号を入出力することができる半導体装置１とすることができる。 In addition, the semiconductor element storage package 3 may be provided with a cylindrical fixing member capable of fixing an optical fiber or a translucent member instead of the connector member 35, and the frame member 33 is provided with a fixing member. Thus, the semiconductor device 1 capable of inputting and outputting optical signals inside and outside the semiconductor element housing package 3 can be obtained.
　＜半導体装置の製造方法＞
　ここで、図１に示す半導体装置１の製造方法について説明する。まず、セラミック積層体３１を準備する。セラミック積層体３１は、例えば酸化アルミニウム質焼結体から成る場合であれば、酸化アルミニウム、酸化珪素、酸化マグネシウムおよび酸化カルシウム等の原料粉末に、有機バインダー、可塑剤または溶剤等を添加混合して混合物を得る。そして、混合物から複数のグリーンシートを作製する。 <Method for Manufacturing Semiconductor Device>
Here, a manufacturing method of the semiconductor device 1 shown in FIG. 1 will be described. First, the ceramic laminate 31 is prepared. If the ceramic laminate 31 is made of, for example, an aluminum oxide sintered body, an organic binder, a plasticizer, a solvent, or the like is added to and mixed with raw material powders such as aluminum oxide, silicon oxide, magnesium oxide, and calcium oxide. A mixture is obtained. And a some green sheet is produced from a mixture.
　また、タングステンまたはモリブデン等の高融点金属粉末を準備し、この粉末に有機バインダー、可塑剤または溶剤等を添加混合して金属ペーストを得る。そして、セラミック積層体３１となるセラミックグリーンシートに配線導体３６となるメタライズパターン、リード端子３７が接合されるメタライズパターン、ビア導体、放熱部材３２および金属基板３４が接合されるメタライズパターンを、それぞれ所定パターンと配置で印刷および充填し、複数のセラミックグリーンシートを積層することで、セラミック積層体３１を準備することができる。 Also, a high melting point metal powder such as tungsten or molybdenum is prepared, and an organic binder, a plasticizer, a solvent or the like is added to and mixed with the powder to obtain a metal paste. Then, a metallized pattern to be the wiring conductor 36, a metallized pattern to which the lead terminal 37 is bonded, a via conductor, a heat dissipation member 32, and a metallized pattern to be bonded to the metal substrate 34 to the ceramic green sheet to be the ceramic laminate 31, respectively. The ceramic laminate 31 can be prepared by printing and filling in a pattern and arrangement and laminating a plurality of ceramic green sheets.
　また、金属基板３４は、プレス機を用いてＦｅ－Ｎｉ－Ｃｏ合金からなる板を打ち抜き加工を行うことで、開口部Ａ、切欠きＣ、第１孔部Ｂ１および第２孔部Ｂ２が形成することができる。このようにして、金属基板３４を準備することができる。 Further, the metal substrate 34 is formed by punching a plate made of an Fe—Ni—Co alloy using a press machine, thereby forming an opening A, a notch C, a first hole B1, and a second hole B2. can do. In this way, the metal substrate 34 can be prepared.
　枠体３３は、セラミック積層体３１と同様に、複数のセラミックグリーンシートを積層して、半導体素子２を実装するために、予めパンチ等で実装領域Ｒとしての貫通孔を形成することで作製することができる。そして、枠体３３は、セラミック積層体３１の上面に貫通孔が実装領域Ｒを取り囲むように積層される。また、枠体３３は、コネクタ部材３５が接合されるメタライズパターンが側面の所定位置に設けられる。さらに、セラミック積層体３１と枠体３３は、所定の温度で同時に焼成されることによって一体的に形成することができる。 Similarly to the ceramic laminate 31, the frame 33 is produced by laminating a plurality of ceramic green sheets and forming a through hole as the mounting region R in advance by punching or the like in order to mount the semiconductor element 2. be able to. The frame 33 is laminated on the upper surface of the ceramic laminate 31 so that the through hole surrounds the mounting region R. The frame 33 is provided with a metallized pattern to which the connector member 35 is joined at a predetermined position on the side surface. Furthermore, the ceramic laminate 31 and the frame 33 can be integrally formed by firing simultaneously at a predetermined temperature.
　また、準備したセラミック積層体３１の下面に形成されたメタライズパターンにろう材を介して金属基板３４を接続すると同時に、金属基板３４の切欠きＣから露出するセラミック積層体３１の下面に形成されたメタライズパターンに複数のリード端子３７をろう材を介して接続する。 In addition, the metal substrate 34 is connected to the metallized pattern formed on the lower surface of the prepared ceramic laminate 31 via a brazing material, and at the same time, the metal substrate 34 is formed on the lower surface of the ceramic laminate 31 exposed from the notch C of the metal substrate 34. A plurality of lead terminals 37 are connected to the metallized pattern via a brazing material.
　次に、準備した枠体３３の側面に形成されたメタライズパターンにコネクタ部材３５をろう材を介して接続する。さらに、枠体３３上にシールリングをろう材を介して接続する。このようにして、半導体素子収納用パッケージ３を作製することができる。 Next, the connector member 35 is connected to the metallized pattern formed on the side surface of the prepared frame 33 through a brazing material. Further, a seal ring is connected to the frame 33 via a brazing material. In this manner, the semiconductor element storage package 3 can be manufactured.
　次に、半導体素子収納用パッケージ３の実装領域Ｒに半導体素子２を実装する。そして、半導体素子２と配線導体３６とを電気的に接続することができる。さらに、枠体３３内の気密性を保つ状態で、蓋体４をシールリングを介して枠体３３上に接続することで、半導体装置１を作製することができる。 Next, the semiconductor element 2 is mounted in the mounting region R of the semiconductor element storage package 3. The semiconductor element 2 and the wiring conductor 36 can be electrically connected. Furthermore, the semiconductor device 1 can be manufactured by connecting the lid 4 to the frame 33 via the seal ring in a state in which the airtightness in the frame 33 is maintained.

Claims (9)

  1. 　上下に貫通する貫通孔を有するセラミック積層体と、
    前記貫通孔に嵌められた、半導体素子を実装する実装領域を有する放熱部材と、
    前記セラミック積層体上に前記放熱部材を取り囲むように設けられた枠体と、
    前記セラミック積層体の下面に設けられた、前記放熱部材の下面を露出する開口部を有する金属基板と、を備えたことを特徴とする半導体素子収納用パッケージ。     A ceramic laminate having through holes penetrating vertically; and
    A heat dissipating member fitted in the through hole and having a mounting region for mounting a semiconductor element;
    A frame provided on the ceramic laminate so as to surround the heat dissipation member;
    A package for housing a semiconductor element, comprising: a metal substrate provided on a lower surface of the ceramic laminate and having an opening exposing the lower surface of the heat dissipation member.
  2. 　請求項１に記載の半導体素子収納用パッケージであって、
    前記枠体に、前記枠体内と前記枠体外とを電気的に接続するコネクタ部材をさらに備え、
    前記金属基板には、下面視して前記コネクタ部材と前記開口部との間に、前記セラミック積層体の下面の一部を露出する孔部が形成されていることを特徴とする半導体素子収納用パッケージ。     The package for housing a semiconductor device according to claim 1,
    The frame further comprises a connector member for electrically connecting the frame body and the outside of the frame body,
    A hole for exposing a part of the lower surface of the ceramic laminate is formed in the metal substrate between the connector member and the opening when viewed from below. package.
  3. 　請求項１または請求項２に記載の半導体素子収納用パッケージであって、
    前記金属基板は、下面視して外縁が四方に向かって延在した凸部を有しており、
    前記凸部同士の間において、少なくとも一箇所が、前記セラミック積層体の外縁の内側に凹んでおり、前記セラミック積層体の下面であって、前記金属基板の凹みに、リード端子が設けられていることを特徴とする半導体素子収納用パッケージ。     A package for housing a semiconductor device according to claim 1 or 2,
    The metal substrate has a convex portion whose outer edge extends in all directions when viewed from below.
    Between the protrusions, at least one portion is recessed inside the outer edge of the ceramic laminate, and a lead terminal is provided on the lower surface of the ceramic laminate and in the recess of the metal substrate. A package for housing a semiconductor element.
  4. 　請求項３に記載の半導体素子収納用パッケージであって、
    前記凸部は、外縁が前記セラミック積層体の外縁よりも外方にまで延在されていることを特徴とする半導体素子収納用パッケージ。     A package for housing a semiconductor element according to claim 3,
    The package for housing a semiconductor element, wherein an outer edge of the convex portion extends outward from an outer edge of the ceramic laminate.
  5. 　請求項１ないし請求項４のいずれかに記載の半導体素子収納用パッケージであって、
    前記放熱部材の上面の高さ位置は、前記貫通孔の上部開口縁の高さ位置よりも低いことを特徴とする半導体素子収納用パッケージ。     A package for housing a semiconductor device according to any one of claims 1 to 4,
    A package for housing a semiconductor element, wherein a height position of an upper surface of the heat radiating member is lower than a height position of an upper opening edge of the through hole.
  6. 　請求項１ないし請求項５のいずれかに記載の半導体素子収納用パッケージであって、
    前記放熱部材は、下面が前記貫通孔の下部開口縁の高さ位置よりも下方に突出しており、側面の下端には側方に延在された延在部を有し、前記延在部の上面が前記セラミック積層体の下面に接続されていることを特徴とする半導体素子収納用パッケージ。     A package for housing a semiconductor element according to any one of claims 1 to 5,
    The heat dissipating member has a lower surface protruding below a height position of a lower opening edge of the through-hole, and has an extending portion extending laterally at a lower end of a side surface. A package for housing a semiconductor element, wherein an upper surface is connected to a lower surface of the ceramic laminate.
  7. 　請求項１ないし請求項６のいずれかに記載の半導体素子収納用パッケージであって、
    前記セラミック積層体内には、上下方向に沿って複数の貫通導体が設けられており、
    前記複数の貫通導体の下端が、前記金属基板の上面に接続されていることを特徴とする半導体素子収納用パッケージ。     A package for housing a semiconductor device according to any one of claims 1 to 6,
    In the ceramic laminate, a plurality of through conductors are provided along the vertical direction,
    A package for housing a semiconductor element, wherein lower ends of the plurality of through conductors are connected to an upper surface of the metal substrate.
  8. 　請求項７に記載の半導体素子収納用パッケージであって、
    前記複数の貫通導体は、断面視して前記放熱部材の両側のそれぞれに設けられていることを特徴とする半導体素子収納用パッケージ。     A package for housing a semiconductor element according to claim 7,
    The package for housing a semiconductor element, wherein the plurality of through conductors are provided on both sides of the heat radiating member as viewed in cross section.
  9. 　請求項１ないし請求項８のいずれかに記載の半導体素子収納用パッケージと、前記実装領域に実装された半導体素子と、前記枠体上に設けられた蓋体とを備えた半導体装置。
          9. A semiconductor device comprising: the semiconductor element storage package according to claim 1; a semiconductor element mounted on the mounting region; and a lid provided on the frame.
PCT/JP2013/068518 2012-07-27 2013-07-05 Package for housing semiconductor element, and semiconductor device WO2014017273A1 (en)

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