WO2015012405A1 - Element-housing package and mounting structure - Google Patents

Element-housing package and mounting structure Download PDF

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Publication number
WO2015012405A1
WO2015012405A1 PCT/JP2014/069778 JP2014069778W WO2015012405A1 WO 2015012405 A1 WO2015012405 A1 WO 2015012405A1 JP 2014069778 W JP2014069778 W JP 2014069778W WO 2015012405 A1 WO2015012405 A1 WO 2015012405A1
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WO
WIPO (PCT)
Prior art keywords
insulating layer
external connection
electrode terminal
circuit board
input
Prior art date
Application number
PCT/JP2014/069778
Other languages
French (fr)
Japanese (ja)
Inventor
真広 辻野
芳規 川頭
Original Assignee
京セラ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to JP2015528367A priority Critical patent/JP6082114B2/en
Publication of WO2015012405A1 publication Critical patent/WO2015012405A1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
    • H01L23/057—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads being parallel to the base
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09409—Multiple rows of pads, lands, terminals or dummy patterns; Multiple rows of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09709—Staggered pads, lands or terminals; Parallel conductors in different planes

Definitions

  • the present invention relates to an element storage package for storing an element, and a mounting structure in which an element is stored in the element storage package.
  • the mounting structure includes an element storage package and an element mounted on the element storage package, and an external circuit board is connected to the element storage package.
  • the substrate In such an element storage package, the substrate, a frame body that is disposed on the upper surface of the substrate and has a through portion that partially penetrates between the inside and the outside, and the inside and outside of the frame body that pass through the through portion. And an input / output terminal each having an extending portion.
  • This input / output terminal has an insulating layer made of ceramics or the like and an electrode terminal disposed on the insulating layer.
  • an external circuit board such as a flexible circuit board may be connected to this input / output terminal.
  • the external circuit board is bonded to the electrode terminal via a conductive bonding member, and is electrically connected to the input / output terminal, thereby transmitting an electric signal between the element and the external circuit board.
  • An object of the present invention is to provide a mounting structure that can reduce the peeling of an external circuit board from an input / output terminal and suppress a decrease in connection reliability between the input / output terminal and the external circuit board. Furthermore, it is providing the element storage package which can improve an electrical property.
  • An element storage package includes a substrate having an element mounting region on an upper surface thereof, and a portion that is disposed so as to surround the element mounting region on the upper surface of the substrate and partially penetrates between an inner side and an outer side. And a first insulating layer, a second insulating layer, and a third insulating layer that are sequentially stacked, and the extending portions are located on the inner side and the outer side of the frame body through the through portion, respectively. Input and output terminals.
  • the first insulating layer extends to the outside of the frame longer than the second insulating layer and the third insulating layer, and the second insulating layer is longer to the outer side of the frame than the third insulating layer. It is extended.
  • the input / output terminal has an external connection portion in which an electrode terminal to which an AC signal is applied and an electrode terminal set to a reference potential are arranged in a certain direction along the frame in the through portion.
  • the electrode terminal set to the reference potential is located closer to the side of the external connection than the electrode terminal to which an AC signal is applied.
  • the external connection portion has a cutout portion formed on the side portion of the external connection portion and a conductor layer formed on the inner surface of the cutout portion and electrically connected to the electrode terminal set to the reference potential. is doing.
  • a mounting structure is electrically connected to the element storage package, an element mounted in an element mounting area of the element storage package, and an input / output terminal of the element storage package.
  • the external circuit board is characterized in that via a conductive bonding member is connected to the electrode terminal and the conductive layer of the external connection portion.
  • FIG. 2 is an exploded perspective view of the mounting structure of FIG. 1 with a lid and an external circuit board removed.
  • FIG. 2 is a perspective view of the mounting structure of FIG. 1 with a lid and an external circuit board removed.
  • It is a top view of the mounting structure of FIG.
  • It is a side view of the mounting structure of FIG.
  • It is the top view which showed the connection part of an external connection part and an external connection board
  • FIG. 7 is a cross-sectional view taken along the line II-II in FIG. 6. It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention.
  • FIG. 1 is an exploded perspective view of the mounting structure of FIG. 1 with a lid and an external circuit board removed.
  • FIG. 2 is a perspective view of the mounting structure of FIG. 1 with a lid and an external circuit board removed.
  • It is a top view of the mounting structure of FIG.
  • It is a side view of the mounting structure of FIG.
  • It is section
  • FIG. 10 is an exploded perspective view of the mounting structure of FIG. 9 with a lid and an external circuit board removed. It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention.
  • FIG. 14 is a plan view of the mounting structure of FIG. 13 observed from the lower surface side of the board with the external circuit board removed. It is a side view of the mounting structure of FIG. It is a graph which shows a simulation result.
  • the mounting structure 1 includes an element 2, an element storage package 3, and an external circuit board 4.
  • the element 2 is disposed on the upper surface 31 a of the substrate 31.
  • the element 2 is mounted on the element mounting region 31b via the base 2a.
  • the pedestal 2 a is disposed so as to overlap the element mounting region 31 b inside the element storage package 3.
  • the base 2a mounts the element 2 and can adjust the height position of the element 2.
  • the pedestal 2a is made of an insulating material, and electrical wiring that is electrically connected to the element 2 is formed on the upper surface of the pedestal 2a.
  • the element 2 includes, for example, an active element such as a semiconductor element, a transistor, a diode, or a thyristor, or a passive element such as a resistor, a capacitor, a solar cell, a piezoelectric element, a crystal resonator, or a ceramic oscillator.
  • the mounting structure 1 is suitable for mounting and functioning the element 2 corresponding to high withstand voltage, large current, or high speed and high frequency.
  • a semiconductor element is employed as an example of the element 2.
  • the element storage package 3 has a function of protecting the element 2. As shown in FIG. 2, the element storage package 3 stores the elements 2.
  • the element storage package 3 includes a substrate 31, a frame body 32, input / output terminals 33, and a seal ring 34.
  • the substrate 31 has a function of supporting the element 2. As shown in FIGS. 3 and 4, the substrate 31 has an upper surface 31a. Further, the upper surface 31a of the substrate 31 has an element mounting region 31b for mounting the element 2 or the pedestal 2a.
  • the substrate 31 is composed of a single metal plate or a laminate in which a plurality of metal plates are laminated.
  • the material of the substrate 31 examples include metals such as copper, iron, tungsten, molybdenum, nickel, and cobalt, alloys containing these metals, ceramics, glass, and resins. If a metal material is used as the material of the substrate 31, heat generated from the element 2 can be radiated through the substrate 31, so that the heat dissipation of the element housing package 3 is improved.
  • the thermal conductivity of the substrate 31 can be set, for example, in the range of 15 W / (m ⁇ K) to 450 W / (m ⁇ K).
  • the thermal expansion coefficient of the substrate 31 can be set in the range of 3 ⁇ 10 ⁇ 6 / K to 28 ⁇ 10 ⁇ 6 / K, for example.
  • the frame body 32 is disposed on the upper surface 31a of the substrate 31 so as to surround the element mounting region 31b.
  • the frame body 32 is joined to the upper surface 31a of the substrate 31 by a brazing material or the like.
  • a plurality (two) of through portions T that penetrate between the inside and the outside of the frame body 32 are formed in the side portion 321 of the frame body 32.
  • An input / output terminal 33 is inserted into one through portion T, and a cylindrical member R that passes light from the optical fiber to the inside of the frame 32 is inserted into the other through portion T.
  • Examples of the material of the frame 32 include metal materials such as copper, iron, tungsten, molybdenum, nickel, and cobalt, or alloys containing these metal materials.
  • the thermal conductivity of the frame 32 is set, for example, in the range of 15 W / (m ⁇ K) to 450 W / (m ⁇ K).
  • the thermal expansion coefficient of the frame body 32 can be set, for example, in the range of 3 ⁇ 10 ⁇ 6 / K to 28 ⁇ 10 ⁇ 6 / K.
  • the input / output terminal 33 has a function of electrically connecting the inside and the outside of the frame 32 while constituting a part of the package together with the frame 32.
  • the input / output terminal 33 is inserted through the through portion T of the frame 32.
  • the extending portion that is a part of the input / output terminal 33 is located outside the frame 32, and the extending portion that is another part of the input / output terminal 33 is the frame 32.
  • the extending part of the input / output terminal 33 located outside the frame 32 is an external connection part 33A to which the external circuit board 4 is joined.
  • the input / output terminal 33 includes a first insulating layer 331, a second insulating layer 332, and a third insulating layer 333 that are sequentially stacked, as shown in FIGS. That is, the second insulating layer 332 is disposed on the upper surface of the first insulating layer 331, and the third insulating layer 333 is disposed on the upper surface of the second insulating layer 332.
  • 3 and FIG. 5 is a virtual line that divides the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 (the same applies to FIGS. 11 to 13 and FIG. 15). Is).
  • the first insulating layer 331 extends longer to the outside of the frame body 32 than the second insulating layer 332 and the third insulating layer 333. That is, the first insulating layer 331 has a portion that does not overlap with the second insulating layer 332 and the third insulating layer 333. Further, the second insulating layer 332 extends longer to the outside of the frame body 32 than the third insulating layer 333. That is, the second insulating layer 332 has a portion that does not overlap with the third insulating layer 333.
  • the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 are formed of an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide based sintered body, and an aluminum nitride based material. It is formed of a ceramic material such as a sintered body, a silicon nitride sintered body, or a glass ceramic.
  • the thermal expansion coefficients of the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 made of a ceramic material are, for example, 3 ⁇ 10 ⁇ 6 / K or more and 8 ⁇ 10 ⁇ 6 / K or less. .
  • the input / output terminal 33 has an external connection portion 33A to which the external circuit board 4 is connected.
  • the external connection portion 33A is a portion located outside the frame 32 in the input / output terminal 33 as an extending portion.
  • the external connection portion 33A is connected to the external circuit board 4 through the conductive bonding member B.
  • the external connection portion 33A includes a first connection portion 33a located in a portion of the first insulating layer 331 that does not overlap the second insulating layer 332 and the third insulating layer 333, and a third insulating layer 333 in the second insulating layer 332. 2nd connection part 33b located in the part which does not overlap. As shown in FIGS. 3 to 5, the height position of the second connection portion 33b is higher than the height position of the first connection portion 33a.
  • the bonding member B is a first bonding member that connects the external circuit board 4 and the electrode terminal 334 of the external connection portion 33A, and connects the external circuit board 4 and the conductor layer C1 of the cutout portion C. Is the second joining member.
  • a plurality of electrode terminals 334 are arranged in a fixed direction on the upper surface of the external connection portion 33A. Specifically, some of the plurality of electrode terminals 334 are arranged along the end of the first insulating layer 331 on the upper surface of the first connection portion 33a. The other part of the electrode terminals 334 are arranged along the end of the second insulating layer 332 on the upper surface of the second connection portion 33b.
  • the plurality of electrode terminals 334 are an electrode terminal to which an AC signal is applied and an electrode terminal set to a reference potential, and are arranged in a certain direction along the frame 32 in the through portion T.
  • a DC signal is applied to the plurality of electrode terminals 334 located in the second connection portion 33b.
  • the plurality of electrode terminals 334 located in the first connection portion 33a include a plurality of electrode terminals 334 to which an AC signal is applied and a plurality of electrode terminals 334 set to a reference potential.
  • the reference potential is a reference potential, for example, a ground potential.
  • electrode terminals 334 to which an AC signal is applied and electrode terminals 334 set to a reference potential are alternately arranged. Further, the electrode terminals 334 (electrode terminals 334 adjacent to the notch C) located on both sides of the first connection portion 33a are set to the reference potential. Note that the arrangement of the electrode terminal 334 to which the AC signal is applied and the electrode terminal 334 set to the reference potential is not limited to the above.
  • the input / output terminal 33 is adjacent to the electrode terminal 334 to which an AC signal is applied, and an electrode terminal 334 set at a reference potential is arranged to constitute a coplanar line. This makes it easy to match the high-frequency AC signal applied to the electrode terminal 334 to a predetermined impedance value, and suppresses transmission loss that occurs in the high-frequency AC signal, that is, insertion loss and reflection loss, Input / output can be performed efficiently.
  • the signal applied to the electrode terminal 334 is not limited to the above, and may be appropriately changed according to the product design.
  • an AC signal may be applied to the plurality of electrode terminals 334 located at the second connection portion 33b, or a DC signal may be applied to the plurality of electrode terminals 334 located at the first connection portion 33a.
  • the number of electrode terminals 334 is not limited to the above, and may be appropriately changed according to product design.
  • the plurality of electrode terminals 334 are arranged on the upper surface of the first connection portion 33a, but the present invention is not limited to this. That is, a plurality of electrode terminals 334 may be disposed on the lower surface of the first connection portion 33a, or a plurality of electrode terminals 334 may be disposed on both the upper surface and the lower surface of the first connection portion 33a.
  • the material of the electrode terminal 334 is made of a refractory metal material such as tungsten, molybdenum or manganese.
  • a plating layer such as nickel or gold may be formed on the surface of the electrode terminal 334.
  • a plurality of electrode terminals 334 are also arranged on the upper surface of the input / output terminal 33 inside the frame 32. Specifically, a plurality of electrode terminals 334 are arranged on the upper surface of the first insulating layer 331 and the upper surface of the second insulating layer 332 inside the frame 32. The electrode terminal 334 located inside the frame 32 and the electrode terminal 334 located outside the frame 32 (external connection portion 33A) are electrically connected. The electrode terminal 334 located inside the frame 32 is connected to the element 2 and the base 2a with a bonding wire or the like.
  • the external connection portion 33A has a notch C formed at a side portion located at an end in a certain direction (the arrangement direction of the electrode terminals 334). That is, the notch portion C is formed on both side portions located at both end sides in a certain direction along the through portion T in the external connection portion 33A. More specifically, a cutout portion C is formed on the side of the first connection portion 33a in the external connection portion 33A. Further, the cutout portions C of the present embodiment are formed on both side portions located in the arrangement direction of the electrode terminals 334. In the present embodiment, the cutout portion C is formed on the side portion of the first connection portion 33a, but is not limited thereto, and may be formed on the side portion of the second connection portion 33b.
  • the notch C may be formed in both the side part of the 1st connection part 33a, and the side part of the 2nd connection part 33b.
  • the notch C is located on the side portion of the first insulating layer 331 located on one end side in the fixed direction along the frame 32 in the through portion T, and along the frame 32 in the through portion T of the second insulating layer 332. It is formed in the side part located in the one end side of the fixed direction.
  • the notch C is formed from the upper part of the external connection part 33A to the side part of the external connection part 33A.
  • the cutout portion C is rectangular in plan view, but is not limited thereto, and may be circular or polygonal.
  • the notch portion C of the present embodiment is not formed up to the lower surface of the first insulating layer 331.
  • the present invention is not limited to this, and the notch portion C is formed to the lower surface of the first insulating layer 331 so as to penetrate therethrough. Also good.
  • FIG. 16 is a graph showing the simulation results of the frequency characteristics (S parameter) (reflection loss: Return ⁇ Loss, insertion loss: Insertion Loss) of the element storage package 3 according to this embodiment.
  • the reflection loss is indicated by a solid line
  • the frequency characteristics of the comparative example the reflection loss is indicated by a broken line.
  • the insertion loss is indicated by a long broken line
  • the insertion loss is indicated by a one-dot chain line.
  • the present embodiment has a structure in which the cutout portion C is provided in the element storage package 3 shown in FIG. 3, and the comparative example has a structure in which the cutout portion C is not provided in the element storage package 3 shown in FIG. It is.
  • the reflection loss approaches 0 dB as the frequency becomes higher from 0 GHz.
  • the insertion loss is 0 dB at a frequency of 0 GHz, but the deviation from 0 dB increases as the frequency increases.
  • the frequency at which the insertion loss starts to deviate sharply from 0 dB is a so-called resonance frequency.
  • the length of the electrode terminal 334 that transmits a high-frequency signal in one direction along the through-hole T that is, the length along the direction in which the electrode terminal 334 is arranged is 0.
  • the length of the electrode terminal 334 in the direction orthogonal to one direction is set to 3 mm and 1.3 mm.
  • the electrode terminal 334 serving as a reference potential provided so as to sandwich the electrode terminals 334 through which high-frequency signals are transmitted has a length of 0.5 mm along the direction in which the electrode terminals 334 are arranged,
  • the length of the electrode terminal 334 in the direction orthogonal to one direction is set to 1.3 mm.
  • the interval between the electrode terminal 334 through which the high-frequency signal is transmitted and the electrode terminal 334 serving as a reference potential is set to 0.3 mm.
  • the size of the notch C is set to 0.15 mm in one direction, 0.4 mm in the direction orthogonal to one direction, and 0.45 mm in the vertical direction. Has been.
  • the cutout portion C when the cutout portion C is not present, a peak of about ⁇ 8 dB exists in the reflection loss in the frequency band of 20 GHz to 25 GHz.
  • the reflection loss when the cutout portion C is present, the reflection loss is ⁇ 20 dB or less in the frequency band of 20 GHz to 25 GHz.
  • the reflection loss is about -8 dB when the frequency is 45 GHz or more. From these results, when the notch C is present, the reflection loss can be reduced even when the frequency is increased, and the reflection loss is improved.
  • notch C when there is no notch C, a peak of ⁇ 4 dB or less exists in the frequency band from 20 GHz to 25 GHz.
  • notch C in the frequency band from 20 GHz to 25 GHz, it is a value close to 0 of ⁇ 1 dB or more, and there is no frequency that changes suddenly.
  • the insertion loss is -4 dB or less when the frequency exceeds 45 GHz. From these results, when the notch C is present, it is possible to suppress a sudden change in the insertion loss even when the frequency is increased, and the insertion loss is improved.
  • a conductor layer C1 is formed on the inner surface of the cutout portion C of the present embodiment. As shown in FIGS. 6 to 8, the conductor layer C1 is connected to an electrode terminal 334 set at a reference potential.
  • the electrode terminal 334 set to the reference potential is positioned closer to the side of the external connection portion 33A than the electrode terminal to which an AC signal is applied.
  • the external connection portion 33A is electrically connected to a cutout portion C formed on the side portion of the external connection portion 33A and an electrode terminal set on the inner surface of the cutout portion C and set to a reference potential.
  • the mounting structure 1 and the element storage package 3 according to the present embodiment are provided with electrode terminals that serve as reference potentials at locations close to the side portions of the external connection portion 33A, and further, the cutout portion C is provided on the side portion of the external connection portion 33A.
  • the electric field distribution generated around the electrode terminal can be confined in a desired region, that is, can be easily converged, and the frequency characteristics in the high frequency band are good. Can be. By doing so, it is possible to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334 while satisfactorily matching the characteristic impedance between the input / output terminal 33 and the external circuit board 4.
  • the external circuit board 4 has a function of transmitting a signal to the element 2 via the input / output terminal 33.
  • the external circuit board 4 is connected to the external connection portion 33A of the input / output terminal 33 through the conductive bonding member B.
  • a soldering material such as solder or silver solder is used for the joining member B of the present embodiment.
  • the joining member B is disposed on each of the plurality of electrode terminals 334, The external circuit board 4 is joined and connected. In FIG. 6, the joining member B and the external circuit board 4 are indicated by broken lines.
  • an anisotropic conductive film may be adopted as the bonding member B.
  • the joining member B can be collectively arranged on the plurality of electrode terminals 334 instead of arranging the joining member B on each of the plurality of electrode terminals 334, the input / output terminals 33 and the external circuit board 4 can be easily arranged. Can connect.
  • the external circuit board 4 of this embodiment is a flexible circuit board, but is not limited thereto.
  • the external circuit board 4 may be a printed circuit board, for example.
  • the joining member B for joining the external connection portion 33A of the input / output terminal 33 and the external circuit board 4 is located in the notch portion C.
  • the joining member B is in contact with the conductor layer C1 formed on the inner surface of the notch C.
  • the joining member B of the present embodiment is also in contact with the conductor layer C1 located on the surface facing the external circuit board 4 in the inner surface of the notch C. This increases the contact area of the bonding member B, and the external circuit board 4 is difficult to peel off from the external connection portion 33A, which is preferable.
  • the surplus joining member B can be released to the notch C because the joining member B is located in the notch C, the surplus joining member B connects the electrode terminal 334 and the external circuit board 4. By deviating or tilting, it is possible to suppress connection reliability and electrical characteristics from becoming unstable, and the frequency characteristics of the electrode terminal 334 in the external connection portion 33A can be maintained at a desired value.
  • the seal ring 34 has a function of joining the frame body 32 and the lid body 35. As shown in FIGS. 1 and 2, the seal ring 34 is disposed on the upper surface of the frame 32 and surrounds the element 2 (element mounting region 31b) in plan view. Examples of the material of the seal ring 34 include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, and tungsten, or alloys that combine a plurality of these metal materials.
  • the lid 35 has a function of protecting the element 2. As shown in FIGS. 1 and 2, the lid 35 seals the opening of the element storage package 3.
  • the lid 35 can be formed of a metal material similar to that of the seal ring 34, for example.
  • the joining member B that joins the input / output terminal 33 and the external circuit board 4 is disposed in a notch C formed on the side of the external connection part 33A.
  • the input / output terminal 33 and the external circuit board 4 can be joined using the inner surface of the notch C of the external connection part 33A, so that the joint strength between the input / output terminal 33 and the external circuit board 4 is improved.
  • the input / output terminal 33 and the external circuit board 4 are thermally expanded by, for example, a temperature change due to driving of the element 2 or a temperature change due to an operating environment of the mounting structure 1 or a temperature change due to an environmental test or reliability test of the mounting structure 1. Even when the heat shrinks, it is possible to reduce the peeling of the external circuit board 4 from the input / output terminal 33, so that it is possible to suppress a decrease in connection reliability between the input / output terminal 33 and the external circuit board 4.
  • the notch C is formed on the side of the external connection portion 33A.
  • the external circuit board 4 is connected to the external connection portion 33A via the conductive bonding member B, and the bonding member B is located in the notch portion C.
  • the peeling of the external circuit board 4 is likely to occur at the side of the external connection portion 33A, and when peeling occurs at the side, the peeling may spread from the side to the inside of the external connection portion 33A.
  • the notch C is formed in the side part of the external connection part 33A, and the joining member B is disposed in the notch part C, so that the external circuit board 4 on the side part of the external connection part 33A is connected.
  • the bonding strength can be improved, and the external circuit board 4 can be effectively prevented from peeling off from the input / output terminal 33.
  • the notches C are formed on both sides of the external connection portion 33A. Accordingly, even when the input / output terminal 33 and the external circuit board 4 are thermally expanded and contracted, it is possible to further reduce the peeling of the external circuit board 4 from the input / output terminal 33. Therefore, the input / output terminal 33 and the external circuit A decrease in connection reliability of the substrate 4 can be suppressed.
  • the conductor layer C1 formed in the notch C is connected to the electrode terminal 334 set to the reference potential.
  • the conductor layer C1 formed in the notch C can be set to the reference potential, so that the spread of the electric field distribution caused by the transmission of the high-frequency signal in the atmosphere can be suppressed by the conductor layer C1, and the electrode terminal While matching the high-frequency AC signal transmitted through 334 to a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss generated in the high-frequency AC signal, that is, It is possible to efficiently input and output high-frequency AC signals while suppressing insertion loss and reflection loss.
  • one external circuit board 4 is connected to the external connection portion 33A, but this is not limitative.
  • a plurality of external circuit boards 4 may be connected to the external connection portion 33A.
  • the input / output terminal 33 and the external are affected by a temperature change caused by driving the element 2, an operating environment of the mounting structure 1, and a temperature change caused by an environmental test or reliability test of the mounting structure 1.
  • one notch C is formed on each side of the external connection portion 33A.
  • the present invention is not limited to this. That is, as shown in FIG. 11, a plurality of notches C may be formed on the side of the external connection portion 33A. Since the joining member B is disposed in the plurality of notches C, the input / output terminals 33 and the external circuit board 4 can be joined using the inner surfaces of the plurality of notches C of the external connection portion 33A. The bonding strength between the terminal 33 and the external circuit board 4 is improved, and a decrease in connection reliability between the input / output terminal 33 and the external circuit board 4 can be suppressed.
  • the conductor layer C1 positioned in the plurality of notches C to the reference potential, it is possible to suppress the spread of the electric field generated by the transmission of the high-frequency AC signal, and the high-frequency applied to the electrode terminal 334 can be suppressed. While matching the AC signal with a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss, that is, insertion loss and reflection loss, generated in the high-frequency AC signal. And high-frequency signals can be input and output efficiently.
  • the external connection portion 33A A plurality of notches C may be formed on the side.
  • the bonding strength of the first connection part 33a and the external circuit board 4, and the second connection part 33b and the external circuit board 4 can be improved, so that the external circuit board 4 is connected to the first connection part 33a or the second connection part. Peeling from 33b can be reduced, and a decrease in connection reliability between input / output terminal 33 and external circuit board 4 can be suppressed.
  • the conductor layer C1 positioned in the plurality of notches C to the reference potential, it is possible to suppress the spread of the electric field generated by the transmission of the high-frequency AC signal, and the high-frequency applied to the electrode terminal 334 can be suppressed. While matching the AC signal with a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss, that is, insertion loss and reflection loss, generated in the high-frequency AC signal. And high-frequency signals can be input and output efficiently.
  • a plurality of notches C may be formed on both sides of the external connection portion 33A.
  • a plurality of electrode terminals 334 are arranged along a certain direction on the lower surface of the first connection portion 33a.
  • the external circuit board 4 is connected to the lower surface of the first connection portion 33a via a conductive bonding member B. 13 to 15, the external circuit board 4 connected to the upper surface of the first connection part 33a and the upper surface of the second connection part 33b is omitted.
  • the joining member B that connects the external circuit board 4 and the first connecting portion 33a is located in the notch C.
  • the bonding strength between the lower surface of the first connection portion 33a and the external circuit board 4 can be improved, so that the external circuit substrate 4 can be prevented from peeling off from the lower surface of the first connection portion 33a. And the fall of the connection reliability of the external circuit board 4 can be suppressed.
  • the conductor layer C1 positioned in the plurality of notches C to the reference potential, it is possible to suppress the spread of the electric field generated by the transmission of the high-frequency AC signal, and the high-frequency applied to the electrode terminal 334 can be suppressed. While matching the AC signal with a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss, that is, insertion loss and reflection loss, generated in the high-frequency AC signal. And high-frequency signals can be input and output efficiently.
  • the substrate 31 and the frame body 32 are produced.
  • the substrate 31 and the frame body 32 are manufactured in a predetermined shape by using a conventionally known metal working method such as rolling or punching for an ingot obtained by casting a molten metal material into a mold and solidifying it.
  • a conventionally known metal working method such as rolling or punching for an ingot obtained by casting a molten metal material into a mold and solidifying it.
  • the input / output terminal 33 is produced.
  • ceramic green sheets corresponding to the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 are prepared.
  • these ceramic green sheets are processed into a predetermined shape.
  • a notch is formed in the side portion of the ceramic green sheet corresponding to the first insulating layer 331.
  • metal paste containing molybdenum or manganese is applied to predetermined positions of the plurality of ceramic green sheets using, for example, a screen printing method to form a metallized pattern.
  • the input / output terminal 33 in which the cutout portion C is formed in the side portion of the first insulating layer 331 can be produced.
  • the input / output terminal 33 and the cylindrical member R are inserted into the respective through portions T of the frame 32 at the same time as the frame 32 is joined to the substrate 31 via the brazing material. Then, the lower surface and side surfaces of the input / output terminal 33 that are in contact with the penetrating portion T and the outer peripheral portion of the cylindrical member R are joined to the side portion of the frame body 32 through a brazing material, and the frame body 32 and the input / output terminal 33 are also connected. And the seal ring 34 are joined to each other through a brazing material. In this way, the element storage package 3 can be prepared.
  • the element 2 is arranged in the element mounting region 31b of the upper surface 31a of the substrate 31 through the base 2a.
  • the electrode terminal 334 located inside the frame 32 is electrically connected to the element 2 via a bonding wire or the like.
  • the joining member B is disposed on the electrode terminal 334 of the external connection portion 33A, and the joining member B is also disposed on the notch portion C.
  • the external circuit board 4 is connected to the external connection portion 33A of the input / output terminal 33.
  • the mounting structure 1 can be manufactured by attaching the lid 35 to the seal ring 34 of the element housing package 3 by seam welding.

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Abstract

　In an element-housing package according to an embodiment of the present invention, an input/output terminal has an external connection unit in which an electrode terminal to which an alternating-current signal is applied, and an electrode terminal set to a reference potential are arranged in a row in a given direction aligned with a frame body in a penetrating part. The electrode terminal set to the reference potential is positioned at a location nearer the side section of the external connection unit than the electrode terminal to which the alternating-current signal is applied. The external connection unit has a cutout part formed in the side section of the external connection unit, and a conductor layer formed on the inner surface of the cutout part and electrically connected to the electrode terminal set to the reference potential.

Description

素子収納用パッケージおよび実装構造体Device storage package and mounting structure
　本発明は、素子を収納するための素子収納用パッケージ、およびこの素子収納用パッケージに素子を収納した実装構造体に関する。 The present invention relates to an element storage package for storing an element, and a mounting structure in which an element is stored in the element storage package.
　近年、機器の小型化とともに、ＩＣ、発光ダイオード、圧電素子または水晶振動子等の素子を実装することが可能な小型の素子収納用パッケージ、およびこれに素子を実装した実装構造体が開発されている（例えば、特開平１０－２０００４２号公報参照）。なお、実装構造体は、素子収納用パッケージと、素子収納用パッケージに実装された素子とを備えており、この素子収納用パッケージには、外部回路基板が接続される。 In recent years, along with miniaturization of devices, a small element storage package capable of mounting an element such as an IC, a light emitting diode, a piezoelectric element, or a crystal resonator, and a mounting structure in which the element is mounted have been developed. (For example, see JP-A-10-200042). The mounting structure includes an element storage package and an element mounted on the element storage package, and an external circuit board is connected to the element storage package.
　このような素子収納用パッケージでは、基板と、基板の上面に配置された、一部に内側および外側の間を貫通した貫通部を有する枠体と、貫通部を通って枠体の内側および外側にそれぞれ延在部が位置した入出力端子とを備えている。この入出力端子は、セラミックスなどからなる絶縁層および絶縁層上に配置された電極端子を有している。 In such an element storage package, the substrate, a frame body that is disposed on the upper surface of the substrate and has a through portion that partially penetrates between the inside and the outside, and the inside and outside of the frame body that pass through the through portion. And an input / output terminal each having an extending portion. This input / output terminal has an insulating layer made of ceramics or the like and an electrode terminal disposed on the insulating layer.
　また、この入出力端子にはフレキシブル回路基板などの外部回路基板が接続される場合がある。この外部回路基板は、導電性の接合部材を介して電極端子に接合され、入出力端子に電気的に接続されることで、素子および外部回路基板の間で電気信号を伝送する。 Also, an external circuit board such as a flexible circuit board may be connected to this input / output terminal. The external circuit board is bonded to the electrode terminal via a conductive bonding member, and is electrically connected to the input / output terminal, thereby transmitting an electric signal between the element and the external circuit board.
　近年、素子収納用パッケージに実装される素子の高性能化に伴い、入出力端子に配置される電極端子の数が増加する傾向にあるため、入出力端子の表面積において入出力端子および外部回路基板を接合する接続箇所が増える。そして、電極端子と外部回路基板を接続する単位面積当たりの接続箇所が増加し、接合箇所に熱による応力が加わりやすくなっている。 In recent years, as the number of electrode terminals arranged on the input / output terminals tends to increase as the performance of the elements mounted on the element storage package increases, the input / output terminals and the external circuit board are increased in the surface area of the input / output terminals. The number of connection points for joining And the connection location per unit area which connects an electrode terminal and an external circuit board increases, and it becomes easy to apply the stress by heat to a junction location.
　この応力が繰り返し加わることで接合部材にクラックが発生し、入出力端子および外部回路基板の接合強度が低下し、外部回路基板が入出力端子から剥がれてしまい、入出力端子および外部回路基板の接続信頼性が低下する可能性がある。 When this stress is repeatedly applied, cracks occur in the bonding member, the bonding strength between the input / output terminals and the external circuit board decreases, the external circuit board peels off from the input / output terminals, and the connection between the input / output terminals and the external circuit board occurs. Reliability may be reduced.
　本発明の目的は、外部回路基板が入出力端子から剥がれることを低減し、入出力端子および外部回路基板の接続信頼性の低下を抑制できる実装構造体を提供することにある。さらには、電気特性を向上させることが可能な素子収納用パッケージを提供することにある。 An object of the present invention is to provide a mounting structure that can reduce the peeling of an external circuit board from an input / output terminal and suppress a decrease in connection reliability between the input / output terminal and the external circuit board. Furthermore, it is providing the element storage package which can improve an electrical property.
　本発明の一実施形態に係る素子収納用パッケージは、上面に素子実装領域を有する基板と、基板の前記上面に素子実装領域を取り囲むように配置された、一部に内側および外側の間を貫通した貫通部を有する枠体と、順次積層された第１絶縁層、第２絶縁層および第３絶縁層を有し、貫通部を通って枠体の内側および外側にそれぞれ延在部が位置した入出力端子とを備えている。第１絶縁層は、第２絶縁層および第３絶縁層に比べて枠体の外側に長く延在しているとともに、第２絶縁層は、第３絶縁層に比べて枠体の外側に長く延在している。入出力端子は、交流信号が印加される電極端子および基準電位に設定される電極端子が貫通部における枠体に沿った一定方向に配列された外部接続部を有している。基準電位に設定される電極端子は、交流信号が印加される電極端子よりも外部接続部の側部に近い個所に位置している。外部接続部は、外部接続部の側部に形成された切欠き部と、切欠き部の内面に形成された、基準電位に設定される電極端子に電気的に接続された導体層とを有している。 An element storage package according to an embodiment of the present invention includes a substrate having an element mounting region on an upper surface thereof, and a portion that is disposed so as to surround the element mounting region on the upper surface of the substrate and partially penetrates between an inner side and an outer side. And a first insulating layer, a second insulating layer, and a third insulating layer that are sequentially stacked, and the extending portions are located on the inner side and the outer side of the frame body through the through portion, respectively. Input and output terminals. The first insulating layer extends to the outside of the frame longer than the second insulating layer and the third insulating layer, and the second insulating layer is longer to the outer side of the frame than the third insulating layer. It is extended. The input / output terminal has an external connection portion in which an electrode terminal to which an AC signal is applied and an electrode terminal set to a reference potential are arranged in a certain direction along the frame in the through portion. The electrode terminal set to the reference potential is located closer to the side of the external connection than the electrode terminal to which an AC signal is applied. The external connection portion has a cutout portion formed on the side portion of the external connection portion and a conductor layer formed on the inner surface of the cutout portion and electrically connected to the electrode terminal set to the reference potential. is doing.
　また、本発明の一実施形態に係る実装構造体は、上記素子収納用パッケージと、素子収納用パッケージの素子実装領域に実装された素子と、素子収納用パッケージの入出力端子に電気的に接続された外部回路基板とを備えている。外部回路基板は、導電性の接合部材を介して外部接続部の電極端子と導体層に接続されていることを特徴とする。 A mounting structure according to an embodiment of the present invention is electrically connected to the element storage package, an element mounted in an element mounting area of the element storage package, and an input / output terminal of the element storage package. An external circuit board. The external circuit board is characterized in that via a conductive bonding member is connected to the electrode terminal and the conductive layer of the external connection portion.
本発明の一実施形態に係る実装構造体を示す斜視図である。It is a perspective view showing the mounting structure concerning one embodiment of the present invention. 図１の実装構造体であって、蓋体および外部回路基板を外した状態での分解斜視図である。FIG. 2 is an exploded perspective view of the mounting structure of FIG. 1 with a lid and an external circuit board removed. 図１の実装構造体であって、蓋体および外部回路基板を外した状態での斜視図である。FIG. 2 is a perspective view of the mounting structure of FIG. 1 with a lid and an external circuit board removed. 図３の実装構造体の平面図である。It is a top view of the mounting structure of FIG. 図４の実装構造体の側面図である。It is a side view of the mounting structure of FIG. 外部接続部および外部接続基板の接続部分を示した平面図である。It is the top view which showed the connection part of an external connection part and an external connection board | substrate. 図６のＩ－Ｉ線に沿った断面図である。It is sectional drawing along the II line | wire of FIG. 図６のII－II線に沿った断面図である。FIG. 7 is a cross-sectional view taken along the line II-II in FIG. 6. 本発明の他の実施形態に係る実装構造体を示す斜視図である。It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. 図９の実装構造体であって、蓋体および外部回路基板を外した状態での分解斜視図である。FIG. 10 is an exploded perspective view of the mounting structure of FIG. 9 with a lid and an external circuit board removed. 本発明の他の実施形態に係る実装構造体を示す斜視図である。It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. 本発明の他の実施形態に係る実装構造体を示す斜視図である。It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. 本発明の他の実施形態に係る実装構造体を示す斜視図である。It is a perspective view which shows the mounting structure which concerns on other embodiment of this invention. 図１３の実装構造体であって、外部回路基板を外した状態で、基板の下面側から観察した平面図である。FIG. 14 is a plan view of the mounting structure of FIG. 13 observed from the lower surface side of the board with the external circuit board removed. 図１３の実装構造体の側面図である。It is a side view of the mounting structure of FIG. シミュレーション結果を示すグラフである。It is a graph which shows a simulation result.
　［実装構造体］
　本発明の一実施形態に係る実装構造体１について、図１～図８を参照しながら説明する。実装構造体１は、素子２と、素子収納用パッケージ３および外部回路基板４とを備えている。 [Mounting structure]
A mounting structure 1 according to an embodiment of the present invention will be described with reference to FIGS. The mounting structure 1 includes an element 2, an element storage package 3, and an external circuit board 4.
　図２に示すように、素子２は基板31の上面31ａに配置される。また、素子２は台座２ａを介して素子実装領域31ｂ上に実装されている。台座２ａは、素子収納用パッケージ３の内部の素子実装領域31ｂに重なるように配置されている。台座２ａは、素子２を実装するものであって、素子２の高さ位置を調整することができる。台座２ａは、絶縁材料からなり、台座２ａの上面には素子２に電気的に接続される電気配線が形成されている。 As shown in FIG. 2, the element 2 is disposed on the upper surface 31 a of the substrate 31. The element 2 is mounted on the element mounting region 31b via the base 2a. The pedestal 2 a is disposed so as to overlap the element mounting region 31 b inside the element storage package 3. The base 2a mounts the element 2 and can adjust the height position of the element 2. The pedestal 2a is made of an insulating material, and electrical wiring that is electrically connected to the element 2 is formed on the upper surface of the pedestal 2a.
　素子２は、例えば、半導体素子、トランジスタ、ダイオードまたはサイリスタ等の能動素子、あるいは抵抗器、コンデンサ、太陽電池、圧電素子、水晶振動子またはセラミック発振子等の受動素子が挙げられる。実装構造体１は、高耐電圧化、大電流化または高速・高周波化に対応している素子２を実装して機能させることに適している。なお、本実施形態では、素子２の一例として半導体素子を採用している。 The element 2 includes, for example, an active element such as a semiconductor element, a transistor, a diode, or a thyristor, or a passive element such as a resistor, a capacitor, a solar cell, a piezoelectric element, a crystal resonator, or a ceramic oscillator. The mounting structure 1 is suitable for mounting and functioning the element 2 corresponding to high withstand voltage, large current, or high speed and high frequency. In the present embodiment, a semiconductor element is employed as an example of the element 2.
　素子収納用パッケージ３は、素子２を保護する機能を有する。図２に示すように、素子収納用パッケージ３は、素子２を収納している。また、素子収納用パッケージ３は、基板31と、枠体32と、入出力端子33と、シールリング34とを備える。 The element storage package 3 has a function of protecting the element 2. As shown in FIG. 2, the element storage package 3 stores the elements 2. The element storage package 3 includes a substrate 31, a frame body 32, input / output terminals 33, and a seal ring 34.
　基板31は素子２を支持する機能を有する。図３および図４に示すように、基板31は、上面31ａを有している。また、基板31の上面31ａは、素子２または台座２ａを搭載するための素子実装領域31ｂを有している。基板31は、１枚の金属板または複数の金属板を積層させた積層体からなる。 The substrate 31 has a function of supporting the element 2. As shown in FIGS. 3 and 4, the substrate 31 has an upper surface 31a. Further, the upper surface 31a of the substrate 31 has an element mounting region 31b for mounting the element 2 or the pedestal 2a. The substrate 31 is composed of a single metal plate or a laminate in which a plurality of metal plates are laminated.
　基板31の材料としては、例えば銅、鉄、タングステン、モリブデン、ニッケルまたはコバルトなどの金属、これらの金属を含んだ合金、セラミックス、ガラスあるいは樹脂等が挙げられる。なお、基板31の材料に金属材料を採用すれば、基板31を介して素子２から発生した熱を放熱できるので、素子収納用パッケージ３の放熱性が向上する。なお、基板31の熱伝導率は、例えば１５Ｗ／（ｍ・Ｋ）～４５０Ｗ／（ｍ・Ｋ）の範囲に設定できる。基板31の熱膨張係数は、例えば３×１０－６／Ｋ～２８×１０－６／Ｋの範囲に設定できる。 Examples of the material of the substrate 31 include metals such as copper, iron, tungsten, molybdenum, nickel, and cobalt, alloys containing these metals, ceramics, glass, and resins. If a metal material is used as the material of the substrate 31, heat generated from the element 2 can be radiated through the substrate 31, so that the heat dissipation of the element housing package 3 is improved. The thermal conductivity of the substrate 31 can be set, for example, in the range of 15 W / (m · K) to 450 W / (m · K). The thermal expansion coefficient of the substrate 31 can be set in the range of 3 × 10 −6 / K to 28 × 10 −6 / K, for example.
　枠体32は、素子実装領域31ｂを取り囲むように基板31の上面31ａに配置されている。なお、枠体32は、基板31の上面31ａにろう材などによって接合されている。また、枠体32の側部321には、枠体32の内側および外側の間を貫通する、複数（２個）の貫通部Ｔが形成されている。一方の貫通部Ｔには入出力端子33が挿通されており、他方の貫通部Ｔには、光ファイバからの光を枠体32の内側まで通す筒状部材Ｒが挿通されている。 The frame body 32 is disposed on the upper surface 31a of the substrate 31 so as to surround the element mounting region 31b. The frame body 32 is joined to the upper surface 31a of the substrate 31 by a brazing material or the like. In addition, a plurality (two) of through portions T that penetrate between the inside and the outside of the frame body 32 are formed in the side portion 321 of the frame body 32. An input / output terminal 33 is inserted into one through portion T, and a cylindrical member R that passes light from the optical fiber to the inside of the frame 32 is inserted into the other through portion T.
　枠体32の材料は、例えば、銅、鉄、タングステン、モリブデン、ニッケルまたはコバルト等の金属材料、あるいはこれらの金属材料を含有する合金が挙げられる。なお、枠体32の熱伝導率は、例えば１５Ｗ／（ｍ・Ｋ）～４５０Ｗ／（ｍ・Ｋ）の範囲に設定されている。枠体32の熱膨張係数は、例えば３×１０－６／Ｋ～２８×１０－６／Ｋの範囲に設定できる。 Examples of the material of the frame 32 include metal materials such as copper, iron, tungsten, molybdenum, nickel, and cobalt, or alloys containing these metal materials. The thermal conductivity of the frame 32 is set, for example, in the range of 15 W / (m · K) to 450 W / (m · K). The thermal expansion coefficient of the frame body 32 can be set, for example, in the range of 3 × 10 −6 / K to 28 × 10 −6 / K.
　入出力端子33は、枠体32とともにパッケージの一部を構成しつつ枠体32の内側および外側を電気的に接続する機能を有する。入出力端子33は枠体32の貫通部Ｔに挿通されている。図４に示すように、入出力端子33の一部である延在部は枠体32の外側に位置しているとともに、入出力端子33の他の一部である延在部は枠体32の内側に位置している。枠体32の外側に位置している入出力端子33の延在部は、外部回路基板４が接合される外部接続部33Ａである。 The input / output terminal 33 has a function of electrically connecting the inside and the outside of the frame 32 while constituting a part of the package together with the frame 32. The input / output terminal 33 is inserted through the through portion T of the frame 32. As shown in FIG. 4, the extending portion that is a part of the input / output terminal 33 is located outside the frame 32, and the extending portion that is another part of the input / output terminal 33 is the frame 32. Located inside. The extending part of the input / output terminal 33 located outside the frame 32 is an external connection part 33A to which the external circuit board 4 is joined.
　入出力端子33は、図３および図５に示すように、順次積層された第１絶縁層331と、第２絶縁層332と、第３絶縁層333とを有する。すなわち、第１絶縁層331の上面には第２絶縁層332が配置されており、この第２絶縁層332の上面には第３絶縁層333が配置されている。なお、図３および図５に示された一点鎖線は、第１絶縁層331、第２絶縁層332および第３絶縁層333を区切る仮想線である（図１１～図１３および図１５についても同様である）。 The input / output terminal 33 includes a first insulating layer 331, a second insulating layer 332, and a third insulating layer 333 that are sequentially stacked, as shown in FIGS. That is, the second insulating layer 332 is disposed on the upper surface of the first insulating layer 331, and the third insulating layer 333 is disposed on the upper surface of the second insulating layer 332. 3 and FIG. 5 is a virtual line that divides the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 (the same applies to FIGS. 11 to 13 and FIG. 15). Is).
　第１絶縁層331は、第２絶縁層332および第３絶縁層333に比べて枠体32の外側に長く延在している。すなわち、第１絶縁層331は第２絶縁層332および第３絶縁層333に重ならない部分を有している。また、第２絶縁層332は、第３絶縁層333に比べて枠体32の外側に長く延在している。すなわち、第２絶縁層332は第３絶縁層333に重ならない部分を有している。 The first insulating layer 331 extends longer to the outside of the frame body 32 than the second insulating layer 332 and the third insulating layer 333. That is, the first insulating layer 331 has a portion that does not overlap with the second insulating layer 332 and the third insulating layer 333. Further, the second insulating layer 332 extends longer to the outside of the frame body 32 than the third insulating layer 333. That is, the second insulating layer 332 has a portion that does not overlap with the third insulating layer 333.
　第１絶縁層331、第２絶縁層332および第３絶縁層333は、絶縁材料で形成され、例えば、酸化アルミニウム質焼結体、ムライト質焼結体、炭化珪素質焼結体、窒化アルミニウム質焼結体、窒化珪素質焼結体またはガラスセラミックス等のセラミック材料で形成される。なお、セラミック材料から構成された第１絶縁層331、第２絶縁層332および第３絶縁層333の熱膨張係数は、例えば３×１０－６／Ｋ以上８×１０－６／Ｋ以下である。 The first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 are formed of an insulating material, such as an aluminum oxide sintered body, a mullite sintered body, a silicon carbide based sintered body, and an aluminum nitride based material. It is formed of a ceramic material such as a sintered body, a silicon nitride sintered body, or a glass ceramic. The thermal expansion coefficients of the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 made of a ceramic material are, for example, 3 × 10 −6 / K or more and 8 × 10 −6 / K or less. .
　また、図２～図４に示すように、入出力端子33は、外部回路基板４が接続される外部接続部33Ａを有している。外部接続部33Ａは、延在部として入出力端子33における枠体32の外側に位置している部位である。 Also, as shown in FIGS. 2 to 4, the input / output terminal 33 has an external connection portion 33A to which the external circuit board 4 is connected. The external connection portion 33A is a portion located outside the frame 32 in the input / output terminal 33 as an extending portion.
　外部接続部33Ａは、導電性の接合部材Ｂを介して外部回路基板４に接続されている。また、外部接続部33Ａは、第１絶縁層331における第２絶縁層332および第３絶縁層333に重ならない部分に位置する第１接続部33ａと、第２絶縁層332における第３絶縁層333に重ならない部分に位置する第２接続部33ｂとを含んでいる。図３～図５に示すように、第２接続部33ｂの高さ位置が第１接続部33ａの高さ位置に比べて高くなっている。なお、接合部材Ｂは、外部回路基板４と外部接続部33Ａの電極端子334を接続するのが第１接合部材であって、外部回路基板４と切欠き部Ｃの導体層Ｃ１を接続するのが第２接合部材とする。 The external connection portion 33A is connected to the external circuit board 4 through the conductive bonding member B. The external connection portion 33A includes a first connection portion 33a located in a portion of the first insulating layer 331 that does not overlap the second insulating layer 332 and the third insulating layer 333, and a third insulating layer 333 in the second insulating layer 332. 2nd connection part 33b located in the part which does not overlap. As shown in FIGS. 3 to 5, the height position of the second connection portion 33b is higher than the height position of the first connection portion 33a. The bonding member B is a first bonding member that connects the external circuit board 4 and the electrode terminal 334 of the external connection portion 33A, and connects the external circuit board 4 and the conductor layer C1 of the cutout portion C. Is the second joining member.
　また、外部接続部33Ａの上面には、複数の電極端子334が一定方向に配列されている。具体的には、複数の電極端子334のうち一部の電極端子334は、第１接続部33ａの上面に第１絶縁層331の端に沿って配列している。また、他の一部の電極端子334は、第２接続部33ｂの上面に第２絶縁層332の端に沿って配列している。複数の電極端子334は、交流信号が印加される電極端子および基準電位に設定される電極端子であって、貫通部Ｔにおける枠体32に沿った一定方向に配列されている。 Further, a plurality of electrode terminals 334 are arranged in a fixed direction on the upper surface of the external connection portion 33A. Specifically, some of the plurality of electrode terminals 334 are arranged along the end of the first insulating layer 331 on the upper surface of the first connection portion 33a. The other part of the electrode terminals 334 are arranged along the end of the second insulating layer 332 on the upper surface of the second connection portion 33b. The plurality of electrode terminals 334 are an electrode terminal to which an AC signal is applied and an electrode terminal set to a reference potential, and are arranged in a certain direction along the frame 32 in the through portion T.
　本実施形態では、第２接続部33ｂに位置する複数の電極端子334には直流信号が印加される。一方、第１接続部33ａに位置する複数の電極端子334は、交流信号が印加される複数の電極端子334および基準電位に設定された複数の電極端子334を有している。なお、基準電位とは、基準となる電位であって、例えばグランド（接地）電位をいう。 In this embodiment, a DC signal is applied to the plurality of electrode terminals 334 located in the second connection portion 33b. On the other hand, the plurality of electrode terminals 334 located in the first connection portion 33a include a plurality of electrode terminals 334 to which an AC signal is applied and a plurality of electrode terminals 334 set to a reference potential. The reference potential is a reference potential, for example, a ground potential.
　本実施形態の第１接続部33ａでは、交流信号を印加される電極端子334および基準電位に設定される電極端子334が交互に配列している。また、第１接続部33ａの両側部に位置する電極端子334（切欠き部Ｃに隣接する電極端子334）は基準電位に設定されている。なお、交流信号が印加される電極端子334および基準電位に設定される電極端子334の配列は、上記に限定されない。 In the first connection portion 33a of the present embodiment, electrode terminals 334 to which an AC signal is applied and electrode terminals 334 set to a reference potential are alternately arranged. Further, the electrode terminals 334 (electrode terminals 334 adjacent to the notch C) located on both sides of the first connection portion 33a are set to the reference potential. Note that the arrangement of the electrode terminal 334 to which the AC signal is applied and the electrode terminal 334 set to the reference potential is not limited to the above.
　入出力端子33では、交流信号が印加される電極端子334に隣接し、基準電位に設定された電極端子334を配置することで、コプレーナ線路が構成される。これによって、電極端子334に印加される高周波の交流信号を所定のインピーダンス値に整合させやすくなり、高周波の交流信号に発生する伝送損失、即ち、挿入損失や反射損失を抑制して、高周波信号を効率良く入出力させることができる。 The input / output terminal 33 is adjacent to the electrode terminal 334 to which an AC signal is applied, and an electrode terminal 334 set at a reference potential is arranged to constitute a coplanar line. This makes it easy to match the high-frequency AC signal applied to the electrode terminal 334 to a predetermined impedance value, and suppresses transmission loss that occurs in the high-frequency AC signal, that is, insertion loss and reflection loss, Input / output can be performed efficiently.
　なお、電極端子334に印加される信号は、上記に限られず、製品設計に合わせて適宜変更してもよい。例えば、第２接続部33ｂに位置する複数の電極端子334に交流信号を印加してもよいし、第１接続部33ａに位置する複数の電極端子334に直流信号を印加してもよい。また、電極端子334の数についても上記に限られず、製品設計に合わせて適宜変更してもよい。 Note that the signal applied to the electrode terminal 334 is not limited to the above, and may be appropriately changed according to the product design. For example, an AC signal may be applied to the plurality of electrode terminals 334 located at the second connection portion 33b, or a DC signal may be applied to the plurality of electrode terminals 334 located at the first connection portion 33a. Further, the number of electrode terminals 334 is not limited to the above, and may be appropriately changed according to product design.
　また、本実施形態では、第１接続部33ａの上面に複数の電極端子334が配列されているが、これには限定されない。すなわち、第１接続部33ａの下面に複数の電極端子334を配置してもよいし、また、第１接続部33ａの上面および下面の両方に複数の電極端子334を配置してもよい。電極端子334の材料は、例えば、タングステン、モリブデンまたはマンガン等の高融点金属材料からなる。なお、電極端子334の表面にニッケルまたは金等のメッキ層を形成してもよい。 In the present embodiment, the plurality of electrode terminals 334 are arranged on the upper surface of the first connection portion 33a, but the present invention is not limited to this. That is, a plurality of electrode terminals 334 may be disposed on the lower surface of the first connection portion 33a, or a plurality of electrode terminals 334 may be disposed on both the upper surface and the lower surface of the first connection portion 33a. The material of the electrode terminal 334 is made of a refractory metal material such as tungsten, molybdenum or manganese. A plating layer such as nickel or gold may be formed on the surface of the electrode terminal 334.
　なお、図４に示すように、枠体32の内側における入出力端子33の上面にも、複数の電極端子334が配置されている。具体的には、枠体32の内側における第１絶縁層331の上面および第２絶縁層332の上面に、複数の電極端子334が配置されている。枠体32の内側に位置する電極端子334および枠体32の外側（外部接続部33Ａ）に位置する電極端子334は、電気的に接続されている。また、枠体32の内側に位置する電極端子334は、ボンディングワイヤなどで素子２や台座２ａに接続される。 As shown in FIG. 4, a plurality of electrode terminals 334 are also arranged on the upper surface of the input / output terminal 33 inside the frame 32. Specifically, a plurality of electrode terminals 334 are arranged on the upper surface of the first insulating layer 331 and the upper surface of the second insulating layer 332 inside the frame 32. The electrode terminal 334 located inside the frame 32 and the electrode terminal 334 located outside the frame 32 (external connection portion 33A) are electrically connected. The electrode terminal 334 located inside the frame 32 is connected to the element 2 and the base 2a with a bonding wire or the like.
　また、外部接続部33Ａは、一定方向（電極端子334の配列方向）の端に位置する側部に切欠き部Ｃが形成されている。つまり、切欠き部Ｃは、外部接続部33Ａにおける貫通部Ｔに沿った一定方向の両端側に位置する両側部に形成されている。より具体的には、外部接続部33Ａにおける第１接続部33ａの側部に切欠き部Ｃが形成されている。また、本実施形態の切欠き部Ｃは、電極端子334の配列方向に位置する両側部に形成されている。なお、本実施形態では、切欠き部Ｃが第１接続部33ａの側部に形成されているが、これには限られず、第２接続部33ｂの側部に形成されていてもよい。また、切欠き部Ｃは第１接続部33ａの側部および第２接続部33ｂの側部の両方に形成されていてもよい。つまり、切欠き部Ｃは、第１絶縁層331における貫通部Ｔにおける枠体32に沿った一定方向の一端側に位置する側部、第２絶縁層332における貫通部Ｔにおける枠体32に沿った一定方向の一端側に位置する側部に形成されている。 Further, the external connection portion 33A has a notch C formed at a side portion located at an end in a certain direction (the arrangement direction of the electrode terminals 334). That is, the notch portion C is formed on both side portions located at both end sides in a certain direction along the through portion T in the external connection portion 33A. More specifically, a cutout portion C is formed on the side of the first connection portion 33a in the external connection portion 33A. Further, the cutout portions C of the present embodiment are formed on both side portions located in the arrangement direction of the electrode terminals 334. In the present embodiment, the cutout portion C is formed on the side portion of the first connection portion 33a, but is not limited thereto, and may be formed on the side portion of the second connection portion 33b. Moreover, the notch C may be formed in both the side part of the 1st connection part 33a, and the side part of the 2nd connection part 33b. In other words, the notch C is located on the side portion of the first insulating layer 331 located on one end side in the fixed direction along the frame 32 in the through portion T, and along the frame 32 in the through portion T of the second insulating layer 332. It is formed in the side part located in the one end side of the fixed direction.
　切欠き部Ｃは、外部接続部33Ａの上部から外部接続部33Ａの側部にかけて形成されている。図４および図６に示すように、切欠き部Ｃは平面視して矩形状であるが、これには限られず、円形状、多角形状でもよい。また、本実施形態の切欠き部Ｃは第１絶縁層331の下面まで形成されていないが、これには限られず、切欠き部Ｃを第１絶縁層331の下面まで形成して貫通させてもよい。 The notch C is formed from the upper part of the external connection part 33A to the side part of the external connection part 33A. As shown in FIGS. 4 and 6, the cutout portion C is rectangular in plan view, but is not limited thereto, and may be circular or polygonal. Further, the notch portion C of the present embodiment is not formed up to the lower surface of the first insulating layer 331. However, the present invention is not limited to this, and the notch portion C is formed to the lower surface of the first insulating layer 331 so as to penetrate therethrough. Also good.
　図１６は、本実施形態に係る素子収納用パッケージ３の周波数特性（Ｓパラメータ）（反射損失：Return Loss、挿入損失：Insertion Loss）のシミュレーション結果を示したグラフである。本実施形態の周波数特性のうち反射損失を実線で、比較例の周波数特性のうち反射損失を破線で示している。さらに、本実施形態の周波数特性のうち挿入損失を長破線で、比較例の周波数特性のうち挿入損失を一点鎖線で示している。なお、本実施形態は、図３に示す素子収納用パッケージ３において切欠き部Ｃを設けた構造であって、比較例は、図３に示す素子収納用パッケージ３において切欠き部Ｃが無い構造である。 FIG. 16 is a graph showing the simulation results of the frequency characteristics (S parameter) (reflection loss: Return 、 Loss, insertion loss: Insertion Loss) of the element storage package 3 according to this embodiment. Of the frequency characteristics of this embodiment, the reflection loss is indicated by a solid line, and among the frequency characteristics of the comparative example, the reflection loss is indicated by a broken line. Furthermore, among the frequency characteristics of the present embodiment, the insertion loss is indicated by a long broken line, and among the frequency characteristics of the comparative example, the insertion loss is indicated by a one-dot chain line. The present embodiment has a structure in which the cutout portion C is provided in the element storage package 3 shown in FIG. 3, and the comparative example has a structure in which the cutout portion C is not provided in the element storage package 3 shown in FIG. It is.
　反射損失は、周波数が０ＧＨｚから高周波数になるにつれて、反射損失が０ｄＢに近付く。また、挿入損失は、周波数が０ＧＨｚで０ｄＢであるが、高周波数になるにつれて、０ｄＢからのずれが大きくなる。そして、挿入損失が急峻に０ｄＢから大きくずれ始める周波数が、いわゆる共振周波数である。 The reflection loss approaches 0 dB as the frequency becomes higher from 0 GHz. The insertion loss is 0 dB at a frequency of 0 GHz, but the deviation from 0 dB increases as the frequency increases. The frequency at which the insertion loss starts to deviate sharply from 0 dB is a so-called resonance frequency.
　図１６のシミュレーション結果の条件においては、貫通部Ｔに沿った一方向の高周波信号が伝送される電極端子334の長さ、即ち、電極端子334が配列される方向に沿った長さが０．３ｍｍに、一方向に直交する方向の電極端子334の長さが１．３ｍｍに設定されている。また、高周波信号が伝送される電極端子334を等間隔に挟むように設けている、基準電位となる電極端子334は、電極端子334が配列される方向に沿った長さが０．５ｍｍに、一方向に直交する方向の電極端子334の長さが１．３ｍｍに設定されている。なお、高周波信号が伝送される電極端子334と基準電位となる電極端子334との間隔は、０．３ｍｍに設定されている。また、切欠き部Ｃの大きさは、一方向に沿った長さが０．１５ｍｍに、一方向に直交する方向の長さが０．４ｍｍに、上下方向の長さが０．４５ｍｍに設定されている。 16, the length of the electrode terminal 334 that transmits a high-frequency signal in one direction along the through-hole T, that is, the length along the direction in which the electrode terminal 334 is arranged is 0. The length of the electrode terminal 334 in the direction orthogonal to one direction is set to 3 mm and 1.3 mm. In addition, the electrode terminal 334 serving as a reference potential provided so as to sandwich the electrode terminals 334 through which high-frequency signals are transmitted has a length of 0.5 mm along the direction in which the electrode terminals 334 are arranged, The length of the electrode terminal 334 in the direction orthogonal to one direction is set to 1.3 mm. The interval between the electrode terminal 334 through which the high-frequency signal is transmitted and the electrode terminal 334 serving as a reference potential is set to 0.3 mm. The size of the notch C is set to 0.15 mm in one direction, 0.4 mm in the direction orthogonal to one direction, and 0.45 mm in the vertical direction. Has been.
　図１６に示すように、切欠き部Ｃが無い場合は、反射損失が２０ＧＨｚから２５ＧＨｚの周波数帯において、－８ｄＢ程度のピークが存在する。これに対して、切欠き部Ｃが有る場合は、反射損失が２０ＧＨｚから２５ＧＨｚの周波数帯において、－２０ｄＢ以下となる。そして、反射損失が－８ｄＢ程度になるのは、周波数が４５ＧＨｚ以上である。これらの結果から、切欠き部Ｃが有る場合の方が、周波数が大きくなっても反射損失を低く抑えることができ、反射損失が改善している。 As shown in FIG. 16, when the cutout portion C is not present, a peak of about −8 dB exists in the reflection loss in the frequency band of 20 GHz to 25 GHz. On the other hand, when the cutout portion C is present, the reflection loss is −20 dB or less in the frequency band of 20 GHz to 25 GHz. The reflection loss is about -8 dB when the frequency is 45 GHz or more. From these results, when the notch C is present, the reflection loss can be reduced even when the frequency is increased, and the reflection loss is improved.
　また、切欠き部Ｃが無い場合は、２０ＧＨｚから２５ＧＨｚの周波数帯において、－４ｄＢ以下となるピークが存在する。これに対して、切欠き部Ｃが有る場合は、２０ＧＨｚから２５ＧＨｚの周波数帯において、－１ｄＢ以上の０に近い値であって、急に変化する周波数が存在しない。そして、挿入損失が－４ｄＢ以下となるのは、４５ＧＨｚを超える周波数のときである。これらの結果から、切欠き部Ｃが有る場合の方が、周波数が大きくなっても挿入損失が急激に変化するのを抑えることができ、挿入損失が改善している。 In addition, when there is no notch C, a peak of −4 dB or less exists in the frequency band from 20 GHz to 25 GHz. On the other hand, when there is a notch C, in the frequency band from 20 GHz to 25 GHz, it is a value close to 0 of −1 dB or more, and there is no frequency that changes suddenly. The insertion loss is -4 dB or less when the frequency exceeds 45 GHz. From these results, when the notch C is present, it is possible to suppress a sudden change in the insertion loss even when the frequency is increased, and the insertion loss is improved.
　また、本実施形態の切欠き部Ｃの内面には導体層Ｃ１が形成されている。図６～図８に示すように、この導体層Ｃ１は基準電位に設定された電極端子334に接続されている。基準電位に設定される電極端子334は、交流信号が印加される電極端子よりも外部接続部33Ａの側部に近い個所に位置している。また、外部接続部33Ａは、外部接続部33Ａの側部に形成された切欠き部Ｃと、切欠き部Ｃの内面に形成された、基準電位に設定される電極端子に電気的に接続される導体層Ｃ１とを有している。 Also, a conductor layer C1 is formed on the inner surface of the cutout portion C of the present embodiment. As shown in FIGS. 6 to 8, the conductor layer C1 is connected to an electrode terminal 334 set at a reference potential. The electrode terminal 334 set to the reference potential is positioned closer to the side of the external connection portion 33A than the electrode terminal to which an AC signal is applied. The external connection portion 33A is electrically connected to a cutout portion C formed on the side portion of the external connection portion 33A and an electrode terminal set on the inner surface of the cutout portion C and set to a reference potential. And a conductor layer C1.
　本実施形態に係る実装構造体１および素子収納用パッケージ３は、外部接続部33Ａの側部に近い個所に基準電位となる電極端子を設け、さらに外部接続部33Ａの側部に切欠き部Ｃと、切欠き部Ｃの内面に形成された、基準電位に設定される電極端子に接続される導体層Ｃ１とを設けることで、交流信号が印加される電極端子の周囲において、導体層Ｃ１によって交流信号が印加される電極端子とのインピーダンスを整合させつつ、電極端子の周囲に生じる電界分布を所望の領域に閉じ込める、即ち、収斂させやすくすることができ、高周波数帯での周波数特性を良好にすることができる。このようにすることで、入出力端子33と外部回路基板４との特性インピーダンス整合を良好にとりつつ、電極端子334の周囲に分布する電界分布によって生じる不要な共振を抑制することができる。 The mounting structure 1 and the element storage package 3 according to the present embodiment are provided with electrode terminals that serve as reference potentials at locations close to the side portions of the external connection portion 33A, and further, the cutout portion C is provided on the side portion of the external connection portion 33A. And a conductor layer C1 connected to the electrode terminal set at the reference potential, formed on the inner surface of the notch C, by the conductor layer C1 around the electrode terminal to which an AC signal is applied. While matching the impedance with the electrode terminal to which an AC signal is applied, the electric field distribution generated around the electrode terminal can be confined in a desired region, that is, can be easily converged, and the frequency characteristics in the high frequency band are good. Can be. By doing so, it is possible to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334 while satisfactorily matching the characteristic impedance between the input / output terminal 33 and the external circuit board 4.
　外部回路基板４は入出力端子33を介して素子２に信号を伝達する機能を有する。外部回路基板４は、導電性の接合部材Ｂを介して入出力端子33の外部接続部33Ａに接続されている。図６に示すように、本実施形態の接合部材Ｂには、半田または銀ろうなどのろう材が採用されており、複数の電極端子334のそれぞれに接合部材Ｂを配置し、電極端子334および外部回路基板４を接合して接続している。図６では、接合部材Ｂおよび外部回路基板４は破線で示されている。 The external circuit board 4 has a function of transmitting a signal to the element 2 via the input / output terminal 33. The external circuit board 4 is connected to the external connection portion 33A of the input / output terminal 33 through the conductive bonding member B. As shown in FIG. 6, a soldering material such as solder or silver solder is used for the joining member B of the present embodiment. The joining member B is disposed on each of the plurality of electrode terminals 334, The external circuit board 4 is joined and connected. In FIG. 6, the joining member B and the external circuit board 4 are indicated by broken lines.
　なお、接合部材Ｂに、例えば異方性導電膜を採用してもよい。その場合、複数の電極端子334のそれぞれに接合部材Ｂを配置するのではなく、複数の電極端子334に接合部材Ｂを一まとめに配置できるので、入出力端子33および外部回路基板４を容易に接続できる。 Note that, for example, an anisotropic conductive film may be adopted as the bonding member B. In that case, since the joining member B can be collectively arranged on the plurality of electrode terminals 334 instead of arranging the joining member B on each of the plurality of electrode terminals 334, the input / output terminals 33 and the external circuit board 4 can be easily arranged. Can connect.
　また、本実施形態の外部回路基板４はフレキシブル回路基板が採用されているが、これには限られない。外部回路基板４は、例えば、プリント回路基板であってもよい。 In addition, the external circuit board 4 of this embodiment is a flexible circuit board, but is not limited thereto. The external circuit board 4 may be a printed circuit board, for example.
　図６～図８に示すように、入出力端子33の外部接続部33Ａおよび外部回路基板４を接合する接合部材Ｂは、切欠き部Ｃに位置している。また、本実施形態では、接合部材Ｂは、切欠き部Ｃの内面に形成された導体層Ｃ１に接触している。本実施形態の接合部材Ｂは、切欠き部Ｃの内面のうち外部回路基板４に対向している面に位置する導体層Ｃ１にも接触している。これによって、接合部材Ｂの接触面積が増加し、外部回路基板４が外部接続部33Ａから剥がれにくくなるので好ましい。 6 to 8, the joining member B for joining the external connection portion 33A of the input / output terminal 33 and the external circuit board 4 is located in the notch portion C. In the present embodiment, the joining member B is in contact with the conductor layer C1 formed on the inner surface of the notch C. The joining member B of the present embodiment is also in contact with the conductor layer C1 located on the surface facing the external circuit board 4 in the inner surface of the notch C. This increases the contact area of the bonding member B, and the external circuit board 4 is difficult to peel off from the external connection portion 33A, which is preferable.
　加えて、接合部材Ｂが切欠き部Ｃに位置することで、余剰の接合部材Ｂを切欠き部Ｃへ逃がすことができるので、余剰の接合部材Ｂによって電極端子334および外部回路基板４の接続がずれたり傾いたりすることで接続信頼性や電気特性が不安定になることを抑制でき、外部接続部33Ａにおける電極端子334の周波数特性を所望の値に維持できる。 In addition, since the surplus joining member B can be released to the notch C because the joining member B is located in the notch C, the surplus joining member B connects the electrode terminal 334 and the external circuit board 4. By deviating or tilting, it is possible to suppress connection reliability and electrical characteristics from becoming unstable, and the frequency characteristics of the electrode terminal 334 in the external connection portion 33A can be maintained at a desired value.
　シールリング34は、枠体32および蓋体35を接合する機能を有する。図１および図２に示すように、シールリング34は、枠体32の上面に配置されており、平面視して素子２（素子実装領域31ｂ）を取り囲んでいる。シールリング34の材料としては、例えば鉄、銅、銀、ニッケル、クロム、コバルト、モリブデンまたはタングステンなどの金属材料、あるいはこれらの金属材料を複数組み合わせた合金などが挙げられる。 The seal ring 34 has a function of joining the frame body 32 and the lid body 35. As shown in FIGS. 1 and 2, the seal ring 34 is disposed on the upper surface of the frame 32 and surrounds the element 2 (element mounting region 31b) in plan view. Examples of the material of the seal ring 34 include metal materials such as iron, copper, silver, nickel, chromium, cobalt, molybdenum, and tungsten, or alloys that combine a plurality of these metal materials.
　蓋体35は、素子２を保護する機能を有する。また、図１および図２に示すように、蓋体35は、素子収納用パッケージ３の開口を封止している。蓋体35は、例えばシールリング34と同様の金属材料で形成することができる。 The lid 35 has a function of protecting the element 2. As shown in FIGS. 1 and 2, the lid 35 seals the opening of the element storage package 3. The lid 35 can be formed of a metal material similar to that of the seal ring 34, for example.
　実装構造体１では、入出力端子33および外部回路基板４を接合する接合部材Ｂが、外部接続部33Ａの側部に形成された切欠き部Ｃに配置されている。これによって、外部接続部33Ａの切欠き部Ｃの内面を利用して、入出力端子33および外部回路基板４を接合できるので、入出力端子33および外部回路基板４の接合強度が向上する。すなわち、例えば素子２の駆動による温度変化または実装構造体１の作動環境による温度変化、実装構造体１の環境試験や信頼性試験による温度変化によって、入出力端子33および外部回路基板４が熱膨張および熱収縮した場合であっても、外部回路基板４が入出力端子33から剥がれることを低減できるので、入出力端子33および外部回路基板４の接続信頼性の低下を抑制できる。 In the mounting structure 1, the joining member B that joins the input / output terminal 33 and the external circuit board 4 is disposed in a notch C formed on the side of the external connection part 33A. As a result, the input / output terminal 33 and the external circuit board 4 can be joined using the inner surface of the notch C of the external connection part 33A, so that the joint strength between the input / output terminal 33 and the external circuit board 4 is improved. That is, the input / output terminal 33 and the external circuit board 4 are thermally expanded by, for example, a temperature change due to driving of the element 2 or a temperature change due to an operating environment of the mounting structure 1 or a temperature change due to an environmental test or reliability test of the mounting structure 1. Even when the heat shrinks, it is possible to reduce the peeling of the external circuit board 4 from the input / output terminal 33, so that it is possible to suppress a decrease in connection reliability between the input / output terminal 33 and the external circuit board 4.
　また、切欠き部Ｃは外部接続部33Ａの側部に形成されている。そして、外部回路基板４は、導電性の接合部材Ｂを介して外部接続部33Ａに接続されているとともに、接合部材Ｂは切欠き部Ｃに位置している。外部回路基板４の剥がれは外部接続部33Ａの側部で発生しやすく、側部で剥がれが発生すると、これを起点にして剥がれが側部から外部接続部33Ａの内方にかけて広がる可能性がある。これに対して、外部接続部33Ａの側部に切欠き部Ｃを形成し、切欠き部Ｃ内に接合部材Ｂを配置することで、外部接続部33Ａの側部における外部回路基板４との接合強度を向上させることができ、外部回路基板４が入出力端子33から剥がれることを効果的に抑制することができる。 Further, the notch C is formed on the side of the external connection portion 33A. The external circuit board 4 is connected to the external connection portion 33A via the conductive bonding member B, and the bonding member B is located in the notch portion C. The peeling of the external circuit board 4 is likely to occur at the side of the external connection portion 33A, and when peeling occurs at the side, the peeling may spread from the side to the inside of the external connection portion 33A. . On the other hand, the notch C is formed in the side part of the external connection part 33A, and the joining member B is disposed in the notch part C, so that the external circuit board 4 on the side part of the external connection part 33A is connected. The bonding strength can be improved, and the external circuit board 4 can be effectively prevented from peeling off from the input / output terminal 33.
　また、実装構造体１では、切欠き部Ｃが、外部接続部33Ａにおける両側部に形成されている。これによって、入出力端子33および外部回路基板４が熱膨張および熱収縮した場合であっても、外部回路基板４が入出力端子33から剥がれることをさらに低減できるので、入出力端子33および外部回路基板４の接続信頼性の低下を抑制できる。 Further, in the mounting structure 1, the notches C are formed on both sides of the external connection portion 33A. Accordingly, even when the input / output terminal 33 and the external circuit board 4 are thermally expanded and contracted, it is possible to further reduce the peeling of the external circuit board 4 from the input / output terminal 33. Therefore, the input / output terminal 33 and the external circuit A decrease in connection reliability of the substrate 4 can be suppressed.
　また、図６～図８に示すように、実装構造体１では、切欠き部Ｃに形成された導体層Ｃ１が、基準電位に設定される電極端子334に接続されている。これによって、切欠き部Ｃに形成された導体層Ｃ１を基準電位に設定することができるので、高周波信号の伝送によって生じる電界の大気中での分布の広がりを導体層Ｃ１で抑制でき、電極端子334を伝達する高周波の交流信号を所定のインピーダンス値に整合させつつ、電極端子334の周囲に分布する電界分布によって生じる不要な共振を抑制させやすくなり、高周波の交流信号に発生する伝送損失、即ち、挿入損失や反射損失を抑制して、高周波の交流信号を効率良く入出力させることができる。 Also, as shown in FIGS. 6 to 8, in the mounting structure 1, the conductor layer C1 formed in the notch C is connected to the electrode terminal 334 set to the reference potential. As a result, the conductor layer C1 formed in the notch C can be set to the reference potential, so that the spread of the electric field distribution caused by the transmission of the high-frequency signal in the atmosphere can be suppressed by the conductor layer C1, and the electrode terminal While matching the high-frequency AC signal transmitted through 334 to a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss generated in the high-frequency AC signal, that is, It is possible to efficiently input and output high-frequency AC signals while suppressing insertion loss and reflection loss.
　本発明は上記実施形態に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更、改良などが可能である。上記実施形態では、外部接続部33Ａに１個の外部回路基板４が接続されているが、これには限定されない。 The present invention is not limited to the above embodiment, and various changes and improvements can be made without departing from the scope of the present invention. In the above embodiment, one external circuit board 4 is connected to the external connection portion 33A, but this is not limitative.
　例えば、図９および図１０に示すように、外部接続部33Ａに複数の外部回路基板４が接続されていてもよい。これによって、実装構造体１では、素子２の駆動による温度変化や実装構造体１の作動環境、実装構造体１の環境試験や信頼性試験による温度変化による温度変化によって、入出力端子33および外部回路基板４が熱膨張および熱収縮した場合であっても、外部回路基板４が分割して接続されていることから、入出力端子33と外部回路基板４との間で生じる応力は抑制され、外部回路基板４が入出力端子33から剥がれることを低減できる。 For example, as shown in FIGS. 9 and 10, a plurality of external circuit boards 4 may be connected to the external connection portion 33A. As a result, in the mounting structure 1, the input / output terminal 33 and the external are affected by a temperature change caused by driving the element 2, an operating environment of the mounting structure 1, and a temperature change caused by an environmental test or reliability test of the mounting structure 1. Even when the circuit board 4 is thermally expanded and contracted, since the external circuit board 4 is divided and connected, the stress generated between the input / output terminal 33 and the external circuit board 4 is suppressed, It is possible to reduce the peeling of the external circuit board 4 from the input / output terminal 33.
　また、上記実施形態では、外部接続部33Ａの両側部にそれぞれに１個の切欠き部Ｃが形成されているが、これには限定されない。すなわち、図１１に示すように、外部接続部33Ａの側部に複数の切欠き部Ｃを形成してもよい。接合部材Ｂが複数の切欠き部Ｃに配置されることで、外部接続部33Ａの複数の切欠き部Ｃの内面を利用して入出力端子33および外部回路基板４を接合できるので、入出力端子33および外部回路基板４の接合強度が向上し、入出力端子33および外部回路基板４の接続信頼性の低下を抑制できる。 In the above embodiment, one notch C is formed on each side of the external connection portion 33A. However, the present invention is not limited to this. That is, as shown in FIG. 11, a plurality of notches C may be formed on the side of the external connection portion 33A. Since the joining member B is disposed in the plurality of notches C, the input / output terminals 33 and the external circuit board 4 can be joined using the inner surfaces of the plurality of notches C of the external connection portion 33A. The bonding strength between the terminal 33 and the external circuit board 4 is improved, and a decrease in connection reliability between the input / output terminal 33 and the external circuit board 4 can be suppressed.
　さらに、複数の切欠き部Ｃに位置する導体層Ｃ１を基準電位に設定することで、高周波の交流信号が伝送されることによって生じる電界の広がりを抑制でき、電極端子334に印加される高周波の交流信号を所定のインピーダンス値に整合させつつ、電極端子334の周囲に分布する電界分布によって生じる不要な共振を抑制させやすくなり、高周波の交流信号に発生する伝送損失、即ち、挿入損失や反射損失を抑制して、高周波信号を効率良く入出力させることができる。 Furthermore, by setting the conductor layer C1 positioned in the plurality of notches C to the reference potential, it is possible to suppress the spread of the electric field generated by the transmission of the high-frequency AC signal, and the high-frequency applied to the electrode terminal 334 can be suppressed. While matching the AC signal with a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss, that is, insertion loss and reflection loss, generated in the high-frequency AC signal. And high-frequency signals can be input and output efficiently.
　また、図１２に示すように、第１接続部33ａの一端側の側部および第２接続部33ｂの一端側の側部のそれぞれに切欠き部Ｃを形成することで、外部接続部33Ａの側部に複数の切欠き部Ｃを形成してもよい。これによって、第１接続部33ａおよび外部回路基板４ならびに第２接続部33ｂおよび外部回路基板４の接合強度を向上させることができるので、外部回路基板４が第１接続部33ａまたは第２接続部33ｂから剥がれることを低減でき、入出力端子33および外部回路基板４の接続信頼性の低下を抑制できる。 Further, as shown in FIG. 12, by forming a notch C in each of the side portion on one end side of the first connection portion 33a and the side portion on one end side of the second connection portion 33b, the external connection portion 33A A plurality of notches C may be formed on the side. As a result, the bonding strength of the first connection part 33a and the external circuit board 4, and the second connection part 33b and the external circuit board 4 can be improved, so that the external circuit board 4 is connected to the first connection part 33a or the second connection part. Peeling from 33b can be reduced, and a decrease in connection reliability between input / output terminal 33 and external circuit board 4 can be suppressed.
　さらに、複数の切欠き部Ｃに位置する導体層Ｃ１を基準電位に設定することで、高周波の交流信号が伝送されることによって生じる電界の広がりを抑制でき、電極端子334に印加される高周波の交流信号を所定のインピーダンス値に整合させつつ、電極端子334の周囲に分布する電界分布によって生じる不要な共振を抑制させやすくなり、高周波の交流信号に発生する伝送損失、即ち、挿入損失や反射損失を抑制して、高周波信号を効率良く入出力させることができる。 Furthermore, by setting the conductor layer C1 positioned in the plurality of notches C to the reference potential, it is possible to suppress the spread of the electric field generated by the transmission of the high-frequency AC signal, and the high-frequency applied to the electrode terminal 334 can be suppressed. While matching the AC signal with a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss, that is, insertion loss and reflection loss, generated in the high-frequency AC signal. And high-frequency signals can be input and output efficiently.
　なお、図１１および図１２に示すように、外部接続部33Ａの両側部のそれぞれに複数の切欠き部Ｃを形成してもよい。 In addition, as shown in FIGS. 11 and 12, a plurality of notches C may be formed on both sides of the external connection portion 33A.
　図１３～図１５では、第１接続部33ａの上面に加えて、第１接続部33ａの下面に複数の電極端子334が一定方向に沿って配列している。また、第１接続部33ａの下面に外部回路基板４が導電性の接合部材Ｂを介して接続されている。なお、図１３～図１５において、第１接続部33ａの上面および第２接続部33ｂの上面に接続される外部回路基板４は省略されている。 13 to 15, in addition to the upper surface of the first connection portion 33a, a plurality of electrode terminals 334 are arranged along a certain direction on the lower surface of the first connection portion 33a. In addition, the external circuit board 4 is connected to the lower surface of the first connection portion 33a via a conductive bonding member B. 13 to 15, the external circuit board 4 connected to the upper surface of the first connection part 33a and the upper surface of the second connection part 33b is omitted.
　また、第１接続部33ａにおける一定方向（電極端子334の配列方向）の側部には、第１接続部33ａ（第１絶縁層331）の下面側から切り欠かれた切欠き部Ｃが形成されている。さらに、外部回路基板４および第１接続部33ａを接続する接合部材Ｂは、切欠き部Ｃ内に位置している。 In addition, a cutout portion C cut out from the lower surface side of the first connection portion 33a (the first insulating layer 331) is formed on a side portion of the first connection portion 33a in a certain direction (the arrangement direction of the electrode terminals 334). Has been. Furthermore, the joining member B that connects the external circuit board 4 and the first connecting portion 33a is located in the notch C.
　これによって、第１接続部33ａの下面および外部回路基板４の接合強度を向上されることができるので、外部回路基板４が第１接続部33ａの下面から剥がれることを低減でき、入出力端子33および外部回路基板４の接続信頼性の低下を抑制できる。 As a result, the bonding strength between the lower surface of the first connection portion 33a and the external circuit board 4 can be improved, so that the external circuit substrate 4 can be prevented from peeling off from the lower surface of the first connection portion 33a. And the fall of the connection reliability of the external circuit board 4 can be suppressed.
　さらに、複数の切欠き部Ｃに位置する導体層Ｃ１を基準電位に設定することで、高周波の交流信号が伝送されることによって生じる電界の広がりを抑制でき、電極端子334に印加される高周波の交流信号を所定のインピーダンス値に整合させつつ、電極端子334の周囲に分布する電界分布によって生じる不要な共振を抑制させやすくなり、高周波の交流信号に発生する伝送損失、即ち、挿入損失や反射損失を抑制して、高周波信号を効率良く入出力させることができる。 Furthermore, by setting the conductor layer C1 positioned in the plurality of notches C to the reference potential, it is possible to suppress the spread of the electric field generated by the transmission of the high-frequency AC signal, and the high-frequency applied to the electrode terminal 334 can be suppressed. While matching the AC signal with a predetermined impedance value, it is easy to suppress unnecessary resonance caused by the electric field distribution distributed around the electrode terminal 334, and transmission loss, that is, insertion loss and reflection loss, generated in the high-frequency AC signal. And high-frequency signals can be input and output efficiently.
　［実装構造体の製造方法］
　以下、図１に示す実装構造体１の製造方法を説明する。なお、本発明は以下の実施形態に限定されるものではない。まず、基板31および枠体32を作製する。基板31および枠体32は、溶融した金属材料を型枠に鋳込んで固化させたインゴットに対して、従来周知の圧延加工または打ち抜き加工等の金属加工法を用いることで、所定形状に作製される。 [Method of manufacturing mounting structure]
Hereinafter, a method for manufacturing the mounting structure 1 shown in FIG. 1 will be described. In addition, this invention is not limited to the following embodiment. First, the substrate 31 and the frame body 32 are produced. The substrate 31 and the frame body 32 are manufactured in a predetermined shape by using a conventionally known metal working method such as rolling or punching for an ingot obtained by casting a molten metal material into a mold and solidifying it. The
　次に、入出力端子33を作製する。まず、第１絶縁層331、第２絶縁層332および第３絶縁層333のそれぞれに対応するセラミックグリーンシートを準備する。次に、これらのセラミックグリーンシートを所定形状に加工する。なお、この際、第１絶縁層331に対応するセラミックグリーンシートの側部に切欠きを形成する。そして、複数のセラミックグリーンシートの所定位置に、例えばスクリーン印刷法を用いて、モリブデンまたはマンガンを含有した金属ペーストを塗布してメタライズパターンを形成する。そして、複数のセラミックグリーンシートを積層した状態でこの積層体を同時に焼成することで、第１絶縁層331の側部に切欠き部Ｃが形成された入出力端子33を作製することができる。 Next, the input / output terminal 33 is produced. First, ceramic green sheets corresponding to the first insulating layer 331, the second insulating layer 332, and the third insulating layer 333 are prepared. Next, these ceramic green sheets are processed into a predetermined shape. At this time, a notch is formed in the side portion of the ceramic green sheet corresponding to the first insulating layer 331. Then, metal paste containing molybdenum or manganese is applied to predetermined positions of the plurality of ceramic green sheets using, for example, a screen printing method to form a metallized pattern. Then, by simultaneously firing the laminated body in a state where a plurality of ceramic green sheets are laminated, the input / output terminal 33 in which the cutout portion C is formed in the side portion of the first insulating layer 331 can be produced.
　次に、枠体32をろう材を介して基板31に接合すると同時に、入出力端子33および筒状部材Ｒを枠体32のそれぞれの貫通部Ｔに挿通させる。そして、入出力端子33における貫通部Ｔに当接する下面および側面と筒状部材Ｒの外周部とを枠体32の側部にろう材を介して接合するとともに、枠体32および入出力端子33の上面とシールリング34とをろう材を介して接合する。このようにして、素子収納用パッケージ３を準備することができる。 Next, the input / output terminal 33 and the cylindrical member R are inserted into the respective through portions T of the frame 32 at the same time as the frame 32 is joined to the substrate 31 via the brazing material. Then, the lower surface and side surfaces of the input / output terminal 33 that are in contact with the penetrating portion T and the outer peripheral portion of the cylindrical member R are joined to the side portion of the frame body 32 through a brazing material, and the frame body 32 and the input / output terminal 33 are also connected. And the seal ring 34 are joined to each other through a brazing material. In this way, the element storage package 3 can be prepared.
　次に、素子２を台座２ａを介して基板31の上面31ａの素子実装領域31ｂに配置する。そして、ボンディングワイヤなどを介して、枠体32の内側に位置する電極端子334を素子２に電気的に接続する。そして、外部接続部33Ａの電極端子334に接合部材Ｂを配置するとともに、切欠き部Ｃにも接合部材Ｂを配置する。この状態で、外部回路基板４を入出力端子33の外部接続部33Ａに接続する。最後に、素子収納用パッケージ３のシールリング34にシーム溶接で蓋体35を取り付けることで、実装構造体１を作製することができる。 Next, the element 2 is arranged in the element mounting region 31b of the upper surface 31a of the substrate 31 through the base 2a. Then, the electrode terminal 334 located inside the frame 32 is electrically connected to the element 2 via a bonding wire or the like. Then, the joining member B is disposed on the electrode terminal 334 of the external connection portion 33A, and the joining member B is also disposed on the notch portion C. In this state, the external circuit board 4 is connected to the external connection portion 33A of the input / output terminal 33. Finally, the mounting structure 1 can be manufactured by attaching the lid 35 to the seal ring 34 of the element housing package 3 by seam welding.

Claims (5)

  1. 　上面に素子実装領域を有する基板と、前記基板の前記上面に前記素子実装領域を取り囲むように配置された、一部に内側および外側の間を貫通した貫通部を有する枠体と、順次積層された第１絶縁層、第２絶縁層および第３絶縁層を有し、前記貫通部を通って前記枠体の内側および外側にそれぞれ延在部が位置した入出力端子とを備え、
    前記第１絶縁層は前記第２絶縁層および前記第３絶縁層に比べて前記枠体の外側に長く延在しているとともに、前記第２絶縁層は前記第３絶縁層に比べて前記枠体の外側に長く延在しており、
    前記入出力端子は、交流信号が印加される電極端子および基準電位に設定される電極端子が前記貫通部における前記枠体に沿った一定方向に配列された外部接続部を有しており、
    前記基準電位に設定される電極端子は、前記交流信号が印加される電極端子よりも前記外部接続部の側部に近い個所に位置しているとともに、
    前記外部接続部は、前記外部接続部の側部に形成された切欠き部と、前記切欠き部の内面に形成された、前記基準電位に設定される電極端子に電気的に接続された導体層とを有していることを特徴とする素子収納用パッケージ。     A substrate having an element mounting region on the upper surface, and a frame body that is disposed on the upper surface of the substrate so as to surround the element mounting region and has a through portion that partially penetrates between the inner side and the outer side, are sequentially stacked. A first insulating layer, a second insulating layer, and a third insulating layer, and an input / output terminal through which the extending portion is located inside and outside the frame body,
    The first insulating layer extends to the outside of the frame longer than the second insulating layer and the third insulating layer, and the second insulating layer is formed in the frame compared to the third insulating layer. Extends long outside the body,
    The input / output terminal has an external connection portion in which an electrode terminal to which an AC signal is applied and an electrode terminal set to a reference potential are arranged in a certain direction along the frame body in the penetration portion,
    The electrode terminal set to the reference potential is located closer to the side of the external connection part than the electrode terminal to which the AC signal is applied,
    The external connection part is a conductor electrically connected to a notch part formed on a side part of the external connection part and an electrode terminal set on the inner surface of the notch part and set to the reference potential. And a layer for storing an element.
  2. 　請求項１に記載の素子収納用パッケージであって、
    前記切欠き部は、前記外部接続部における前記一定方向の両端側に位置する両側部にそれぞれ形成されていることを特徴とする素子収納用パッケージ。     The device storage package according to claim 1,
    The element storing package, wherein the notch portions are formed on both side portions of the external connection portion located on both end sides in the fixed direction.
  3. 　請求項１または請求項２に記載の素子収納用パッケージであって、
    前記切欠き部は、前記第１絶縁層における前記一定方向の一端側に位置する側部および前記第２絶縁層における前記一定方向の一端側に位置する側部に形成されていることを特徴とする素子収納用パッケージ。     The element storage package according to claim 1 or 2,
    The cutout portion is formed on a side portion located on one end side in the fixed direction in the first insulating layer and on a side portion located on one end side in the fixed direction in the second insulating layer. Package for element storage.
  4. 　請求項１ないし請求項３のいずれかに記載の素子収納用パッケージであって、
    前記切欠き部は、前記外部接続部の上部から前記外部接続部の側部にかけて形成されていることを特徴とする素子収納用パッケージ。     The element storage package according to any one of claims 1 to 3,
    The device housing package, wherein the cutout portion is formed from an upper portion of the external connection portion to a side portion of the external connection portion.
  5. 　請求項１ないし請求項４のいずれかに記載の素子収納用パッケージと、
    前記素子収納用パッケージの前記素子実装領域に実装された素子と、
    前記素子収納用パッケージの前記入出力端子に電気的に接続された外部回路基板とを備え、
    前記外部回路基板は、第１接合部材を介して前記外部接続部の前記電極端子に接続され、第２接合部材を介して前記切欠き部の前記導体層に接続されていることを特徴とする実装構造体。     The element storage package according to any one of claims 1 to 4,
    An element mounted in the element mounting region of the element storage package;
    An external circuit board electrically connected to the input / output terminals of the element storage package,
    The external circuit board via a first joint member is connected to the electrode terminals of the external connection portion, characterized in that it is connected via a second joint member to said conductor layer of said notch Mounting structure.
PCT/JP2014/069778 2013-07-26 2014-07-28 Element-housing package and mounting structure WO2015012405A1 (en)

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JP2019186455A (en) * 2018-04-13 2019-10-24 住友電気工業株式会社 Package for optical receiver module
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JP2019186455A (en) * 2018-04-13 2019-10-24 住友電気工業株式会社 Package for optical receiver module
JP7020261B2 (en) 2018-04-13 2022-02-16 住友電気工業株式会社 Package for optical receiver module
WO2020179937A1 (en) * 2019-03-07 2020-09-10 京セラ株式会社 Wiring board, package for electronic component, and electronic device
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