WO2013168742A1 - アクセサリ,カメラボディ - Google Patents
アクセサリ,カメラボディ Download PDFInfo
- Publication number
- WO2013168742A1 WO2013168742A1 PCT/JP2013/062942 JP2013062942W WO2013168742A1 WO 2013168742 A1 WO2013168742 A1 WO 2013168742A1 JP 2013062942 W JP2013062942 W JP 2013062942W WO 2013168742 A1 WO2013168742 A1 WO 2013168742A1
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- WIPO (PCT)
- Prior art keywords
- contact
- accessory
- signal
- communication
- lens
- Prior art date
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Classifications
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
- G03B17/00—Details of cameras or camera bodies; Accessories therefor
- G03B17/02—Bodies
- G03B17/12—Bodies with means for supporting objectives, supplementary lenses, filters, masks, or turrets
- G03B17/14—Bodies with means for supporting objectives, supplementary lenses, filters, masks, or turrets interchangeably
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/60—Control of cameras or camera modules
- H04N23/66—Remote control of cameras or camera parts, e.g. by remote control devices
- H04N23/663—Remote control of cameras or camera parts, e.g. by remote control devices for controlling interchangeable camera parts based on electronic image sensor signals
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
- G03B17/00—Details of cameras or camera bodies; Accessories therefor
- G03B17/56—Accessories
- G03B17/565—Optical accessories, e.g. converters for close-up photography, tele-convertors, wide-angle convertors
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/51—Housings
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03B—APPARATUS OR ARRANGEMENTS FOR TAKING PHOTOGRAPHS OR FOR PROJECTING OR VIEWING THEM; APPARATUS OR ARRANGEMENTS EMPLOYING ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ACCESSORIES THEREFOR
- G03B2206/00—Systems for exchange of information between different pieces of apparatus, e.g. for exchanging trimming information, for photo finishing
Definitions
- the present invention relates to an accessory and a camera body.
- a camera system having a plurality of communication systems is known as a camera system including a camera body and accessories (including an adapter, a converter, and an interchangeable lens) (see Patent Document 1).
- the camera system of Patent Literature 1 includes a communication contact group that performs communication between the camera body and the interchangeable lens, and a communication contact group that performs communication between the adapter and the interchangeable lens.
- the accessory is an accessory that is detachably attached to the camera body, and a predetermined condition is established with the first communication unit that communicates with the camera body using the first transmission line. Then, the second communication unit that communicates with the camera body using the first transmission line and the second transmission line that is different from the first transmission line, and communication with the camera body is established when a predetermined condition is satisfied.
- a switching unit that switches from communication by the first communication unit to communication by the second communication unit.
- the second communication unit includes the first communication unit.
- the second communication unit outputs an inverted signal complementary to the signal output to the first transmission line to the second transmission line. It is preferable.
- the accessory according to any one of the first to third aspects further includes an information storage unit that stores specification information indicating that the accessory includes the second communication unit, and the first communication The unit preferably transmits the specification information to the camera body, and the predetermined condition includes that the first communication unit transmits the specification information.
- the accessory in the accessory according to any one of the first to fourth aspects, the accessory is detachably connected to the second accessory that is electrically connected to the second transmission line. It is preferable that the first communication unit further communicates with the second accessory using the second transmission line.
- the accessory has a camera body and an interchangeable lens that is detachably attached to the camera body, and the first transmission line and the second lens are interposed between the interchangeable lens and the camera body.
- An accessory used in a camera system having a transmission line and is detachably attached to at least an interchangeable lens, the communication unit communicating with the interchangeable lens using the first transmission line, and the interchangeable lens being a first transmission line
- the communication unit includes a blocking unit that blocks communication with the interchangeable lens.
- the camera body is a camera body to which the accessory is detachably attached, and a predetermined condition is established with the first communication unit that communicates with the accessory using the first transmission line. Then, the second communication unit that communicates with the accessory using the first transmission line and the second transmission line that is different from the first transmission line, and communication with the accessory is performed when the predetermined condition is satisfied.
- a switching unit that switches from communication by the unit to communication by the second communication unit.
- the second communication unit includes the first communication unit.
- the second communication unit sends an inverted signal complementary to the signal output to the first transmission line to the second transmission line. Is preferably output to.
- the predetermined condition includes the second communication unit using the first transmission line and the second transmission line. It is preferable that the first communication unit receive the specification information related to the accessory having the accessory-side communication unit that performs communication.
- the accessory can be attached to and detached from the camera body including the first body contact, the second body contact, the third body contact, the fourth body contact, the fifth body contact, and the sixth body contact.
- the first accessory contact connected to the first body contact when attached to the camera body and the second accessory connected to the second body contact when attached to the camera body A contact, a third accessory contact connected to the third body contact when attached to the camera body, a fourth accessory contact connected to the fourth body contact when attached to the camera body, and the camera body A fifth accessory contact connected to the fifth body contact when attached, and a sixth accessory contact connected to the sixth body contact when attached to the camera body.
- a first communication unit that communicates with the camera body using a plurality of first transmission lines and a predetermined condition is satisfied, and each of the plurality of second transmission lines is connected to a fourth accessory contact and a fourth body.
- a switching unit that switches communication with the camera body from communication by the first communication unit to communication by the second communication unit when a predetermined condition is established.
- the communication unit is the first access
- the read / write signal is transmitted / received between the re-contact and the first body contact
- the first clock pulse signal is received from the second body contact via the second accessory contact
- the read / write signal becomes the first truth value.
- a first data signal synchronized with the first clock pulse signal is received from the third body contact via the third accessory contact
- the second write signal is different from the first truth value.
- the first data signal is transmitted to the third body contact through the third accessory contact, and the second communication unit transmits the first data signal between the first accessory contact and the first body contact.
- a read / write signal is transmitted / received, and a first inverted signal complementary to the read / write signal is transmitted / received between the fourth accessory contact and the fourth body contact, and the second body contact is transmitted via the second accessory contact.
- the second communication unit preferably includes the first communication unit.
- the accessory further includes an information storage unit that stores specification information indicating that the accessory includes the second communication unit, and the first communication unit includes: It is preferable that the specification information is transmitted to the camera body, and the predetermined condition includes that the first communication unit transmits the specification information.
- the accessory in the accessory according to any one of the eleventh to thirteenth aspects, is detachably connected to the second accessory that is electrically connected to the second transmission line,
- the first communication unit transmits a third clock pulse signal to the second accessory via the fourth accessory contact when the second accessory is attached to the accessory, and when the second accessory is attached to the accessory, It is preferable to transmit / receive a third data signal synchronized with the third clock pulse signal to / from the second accessory via the fifth accessory contact.
- an accessory includes a camera body including a first body contact, a second body contact, a third body contact, a fourth body contact, a fifth body contact, and a sixth body contact;
- An accessory that is used in a camera system having an interchangeable lens that is detachably attached to a body, and that is detachably attached to at least the interchangeable lens.
- a first lens contact connected to one body contact, a second lens contact connected to a second body contact when the interchangeable lens is mounted on the camera body, and a second when the interchangeable lens is mounted on the camera body.
- a first communication unit that communicates with the camera body using a plurality of first transmission lines, and when a predetermined condition is satisfied, each of the plurality of second transmission lines is connected to a fourth lens contact and a fourth body contact.
- a second communication unit that communicates with the camera body using The accessory includes a first accessory contact connected to the fifth lens contact when attached to the interchangeable lens, and a second accessory contact connected to the sixth lens contact when attached to the interchangeable lens; A communication unit that communicates with the interchangeable lens using the first accessory contact and the second accessory contact, and communication with the interchangeable lens by the communication unit when the interchangeable lens starts communication with the camera body using the second communication unit. And a shut-off unit that shuts off.
- the camera body can be attached to and detached from an accessory including a first accessory contact, a second accessory contact, a third accessory contact, a fourth accessory contact, a fifth accessory contact, and a sixth accessory contact.
- a first body contact connected to the first accessory contact when attached to the accessory, and a second body contact connected to the second accessory contact when attached to the accessory And a third body contact connected to the third accessory contact when attached to the accessory, a fourth body contact connected to the fourth accessory contact when attached to the accessory, and attached to the accessory And a fifth accessory contact connected to the fifth accessory contact and a sixth accessory contact when attached to the accessory.
- a sixth body contact connected to each other, a plurality of first transmission lines between each of the first accessory contact and the first body contact, between the second accessory contact and the second body contact, and a third accessory contact;
- a first communication unit that is formed between the third body contacts and communicates with the accessory using the plurality of first transmission lines; and when a predetermined condition is satisfied, each of the plurality of second transmission lines is connected to the fourth accessory.
- the plurality of first transmission lines and the plurality of first transmission lines are formed between the contact and the fourth body contact, between the fifth accessory contact and the fifth body contact, and between the sixth accessory contact and the sixth body contact, respectively.
- a second communication unit that communicates with the accessory using the second transmission line, and a switching unit that switches communication with the camera body from communication by the first communication unit to communication by the second communication unit when a predetermined condition is satisfied.
- the first communication unit The read / write signal is transmitted / received between the first accessory contact and the first body contact, the first clock pulse signal is transmitted to the second accessory contact via the second body contact, and the read / write signal is the first truth.
- the first data signal synchronized with the first clock pulse signal is transmitted to the third accessory contact through the third body contact, and the read / write signal is different from the first truth value.
- the first data signal is received from the third accessory contact via the third body contact, and the second communication unit communicates between the first accessory contact and the first body contact.
- a read / write signal is transmitted and received, and a first inverted signal complementary to the read / write signal is transmitted and received between the fourth accessory contact and the fourth body contact, and the second access is made via the second body contact.
- a second clock pulse signal having a frequency higher than that of the first clock pulse signal is transmitted to the sari contact, and a second inverted signal complementary to the second clock pulse signal is sent to the fifth accessory via the fifth body contact.
- the second data signal synchronized with the second clock pulse signal is transmitted to the third accessory contact via the third body contact.
- a third inverted signal complementary to the second data signal is transmitted to the sixth accessory contact via the sixth body contact, and the read / write signal corresponds to the second truth value.
- the second data signal is received from the third accessory contact via the third body contact, and the third inverted signal is received from the sixth accessory contact via the sixth body contact. That.
- the communication between the camera body and the accessory can be speeded up.
- 1 is a block configuration diagram of a digital camera system including an interchangeable lens (accessory) and a camera body according to a first embodiment of the present invention. It is a block diagram which shows the communication between the camera body and interchangeable lens (accessory) by the 1st Embodiment of this invention. It is a block diagram regarding the communication control circuit which outputs a signal to each communication contact of the camera body and interchangeable lens (accessory) by the 1st Embodiment of this invention. It is an example of the flowchart regarding a communication operation. It is an example of the timing chart at the time of a high-speed communication start.
- FIG. 1 is a schematic block diagram of a digital camera system including an accessory and a camera body according to the first embodiment of the present invention.
- a digital camera system 1 in FIG. 1 includes an interchangeable lens 100 and a camera body 200.
- the interchangeable lens 100 is a kind of accessory, and includes a lens-side microcomputer 110, a lens-side storage unit 115, a lens-side mount unit 120, and a lens-side contact group 130.
- the camera body 200 includes a body side microcomputer 210, a body side storage unit 215, a body side mount unit 220, and a body side contact group 230.
- the interchangeable lens 100 and the camera body 200 have a number of configurations such as an image sensor other than the configuration illustrated in FIG.
- the interchangeable lens 100 is detachably attached to the camera body 200 via the lens side mount portion 120.
- the lens side mount part 120 is detachably attached to the body side mount part 220 of the camera body 200.
- FIG. 1 illustrates a state in which the lens side mount unit 120 is attached to the body side mount unit 220.
- the lens side contact group 130 is electrically connected to the body side contact group 230.
- the lens-side microcomputer 110 and the body-side microcomputer 210 communicate via the lens-side contact group 130 and the body-side contact group 230 when executing various processes such as a camera shake correction process and an autofocus process.
- the lens-side microcomputer 110 transmits lens information, a signal indicating that camera shake correction processing is being performed, or the like to the body-side microcomputer 210 via the lens-side contact group 130 and the body-side contact group 230.
- the body side microcomputer 210 transmits information on the focal position of the focus lens 140 to the lens side microcomputer 110.
- the lens-side microcomputer 110 drives the focus lens 140 by controlling the focus lens driving unit 141 based on the received information regarding the focal position of the focus lens 140.
- the lens information includes various information related to the lens such as an open F value, and specification information related to a signal output method and a transmission method that can be implemented by the interchangeable lens 100 via the lens side contact group 130. Details of the signal output method and transmission method that can be implemented by the interchangeable lens 100 will be described later.
- the lens-side storage unit 115 is a non-volatile storage medium such as a flash memory, and stores a control program executed when the lens-side microcomputer 110 controls the interchangeable lens 100, lens information, and the like.
- the body side storage unit 215 is a nonvolatile storage medium such as a flash memory, and stores a control program executed when the body side microcomputer 210 controls the camera body 200.
- FIG. 2 is a diagram showing an electrical connection between the lens side microcomputer 110 and the body side microcomputer 210 via the lens side contact group 130 and the body side contact group 230.
- the lens side microcomputer 110 has a lens side first communication contact group 111 and a lens side second communication contact group 112.
- the lens side first communication contact group 111 includes, for example, a CLK1 terminal, a DATA1 terminal, and an R / W1 terminal.
- the lens side second communication contact group 112 includes, for example, a CLK2 terminal, a DATA2 terminal, and an R / W2 terminal.
- the body side microcomputer 210 includes a body side first communication contact group 211 and a body side second communication contact group 212.
- the body-side first communication contact group 211 includes the same terminals as the lens-side first communication contact group 111, that is, the CLK1 terminal, the DATA1 terminal, and the R / W1 terminal.
- the body-side second communication contact group 212 includes the same terminals as the lens-side second communication contact group 112, that is, the CLK2 terminal, the DATA2 terminal, and the R / W2 terminal.
- the lens-side first communication contact group 111, the body-side first communication contact group 211, and the lens-side second communication contact group 112 are used in a conventional digital camera system.
- FIGS. 11A and 11B show examples of electrical connections between the interchangeable lens and the camera body in the conventional digital camera, respectively.
- an interchangeable lens 600 having a lens side first communication contact group 111 and a lens side second communication contact group 112 is mounted on a camera body 700 having a body side first communication contact group 211.
- the interchangeable lens 600 is connected to the camera body 700 with the intermediate adapter 800 interposed.
- the CLK1 terminal of the lens-side first communication contact group 111 and the CLK1 terminal of the body-side first communication contact group 211 are electrically connected, and two A transmission line is formed between the CLK1 terminals.
- the DATA1 terminal of the lens side first communication contact group 111 is electrically connected to the DATA1 terminal of the body side first communication contact group 211
- the R / W1 terminal of the lens side first communication contact group 111 is the body side first.
- the communication line group 211 is electrically connected to the R / W1 terminal, and a transmission line is formed between the two terminals.
- the CLK1 terminals of the lens-side first communication contact group 111 and the body-side first communication contact group 211 perform half-duplex data communication.
- the DATA1 terminals and the R / W1 terminals of the lens-side first communication contact group 111 and the body-side first communication contact group 211 also perform half-duplex data communication.
- the CLK2 terminal of the lens-side second communication contact group 112 and the CLK2 terminal of the body-side second communication contact group 212 are electrically connected, and two CLK2s are connected.
- a transmission line is formed between the terminals.
- the DATA2 terminal of the lens side second communication contact group 112 is electrically connected to the DATA2 terminal of the body side second communication contact group 212
- the R / W2 terminal of the lens side second communication contact group 112 is the body side first.
- the two communication contact groups 212 are electrically connected to the R / W2 terminal, and a transmission line is formed between the two terminals.
- the CLK2 terminals of the lens-side second communication contact group 112 and the body-side second communication contact group 212 perform half-duplex data communication.
- the DATA2 terminals and the R / W2 terminals of the lens side second communication contact group 112 and the body side second communication contact group 212 also perform half-duplex data communication.
- the camera body 200 has a battery 240.
- the output power of the battery 240 is fed to the entire camera body 200 via the DC / DC converter 250.
- the output power of the DC / DC converter 250 is also supplied to the interchangeable lens 100 via the lens side contact group 130 and the body side contact group 230. Power is supplied to each part of the interchangeable lens 100 such as the lens side microcomputer 110 via the DC / DC converter 150.
- FIG. 3 is a schematic block diagram of a communication control circuit that inputs and outputs signals to the lens side first communication contact group 111 and the lens side second communication contact group 112 shown in FIG.
- the communication control circuit illustrated in FIG. 3 is built in the lens side microcomputer 110.
- the communication control circuit connected to the body-side first communication contact group 211 and the body-side second communication contact group 212 is the same as in FIG.
- the communication control circuit includes each terminal of the lens-side first communication contact group 111 and the lens-side second communication contact group 112 (CLK1 terminal, DATA1 terminal, R / W1 terminal, CLK2 terminal, DATA2 terminal, Each R / W2 terminal) includes a first communication circuit 300, a second communication circuit 301, and a switch 302.
- Each of the switching devices 302 switches or cuts off (disconnects, opens, opens, sets to a Hi-Z state) communication circuits (first communication circuit 300 and second communication circuit 301) connected to each terminal. Switching by each of the switches 302 is performed according to a switching signal output from the switching control circuit 303.
- the first communication circuit 300 has an open drain (open collector) type signal output circuit.
- the second communication circuit 301 has a CMOS type signal output circuit.
- the second communication circuit 301 can output a clock pulse signal having a pulse frequency larger (faster) than that of the first communication circuit 300.
- the specification information included in the lens information described above includes an open drain (open collector) type and a CMOS type as signal output methods that the interchangeable lens 100 can implement.
- the lens side second communication between the lens side first communication contact group 111 and the body side first communication contact group 211 is performed.
- Single-ended communication is performed between the communication contact group 112 and the body-side second communication contact group 212.
- the terminals of the lens side first communication contact group 111 and the terminals of the body side first communication contact group 211 Differential transmission lines using the transmission lines between the terminals and the transmission lines between the terminals of the lens-side second communication contact group 112 and the terminals of the body-side second communication contact group 212 as differential transmission lines. Perform communication of the method.
- the specification information included in the lens information described above includes a single-end method and a differential transmission method as transmission methods that can be implemented by the interchangeable lens 100.
- the DATA1 terminal and the DATA2 terminal are terminals for inputting / outputting (transmitting / receiving) binarized data.
- the signal levels of the DATA1 terminal and DATA2 terminal are 0 level (L level, Low level) or 1 level (H level, High level).
- the CLK1 terminal is a terminal for inputting / outputting (transmitting / receiving) a clock pulse signal.
- the data output to the DATA1 terminal is synchronized with the clock pulse signal at the CLK1 terminal.
- the CLK2 terminal is a terminal for inputting / outputting (transmitting / receiving) a clock pulse signal.
- the data output to the DATA2 terminal is synchronized with the clock pulse signal at the CLK2 terminal.
- clock pulse signals are individually input / output at the CLK1 terminal and the CLK2 terminal.
- an inverted signal complementary to the clock pulse signal of the CLK1 terminal is inputted / outputted to / from the CLK2 terminal.
- the clock pulse signal input / output in the differential transmission type communication using the second communication circuit 301 is pulsed more than the clock pulse signal input / output in the single-end type communication using the first communication circuit 300.
- Large frequency (short pulse period) In communication using the second communication circuit 301, the pulse frequency of the clock pulse signal can be increased by using a CMOS type signal output circuit or using a differential transmission method. That is, the differential transmission type communication using the second communication circuit 301 can perform data communication at a speed several to ten times higher than the single-end type communication using the first communication circuit 300.
- the R / W1 terminal and the R / W2 terminal are terminals for inputting / outputting (transmitting / receiving) a read / write signal used for read / write control (data input / output control) of the microcomputer.
- the signal levels of the R / W1 terminal and the R / W2 terminal are L level (Low level) or H level (High level).
- read / write signals independent from each other are input / output at the R / W1 terminal and the R / W2 terminal.
- the lens side microcomputer 110 When the read / write signal level of the R / W1 terminal is L level, the lens side microcomputer 110 outputs data to the DATA1 terminal.
- the body side microcomputer 210 When the read / write signal level at the R / W1 terminal is H level, the body side microcomputer 210 outputs data to the DATA1 terminal.
- the lens side microcomputer 110 outputs data to the DATA2 terminal.
- the body side microcomputer 210 outputs data to the DATA2 terminal.
- an inverted signal complementary to the read / write signal of the R / W1 terminal is inputted / outputted to / from the R / W2 terminal.
- the read / write signal level at the R / W1 terminal is L level
- the read / write signal level at the R / W2 terminal is H level.
- the lens side microcomputer 110 outputs data to the DATA1 terminal and outputs an inverted signal of the data to the DATA2 terminal.
- the read / write signal level at the R / W1 terminal is H level
- the read / write signal level at the R / W2 terminal is L level.
- the body side microcomputer 210 outputs data to the DATA1 terminal and outputs an inverted signal of the data to the DATA2 terminal.
- the reception (input) microcomputer receives the pulse signal between the CLK1 terminals and the pulse signal between the CLK2 terminals as a pair of differential signals.
- the receiving-side microcomputer receives the pulse signal between the DATA1 terminals and the pulse signal between the DATA2 terminals as a pair of differential signals, A pulse signal between the R / W1 terminals and a pulse signal between the R / W2 terminals are received as a pair of differential signals.
- FIG. 4A is a flowchart regarding the communication operation of the digital camera 1.
- the body side microcomputer 210 to which the power is supplied proceeds to the operation of step S1 and starts executing an initial communication operation, which will be described in detail later.
- step S1 In the course of this initial communication operation, supply of power from the camera body 200 toward the interchangeable lens 100 is started.
- the lens-side microcomputer 110 to which the power is supplied proceeds to the operation of step S2, and executes an initial communication operation described in detail later.
- the body side microcomputer 210 and the lens side microcomputer 110 determine the signal output method and the transmission method used in the steady communication operation in the process of the initial communication operation executed in steps S1 and S2. In step S3 and step S4, the body side microcomputer 210 and the lens side microcomputer 110 perform steady communication using the signal output method and the transmission method determined in the course of the initial communication operation.
- FIG. 4B is a flowchart regarding the initial communication operation executed in step S1 and step S2 in FIG.
- the body side microcomputer 210 to which power is supplied initializes each part of the camera body 200.
- the body-side microcomputer 210 switches each of the switches 302 so that the first communication circuit 300 is connected to each terminal of the body-side first communication contact group 211 and each body-side second communication contact group 212.
- the switch 302 is switched so that the communication circuit connected to the terminal is cut off (disconnected, opened, opened, or put into the Hi-Z state).
- the reason for not switching to the second communication circuit 301 from the beginning is that an interchangeable lens that is detachably attached to the camera body 200 may not have the lens-side second communication contact group 112.
- step S20 the body side microcomputer 210 starts supplying power to the interchangeable lens 100 via the DC / DC converter 250.
- the lens-side microcomputer 110 of the interchangeable lens 100 that has received the power supply starts the initial communication operation in step S2 in FIG. 4A and starts the operation in step S100.
- step S100 the lens side microcomputer 110 starts control of each part of the interchangeable lens 100 and initializes communication.
- the lens side microcomputer 110 switches the switch 302 of the lens side microcomputer 110 so that the first communication circuit 300 is connected to each terminal of the lens side first communication contact group 111 and the lens side second communication contact group 112.
- the lens-side microcomputer 110 proceeds to the operation of step S110 and performs an initialization operation of a drive system such as the focus lens drive unit 141.
- step S ⁇ b> 30 the body side microcomputer 210 transmits a lens information request command to the interchangeable lens 100 using the body side first communication contact group 211.
- step S120 the lens side microcomputer 110 receives the lens information request command using the lens side first communication contact group 111.
- the lens-side microcomputer 110 proceeds to the operation of step S130, and transmits a correction parameter request command using the lens-side second communication contact group 112.
- the correction parameters include, for example, an optical path length corrected by the intermediate lens when an intermediate adapter is connected between the interchangeable lens and the camera body, as shown in FIG.
- the lens-side microcomputer 110 proceeds to the operation of step S140 and waits for reception of the correction parameter for a predetermined time. In the first embodiment, since the intermediate adapter is not connected, the lens side microcomputer 110 does not receive the correction parameter and times out.
- the lens-side microcomputer 110 proceeds to the operation of step S150, and uses the lens-side first communication contact group 111 to store the lens information (including the above-described specification information) stored in the lens-side storage unit 115. 200.
- the body side microcomputer 210 receives lens information (including the above-described specification information) using the body side first communication contact group 211.
- the body-side microcomputer 210 recognizes that communication using the first communication contact group has been established with the interchangeable lens 100 by receiving the lens information.
- step S45 the body side microcomputer 210 analyzes the specification information included in the lens information received in step S40, and determines whether or not the interchangeable lens 100 is compatible with high-speed communication.
- the specification information includes information on the CMOS type signal output method and information on the differential transmission method
- the body side microcomputer 210 determines that the interchangeable lens 100 is a high-speed communication compatible lens, and affirms step S45. judge.
- the specification information does not include information on the CMOS type signal output method or information on the differential transmission method
- the body side microcomputer 210 makes a negative determination in step S45.
- the determination in step S45 is affirmative, the body side microcomputer 210 determines to perform the communication using the CMOS type and differential transmission method, that is, the communication using the second communication circuit 301 in the steady communication, and the operation of step S50. Proceed to
- step S45 the body side microcomputer 210 decides to perform communication using the open drain type and single end system, that is, communication using the first communication circuit 300 in the steady communication, and FIG. ) And the steady communication operation is started.
- step S ⁇ b> 50 the body side microcomputer 210 transmits a communication switching command to the lens side microcomputer 110 using the body side first communication contact group 211.
- step S ⁇ b> 160 the lens side microcomputer 110 receives a communication switching command using the lens side first communication contact group 111. Thereafter, the lens-side microcomputer 110 proceeds to the operation of step S170, and transmits a blocking command for the intermediate adapter using the lens-side second communication contact group 112. In the first embodiment, since the intermediate adapter is not connected between the interchangeable lens 100 and the camera body 200, this cutoff command is not received.
- the lens-side microcomputer 110 proceeds to the operation of step S180, and transmits a start signal to the camera body 200 using the lens-side first communication contact group 111. Thereafter, the lens side microcomputer 110 proceeds to the operation of step S190, and the switch 302 of the lens side first communication contact group 111 and the lens side second communication contact group 112 so that the second communication circuit 301 is connected to each terminal. Switch each of the.
- step S ⁇ b> 60 the body side microcomputer 210 receives the start signal using the body side first communication contact group 211. Thereafter, the body side microcomputer 210 proceeds to the operation of step S70, and switches the communication circuit connected to each terminal of the body side first communication contact group 211 and the body side second communication contact group 212 to the second communication circuit 301 side. .
- the lens-side microcomputer 110 and the body-side microcomputer 210 perform differential transmission communication using the first communication contact groups 111 and 211 and the second communication contact groups 112 and 212.
- the interchangeable lens 100 and the camera body 200 transmit and receive various types of information such as information on the focal position of the focus lens 140 at high speed through this differential transmission system communication.
- FIG. 5 is an example of a timing chart of signal levels of the respective terminals of the lens side first communication contact group 111 and the lens side second communication contact group 112 after step S180 in FIG.
- time T120, time T130, and time T140 are illustrated.
- the lens-side microcomputer 110 executes step S180 in FIG. 4B.
- the lens side microcomputer 110 changes the read / write signal level of the R / W1 terminal to the L level using the first communication circuit 300 in order to transmit the start signal to the body side microcomputer 210.
- the lens side microcomputer 110 uses the first communication circuit 300, the lens side microcomputer 110 outputs a clock signal to the CLK1 terminal and outputs a start signal to the DATA1 terminal.
- “01000000” is transmitted as an example of the start signal.
- the start signal is indicated by 8 bits, but the bit length of the start signal may be 16 bits or 32 bits, and is arbitrarily determined.
- the lens side microcomputer 110 executes step S190 in FIG. 4B, and the body side microcomputer 210 executes step S70 in FIG.
- both the lens side microcomputer 110 and the body side microcomputer 210 connect the second communication circuit 301 to the respective terminals of the lens side first communication contact group 111 and the lens side second communication contact group 112.
- the lens-side microcomputer 110 and the body-side microcomputer 210 perform differential transmission communication using the first communication contact groups 111 and 211 and the second communication contact groups 112 and 212. Specifically, after time T140, the inverted signal of the output signal of the R / W1 terminal is output to the R / W2 terminal, the inverted signal of the output signal of the CLK1 terminal is output to the CLK2 terminal, and the DATA1 terminal is connected to the DATA1 terminal. An inverted signal “10011111” of the output signal “01100000” is output.
- the clock pulse signal output to the CLK1 terminal after time T140 has a pulse frequency higher than that of the clock pulse signal before time T140 (before switching to the second communication circuit 301). large.
- the H level signal level of each terminal is shown to be the same level after time T140 and before time T140, but after switching to the second communication circuit 301 (after time T140).
- the H level signal level may be reduced. As a result, the time required for the rise and fall of the output signal is shortened, and the communication speed can be further increased.
- FIG. 6 is a schematic block diagram of a digital camera system including an accessory and a camera body according to the second embodiment of the present invention.
- the digital camera system 2 of FIG. 6 includes an interchangeable lens 100 and a camera body 200, and includes an intermediate adapter 400 between the interchangeable lens 100 and the camera body 200. Since the configurations of the interchangeable lens 100 and the camera body 200 are the same as those in the first embodiment, description of the configurations is omitted. Since the intermediate adapter 400 is inserted between the interchangeable lens 100 and the camera body 200, the high-speed communication start operation is different from that of the first embodiment.
- the intermediate adapter 400 is a kind of accessory, and includes a front mount unit 410, a rear mount unit 420, a front contact group 430, a rear contact group 440, an adapter-side microcomputer 450, and an adapter storage unit 451.
- the lens side mount 120 of the interchangeable lens 100 is detachably attached to the front mount 410.
- the body side mount part 220 of the camera body 200 is detachably attached to the rear mount part 420.
- the front contact group 430 is electrically connected to the lens side contact group 130.
- the rear contact group 440 is electrically connected to the body side contact group 230. Since each terminal of the front contact group 430 and each terminal of the rear contact group 440 are electrically connected, each terminal of the lens side microcomputer 110 and each terminal of the body side microcomputer 210 connect the intermediate adapter 400. Connected through.
- the adapter storage unit 451 is a non-volatile storage medium such as a flash memory, and stores correction parameters such as an optical path length that is corrected when the intermediate adapter 400 is attached.
- FIG. 7 is a diagram showing an electrical connection among the lens side microcomputer 110, the body side microcomputer 210, and the adapter side microcomputer 450.
- the lens side microcomputer 110 includes a lens side first communication contact group 111 and a lens side second communication contact group 112.
- the adapter-side microcomputer 450 includes a CLK2 terminal, a DATA2 terminal, and an R / W2 terminal for communication with the lens-side second communication contact group 112.
- the CLK2 terminal of the lens side microcomputer 110 is electrically connected to the CLK2 terminal of the body side microcomputer 210 and the adapter side microcomputer 450.
- the DATA2 terminal of the lens side microcomputer 110 is electrically connected to the DATA2 terminal of the body side microcomputer 210 and the adapter side microcomputer 450.
- the R / W2 terminal of the lens side microcomputer 110 is electrically connected to the R / W2 terminal of the body side microcomputer 210 and the adapter side microcomputer 450.
- the camera body 200 has a battery 240.
- the output power of the battery 240 is fed to the entire camera body 200 via the DC / DC converter 250. Further, the output power of the DC / DC converter 250 is fed not only to the interchangeable lens 100 but also to the intermediate adapter 400 via the body side contact group 230 and the rear contact group 440.
- FIG. 8 is a schematic block diagram of a communication control circuit connected to each terminal (CLK 2 terminal, DATA 2 terminal, and R / W 2 terminal) of the adapter-side microcomputer 450.
- the communication control circuit in FIG. 8 is built in the adapter-side microcomputer 450.
- the first communication circuit 300 is connected to each terminal of the adapter-side microcomputer 450 with the switch 304 interposed therebetween.
- Each switch 304 is opened and closed simultaneously according to a switching signal output from the switching control circuit 305.
- the switch 304 is opened, the first communication circuit 300 is disconnected from each terminal of the adapter-side microcomputer 450 (disconnected, opened, opened, put into the Hi-Z state), and communication with the intermediate adapter 400 is disconnected. .
- the CLK2 terminals, the DATA2 terminals, and the R / W2 terminals of the lens side microcomputer 110 and the body side microcomputer 210 are connected to each other.
- FIG. 9A is a flowchart regarding the communication operation of the digital camera 2.
- the power of the camera body 200 is turned on, power is supplied to each part of the camera body 200 including the body side microcomputer 210.
- the body side microcomputer 210 to which the power is supplied proceeds to the operation of step S5, and starts execution of the initial communication operation described in detail later.
- step S6 power supply from the camera body 200 starts not only for the interchangeable lens 100 but also for the intermediate adapter 400.
- the lens side microcomputer 110 to which the power is supplied proceeds to the operation of step S6, and executes an initial communication operation whose details will be described later.
- the adapter side microcomputer 450 to which the power is supplied proceeds to the operation of step S7 and executes the initial communication operation.
- step S7 executes the initial communication operation.
- the communication operation ends.
- the body side microcomputer 210 and the lens side microcomputer 110 determine the signal output method and the transmission method used in the steady communication operation in the process of the initial communication operation executed in steps S5 and S6.
- step S8 and step S9 the body side microcomputer 210 and the lens side microcomputer 110 perform steady communication using the signal output method and the transmission method determined in the course of the initial communication operation.
- FIG. 9B is a flowchart regarding the initial communication operation executed in step S8 and step S9 in FIG.
- the same reference numerals are given to the flows representing the same operations as those in FIG. 4B, and the description thereof is omitted.
- step S220 the body side microcomputer 210 starts supplying power to the interchangeable lens 100 and the intermediate adapter 400 via the DC / DC converter 250.
- step S410 the adapter-side microcomputer 450 of the intermediate adapter 400 to which the power is supplied performs communication initialization.
- the adapter-side microcomputer 450 closes the switch 304 and connects the first communication circuit 300 to each terminal.
- step S330 the lens side microcomputer 110 transmits a correction parameter request command using the lens side second communication contact group 112, similarly to step S130. Thereafter, the lens-side microcomputer 110 proceeds to the operation of step S340 and waits for reception of the correction parameter until a predetermined time elapses after the correction parameter request command is transmitted.
- step S420 the adapter side microcomputer 420 receives the correction parameter request command transmitted in step S340.
- step S ⁇ b> 430 the adapter side microcomputer 420 transmits the correction parameter stored in the adapter side storage unit 451 to the interchangeable lens 100.
- the lens-side microcomputer 110 that has been in a reception waiting state for the correction parameter in step S340 receives the correction parameter transmitted in step S430. Thereby, the lens side microcomputer 110 recognizes that communication with the intermediate adapter 400 is established using the second communication contact group 112.
- step S350 the lens side microcomputer 110 corrects the lens information (including the above-described specification information) stored in the lens side storage unit 115 based on the correction parameter received in step S340, and then the corrected lens information. Is transmitted to the camera body 200 using the lens side first communication contact group 111.
- step S ⁇ b> 370 the lens side microcomputer 110 transmits a blocking command for the intermediate adapter using the lens side second communication contact group 112.
- step S440 the adapter side microcomputer 420 receives the shut-off command for the intermediate adapter.
- step S450 the adapter side microcomputer 420 opens the switch 304 and shuts off the first communication circuit 300 from each terminal.
- the first communication circuit 300 of the adapter side microcomputer 450 is cut off from the contact point, when the differential transmission system communication is started between the lens side microcomputer 110 and the body side microcomputer 210, a signal for differential transmission is used.
- the intermediate adapter 400 will not malfunction.
- FIGS. 12A and 12B are schematic block diagrams of a digital camera system including an accessory and a camera body according to the third embodiment of the present invention.
- a digital camera system 3 shown in FIGS. 12A and 12B includes an interchangeable lens 3100 and a camera body 3200, and includes an intermediate adapter 3400 between the interchangeable lens 3100 and the camera body 3200.
- the interchangeable lens 3100 is a kind of accessory, and includes a lens-side microcomputer 3110, a lens-side storage unit 3115, a lens-side mount unit 120, and a lens-side contact group 3130.
- the camera body 3200 includes a body side microcomputer 3210, a body side storage unit 3215, a body side mount unit 220, and a body side contact group 3230. Note that the interchangeable lens 3100 and the camera body 3200 have a number of configurations such as an imaging element in addition to the configurations illustrated in FIGS.
- the intermediate adapter 3400 is a kind of accessory, and includes a front mount unit 410, a rear mount unit 420, a front contact group 3430, a rear contact group 3440, an adapter-side microcomputer 3450, and an adapter storage unit 3451.
- the lens side mount 120 of the interchangeable lens 3100 is detachably attached to the front mount 410 of the intermediate adapter 3400.
- the body side mount 220 of the camera body 3200 is detachably attached to the rear mount 420 of the intermediate adapter 3400.
- 12A the front mount portion 410 of the intermediate adapter 3400 is attached to the lens side mount portion 120 of the interchangeable lens 3100, and the rear mount portion 420 of the intermediate adapter 3400 is attached to the body side mount portion 220 of the camera body 3200. This is shown in the figure.
- FIG. 12B shows a state where the body side mount portion 220 of the camera body 3200 is attached to the lens side mount portion 120 of the interchangeable lens 3100.
- the front contact group 3430 is electrically connected to the lens side contact group 3130.
- the rear contact group 3440 is electrically connected to the body side contact group 3230.
- Each terminal of the front contact group 3430 and each terminal of the rear contact group 440 are electrically connected inside the intermediate adapter 3400. Therefore, the lens side contact group 3130 and the body side contact group 3230 are electrically connected via the intermediate adapter 3400.
- the lens side microcomputer 3110 and the body side microcomputer 3210 communicate using the lens side contact group 3130 and the body side contact group 3230.
- the lens-side microcomputer 3110 transmits lens information, a signal indicating that camera shake correction processing is being performed, and the like to the body-side microcomputer 3210.
- the body side microcomputer 3210 transmits information regarding the focal position of the focus lens 140 to the lens side microcomputer 3110.
- the lens side microcomputer 3110 and the body side microcomputer 3210 perform communication while switching between a plurality of signal output methods and a plurality of transmission methods.
- the plurality of signal output systems include an open drain type and a CMOS type
- the plurality of transmission systems include a single end system and a differential transmission system.
- the lens side storage unit 3115 is a nonvolatile storage medium such as a flash memory, and stores a control program executed when the lens side microcomputer 3110 controls the interchangeable lens 3100, lens information, and the like.
- the lens information includes specification information regarding a signal output method and a transmission method that can be implemented by the interchangeable lens 3100 using the lens side contact group 3130, in addition to various types of information regarding the lens such as an open F value.
- the body side storage unit 3215 is a nonvolatile storage medium such as a flash memory, and stores a control program executed when the body side microcomputer 3210 controls the camera body 200.
- the body-side storage unit 3215 includes information on a signal output method and a transmission method that can be implemented by the camera body 3200 using the body-side contact portion 3230.
- the adapter storage unit 3451 is a non-volatile storage medium such as a flash memory, and stores correction parameters such as an optical path length that is corrected when the intermediate adapter 3400 is attached.
- FIG. 13 is a diagram schematically illustrating a plan view of the body-side mount unit 220.
- a body side holding part 3231 is provided in the vicinity of the body side mounting part 220 of the camera body 3200, and eleven terminals included in the body side contact group 3230 are held by the body side holding part 3231.
- eleven terminals held by the body side holding portion 3231 are BB terminal, BI terminal, BC terminal, BJ terminal, BD terminal, BK terminal, BE terminal, BH terminal, BA from the left in the figure. Terminals, BF terminals, and BG terminals.
- the BA terminal, BF terminal, and BG terminal are power supply terminals
- the BB terminal, BC terminal, BD terminal, BE terminal, BH terminal, BI terminal, BJ terminal, and BK terminal are communication terminals.
- the body side microcomputer 3210 transmits the type of signal transmitted / received using each terminal for communication and the communication method performed using each terminal for communication (for example, one piece Direction communication, half-duplex communication). The details of the control related to the signal type and communication method by the body side microcomputer 3210 will be described later.
- FIG. 14 is a diagram schematically showing a plan view of the lens-side mount unit 120.
- a lens side holding part 3131 is provided in the vicinity of the lens side mounting part 120 of the interchangeable lens 3100, and eleven terminals included in the lens side contact group 3130 are held in the lens side holding part 3131.
- the lens side holding portion 3131 has LB terminals, LI terminals, LC terminals, LJ terminals, LD terminals, LK terminals, LE corresponding to the 11 terminals held by the body side holding portion 3231, respectively.
- the terminal, LH terminal, LA terminal, LF terminal, and LG terminal are held.
- FIG. 15 is a diagram schematically illustrating a plan view of the front mount portion 410 of the intermediate adapter 3400.
- a front holding portion 3431 for holding eleven terminals included in the front contact group 3430 is provided in the vicinity of the front mount portion 410 of the intermediate adapter 3400.
- the front holding portion 3431 includes an FB terminal, an FI terminal, an FC terminal, an FJ terminal, an FD terminal, an FK terminal, an FE terminal, an FH terminal, an FA terminal, an FF terminal, and an FG terminal.
- FIG. 16 is a diagram schematically showing a plan view of the rear mount portion 420 of the intermediate adapter 3400.
- a rear holding portion 3441 for holding eleven terminals included in the rear contact group 3440 is provided in the vicinity of the rear mount portion 420 of the intermediate adapter 3400.
- the rear holding unit 3441 has an RB terminal, an RI terminal, an RC terminal, an RJ terminal, an RD terminal, an RK terminal, an RE terminal, an RH terminal, an RA terminal, an RF terminal, and an RG terminal. .
- FIG. 17 is a diagram illustrating a configuration related to communication of the interchangeable lens 3100, the camera body 3200, and the intermediate adapter 3400 and their electrical connections.
- FIG. 17 shows a body side microcomputer 3210, a body side contact group 3230, a DC / DC converter 3250, and a battery 240 in the configuration of the camera body 3200.
- the body side microcomputer 3210 includes communication control circuits 3211a to 3211d.
- Communication control circuits 3211a to 3211d are circuits for executing communication based on the control of the body side microcomputer 3210.
- the communication control circuit 3211a is connected to the BB terminal and the BI terminal of the body side contact group 3230, and executes communication using the BB terminal and the BI terminal.
- the BC terminal and BJ terminal of the body side contact group 3230 are connected to the communication control circuit 3211b
- the BD terminal and BK terminal of the body side contact group 3230 are connected to the communication control circuit 3211c
- the communication control circuit 3211d is connected to the communication control circuit 3211d.
- the BE terminal and BH terminal of the body side contact group 3230 are connected.
- the BA terminal, BF terminal, and BG terminal of the body side contact group 3230 are connected to the DC / DC converter 3250.
- the DC / DC converter 3250 transforms the output voltage of the battery 240 to generate an input voltage V1 to the microcomputer or the like and an input voltage V2 to the drive system such as the focus lens drive unit 141 or the like.
- the input voltage V1 to the microcomputer or the like is applied to the body side microcomputer 3210 and the like, and is output to the intermediate adapter 3400 and the interchangeable lens 3100 via the BA terminal of the body side holding unit 3231.
- the input voltage V2 to the drive system is output to the intermediate adapter 3400 and the interchangeable lens 3100 via the BF terminal of the body side holding part 3231.
- the BG terminal is connected to the DC / DC converter 3250 as a ground terminal that forms a pair with the BF terminal.
- the lens side microcomputer 3110 includes communication control circuits 3111a to 3111d.
- the communication control circuits 3111a to 3111d are circuits for executing communication based on the control of the lens side microcomputer 3110.
- the communication control circuit 3111a is connected to the LB terminal and the LI terminal of the lens side contact group 3130, and executes communication using the LB terminal and the LI terminal.
- the LC terminal and the LJ terminal of the lens side contact group 3130 are connected to the communication control circuit 3111b
- the LD terminal and the LK terminal of the lens side contact group 3130 are connected to the communication control circuit 3111c
- the communication control circuit 3111d is connected to the communication control circuit 3111d.
- Each of these communication control circuits 3111b to 3111d performs communication using each terminal connected thereto.
- the LA terminal, LF terminal, and LG terminal of the lens side contact group 3130 are connected to the DC / DC converter 3150.
- the DC / DC converter 3150 applies the input voltage input via the LA terminal to the lens side microcomputer 3110.
- the DC / DC converter 3150 supplies the power supplied via the LF terminal and the LG terminal to a drive system such as the focus lens drive unit 141.
- a front contact group 3430 As for the intermediate adapter 3400, a front contact group 3430, a rear contact group 3440, an adapter side microcomputer 3450, and signal control circuits 3451a and 3451b are shown in FIG.
- the FA terminal of the front contact group 3430 is connected to the RA terminal of the rear contact group 3440.
- the FB to FK terminals of the front contact group 3430 are connected to the RB to RK terminals of the rear contact group 3440.
- the signal control circuit 3451a is connected between the FI-RI terminals
- the signal control circuit 3451b is connected between the FJ-RJ terminals.
- the signal control circuit 3451a communicates with the lens side microcomputer 3110 via the FI terminal, and the signal control circuit 3451b communicates with the lens side microcomputer 3110 via the FJ terminal.
- the signal control circuit 3451a and the signal control circuit 3451b correspond to communication in which the signal output method is an open drain type and the transmission method is a single end method.
- FIG. 18 is an example of a circuit diagram of the communication control circuit 3111a.
- the communication control circuits 3111b to 3111d and the communication control circuits 3211a to 3211d have the same circuit as the circuit shown in FIG. As shown in FIG.
- the communication control circuit 3111a includes NOT elements X1 to X4, NAND elements X5 and X6, NOR elements X7 and X8, AND elements X9 and X10, OR element X11, buffer circuits X12 and X13, operational amplifier P1, p-channel metal oxide semiconductor field effect transistors (MOSFETs) Q1 to Q4, n-channel metal oxide semiconductor field effect transistors (MOSFETs) Q5 and Q6, and resistors R1 and R2.
- the metal oxide semiconductor field effect transistor is simply referred to as a field effect transistor.
- the communication control circuit 3111a receives input parameters called Pull-up Enable1, Pull-up Enable2, Send DATA1, Send DATA2, Send Disable1, Output Disable2, and Send DATA SW from the lens side microcomputer 3110, respectively.
- Each input parameter takes a value of either L level or H level.
- the L level is a signal level corresponding to the truth value False (false, 0), and is a signal voltage of 0.8 V or less, for example.
- the H level is a signal level corresponding to the truth value True (true, 1) and is, for example, a signal voltage of about 0.5 times or more of the power supply voltage Vdd.
- one of these input parameters is provided for each of the communication control circuits 3111a to 3111d, and the lens side microcomputer 3110 can individually control each of the communication control circuits 3111a to 3111d.
- one input parameter is provided for each of the communication control circuits 3211a to 3211d, and the body side microcomputer 3210 can individually control each of the communication control circuits 3211a to 3211d.
- the communication control circuit 3111a has a connection terminal IN / OUT1 connected to the LB terminal of the lens side contact group 3130 and a connection terminal IN / OUT2 connected to the LI terminal of the lens side contact group 3130.
- the connection terminal IN / OUT1 is used as an output terminal when the lens side microcomputer 3110 transmits a signal via the LB terminal, and is used as an input terminal when the lens side microcomputer 3110 receives a signal via the LB terminal.
- the communication control circuits 3111b to 3111d (not shown) have a connection terminal IN / OUT1 and a connection terminal IN / OUT2, and are connected to each terminal of the lens side contact group 3130.
- connection terminal IN / OUT1 is connected to the LC terminal of the lens side contact group 3130, and the connection terminal IN / OUT2 is connected to the LJ terminal of the lens side contact group 3130.
- the communication control circuit 3211a similarly has a connection terminal IN / OUT1 and a connection terminal IN / OUT2, and the connection terminal IN / OUT1 is connected to the BB terminal of the body side contact group 3230, and the connection terminal IN / OUT OUT2 is connected to the BI terminal of the body side contact group 3230.
- the communication control circuits 3211b to 3211d (not shown) have a connection terminal IN / OUT1 and a connection terminal IN / OUT2, and are connected to each terminal of the body side contact group 3230 as shown in FIG. .
- Receive DATA1, Receive DATA2, and Receive DATA3 are signals received by the communication control circuit 3111a via the connection terminal IN / OUT1 and the connection terminal IN / OUT2.
- the communication control circuits 3111b to 3111b and the communication control circuits 3211a to 32d also have Receive DATA1, Receive DATA2, and Receive DATA3.
- the input parameter Pull-up Enable1 is input to the gate of the field effect transistor Q3.
- the field effect transistor Q3 is turned on, and when the input parameter Pull-up Enable1 is at H level, the field effect transistor Q3 is turned off.
- the input parameter Send DATA1 is input to the NOT element X2, the NAND element X5, and the NOR element X7.
- the input parameter Output Disable1 is input to the NOT element X1 and the NOR element X7.
- the input parameter Pull-up Enable2 is input to the gate of the field effect transistor Q6.
- the field effect transistor Q6 is turned on when the input parameter Pull-up Enable2 is at L level, and the field effect transistor Q6 is turned off when the input parameter Pull-up Enable2 is at H level.
- the input parameter Send DATA2 is input to the AND element X9.
- the input parameter Output Disable2 is input to the NOT element X4 and the NOR element X8.
- the input parameter Send DATA SW is input to the NOT element X3 and the AND element X10.
- the input parameter Send DATA SW is set to the H level when the signal control circuit 3111a starts signal output by the differential transmission method.
- the NOT element X1 outputs a value obtained by inverting (logical negation) the input parameter Output Disable1 to the NAND element X5.
- the NOT element X2 outputs a value obtained by inverting (logic negation) the input parameter Send DATA1 to the AND element X10.
- the NOT element X3 outputs a value obtained by inverting (logic negation) the input parameter Send DATA SW to the AND element X9.
- the NOT element X4 outputs a value obtained by inverting (logical negation) the input parameter Output Disable2 to the NAND element X6.
- the NAND element X5 calculates a negative logical product using the input parameter Send DATA1 and the calculation result of the NOT element X1 as inputs. The calculation result is output to the gate of the field effect transistor Q1.
- the NAND element X6 calculates a negative logical product using the logical OR operation result of the OR element X11 and the logical negation operation result of the NOT element X4 as inputs. The calculation result is output to the gate of the field effect transistor Q4.
- the NOR element X7 calculates a negative OR with the input parameter Send DATA1 and the input parameter Output Disable1 as inputs. The calculation result is output to the field effect transistor Q2.
- the NOR element X8 calculates a negative logical sum with the logical OR calculation result of the OR element X11 and the input parameter Output Disable2 as inputs. The calculation result is output to the field effect transistor Q5.
- the AND element X9 calculates a logical product using the input parameter Send DATA2 and the logical negation result of the NOT element X3 as inputs.
- the calculation result is output to the OR element X11.
- the AND element X10 calculates a logical product using the input parameter Send DATA SW and the NOT operation result of the NOT element X2 as inputs.
- the calculation result is output to the OR element X11.
- the OR element X11 calculates a logical sum using the calculation result of the AND element X9 and the calculation result of the AND element X10 as inputs.
- the calculation result is output to the NAND element X6 and the NOR element X8.
- the buffer circuit X12 outputs the data input via the connection terminal IN / OUT1 to the Receive DATA1, and also inputs it to the operational amplifier P1 as a non-inverting input (+).
- the buffer circuit X13 outputs the data input through the connection terminal IN / OUT2 to the Receive DATA2, and inputs the data to the operational amplifier P1 as an inverting input ( ⁇ ).
- the field effect transistor Q1 has a drain connected to the power supply voltage Vdd and a source connected to the connection terminal IN / OUT1.
- a NAND operation result is input from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 performs a switching operation between the power supply voltage Vdd and the connection terminal IN / OUT1.
- the drain of the field effect transistor Q2 is connected to the power supply voltage Vdd, and the source is connected to the connection terminal IN / OUT1 via the resistor R1.
- the input parameter Pull-up Enable1 is input to the gate of the field effect transistor Q2, and the field effect transistor Q2 performs a switching operation between the power supply voltage Vdd and the connection terminal IN / OUT1.
- the resistor R1 is used as a pull-up resistor.
- the field effect transistor Q3 has its drain connected to the power supply voltage Vdd and its source connected to the connection terminal IN / OUT2.
- a NAND operation result is input from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 performs a switching operation between the power supply voltage Vdd and the connection terminal IN / OUT2.
- the drain of the field effect transistor Q4 is connected to the power supply voltage Vdd, and the source is connected to the connection terminal IN / OUT2 via the resistor R2.
- the input parameter Pull-up Enable2 is input to the gate of the field effect transistor Q4, and the field effect transistor Q4 performs a switching operation between the power supply voltage Vdd and the connection terminal IN / OUT2.
- the resistor R2 is used as a pull-up resistor.
- the drain of the field effect transistor Q5 is connected to the connection terminal IN / OUT2, and the source is grounded.
- the result of the negative OR operation is input from the NOR element X7 to the gate of the field effect transistor Q5.
- the field effect transistor Q5 is turned on, the connection terminal IN / OUT1 is pulled down via the field effect transistor Q5.
- the drain of the field effect transistor Q6 is connected to the connection terminal IN / OUT2, and the source is grounded.
- the result of the negative OR operation is input from the NOR element X8 to the gate of the field effect transistor Q6.
- the field effect transistor Q6 is turned on, the connection terminal IN / OUT2 is pulled down via the field effect transistor Q6.
- the resistor R1 When the field effect transistor Q2 is on, the resistor R1 is connected when the field effect transistor Q5 is off and the potential of the connection terminal IN / OUT1 is H level, and is connected when the field effect transistor Q5 is on.
- the potential of the terminal IN / OUT1 is set to be L level.
- the resistor R2 When the field effect transistor Q4 is on, the resistor R2 is connected when the field effect transistor Q6 is off and the potential of the connection terminal IN / OUT2 is H level, and when the field effect transistor Q6 is on, the resistor R2 is connected.
- the potential of the terminal IN / OUT2 is set to be L level.
- the operational amplifier P1 is used as an amplifier arranged at the receiving end of the differential transmission, the output terminal of the buffer circuit X12 is connected to the non-inverting input, and the output terminal of the buffer circuit X13 is connected to the inverting input.
- the operational amplifier P1 outputs the difference obtained by subtracting the inverting input from the non-inverting input as a signal Receive DATA3 transmitted by differential transmission.
- Communication pattern (1) Open drain type, single-ended communication pattern (2) CMOS type, single-ended communication pattern (3) CMOS type, differential transmission method
- FIG. 19 shows signal transmission / reception performed on the transmission line between the communication terminals for each of the communication patterns (1) to (3).
- the communication pattern (1) will be described.
- the transmission line formed between the LB terminal of the lens side contact group 3130 and the BB terminal of the body side contact group 3230 (between the LB and BB terminals) read / write is performed between the lens side microcomputer 3110 and the body side microcomputer 3210.
- Half-duplex communication for transmitting / receiving the signal R / W3 is performed.
- the clock pulse signal CLK3 is sent from the body side microcomputer 3210 to the lens side microcomputer 3110.
- One-way communication for transmission is performed.
- a data signal is transmitted between the lens side microcomputer 3110 and the body side microcomputer 3210.
- Half-duplex communication for transmitting and receiving DATA3 is performed.
- the data signal DATA3 includes various commands, responses to those commands, lens information, and the like.
- the lens-side microcomputer 3110 When the lens-side microcomputer 3110 outputs the data signal DATA3, the L-level read / write signal R / W3 is transmitted between the LB and BB terminals, and then the data signal DATA3 is output between the LD and BD terminals. At this time, the body side microcomputer 3210 receives the data signal DATA3. When the body-side microcomputer 3110 outputs the data signal DATA3, the H-level read / write signal R / W3 is transmitted between the LB and BB terminals, and then the data signal DATA3 is output between the LD and BD terminals. At this time, the lens side microcomputer 3110 receives the data signal DATA3. The data signal DATA3 transmitted / received between the LD-BD terminals is synchronized with the clock pulse signal CLK3.
- a pulse signal indicating the state of the focus lens 140 from the LE terminal to the BE terminal Is output in real time.
- the transmission line formed between the LH terminal of the lens side contact group 3130 and the BH terminal of the body side contact group 3230 (between the LH and BH terminals) is the same as between the LE and BE terminals.
- the lens side microcomputer 3110 uses the LI terminal and the LJ terminal for communication with the adapter side microcomputer 3450.
- the lens side microcomputer 3110 transmits the clock pulse signal CLK4 from the LI terminal of the lens side contact group 3130 to the intermediate adapter 3430 by one-way communication.
- the lens side microcomputer 3110 performs half-duplex communication for transmitting and receiving the data signal DATA4 to and from the intermediate adapter 3430 via the LJ terminal of the lens side contact group 3130.
- the lens side microcomputer 3110 and the body side microcomputer 3210 transmit and receive signals between the LK terminal of the lens side contact group 3130 and the BK terminal of the body side contact group 3230 (between the LK-BK terminals). Not performed.
- FIG. 20 shows settings of the signal control circuits 3111a to 3111d when performing communication of the communication pattern (1).
- FIG. 21 shows settings of the signal control circuits 3211a to 3211d when performing communication of the communication pattern (1).
- the body side microcomputer 3210 is on the transmission side.
- the lens side microcomputer 3110 is assumed to be the transmission side.
- FIG. 22 shows the settings of the signal control circuits 3111a and 3111c of the lens side microcomputer 3110 when the lens side microcomputer 3110 is the transmission side in the half-duplex communication between the lens side microcomputer 3110 and the body side microcomputer 3210.
- FIG. 22 shows the settings of the signal control circuits 3211a and 3211c of the body side microcomputer 3210 when the lens side microcomputer 3110 is the transmission side in the half-duplex communication between the lens side microcomputer 3110 and the body side microcomputer 3210. Is also shown.
- FIG. 22 also shows the setting of the signal control circuit 3111b of the lens side microcomputer 3110 when the lens side microcomputer 3110 is the receiving side in the half duplex communication between the lens side microcomputer 3110 and the adapter side microcomputer 3450. ing.
- NC described in FIG. 20, FIG. 21, and FIG. 22 is an abbreviation for “No Care” and represents that the input signal may be L level or H level.
- the description “Don't Care” represents an output signal that does not affect the operation of the microcomputer among the output signals to the microcomputer.
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable1 to the L level for each of the signal control circuits 3111a to 3111d. Therefore, the field effect transistor Q2 shown in FIG. 18 is turned on, and the connection terminal IN / OUT1 is pulled up.
- the lens side microcomputer 3110 sets the input parameter Output Disable1 to the H level for each of the signal control circuits 3111a to 3111c. Therefore, in each of the signal control circuits 3111a to 3111c, an L level output signal is output from the NOR element X7 to the gate of the field effect transistor Q5, and the field effect transistor Q5 is turned off. In each of the signal control circuits 3111a to 3111c, the output of the NOT element X1 becomes L level, an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is Turns off. That is, the lens side microcomputer 3110 sets each of the signal control circuits 3111a to 3111c so that both the field effect transistors Q1 and Q5 are turned off.
- the lens side microcomputer 3110 uses the connection terminals IN / OUT1 of these signal control circuits 3111a to 3111c as reception terminals.
- the output of the buffer circuit X12 of the signal control circuits 3111a to 3111 is at the H level
- the lens side microcomputer 3110 is at the H level as Receive DATA1.
- Receive a signal When the potential of each connection terminal IN / OUT1 of the signal control circuits 3111a to 3111c is L level, the output of the buffer circuit X12 becomes L level, and the lens side microcomputer 3110 receives an L level signal as Receive DATA1.
- the lens side microcomputer 3110 receives the read / write signal R / W3, the clock pulse signal CLK3, and the data signal DATA3 as Receive DATA1 from the signal control circuits 3111a to 3111c.
- the lens side microcomputer 3110 sets the input parameter Send DATA1 to the L level. Therefore, in the signal control circuit 3111d, an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is turned off.
- the lens side microcomputer 3110 outputs a pulse signal indicating the state of the focus lens 140 to the signal control circuit 3111d as an input parameter Output Disable1.
- the NOR element X7 performs a negative OR operation using the pulse signal and the L level signal input as the input parameter Send DATA1.
- an inverted signal of the pulse signal is output from the NOR element X7 to the gate of the field effect transistor Q5.
- the field effect transistor Q5 of the signal control circuit 3111d is turned off.
- the connection terminal IN / OUT1 of the signal control circuit 3111d is pulled up, the signal level of the connection terminal IN / OUT1 becomes the H level as in the case of the pulse signal.
- the output of the buffer circuit X12 of the signal control circuit 3111d becomes H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA1 from the signal control circuit 3111d.
- the field effect transistor Q5 of the signal control circuit 3111d is turned on.
- the connection terminal IN / OUT1 of the signal control circuit 3111d is pulled down, the signal level of the connection terminal IN / OUT1 becomes the L level as with the pulse signal.
- the output of the buffer circuit X12 of the signal control circuit 3111d becomes L level, and the lens-side microcomputer 3110 receives an L level signal as receiving DATA1 from the signal control circuit 3111d.
- the lens-side microcomputer 3110 inputs the input parameters Pull-up Enable1 and Send DATA1 to the signal control circuit 3111d so that an open drain type signal is output toward the connection terminal IN / OUT1 of the signal control circuit 3111d. Are set to the L level. Then, the lens side microcomputer 3110 inputs a pulse signal to the signal control circuit 3111d as an input parameter Output Disable1, and outputs the pulse signal from the connection terminal IN / OUT1 to the LE terminal by an open drain type signal output method. The pulse signal is transmitted to the body side microcomputer 3210 via the transmission line between the LE and BE terminals, and is input again to the lens side microcomputer 3110 via the buffer circuit X12 of the signal control circuit 3111d.
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable2 to the L level for the signal control circuits 3111a to 3111d. Therefore, the field effect transistor Q4 incorporated in each of the signal control circuits 3111a to 3111d is turned on, and the connection terminal IN / OUT2 is pulled up.
- the lens side microcomputer 3110 sets the input parameters Send DATA2 and Send DATA SW to the L level for each of the signal control circuits 3111a, 3111b, 3111d. Therefore, in each of the signal control circuits 3111a, 3111b, 3111d, the outputs of the AND elements X9 and X10 are both at L level, and the output of the OR element X11 is at L level. In each of the signal control circuits 3111a, 3111b, and 3111d, an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 is turned off.
- the lens side microcomputer 3110 outputs output signals of the clock pulse signal CLK4, the data signal DATA4, and the pulse signal as the input parameter Output Disable2 to each of the signal control circuits 3111a, 3111b, and 3111d.
- the NOR element X8 performs a negative OR operation using the L level signal input from the OR element X11 and those signals output as the input parameter Output Disable2 as inputs. I do.
- an inverted signal of the output signal input as the input parameter Output Disable2 is output from the NOR element X8 to the gate of the field effect transistor Q6.
- the field effect transistor Q6 is turned off when the signal output as the input parameter Output Disable2 is at the H level.
- the signal level of each connection terminal IN / OUT2 becomes H level, which is the same level as the signal output as the input parameter Output Disable2.
- the output of each buffer circuit X13 of the signal control circuits 3111a, 3111b, 3111d also becomes H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA2 from each of the signal control circuits 3111a, 3111b, 3111d. To do.
- the field effect transistor Q6 is turned on when the signal output as the input parameter Output Disable2 is at L level.
- the signal level of each connection terminal IN / OUT2 becomes L level, which is the same level as the signal output as the input parameter Output Disable2.
- the output of each buffer circuit X13 of the signal control circuits 3111a, 3111b, 3111d becomes L level, and the lens side microcomputer 3110 receives L level signals as receiving DATA2 from each of the signal control circuits 3111a, 3111b, 3111d. To do.
- the lens-side microcomputer 3110 sets the input parameters Pull-up Enable2, Send DATA2, and Send DATA SW to the L level with respect to the signal control circuits 3111a, 3111b, 3111d, respectively.
- the signal control circuits 3111a, 3111b, and 3111d are set so that an open drain type signal output is performed toward OUT2.
- the lens side microcomputer 3110 inputs the clock pulse signal CLK4, the data signal DATA4, and the pulse signal as input parameters Output Disable2 to the signal control circuits 3111a, 3111b, and 3111d, respectively, and opens the drain type from the connection terminal IN / OUT2. These signals are output to the LI terminal, LJ terminal, and LH terminal, respectively.
- the clock pulse signal CLK4 and the data signal DATA4 are transmitted to the adapter side microcomputer 3450 via the LI terminal and the LJ terminal.
- the pulse signal is transmitted to the body side microcomputer 3210 via the transmission line between the LH and BH terminals. Further, the clock pulse signal CLK4, the data signal DATA4, and the pulse signal are re-input to the lens side microcomputer 3110 through the buffer circuits X13 of the signal control circuits 3111a, 3111b, and 3111d.
- the lens side microcomputer 3110 sets the input parameter Output Disable2 to the H level for the signal control circuit 3111c. Therefore, in the signal control circuit 3111c, an L level output signal is output from the NOR element X8 to the gate of the field effect transistor Q6, and the field effect transistor Q6 is turned off. In the signal control circuit 3111c, the output of the NOT element X4 becomes L level, an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 is turned off. . That is, the lens side microcomputer 3110 sets the field control transistors Q6 and Q3 to be in an off state with respect to the signal control circuit 3111c. as a result. An open drain type signal output is not performed from the signal control circuit 3111c.
- the body side microcomputer 3210 sets the input parameter Pull-up Enable1 to the L level for each of the signal control circuits 3211a to 3211d. Therefore, the field effect transistor Q2 incorporated in each of the signal control circuits 3211a to 3211d is turned on, and the connection terminal IN / OUT1 is pulled up.
- the body side microcomputer 3210 sets the input parameter Send DATA1 to the L level for each of the signal control circuits 3211a to 3211c. Therefore, in each of the signal control circuits 3211a to 3211c, an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is turned off.
- the body side microcomputer 3210 outputs the read / write signal R / W3, the clock pulse signal CLK3, and the data signal DATA3 as the input parameter Output Disable1 to each of the signal control circuits 3211a to 3211c.
- the NOR element X7 performs a negative OR operation using these signals and an L level signal input as the input parameter Send DATA1.
- an inverted signal of the signal input as the input parameter Output Disable1 is output from the NOR element X7 to the gate of the field effect transistor Q5.
- the body side microcomputer 3210 sets the input parameters Pull-up Enable1 and Send DATA1 to the L level for each of the signal control circuits 3211a to 3211c, so that the connection terminals IN / OUT1 of the signal control circuits 3211a to 32c are connected to each other.
- An open drain type signal is output.
- the body-side microcomputer 3210 inputs the read / write signal R / W3, the clock pulse signal CLK3, and the data signal DATA3 as input parameters Output Disable1 to each of the signal control circuits 3211a to 3211c and opens them from the connection terminals IN / OUT1. These signals are output to the BB terminal, BC terminal, and BD terminal by a drain type signal output system.
- These signals are transmitted to the lens-side microcomputer 3110 via transmission lines between the LB-BB terminals, between the LC-BC terminals, and between the LD-BD terminals, and are received as Receive DATA1 of each of the signal control circuits 3111a to 3111c. Received. Further, each buffer circuit X12 of the signal control circuits 3211a to 3211c outputs these signals to the body side microcomputer 3210. The body side mount unit 3210 receives these signals as Receive DATA1.
- the body side microcomputer 3210 sets the input parameter Output Disable1 to the H level for the signal control circuit 3211d. Therefore, in the signal control circuit 3211d, an L level output signal is output from the NOR element X7 to the gate of the field effect transistor Q5, and the field effect transistor Q5 is turned off. In the signal control circuit 3211d, the output of the NOT element X1 becomes L level, an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is turned off. . That is, the body side microcomputer 3210 sets the field control transistors Q1 and Q5 to the signal control circuit 3211d so that both are turned off.
- the body side microcomputer 3210 uses the connection terminal IN / OUT1 of the signal control circuit 3211d as a receiving terminal.
- the buffer circuit X12 of the signal control circuit 3211d has the same level as the pulse signal.
- the body side microcomputer 3210 receives the signal output from the buffer circuit X12 of the signal control circuit 3211d as Receive DATA1.
- the body side microcomputer 3210 sets the input parameter Pull-up Enable2 to the L level for each of the signal control circuits 3211c and 3211d. Therefore, the field effect transistor Q4 incorporated in each of the signal control circuits 3211c and 3211d is turned on, and the connection terminal IN / OUT2 is pulled up.
- the body side microcomputer 3210 sets the input parameter Output Disable2 to the H level for each of the signal control circuits 3211a to 3211d. Therefore, in each of the signal control circuits 3211a to 3211d, an L level output signal is output from the NOR element X8 to the gate of the field effect transistor Q6, and the field effect transistor Q6 is turned off. In each of the signal control circuits 3211a to 3211d, the output of the NOT element X4 becomes L level, an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 is Turns off.
- the body side microcomputer 3210 sets each of the signal control circuits 3211a to 3211d so that the field effect transistors Q6 and Q3 are both turned off. As a result, open drain type signal output is not performed from each of the signal control circuits 3211a to 3211d.
- the body side microcomputer 3210 also uses the connection terminal IN / OUT2 of the signal control circuit 3211d as a reception terminal.
- the buffer circuit X13 of the signal control circuit 3211d has the same level as the pulse signal.
- the body side microcomputer 3210 receives the signal output from the buffer circuit X13 of the signal control circuit 3211d as Receive DATA2.
- the lens side microcomputer 3110 is set as the transmission side in the half-duplex communication between the lens side microcomputer 3110 and the body side microcomputer 3210 will be described.
- the lens side microcomputer 3110 performs control similar to the control for the signal control circuit 3111d illustrated in FIG. 20 to the signal control circuit 3111a.
- the signals input as the input parameter Output Disable 1 and the input parameter Output Disable 2 are changed from the pulse signal to the read / write signal R / W 3 and the clock pulse signal CLK 4, respectively.
- the lens side microcomputer 3110 performs the same control as the control for the signal control circuit 3211c shown in FIG.
- the body side microcomputer 3210 performs control similar to the control for the signal control circuit 3111c shown in FIG. 20 by the lens side microcomputer 3110 for the signal control circuits 3211a and 3211c. However, for the signal control circuit 3211a, the signal input as the input parameter Output Disable2 is changed from the data signal DATA3 to the read / write signal R / W3.
- the lens side microcomputer 3110 When the lens side microcomputer 3110 is set as the reception side, that is, when the adapter side microcomputer 3450 is set as the transmission side, the lens side microcomputer 3110 performs the same control as the control for the signal control circuit 3211d shown in FIG. against. However, the signals received as Receive DATA1 and Receive DATA2 are changed to the clock pulse signal CLK3 and the data signal DATA4, respectively.
- communication pattern (2) the signal output method is switched from the open drain type to the CMOS type, and communication method is performed between LB-BB terminals, between LD-BD terminals, between LI-BI terminals, and between LJ-BJ terminals. Switch from half-duplex communication to one-way communication. Specifically, between the LB and BB terminals, the body side microcomputer 3210 transmits the read / write signal R / W3 by one-way communication from the BB terminal to the LB terminal. Between the LD and BD terminals, the body side microcomputer 3210 transmits the data signal DATA3 by one-way communication from the BD terminal to the LD terminal.
- the lens side microcomputer 3110 transmits a read / write signal R / W5 by one-way communication from the LI terminal to the BI terminal. Between the LJ-BJ terminals, the lens side microcomputer 3110 transmits the data signal DATA5 by one-way communication from the LJ terminal to the BJ terminal.
- the body side microcomputer 3210 When outputting the data signal DATA3 from the BD terminal to the LD terminal, the body side microcomputer 3210 outputs the data signal DATA3 from the BD terminal to the LD terminal after outputting the L level read / write signal R / W3 to the BB terminal.
- the data signal DATA3 is synchronized with the clock pulse signal CLK3 transmitted from the BC terminal to the LC terminal by the body side microcomputer 3210.
- the lens side microcomputer 3110 When outputting the data signal DATA5 from the LJ terminal to the BJ terminal, the lens side microcomputer 3110 outputs the data signal DATA5 from the LJ terminal to the BJ terminal after outputting the H level read / write signal R / W5 to the LI terminal.
- the data signal DATA5 is synchronized with the clock pulse signal CLK3 transmitted from the BC terminal to the LC terminal by the body side microcomputer 3210.
- the adapter side microcomputer 3450 of the intermediate adapter 3400 cuts off the connection between the LI-BI terminals and the connection between the LJ-BJ terminals (disconnected, open, open, Hi-Z state) to prevent malfunction. ).
- FIG. 23 shows settings of the signal control circuits 3111a to 3111d when performing communication of the communication pattern (2).
- FIG. 24 shows the settings of the signal control circuits 3211a to 3211d when performing communication of the communication pattern (2).
- the lens side microcomputer 3110 sets the input parameter Output Disable1 to the H level for each of the signal control circuits 3111a to 3111c. Therefore, in each of the signal control circuits 3111a to 3111c, an L level output signal is output from the NOR element X7 to the gate of the field effect transistor Q5, and the field effect transistor Q5 is turned off. In each of the signal control circuits 3111a to 3111c, the output of the NOT element X1 becomes L level, an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is Turns off. That is, the lens side microcomputer 3110 sets each of the signal control circuits 3111a to 3111c so that both the field effect transistors Q1 and Q5 are turned off.
- the lens side microcomputer 3110 uses the connection terminals IN / OUT1 of these signal control circuits 3111a to 3111c as reception terminals.
- the output of the buffer circuit X12 of the signal control circuits 3111a to 3111 is at the H level
- the lens side microcomputer 3110 is at the H level as Receive DATA1.
- Receive a signal When the potential of each connection terminal IN / OUT1 of the signal control circuits 3111a to 3111c is L level, the output of the buffer circuit X12 becomes L level, and the lens side microcomputer 3110 receives an L level signal as Receive DATA1.
- the lens side microcomputer 3110 receives the read / write signal R / W3, the clock pulse signal CLK3, and the data signal DATA3 as Receive DATA1 from the signal control circuits 3111a to 3111c.
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable2 to the H level for each of the signal control circuits 3111a and 3111b. Therefore, field effect transistor Q2 incorporated in each of signal control circuits 3111a and 3111b is turned off.
- the lens side microcomputer 3110 outputs an output signal such as a read / write signal R / W5 and a data signal DATA5 as the input parameter Send DATA2 to the signal control circuits 3111a and 3111b. Then, the lens-side microcomputer 3110 sets the input parameter Send DATA SW to the L level for the signal control circuits 3111a and 3111b.
- an H level signal is output from the NOT element X3 of the signal control circuits 3111a and 3111b to the AND element X9, and the same output signal as the input parameter Send DATA2 is output from the AND element X9 to the OR element X11. Is done. Since the input parameter Send DATA SW is at the L level, an L level signal is output from the AND element X10 to the OR element X11. The OR element X11 outputs the same signal as the output signal input as the input parameter Send DATA2 to the NAND element X6 and the NOR element X8 based on the inputs from the AND elements X9 and X10.
- the lens side microcomputer 3110 sets the input parameter Output Disable2 to the L level for each of the signal control circuits 3111a and 3111b.
- an H level signal is output from NOT element X4 to NAND element X6.
- NAND element X6 a NAND operation is performed with the signal input from the OR element X11 and the H level signal input from the NOT element X4 as inputs.
- the NAND element X6 outputs an inverted signal of the output signal input as the input parameter Send DATA2 to the gate of the field effect transistor Q3.
- NOR elements X8 of the signal control circuits 3111a and 3111b a negative OR operation is performed with the signal input from the OR element X11 and the input parameter Output Disable2 at L level as inputs.
- the NOR element X8 outputs an inverted signal of the output signal input as the input parameter Send DATA2 to the gate of the field effect transistor Q6.
- each of the signal control circuits 3111a and 3111b when the signal input as the input parameter Send DATA2 is at the H level, the field effect transistor Q3 is turned on and the field effect transistor Q6 is turned off. As a result, the connection terminal IN / OUT2 is connected to the power supply voltage Vdd connected to the drain of the field effect transistor Q3, and the connection terminal IN / OUT2 is pulled up. That is, the signal level of the connection terminal IN / OUT2 of the signal control circuits 3111a and 3111b becomes the same level as the signal input as the input parameter Send DATA2.
- the outputs of the buffer circuits X13 of the signal control circuits 3111a and 3111b also become H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA2 from each of the signal control circuits 3111a and 3111b.
- each of the signal control circuits 3111a and 3111b when the signal input as the input parameter Send DATA2 is at L level, the field effect transistor Q3 is turned off and the field effect transistor Q6 is turned on. As a result, the connection terminal IN / OUT2 is pulled down. That is, the signal level of the connection terminal IN / OUT2 of the signal control circuits 3111a and 3111b becomes the same level as the signal input as the input parameter Send DATA2. Further, the outputs of the buffer circuits X13 of the signal control circuits 3111a and 3111b also become L level, and the lens side microcomputer 3110 receives an L level signal as receiving DATA2 from each of the signal control circuits 3111a and 3111b.
- the field effect transistor Q3 and the field effect transistor Q6 form a CMOS type logic inversion circuit under the control of the lens side microcomputer 3110.
- the lens-side microcomputer 3110 outputs a signal input as the input parameter Send DATA2 from the connection terminal IN / OUT2 by inputting an inverted signal of the signal input as the input parameter Send DATA2 to the logic inversion circuit. That is, the lens-side microcomputer 3110 sets each of the signal control circuits 3111a and 3111b so that CMOS type signal output is performed toward the connection terminals IN / OUT2 of the signal control circuits 3111a and 3111b.
- the signal input as the input parameter Send DATA2 is input again to the lens-side microcomputer 3110 via the buffer circuits X13 of the signal control circuits 3111a and 3111b.
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable2 to the L level for the signal control circuit 3111c. Therefore, the field effect transistor Q4 incorporated in the signal control circuit 3111c is turned on, and the connection terminal IN / OUT2 is pulled up.
- the lens side microcomputer 3110 sets the input parameter Output Disable2 to the H level for the signal control circuit 3111c. Therefore, in the signal control circuit 3111c, an L level output signal is output from the NOR element X8 to the gate of the field effect transistor Q6, and the field effect transistor Q6 is turned off. In the signal control circuit 3111c, the output of the NOT element X4 becomes L level, an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 is turned off. . That is, the body side microcomputer 3210 sets the field control transistors Q6 and Q3 to be in the off state with respect to the signal control circuit 3111c. As a result, no CMOS type signal is output from the signal control circuit 3111c.
- the lens side microcomputer 3110 outputs a pulse signal indicating the state of the focus lens 140 to the signal control circuit 3111d as an input parameter Send DATA1.
- the lens side microcomputer 3110 sets the input parameter Output Disable1 to the L level for the signal control circuit 3111d. Therefore, in the signal control circuit 3111d, an H level signal is output from the NOT element X1 to the NAND element X5.
- the NAND element X5 of the signal control circuit 3111d a NAND operation is performed with the input parameter Send DATA1 and the H level signal input from the NOT element X1 as inputs. As a result, the NAND element X5 outputs an inverted signal complementary to the pulse signal to the gate of the field effect transistor Q1.
- NOR element X7 of the signal control circuit 3111d a negative OR operation is performed with the input parameter Send DATA1 and the L level input parameter Output Disable1 as inputs.
- the NOR element X7 outputs an inverted signal complementary to the pulse signal to the gate of the field effect transistor Q5.
- the signal control circuit 3111d when the output signal output as the input parameter Send DATA1 is H level, the field effect transistor Q1 is turned on and the field effect transistor Q5 is turned off. As a result, the connection terminal IN / OUT1 is connected to the power supply voltage Vdd connected to the drain of the field effect transistor Q1, and the connection terminal IN / OUT1 is pulled up. That is, the signal level of the connection terminal IN / OUT1 of the signal control circuit 3111d becomes the same level as the signal input as the input parameter Send DATA1. Also, the output of the buffer circuit X12 of the signal control circuit 3111d becomes H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA1 from the signal control circuit 3111d.
- the signal control circuit 3111d when the output signal output as the input parameter Send DATA1 is L level, the field effect transistor Q1 is turned off and the field effect transistor Q5 is turned on. As a result, the connection terminal IN / OUT1 is pulled down. That is, the signal level of the connection terminal IN / OUT1 of the signal control circuit 3111d becomes the same level as the signal input as the input parameter Send DATA1. Also, the output of the buffer circuit X12 of the signal control circuit 3111d becomes L level, and the lens-side microcomputer 3110 receives an L level signal as receiving DATA1 from the signal control circuit 3111d.
- the field effect transistor Q1 and the field effect transistor Q5 form a CMOS type logic inversion circuit under the control of the lens side microcomputer 3110.
- the lens side microcomputer 3110 outputs the pulse signal from the connection terminal IN / OUT1 by inputting the inverted signal of the pulse signal input as the input parameter Send DATA1 to this logic inversion circuit. That is, the lens side microcomputer 3110 sets the signal control circuit 3111d so that a CMOS type signal is output from the connection terminal IN / OUT1 of the signal control circuit 3111d.
- the pulse signal is transmitted to the body side microcomputer 3210 via the transmission line between the LE and BE terminals, and is input again to the lens side microcomputer 3110 via the buffer circuit X12 of the signal control circuit 3111d.
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable2 to the H level for the signal control circuit 3111d. Therefore, the field effect transistor Q4 incorporated in the signal control circuit 3111d is turned off.
- the lens side microcomputer 3110 outputs a pulse signal as the input parameter Send DATA2 to the signal control circuit 3111d. Further, the lens side microcomputer 3110 sets the input parameter Output Disable2 and the input parameter Send DATA SW to the L level for the signal control circuit 3111d.
- the NOT element X3 of the signal control circuit 3111d transmits an H level signal to the AND element X9 because the input parameter Send DATA SW is at the L level.
- the AND element X9 performs an AND operation with the input parameter Send DATA2 and the H level signal input from the NOT element X3 as inputs. As a result, the AND element X9 outputs the same signal as the input parameter Send DATA2 to the OR element X11.
- the AND element X10 of the signal control circuit 3111d outputs an L level signal to the OR element X11 because the input parameter Send DATA SW is at the L level.
- the OR element X11 a logical sum operation is performed with the signal output from the AND element X9 and the L level signal output from the AND element X10 as inputs.
- the OR element X11 outputs the same signal as the input parameter Send DATA2 to the NAND element X6 and the NOR element X8.
- the lens side microcomputer 3110 sets the input parameter Output Disable2 to the L level for the signal control circuit 3111d.
- an H level signal is output from the NOT element X4 to the NAND element X6.
- the NAND element X6 of the signal control circuit 3111d a NAND operation is performed with the signal input from the OR element X11 and the H level signal input from the NOT element X4 as inputs. As a result, the NAND element X6 outputs an inverted signal of the output signal input as the input parameter Send DATA2 to the gate of the field effect transistor Q3.
- the NOR element X8 of the signal control circuit 3111d performs a negative OR operation using the same signal as the input parameter Send DATA2 input from the OR element X11 and the input parameter Output Disable2 at L level as inputs. Done. As a result, the NOR element X8 outputs an inverted signal of the output signal input as the input parameter Send DATA2 to the gate of the field effect transistor Q6.
- the signal control circuit 3111d when the output signal output as the input parameter Send DATA2 is H level, the field effect transistor Q3 is turned on and the field effect transistor Q6 is turned off. As a result, IN / OUT2 is connected to the power supply voltage Vdd connected to the drain of the connection terminal field effect transistor Q1, and the connection terminal IN / OUT2 is pulled up. That is, the signal level of the connection terminal IN / OUT2 of the signal control circuit 3111d becomes the same level as the signal input as the input parameter Send DATA2. Also, the output of the buffer circuit X13 of the signal control circuit 3111d becomes H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA2 from the signal control circuit 3111d.
- the signal control circuit 3111d when the output signal output as the input parameter Send DATA2 is L level, the field effect transistor Q3 is turned off and the field effect transistor Q6 is turned on. As a result, the connection terminal IN / OUT2 is pulled down. That is, the signal level of the connection terminal IN / OUT2 of the signal control circuit 3111d becomes the same level as the signal input as the input parameter Send DATA2. Also, the output of the buffer circuit X13 of the signal control circuit 3111d becomes L level, and the lens side microcomputer 3110 receives an L level signal as receiving DATA2 from the signal control circuit 3111d.
- the field effect transistor Q3 and the field effect transistor Q6 form a CMOS type logic inversion circuit under the control of the lens side microcomputer 3110.
- the lens side microcomputer 3110 outputs the pulse signal from the connection terminal IN / OUT2 by inputting the inverted signal of the pulse signal input as the input parameter Send DATA2 to the logic inversion circuit. That is, the lens side microcomputer 3110 sets the signal control circuit 3111d so that a CMOS type signal is output from the connection terminal IN / OUT2 of the signal control circuit 3111d.
- the pulse signal input as the input parameter Send DATA2 is input again to the lens side microcomputer 3110 via the buffer circuit X13 of the signal control circuit 3111d.
- the body side microcomputer 3210 outputs output signals such as a read / write signal R / W3, a clock pulse signal CLK3, and a data signal DATA3 as input parameters Send DATA1 to each of the signal control circuits 3211a to 3211c.
- the body side microcomputer 3210 sets the input parameter Output Disable1 to the L level for each of the signal control circuits 3211a to 3211c.
- an H level signal is output from the NOT element X1 to the NAND element X5.
- a NAND operation is performed with the input parameter Send DATA1 and the H level signal input from the NOT element X1 as inputs.
- the NAND element X5 outputs an inverted signal of the input parameter Send DATA1 to the gate of the field effect transistor Q1.
- each of the NOR elements X7 of the signal control circuits 3211a to 32c a negative OR operation is performed with the input parameter Send DATA1 and the input parameter Output Disable1 as inputs.
- the NOR element X7 outputs an inverted signal of the input parameter Send DATA1 to the gate of the field effect transistor Q5.
- each of the signal control circuits 3211a to 3211c when the output signal output as the input parameter Send DATA1 is at the H level, the field effect transistor Q1 is turned on and the field effect transistor Q5 is turned off. As a result, the connection terminal IN / OUT1 is connected to the power supply voltage Vdd connected to the drain of the field effect transistor Q1, and the connection terminal IN / OUT1 is pulled up. That is, the signal level of each connection terminal IN / OUT1 of the signal control circuits 3211a to 3211c is the same level as the signal input as the input parameter Send DATA1. Further, the output of each buffer circuit X12 of the signal control circuits 3211a to 3211 also becomes H level, and the body side microcomputer 3210 receives an H level signal as Receiving DATA1 from each of the signal control circuits 3211a to 32c.
- each of the signal control circuits 3211a to 3211c when the output signal output as the input parameter Send DATA1 is L level, the field effect transistor Q1 is turned off and the field effect transistor Q5 is turned on. As a result, the connection terminal IN / OUT1 is pulled down. That is, the signal level of each connection terminal IN / OUT1 of the signal control circuits 3211a to 3211c is the same level as the signal input as the input parameter Send DATA1. Further, the output of each buffer circuit X12 of the signal control circuits 3211a to 32c is also at the L level, and the body side microcomputer 3210 receives an L level signal as Receiving DATA1 from each of the signal control circuits 3211a to 32c.
- the field effect transistor Q1 and the field effect transistor Q5 form a CMOS type logic inversion circuit under the control of the body side microcomputer 3210.
- the body side microcomputer 3210 inputs the read / write signal R / W3, the clock pulse signal CLK3, and the inverted signal of the data signal DATA3 input as the input parameter Send DATA1 to the logic inversion circuit, thereby the read / write signal R / W3.
- the clock pulse signal CLK3 and the data signal DATA3 are output from the connection terminals IN / OUT1, respectively.
- the body-side microcomputer 3210 sets the signal control circuits 3211a to 3211c so that CMOS type signal output is performed from the connection terminals IN / OUT1 of the signal control circuits 3211a to 32c.
- the signal input as the input parameter Send DATA1 is re-input to the body side microcomputer 3210 via each buffer circuit X12 of the signal control circuits 3111a to 3111c.
- the body side microcomputer 3210 sets the input parameter Pull-up Enable2 to the L level for each of the signal control circuits 3211a to 3211c. Therefore, the field effect transistor Q4 incorporated in each of the signal control circuits 3211a to 3211c is turned on, and the connection terminal IN / OUT2 is pulled up.
- the body side microcomputer 3210 sets the input parameter Output Disable2 to the H level for each of the signal control circuits 3211a to 3211c. Therefore, in each of the signal control circuits 3211a to 3211c, an L level output signal is output from the NOR element X8 to the gate of the field effect transistor Q6, and the field effect transistor Q6 is turned off. In each of the signal control circuits 3211a to 3211c, the output of the NOT element X4 becomes L level, an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 is Turns off. That is, the body side microcomputer 3210 sets each of the signal control circuits 3211a to 3211c so that both the field effect transistors Q3 and Q6 are turned off.
- the output of the buffer circuit X13 of the signal control circuits 3211a and 3211b is at H level, and the body side microcomputer 3210 is at H level as Receive DATA2.
- Receive a signal When the potential of the connection terminal IN / OUT2 of the signal control circuits 3211a and 3211b is at L level, the output of the buffer circuit X13 of the signal control circuits 3211a and 3211b is at L level, and the body side microcomputer 3210 is at L level as Receive DATA2.
- the body-side microcomputer 3210 receives the read / write signal R / W5 and the data signal DATA5 as Receive DATA2 from the signal control circuits 3211a and 3211b, respectively.
- the body side microcomputer 3210 sets the input parameter Output Disable1 to the H level for the signal control circuit 3211d. Therefore, in the signal control circuit 3211d, an L level output signal is output from the NOR element X7 to the gate of the field effect transistor Q5, and the field effect transistor Q5 is turned off. In the signal control circuit 3211d, the output of the NOT element X1 becomes L level, an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is turned off. . That is, the body side microcomputer 3210 sets the field control transistors Q1 and Q5 to the signal control circuit 3211d so that both are turned off.
- the body side microcomputer 3210 sets the input parameter Pull-up Enable2 to the L level for the signal control circuit 3211d. Therefore, the field effect transistor Q4 incorporated in the signal control circuit 3211d is turned on, and the connection terminal IN / OUT2 is pulled up.
- the body side microcomputer 3210 sets the input parameter Output Disable2 to the H level for the signal control circuit 3211d. Therefore, in the signal control circuit 3211d, an L level output signal is output from the NOR element X7 to the gate of the field effect transistor Q6, and the field effect transistor Q6 is turned off. In the signal control circuit 3211d, the output of the NOT element X4 becomes L level, an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q1, and the field effect transistor Q3 is turned off. . That is, the body side microcomputer 3210 sets the field control transistors Q3 and Q6 to be in an off state with respect to the signal control circuit 3211d.
- the output of the buffer circuit X12 of the signal control circuit 3211d becomes H level, and the body side microcomputer 3210 receives the H level signal as Receive DATA1.
- the output of the buffer circuit X12 becomes L level, and the body side microcomputer 3210 receives the L level signal as Receive DATA1.
- the body side microcomputer 3210 receives a pulse signal as Receive DATA1 from the signal control circuit 3211d.
- the body side microcomputer 3210 receives a pulse signal as Receive DATA2 from the signal control circuit 3211d.
- the communication pattern (3) will be described.
- the communication method for communication between LB-BB terminals, between LD-BD terminals, between LI-BI terminals, between LH-BH terminals, between LI-BI terminals, between LJ-BJ terminals The content of communication performed in is different from the communication pattern (2).
- the use of communication between the LK and BK terminals is greatly different from the communication pattern (1) and the communication pattern (2).
- half-duplex communication is performed in which a reverse signal complementary to the read / write signal R / W3 transmitted / received between the LB-BB terminals is transmitted / received.
- the LI-BI terminal is at the L level
- the LI-BI terminal is at the H level
- the LI-BI terminal is at the L level.
- differential transmission related to the read / write signal R / W3 is performed between the signal control circuit 3111a of the lens side microcomputer 3110 and the signal control circuit 3211a of the body side microcomputer 3210.
- the body side microcomputer 3210 Inverts complementary to the clock pulse signal CLK3 transmitted from the BC terminal to the LC terminal between the LC and BC terminals by one-way communication from the BJ terminal to the LJ terminal. Send a signal. That is, when the LC-BC terminal is at the L level, the LJ-BJ terminal is at the H level, and when the LC-BC terminal is at the H level, the LJ-BJ terminal is the L level. In other words, differential transmission related to the clock pulse signal CLK3 is performed between the signal control circuit 3111b of the lens side microcomputer 3110 and the signal control circuit 3211b of the body side microcomputer 3210.
- half-duplex communication is performed in which an inverted signal complementary to the data signal DATA3 transmitted / received between the LD-BD terminals is transmitted / received. That is, when the LD-BD terminal is at the L level, the LK-BK terminal is at the H level, and when the LD-BD terminal is at the H level, the LK-BK terminal is at the L level.
- differential transmission related to the data signal DATA3 is performed between the signal control circuit 3111c of the lens side microcomputer 3110 and the signal control circuit 3211c of the body side microcomputer 3210.
- FIG. 25 shows the settings of the signal control circuits 3111a to 3111d when performing communication of the communication pattern (3).
- FIG. 26 shows the settings of the signal control circuits 3211a to 3211d when performing communication of the communication pattern (3).
- the lens-side microcomputer 3110 is on the transmission side for half-duplex communication between the lens-side microcomputer 3110 and the body-side microcomputer 3210.
- the adapter-side microcomputer 3450 of the intermediate adapter 3400 blocks the connection between the LI-BI terminals and the connection between the LJ-BJ terminals in order to prevent malfunction (disconnected, open, open, Hi-Z state) ).
- the lens-side microcomputer 3110 outputs output signals such as a read / write signal R / W3, a data signal DATA3, and a pulse signal as the input parameter Send DATA1 to each of the signal control circuits 3111a, 3111c, and 3111d.
- the lens side microcomputer 3110 sets the input parameter Output Disable1 to the L level for each of the signal control circuits 3111a, 3111c, 3111d.
- an H level signal is output from the NOT element X1 to the NAND element X5.
- a NAND operation is performed with the input parameter Send DATA1 and the H level signal input from the NOT element X1 as inputs.
- the NAND element X5 outputs an inverted signal complementary to the input parameter Send DATA1 to the gate of the field effect transistor Q1.
- NOR element X7 of the signal control circuits 3111a, 3111c, 3111d a negative OR operation is performed with the input parameter Send DATA1 and the input parameter Output Disable1 as inputs.
- the NOR element X7 outputs an inverted signal complementary to the input parameter Send DATA1 to the gate of the field effect transistor Q5.
- each of the signal control circuits 3111a, 3111c, 3111d when the output signal output as the input parameter Send DATA1 is H level, the field effect transistor Q1 is turned on and the field effect transistor Q5 is turned off. As a result, the connection terminal IN / OUT1 is connected to the power supply voltage Vdd connected to the drain of the field effect transistor Q1, and the connection terminal IN / OUT1 is pulled up. That is, the signal level of the connection terminal IN / OUT1 of the signal control circuit 3111d becomes the same level as the signal input as the input parameter Send DATA1.
- the outputs of the buffer circuits X12 of the signal control circuits 3111a, 3111c, and 3111d also become H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA1 from each of the signal control circuits 3111a, 3111c, and 3111d.
- each of the signal control circuits 3111a, 3111c, 3111d when the output signal output as the input parameter Send DATA1 is at L level, the field effect transistor Q1 is turned off and the field effect transistor Q5 is turned on. As a result, the connection terminal IN / OUT1 is pulled down.
- the output of each buffer circuit X12 of the signal control circuits 3111a, 3111c, 3111d is also at L level, and the lens side microcomputer 3110 receives an L level signal as receiving DATA1 from each of the signal control circuits 3111a, 3111c, 3111d.
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable2 to the H level for each of the signal control circuits 3111a, 3111c, 3111d. Therefore, the field effect transistor Q4 incorporated in each of the signal control circuits 3111a, 3111c, 3111d is turned off.
- the lens side microcomputer 3110 sets the input parameter Send DATA SW to the H level for each of the signal control circuits 3111a, 3111c, 3111d. Therefore, an L level output signal is output from each NOT element X3 of the signal control circuits 3111a, 3111c, 3111d, and an L level output signal is output from the AND element X9.
- each NOT element X2 of the signal control circuits 3111a, 3111c, 3111d outputs an inverted signal of the input parameter Send DATA1 to the AND element X10.
- Each AND element X10 of each of the signal control circuits 3111a, 3111c, 3111d performs a logical product operation using the H level Send DATA SW and the inverted signal of the input parameter Send DATA1 output from the NOT element X2.
- Each AND element X10 of the signal control circuits 3111a, 3111c, 3111d outputs the calculation result, that is, an inverted signal of the input parameter Send DATA1, to the OR element X11.
- Each of the OR elements X11 of the signal control circuits 3111a, 3111c, and 3111d performs an OR operation using the L level signal output from the AND element X9 and the inverted signal of the input parameter Send DATA1 output from the AND element X10. Do.
- the OR element X11 outputs the calculation result, that is, the inverted signal of the input parameter Send DATA1, to the NAND element X6 and the NOR element X8.
- the lens side microcomputer 3110 sets the input parameter Output Disable2 to the L level for each of the signal control circuits 3111a, 3111c, and 3111d.
- an H level signal is output from the NOT element X4 to the NAND element X6.
- the NAND element X6 a NAND operation is performed with the inverted signal of the input parameter Send DATA1 input from the OR element X11 and the H level signal input from the NOT element X4 as inputs.
- the NAND element X6 outputs the output signal input as the input parameter Send DATA1 to the gate of the field effect transistor Q3.
- the NOR element X8 of each of the signal control circuits 3111a, 3111c, 3111d performs a negative OR operation using the inverted signal signal of the input parameter Send DATA1 input from the OR element X11 and the input parameter Output Disable2 of L level as inputs. Done. As a result, the NOR element X8 outputs the output signal input as the input parameter Send DATA1 to the gate of the field effect transistor Q6.
- each of the signal control circuits 3111a, 3111c, and 3111d when the output signal output as the input parameter Send DATA1 is H level, the field effect transistor Q3 is turned off and the field effect transistor Q6 is turned on. As a result, the connection terminal IN / OUT2 is pulled down. That is, the signal level of each connection terminal IN / OUT2 of the signal control circuits 3111a, 3111c, 3111d becomes an inverted signal complementary to the signal input as the input parameter Send DATA1.
- each buffer circuit X13 of the signal control circuits 3111a, 3111c, 3111d is also at L level, and the lens side microcomputer 3110 receives an L level signal as receiving DATA2 from each of the signal control circuits 3111a, 3111c, 3111d. To do.
- each of the signal control circuits 3111a, 3111c, and 3111d when the output signal output as the input parameter Send DATA1 is at L level, the field effect transistor Q6 is turned off and the field effect transistor Q3 is turned on. As a result, the connection terminal IN / OUT2 is connected to the power supply voltage Vdd connected to the drain of the field effect transistor Q3, and the connection terminal IN / OUT2 is pulled up. That is, the signal level of each connection terminal IN / OUT2 of the signal control circuits 3111a, 3111c, 3111d becomes an inverted signal complementary to the signal input as the input parameter Send DATA1.
- each buffer circuit X13 of the signal control circuits 3111a, 3111c, 3111d is also H level, and the lens side microcomputer 3110 receives an H level signal as receiving DATA2 from each of the signal control circuits 3111a, 3111c, 3111d. To do.
- the field effect transistor Q3 and the field effect transistor Q6 form a CMOS type logic inversion circuit under the control of the lens side microcomputer 3110.
- the body-side microcomputer 3210 inputs the read / write signal R / W3, the data signal DATA3, and the pulse signal input as the input parameter Send DATA1 to the logic inversion circuit, whereby the read / write signal R / W3, the data signal DATA3, the pulse An inverted signal complementary to each of the signals is output from the connection terminal IN / OUT2.
- the lens side microcomputer 3110 sets the signal control circuits 3111a, 3111c, and 3111d so that CMOS type signal output is performed from each connection terminal IN / OUT2 of the signal control circuits 3111a, 3111c, and 3111d.
- the inverted signal of the input parameter Send DATA1 is re-input to the body side microcomputer 3210 as Receive DATA2 via the buffer circuits X13 of the signal control circuits 3111a, 3111c, and 3111d.
- the signal input as Receive DATA1, that is, the input parameter Send DATA1, is input to the non-inverting input of each operational amplifier P1 of the signal control circuits 3111a, 3111c, 3111d.
- Receive DATA2, that is, an inverted signal of the input parameter Send DATA1 is input to the inverting input of each operational amplifier P1 of the signal control circuits 3111a, 3111c, 3111d.
- the lens side microcomputer 3110 sets the input parameter Output Disable1 to the H level for the signal control circuit 3111b. Therefore, in the signal control circuit 3111b, an L level output signal is output from the NOR element X7 to the gate of the field effect transistor Q5, and the field effect transistor Q5 is turned off.
- the output of the NOT element X1 becomes L level
- an H level output signal is output from the NAND element X5 to the gate of the field effect transistor Q1, and the field effect transistor Q1 is turned off. .
- the lens side microcomputer 3110 sets the input parameter Pull-up Enable2 to the H level for the signal control circuit 3111b. Therefore, the field effect transistor Q4 incorporated in the signal control circuit 3111b is turned off.
- the lens side microcomputer 3110 sets the input parameter Output Disable2 to the H level for the signal control circuit 3111b. Therefore, in the signal control circuit 3111b, an L level output signal is output from the NOR element X8 to the gate of the field effect transistor Q6, and the field effect transistor Q6 is turned off.
- the output of the NOT element X4 becomes L level
- an H level output signal is output from the NAND element X6 to the gate of the field effect transistor Q3, and the field effect transistor Q3 is turned off. .
- the lens side microcomputer 3110 sets the input parameter Send DATA SW to the H level for the signal control circuit 3111b. By setting the input parameter Send DATA SW to the H level in advance, the lens-side microcomputer 3110 can control switching between transmission and reception of half-duplex communication using only the input parameters Output Disable 1 and Output Disable 2.
- the lens side microcomputer 3110 receives the H level signal as Receive DATA1.
- the output of the buffer circuit X12 becomes L level
- the lens side microcomputer 3110 receives an L level signal as Receive DATA1.
- the lens-side microcomputer 3110 receives the clock pulse signal CLK3 as Receive DATA1 from the signal control circuit 3111b.
- the lens side microcomputer 3110 receives an inverted signal complementary to the clock pulse signal CLK3 as the Receive DATA2 from the signal control circuit 3111b.
- the same clock pulse signal CLK3 as that of Receive DATA1 is inputted to the non-inverting input of the operational amplifier P1, and the complementary inverted signal is inputted to the same clock pulse signal CLK3 as that of Receive DATA2 to the inverting input of the operational amplifier P1.
- the lens side microcomputer 3110 receives the difference as Receive DATA3.
- the body-side microcomputer 3210 receives the read / write signal R / W3, the data signal DATA3, and the pulse signal as Receive DATA1 from each of the signal control circuits 3211a, 3211c, and 3211d. Similarly, the body side microcomputer 3210 receives the inverted signal complementary to each of the read / write signal R / W3, the data signal DATA3, and the pulse signal as Receive DATA2 from each of the signal control circuits 3211a, 3211c, and 3211d.
- the same signal as Receive DATA1 is input to the non-inverting input of each operational amplifier P1 of the signal control circuits 3211a, 3211c, and 3211d, and the inverted signal complementary to the signal input to Receive DATA1 is input to the inverting input of the operational amplifier P1. Is done. A difference between the read / write signal R / W3 and its inverted signal is output from the operational amplifier P1 of the signal control circuit 3211a, and a difference between the data signal DATA3 and its inverted signal is output from the operational amplifier P1 of the signal control circuit 3211c.
- the operational amplifier P1 of the control circuit 3211d outputs a pulse signal and its inverted signal.
- the body side microcomputer 3210 receives the difference as Receive DATA3.
- the body side microcomputer 3210 performs the same control as the control performed by the lens side microcomputer 3110 on the signal control circuits 3111a, 3111c, and 3111d in (3.1) on the signal control circuit 3211b.
- the body side microcomputer 3210 inputs the clock pulse signal CLK3 as the input parameter Send DATA1 to the signal control circuit 3211b.
- the flowchart regarding the communication operation of the digital camera 3 according to the third embodiment of the present invention is the same as the flowchart regarding the communication operation of the digital camera 2 according to the second embodiment.
- the flowchart regarding the communication operation of the digital camera 3 differs from the second embodiment in the initial communication operation executed in step S8 and step S9 in FIG.
- FIG. 27 is a flowchart regarding the initial communication operation executed in step S8 and step S9 in FIG.
- the power of the battery 240 is supplied to the DC / DC converter 3250.
- the DC / DC converter 3250 generates the input voltage V1 and the input voltage V2, and supplies the input voltages V1 and V2 to each part including the body side microcomputer 3210 of the camera body 3200.
- step S1010 the body side microcomputer 3210 initializes each part of the camera body 3200.
- the body side microcomputer 3210 performs the control shown in FIG. 21 for the signal control circuits 3211a to 3211d.
- step S1020 the body side microcomputer 3210 applies the input voltage V1 and the input voltage V2 generated by the DC / DC converter 3250 to the BA terminal and the BF terminal.
- step S1200 when the lens side microcomputer 3110 of the interchangeable lens 3100 receives power supply via the LA terminal and the LF terminal, it starts control of each part of the interchangeable lens 3100 and initializes communication.
- the lens side microcomputer 3110 performs the control shown in FIG. 20 on the signal control circuits 3111a to 3111d.
- step S ⁇ b> 1210 the lens side microcomputer 3110 of the interchangeable lens 3100 performs an initialization operation of a drive system such as the focus lens drive unit 141.
- step S1400 the adapter side microcomputer 3450 to which the input voltage V1 has been input starts control of each part of the intermediate adapter 3400 to initialize communication.
- the intermediate adapter 3400 prepares to perform communication of the communication pattern (1) with the interchangeable lens 3100.
- step S1030 the body side microcomputer 3210 sends an H level read / write signal R / W3, clock pulse signal CLK3, and lens information request command between the LB-BB terminals, between the LC-BC terminals, and between the LD-BD terminals. Output.
- the body side microcomputer 3210 outputs a lens information request command between the LD and BD terminals as the data signal DATA3, the body side microcomputer 3210 synchronizes with the clock pulse signal CLK3 output between the LC and BC terminals.
- the body side microcomputer 3210 switches the control on the signal control circuits 3211a and 3211c to the control shown in FIG. 22 and shifts to a lens information transmission waiting state.
- step S1220 the lens-side microcomputer 3110 receives the lens information request command output in step S1030 as Receive DATA1 in the signal control circuit 3111c.
- step S1230 the lens side microcomputer 3110 outputs the clock pulse signal CLK4 between the LI and BI terminals, and outputs a correction parameter request command as the data signal DATA4 between the LJ and BJ terminals.
- the lens-side microcomputer 3110 outputs a correction parameter request command as a data signal DATA4 between the LJ-BJ terminals, it synchronizes with the clock pulse signal CLK4.
- the lens side microcomputer 3110 switches the control for the signal control circuit 3111b to the control shown in FIG. 22 and shifts to a correction parameter transmission waiting state.
- adapter-side microcomputer 3450 receives the correction parameter request command and clock pulse signal CLK4 transmitted from lens-side microcomputer 3110 in step S1230.
- step S1420 adapter-side microcomputer 3450 outputs the correction parameter stored in adapter-side storage unit 3451 between data terminals LJ and BJ as data signal DATA4.
- step S1240 the lens side microcomputer 3110 receives the correction parameter output from the adapter side microcomputer 3450 in step S1420 as Receive DATA2.
- the lens side microcomputer 3110 switches the control for the signal control circuits 3111a and 3111c to the control shown in FIG. 22 after the reception of the correction parameter is completed.
- the lens side microcomputer 3110 corrects the lens information stored in the lens side storage unit 3115 based on the correction parameter received in step S1240.
- the lens side microcomputer 3110 outputs an L level read / write signal R / W3 between the LB and BB terminals, and uses the corrected lens information (including specification information) as the data signal DATA3 at the LD-BD terminal. Output between.
- the lens side microcomputer 3110 outputs the corrected lens information, it synchronizes with the clock pulse signal CLK3 output by the body side microcomputer 3210 between the LC-BC terminals.
- the lens-side microcomputer 3110 switches the control for the signal control circuits 3111a to 3111d to the control shown in FIG. 20 and shifts to a communication switching command transmission waiting state.
- the body side microcomputer 3210 receives the lens information transmitted from the lens side microcomputer 3110 in step S1250 as the data signal DATA3.
- the body side microcomputer 3210 analyzes the specification information included in the lens information received in step S1040, and determines whether or not the interchangeable lens 3100 is compatible with high-speed communication. For example, the body side microcomputer 210 determines whether the specification information includes information on a CMOS type signal output system or information on a differential transmission system. When the specification information includes information related to the CMOS type signal output method or information related to the differential transmission method, the body side microcomputer 210 determines that the interchangeable lens 3100 is a high-speed communication compatible lens, and makes an affirmative determination in step S1050. The process proceeds to step S1060.
- the body side microcomputer 3210 makes a negative determination in step S1050, ends the operation of FIG. Start communication operation. That is, the body side microcomputer 3210 determines to perform steady communication while maintaining communication according to the communication pattern (1).
- the body side microcomputer 3210 selects a communication pattern to be executed between the lens side microcomputer 3110 and the body side microcomputer 3210 based on the specification information.
- the body side microcomputer 3210 includes both information related to the CMOS type signal output method and information related to the differential transmission method in the specification information
- the body side microcomputer 3210 selects the communication pattern (3) as communication used for the steady communication operation.
- the specification information includes information related to the CMOS type signal output method and the specification information does not include information related to the differential transmission method
- the body side microcomputer 3210 selects the communication pattern (2) as communication used for the steady communication operation.
- the body side microcomputer 3210 switches the control for the signal control circuits 3211a to 3211d to the control shown in FIG.
- the body side microcomputer 3210 outputs an H level read / write signal R / W3 and a communication switching command between the LB-BB terminals and between the LD-BD terminals.
- the communication switching command is a command for instructing the lens side microcomputer 3110 to switch to the communication pattern selected in step S1060.
- the lens side microcomputer 3110 receives the communication switching command transmitted from the body side microcomputer 3210 in step S1070.
- step S1270 the lens side microcomputer 3110 transmits an L level read / write signal R / W3, a clock pulse signal CLK4, and a cutoff command between the LB-BB terminals, between the LI-BI terminals, and between the LJ-BJ terminals.
- the cutoff command is a command for causing the adapter-side microcomputer 3450 to cut off (disconnect or make Hi-Z) the connection between the LI-BI terminals and between the LJ-BJ terminals.
- step S1430 adapter side microcomputer 3450 receives the cutoff command transmitted from lens side microcomputer 3110 in step S1270.
- step S1440 the adapter side microcomputer 3450 cuts off the connection between the LI-BI terminals and between the LJ-BJ terminals (disconnects, changes to Hi-Z).
- step S1280 the lens side microcomputer 3110 outputs a start signal as the data signal DATA3 between the LD and BD terminals.
- the start signal is a signal for notifying the body side microcomputer 3210 that communication with the communication pattern selected in step S1060 is started.
- step 1080 the body side microcomputer 3210 receives the start signal transmitted from the lens side microcomputer 3110 in step S1280.
- step S1090 the body side microcomputer 3210 switches the signal control circuits 3211a to 3211d to the communication pattern selected in step S1060.
- step S1290 the lens side microcomputer 3110 switches the signal control circuits 3111a to 3111d to the communication pattern corresponding to the communication switching command received in step S1260.
- FIG. 28 shows signal levels between LB-BB terminals, LC-BC terminals, between LD-BD terminals, between LI-BI terminals, between LJ-BJ terminals, and between LK-BK terminals after step S1280 in FIG. It is an example of the timing chart shown. In the timing chart illustrated in FIG. 28, time T4120, time T4130, and time T4140 are illustrated. In step S1060 of FIG. 27, it is assumed that the communication pattern (3) is selected.
- the lens side microcomputer 3110 executes step S1280 in FIG. 27, and “01000000” is transmitted as an example of the start signal between the LD-BD terminals.
- the start signal is shown as 8 bits, but the bit length of the start signal may be 16 bits or 32 bits.
- the lens side microcomputer 3110 executes step S1290 of FIG. 4, and the body side microcomputer 3210 executes step S1090. Specifically, the lens side microcomputer 3110 switches to the control shown in FIG. 25 for the signal control circuits 3111a to 3111d, and the body side microcomputer 3210 switches to the control shown in FIG. 26 for the signal control circuits 3211a to 32d. As a result, after time T4140, the communication by the communication pattern (3) is performed between the lens side microcomputer 3110 and the body side microcomputer 3210.
- a read / write signal R / W3 is output between the LB and BB terminals, and an inverted signal of the read / write signal R / W3 is output between the LI and BI terminals.
- a clock pulse signal CLK3 is output between the LC-BC terminals, and an inverted signal of the clock pulse signal CLK3 is output between the LJ-BJ terminals.
- a signal “01100000” is output as the data signal DATA3 between the LD and BD terminals, and an inverted signal “10011111” of the data signal is output between the LK and BK terminals.
- the clock pulse signal CLK3 output between the LC and BC terminals after time T4140 has a pulse frequency larger than that of the clock pulse signal CLK3 before time T4140.
- the amplitude of the signal output between the terminals is the same after time T4140 and before time T4140. However, after time T4140, the amplitude of the signal output between the terminals is shown.
- the time required for rising and falling of the output signal may be shortened by reducing the time. By doing so, it is possible to further increase the communication speed.
- the interchangeable lens 100 according to the first and second embodiments of the present invention is a kind of accessory, and is detachably attached to the camera body 200 via the lens side mount portion 120.
- the lens-side microcomputer 110 of the interchangeable lens 100 has a lens-side first communication contact group 111 and performs data communication using a transmission line formed between the body-side first communication contact group 211 of the camera body 200.
- the lens-side microcomputer 110 further includes a lens-side second communication contact group 112, forms a transmission line with the body-side second communication contact group 212 of the camera body 200, and uses CMOS information as lens information specification information.
- the lens side microcomputer 110 has a switch 302 and a switching control circuit 303, and when the specification information of the lens information includes information on a CMOS type signal output method and information on a differential transmission method, The communication circuits (the first communication circuit 300 and the second communication circuit 301) connected to the terminals of the first side communication contact group 111 and the second lens side communication contact group 112 are switched. Since the interchangeable lens 100 has the above-described configuration and can be switched to communication using a differential transmission method, it can perform steady communication with the camera body 200 at high speed.
- the interchangeable lens 100 is detachably mounted via the body side mount portion 220.
- the body side microcomputer 210 of the camera body 200 has a body side first communication contact group 211 and performs data communication using a transmission line formed between the lens side first communication contact group 111 of the interchangeable lens 100.
- the body-side microcomputer 210 further includes a body-side second communication contact group 212, forms a transmission line with the lens-side second communication contact group 112 of the interchangeable lens 100, and uses CMOS information as lens information specification information.
- CMOS information lens information specification information.
- the body side microcomputer 210 includes a switch 302 and a switching control circuit 303.
- the specification information of the lens information includes information on a CMOS type signal output method and information on a differential transmission method
- the communication circuits (first communication circuit 300 and second communication circuit 301) connected to the terminals of the first side communication contact group 211 and the second body communication contact group 212 are switched. Since the camera body 200 has the above-described configuration and can be switched to communication using a differential transmission method, it can perform steady communication with an accessory such as the interchangeable lens 100 at high speed.
- the interchangeable lens 3100 according to the third embodiment of the present invention is a kind of accessory, and is detachably attached to the camera body 3200.
- the interchangeable lens 3100 includes signal control circuits 3111a to 3111d having the circuit shown in FIG.
- the signal control circuits 3111a to 3111d have the electric circuit shown in FIG. 18, and perform communication patterns (1) to (3) with the camera body.
- the signal control circuits 3111a to 3111d communicate with the camera body 3200 using respective transmission lines between the LB-BB terminals, between the LC-BC terminals, between the LD-BD terminals, and between the LE-BE terminals.
- the signal control circuits 3111a to 3111d when the specification information of the lens information includes information on the CMOS type signal output system or information on the differential transmission system, between the LB-BB terminals, the LC- Camera body 3200 using each transmission line between BC terminals, LD-BD terminals, LE-BE terminals, LI-BI terminals, LJ-BJ terminals, LK-BK terminals, and LH-BH terminals. Communicate between the two.
- the lens side microcomputer 3110 transmits the signal control circuits 3111a to 3111d to the communication pattern (1).
- the interchangeable lens 3100 uses transmission lines between the LB-BB terminals, between the LC-BC terminals, and between the LD-BD terminals, the signal output system is an open drain type, and the transmission system Performs communication with the camera body 3200 in a single-ended manner.
- the signal output method is switched to the CMOS type.
- all communication is performed as one-way communication by using transmission lines between the LI-BI terminals and between the LJ-BJ terminals for communication with the camera body.
- high-speed communication using the second communication circuit 301 is not limited to the differential transmission method.
- the speed can be increased by parallel communication using the first communication contact group and the second communication contact group.
- the first communication contact group is dedicated to data transfer from the interchangeable lens 100 to the camera body 200
- the second communication contact group is dedicated to data transfer from the camera body 200 to the interchangeable lens 100.
- the processing to prevent data transmission is not necessary, so the communication speed can be increased.
- FIGS. 4 and 9 are not limited to the high-speed communication start operation between the interchangeable lens and the camera body.
- the present invention can also be applied to an operation for starting high-speed communication between an intermediate adapter having a first communication contact group and a second communication contact group, which is detachably attached to the camera body, and the camera body.
- the accessory by embodiment of this invention is not limited only to the interchangeable lens 100 or the intermediate adapter 400.
- FIG. 10 an accessory 500 attached to the subject side of the interchangeable lens 100 as shown in FIG. 10 is also included.
- the accessory 500 include a teleconverter and a wide converter.
- the high-speed communication start operation between the interchangeable lens and the camera body is not limited to the processes shown in FIGS. 4B, 9B, and 27.
- the interchangeable lens 100 receives the lens information request command from the camera body 200 (step S120 in FIG. 4B and FIG. 9B, step S1030 in FIG. 27), and corrects it to the intermediate adapter 400.
- the lens information before correction is transmitted to the camera body 200 until a parameter request command is transmitted (step S130 in FIG. 4B, step S330 in FIG. 9B, and step S1230 in FIG. 27). It may be.
- the camera body 200 can determine whether or not the intermediate adapter 400 or 3400 is present based on the lens information received twice and the lens information received the first time and the lens information received the second time.
- Transmission / reception of the start signal can be omitted.
- the camera body 200 may skip the process of step S60 and advance the process to step S70 after the process of step S50.
- the interchangeable lens 100 may skip step S180 and proceed to step S190 after step S170 (FIG. 4) or step S370 (FIG. 9).
- the camera body 3200 may skip the process of step S1080 after the process of step S1070 and advance the process to step S1090.
- the interchangeable lens 3100 may skip step S1280 and proceed to step S1290 after the process of step S1260.
- Transmission / reception of the shut-off command can be omitted.
- the interchangeable lens 100 skips step S170 (FIG. 4) or step S370 (FIG. 9) after step S160 and proceeds to step S180. Also good.
- the intermediate adapter 400 may skip step S440 and proceed to step S450 after step S430.
- the interchangeable lens 3100 may skip the process of step S1270 and advance the process to step S1280 after the process of step S1260. Further, intermediate adapter 3400 may skip step S1430 and proceed to step S1440 after the process of step S1420.
- the interchangeable lens 3100 skips steps S1270 and S1280 after the processing of step S1260 and proceeds to step S1290. You may decide to proceed.
- the body side microcomputer 210 shuts off (disconnects, opens, opens, hi-Z state) the communication circuit connected to each terminal of the body side second communication contact group 212 in step S10. However, it may be switched to the first communication circuit 300 side. In this case, the body side microcomputer 210 receives the correction parameter request command transmitted in step S130 and the cutoff command transmitted in step S170 using the body side second communication contact group 212.
- the body-side microcomputer 210 may transmit a communication switching command immediately after receiving a correction parameter request command or a cutoff command. If the lens-side microcomputer 110 transmits a communication switching command immediately after receiving the correction parameter request command, the camera body 210 receives lens information from the interchangeable lens 100 using communication using a differential transmission method. It is preferable.
- each logic element such as NOT elements X1 to X4 may be replaced with a logic circuit using NAND elements.
- Modification 7 In the third embodiment, in the communication patterns (1) and (2), between the LE-BE terminals and between the LH-BH terminals is used for transmission / reception of a pulse signal indicating the state of the focus lens 140. However, only either the LE-BE terminal or the LH-BH terminal may be used for transmission / reception of a pulse signal indicating the state of the focus lens 140.
- the terminals not used for transmission / reception of the pulse signal are between the LK-BK terminals. It may be used instead of. That is, in the communication pattern (3), the lens side microcomputer 3110 and the body side microcomputer 3210 may transmit and receive an inverted signal complementary to the data signal DATA3 by half duplex communication between the LH and BH terminals. .
- the signal control circuit 3111c When an inverted signal complementary to the data signal DATA3 is transmitted / received between the LH and BH terminals, the signal control circuit 3111c is connected to the LD terminal and the LH terminal, and the signal control circuit 3211c is connected to the BD terminal and the BH terminal. It is preferable to do so. Further, when an inverted signal complementary to the data signal DATA3 is transmitted / received between the LH and BH terminals, the number of terminals can be reduced because the LK terminal, the BK terminal, the FK terminal, and the RK terminal are unnecessary.
- the signal control circuit 3111d and the signal control circuit 3211c may not be the circuit illustrated in FIG. It may be a circuit only for performing single-ended communication using the collector output.
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Abstract
Description
本発明の第2の態様によると、第1の態様のアクセサリにおいて、第2通信部は、第1通信部を含むことが好ましい。
本発明の第3の態様によると、第1または第2のアクセサリにおいて、第2通信部は、第1の伝送線路に出力された信号に相補的な反転信号を第2の伝送線路へ出力することが好ましい。
本発明の第4の態様によると、第1から第3のいずれか一態様のアクセサリにおいて、アクセサリが第2通信部を備えることを表す仕様情報を記憶する情報記憶部をさらに備え、第1通信部は、仕様情報をカメラボディへ送信し、所定条件には、第1通信部が仕様情報を送信したことが含まれることが好ましい。
本発明の第5の態様によると、第1から第4のいずれか一態様のアクセサリにおいて、アクセサリには、第2の伝送線路に電気的に接続する第2アクセサリが着脱可能に接続され、第1通信部は、第2の伝送線路を用いて第2アクセサリとさらに通信することが好ましい。
本発明の第8の態様によると、第7の態様のカメラボディにおいて、第2通信部は、第1通信部を含むことが好ましい。
本発明の第9の態様によると、第7または第8の態様のカメラボディにおいて、第2通信部は、第1の伝送線路に出力された信号に相補的な反転信号を第2の伝送線路へ出力することが好ましい。
本発明の第10の態様によると、第7から第9のいずれか一態様のカメラボディにおいて、所定条件には、第1の伝送線路と第2の伝送線路とを用いて第2通信部と通信を行うアクセサリ側通信部をアクセサリが有していることに関する仕様情報を第1通信部が受信したことが含まれることが好ましい。
本発明の第12の態様によると、第11の態様のアクセサリにおいて、第2通信部は、第1通信部を含むことが好ましい。
本発明の第13の態様によると、第11または第12の態様のアクセサリにおいて、アクセサリが第2通信部を備えることを表す仕様情報を記憶する情報記憶部をさらに備え、第1通信部は、仕様情報をカメラボディへ送信し、所定条件には、第1通信部が仕様情報を送信したことが含まれることが好ましい。
本発明の第14の態様によると、第11から第13のいずれか一態様のアクセサリにおいて、アクセサリには、第2の伝送線路に電気的に接続する第2アクセサリが着脱可能に接続され、第1通信部は、アクセサリに第2アクセサリが装着されているとき、第4アクセサリ接点を介して第2アクセサリへ第3のクロックパルス信号を送信し、アクセサリに第2アクセサリが装着されているとき、第5アクセサリ接点を介して第2アクセサリとの間で第3のクロックパルス信号に同期する第3のデータ信号を送受信することが好ましい。
図1は、本発明の第1の実施の形態によるアクセサリとカメラボディとを備えるデジタルカメラシステムの概略ブロック図である。図1のデジタルカメラシステム1は、交換レンズ100とカメラボディ200とを備える。交換レンズ100は、アクセサリの一種であって、レンズ側マイコン110とレンズ側記憶部115とレンズ側マウント部120とレンズ側接点群130とを備える。カメラボディ200は、ボディ側マイコン210とボディ側記憶部215とボディ側マウント部220とボディ側接点群230とを備える。なお、交換レンズ100とカメラボディ200とは、図1に図示した構成以外にも撮像素子等、多数の構成を有する。
ボディ側記憶部215は、フラッシュメモリなどの不揮発性の記憶媒体であって、ボディ側マイコン210がカメラボディ200を制御する際に実行する制御プログラムなどが記憶されている。
図2は、レンズ側接点群130とボディ側接点群230とを介するレンズ側マイコン110とボディ側マイコン210との間の電気的な接続を示す図である。レンズ側マイコン110は、レンズ側第1通信接点群111とレンズ側第2通信接点群112とを有する。
図3は、図2に示したレンズ側第1通信接点群111およびレンズ側第2通信接点群112へ信号を入出力する通信制御回路の概略ブロック図である。図3に例示される通信制御回路は、レンズ側マイコン110に内蔵される。なお、ボディ側第1通信接点群211およびボディ側第2通信接点群212に接続される通信制御回路も図3と同様であり、ボディ側マイコン210に内蔵される。
DATA1端子およびDATA2端子は、二値化されたデータを出入力(送受信)するための端子である。DATA1端子およびDATA2端子の信号レベルは、0レベル(Lレベル,Lowレベル)または1レベル(Hレベル,Highレベル)となる。
第2通信回路301を用いた差動伝送方式の通信では、DATA2端子には、DATA1端子のデータ信号に相補的な反転信号が出入力される。
CLK2端子は、クロックパルス信号を出入力(送受信)するための端子である。DATA2端子に出力されるデータは、CLK2端子のクロックパルス信号に同期する。
第2通信回路301を用いた差動伝送方式の通信では、CLK2端子には、CLK1端子のクロックパルス信号に相補的な反転信号が出入力される。また、第2通信回路301を用いた差動伝送方式の通信において出入力されるクロックパルス信号は、第1通信回路300を用いたシングルエンド方式の通信において出入力されるクロックパルス信号よりもパルス周波数が大きい(パルス周期が短い)。第2通信回路301を用いた通信では、CMOSタイプの信号出力回路を用いることや差動伝送方式を用いることにより、クロックパルス信号のパルス周波数を大きくすることができる。すなわち、第2通信回路301を用いた差動伝送方式の通信は、第1通信回路300を用いたシングルエンド方式の通信よりも数倍~十数倍だけ高速にデータ通信を行うことができる。
R/W1端子のリードライト信号レベルがLレベルのとき、レンズ側マイコン110がDATA1端子にデータを出力する。
R/W1端子のリードライト信号レベルがHレベルのとき、ボディ側マイコン210がDATA1端子にデータを出力する。
R/W2端子のリードライト信号レベルがLレベルのとき、レンズ側マイコン110がDATA2端子にデータを出力する。
R/W2端子のリードライト信号レベルがHレベルのとき、ボディ側マイコン210がDATA2端子にデータを出力する。
R/W1端子のリードライト信号レベルがLレベルのとき、R/W2端子のリードライト信号レベルがHレベルとなる。このとき、レンズ側マイコン110は、DATA1端子にデータを出力し、DATA2端子に当該データの反転信号を出力する。
R/W1端子のリードライト信号レベルがHレベルのとき、R/W2端子のリードライト信号レベルがLレベルとなる。このとき、ボディ側マイコン210は、DATA1端子にデータを出力し、DATA2端子に当該データの反転信号を出力する。
図4(a)は、デジタルカメラ1の通信動作に関するフローチャートである。カメラボディ200の電源がオンされると、ボディ側マイコン210を含むカメラボディ200の各部に電源が供給される。電源を供給されたボディ側マイコン210は、ステップS1の動作に進み、詳細を後述する初期通信動作の実行を開始する。この初期通信動作の過程においてカメラボディ200から交換レンズ100に向けて電源の供給が開始される。電源を供給されたレンズ側マイコン110は、ステップS2の動作に進み、詳細を後述する初期通信動作を実行する。ボディ側マイコン210とレンズ側マイコン110は、ステップS1とステップS2で実行する初期通信動作の過程において、定常通信動作で用いる信号出力方式と伝送方式とを決定する。ステップS3とステップS4では、ボディ側マイコン210とレンズ側マイコン110は、初期通信動作の過程で決定された信号出力方式と伝送方式とを用いた定常通信を行う。
ステップS120では、レンズ側マイコン110は、レンズ側第1通信接点群111を用いて、そのレンズ情報の要求コマンドを受信する。
ステップS40では、ボディ側マイコン210は、ボディ側第1通信接点群211を用いて、レンズ情報(上述の仕様情報を含む)を受信する。ボディ側マイコン210は、レンズ情報を受信したことにより、交換レンズ100との間で第1通信接点群を用いた通信が確立されたことを認識する。
ステップS160では、レンズ側マイコン110は、レンズ側第1通信接点群111を用いて、通信切替コマンドを受信する。その後、レンズ側マイコン110は、ステップS170の動作に進み、レンズ側第2通信接点群112を用いて、中間アダプタ用の遮断コマンドを送信する。第1の実施の形態では、交換レンズ100とカメラボディ200との間に中間アダプタが接続されていないため、この遮断コマンドは受信されない。
ステップS60では、ボディ側マイコン210は、ボディ側第1通信接点群211を用いて、開始信号を受信する。その後、ボディ側マイコン210は、ステップS70の動作に進み、ボディ側第1通信接点群211およびボディ側第2通信接点群212の各端子に接続される通信回路を第2通信回路301側に切り替える。
本発明の第2の実施の形態について説明する。図6は、本発明の第2の実施の形態によるアクセサリとカメラボディとを備えるデジタルカメラシステムの概略ブロック図である。図6のデジタルカメラシステム2は、交換レンズ100とカメラボディ200とを備え、交換レンズ100とカメラボディ200との間に中間アダプタ400を備える。交換レンズ100とカメラボディ200の構成は、第1の実施の形態と同一であるため、構成の説明を省略する。なお、中間アダプタ400が交換レンズ100とカメラボディ200との間に挿入されているため、高速通信開始動作は第1の実施の形態と異なる。
ステップS420では、アダプタ側マイコン420は、ステップS340で送信された補正パラメータの要求コマンドを受信する。ステップS430では、アダプタ側マイコン420は、アダプタ側記憶部451に記憶されている補正パラメータを、交換レンズ100へ送信する。ステップS340で補正パラメータの受信待ち状態となっていたレンズ側マイコン110は、ステップS430で送信された補正パラメータを受信する。これにより、レンズ側マイコン110は、中間アダプタ400との間の通信が第2通信接点群112を用いて確立されたことを認識する。
ステップS440では、アダプタ側マイコン420は、中間アダプタ用の遮断コマンドを受信する。ステップS450では、アダプタ側マイコン420は、開閉器304を開いて各端子から第1通信回路300を遮断する。
本発明の第3の実施の形態について説明する。図12(a)および(b)は、本発明の第3の実施の形態によるアクセサリとカメラボディとを備えるデジタルカメラシステムの概略ブロック図である。図12(a)および(b)に示されるデジタルカメラシステム3は、交換レンズ3100とカメラボディ3200とを備え、交換レンズ3100とカメラボディ3200との間に中間アダプタ3400を備える。
図13は、ボディ側マウント部220の平面図を模式的に表した図である。カメラボディ3200のボディ側マウント部220の近傍位置にはボディ側保持部3231が設けられており、このボディ側保持部3231にはボディ側接点群3230に含まれる11個の端子が保持されている。図13に示すように、ボディ側保持部3231に保持される11個の端子を図中左からBB端子、BI端子、BC端子、BJ端子、BD端子、BK端子、BE端子、BH端子、BA端子、BF端子、BG端子と称する。
図15は、中間アダプタ3400の前マウント部410の平面図を模式的に表した図である。中間アダプタ3400の前マウント部410の近傍位置には、前接点群3430に含まれる11個の端子が保持される前保持部3431が設けられている。前保持部3431は、図15に示すように、FB端子、FI端子、FC端子、FJ端子、FD端子、FK端子、FE端子、FH端子、FA端子、FF端子、FG端子を有している。
図17は、交換レンズ3100とカメラボディ3200と中間アダプタ3400の通信に関係する構成とそれらの電気的な接続を示す図である。
図17には、カメラボディ3200の構成のうち、ボディ側マイコン3210とボディ側接点群3230とDC/DCコンバータ3250とバッテリ240とが図示されている。ボディ側マイコン3210は、通信制御回路3211a~dを内蔵している。
図18は、通信制御回路3111aの回路図の一例である。通信制御回路3111b~dと通信制御回路3211a~dの回路も図18に示す回路と同様の回路を有する。図18に示すように、通信制御回路3111aは、NOT素子X1~X4、NAND素子X5およびX6、NOR素子X7およびX8、AND素子X9およびX10、OR素子X11、バッファ回路X12およびX13、オペアンプP1、pチャネル型の金属酸化物半導体型電界効果トランジスタ(MOSFET)Q1~Q4、nチャネル型の金属酸化物半導体型電界効果トランジスタ(MOSFET)Q5およびQ6、抵抗器R1およびR2を備える。以降、金属酸化物半導体型電界効果トランジスタのことを単に電界効果トランジスタと記載する。
入力パラメータSend DATA1は、NOT素子X2とNAND素子X5とNOR素子X7へ入力される。
入力パラメータOutput Disable1は、NOT素子X1とNOR素子X7へ入力される。
入力パラメータSend DATA2は、AND素子X9へ入力される。
入力パラメータOutput Disable2は、NOT素子X4とNOR素子X8へ入力される。
NOT素子X2は、入力パラメータSend DATA1を反転(論理否定)させた値をAND素子X10へ出力する。
NOT素子X3は、入力パラメータSend DATA SWを反転(論理否定)させた値をAND素子X9へ出力する。
NOT素子X4は、入力パラメータOutput Disable2を反転(論理否定)させた値をNAND素子X6へ出力する。
NAND素子X6は、OR素子X11による論理和の演算結果とNOT素子X4による論理否定の演算結果とを入力として否定論理積を演算する。演算結果は、電界効果トランジスタQ4のゲートへ出力される。
NOR素子X8は、OR素子X11による論理和の演算結果と入力パラメータOutput Disable2とを入力として否定論理和を演算する。演算結果は、電界効果トランジスタQ5へ出力される。
AND素子X10は、入力パラメータSend DATA SWとNOT素子X2の論理否定の演算結果とを入力として論理積を演算する。演算結果は、OR素子X11へ出力される。
OR素子X11は、AND素子X9の演算結果とAND素子X10の演算結果とを入力として論理和を演算する。演算結果は、NAND素子X6とNOR素子X8とへ出力される。
バッファ回路X13は、接続端子IN/OUT2を介して入力されたデータを、Receive DATA2へ出力すると共に、オペアンプP1へ反転入力(-)として入力する。
レンズ側マイコン3110とボディ側マイコン3210とは、信号出力方式と伝送方式とを以下の通信パターン(1)~(3)のように組み合わせた通信を実行する。
通信パターン(1):オープンドレインタイプ,シングルエンド方式
通信パターン(2)CMOSタイプ,シングルエンド方式
通信パターン(3)CMOSタイプ,差動伝送方式
レンズ側接点群3130のLB端子とボディ側接点群3230のBB端子との間(LB-BB端子間)に形成される伝送線路では、レンズ側マイコン3110とボディ側マイコン3210との間でリードライト信号R/W3を送受信する半二重通信が行われる。
レンズ側接点群3130のLC端子とボディ側接点群3230のBC端子との間(LC-BC端子間)に形成される伝送線路では、ボディ側マイコン3210からレンズ側マイコン3110へクロックパルス信号CLK3を送信する片方向通信が行われる。
レンズ側接点群3130のLD端子とボディ側接点群3230のBD端子との間(LD-BD端子間)に形成される伝送線路では、レンズ側マイコン3110とボディ側マイコン3210との間でデータ信号DATA3を送受信する半二重通信が行われる。データ信号DATA3には、各種のコマンド、それらのコマンドに対する応答、レンズ情報などが含まれる。
ボディ側マイコン3110がデータ信号DATA3を出力する際、LB-BB端子間へHレベルのリードライト信号R/W3を送信した後、LD-BD端子間へデータ信号DATA3を出力する。このとき、レンズ側マイコン3110は、データ信号DATA3を受信する。
LD-BD端子間で送受信されるデータ信号DATA3は、クロックパルス信号CLK3に同期する。
また、信号制御回路3111a~cの各々では、NOT素子X1の出力がLレベルとなって、NAND素子X5から電界効果トランジスタQ1のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ1がオフ状態となる。
すなわち、レンズ側マイコン3110は、信号制御回路3111a~cの各々に対して、電界効果トランジスタQ1とQ5とが共にオフ状態となるように設定する。
また、信号制御回路3111cでは、NOT素子X4の出力がLレベルとなって、NAND素子X6から電界効果トランジスタQ3のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ3がオフ状態となる。
すなわち、レンズ側マイコン3110は、信号制御回路3111cに対して、電界効果トランジスタQ6とQ3とが共にオフ状態となるように設定する。その結果。信号制御回路3111cからはオープンドレインタイプの信号出力が行われない。
また、信号制御回路3211dでは、NOT素子X1の出力がLレベルとなって、NAND素子X5から電界効果トランジスタQ1のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ1がオフ状態となる。
すなわち、ボディ側マイコン3210は、信号制御回路3211dに対して、電界効果トランジスタQ1とQ5とが共にオフ状態となるように設定する。
また、信号制御回路3211a~dの各々では、NOT素子X4の出力がLレベルとなって、NAND素子X6から電界効果トランジスタQ3のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ3がオフ状態となる。
すなわち、ボディ側マイコン3210は、信号制御回路3211a~dの各々に対して、電界効果トランジスタQ6とQ3とが共にオフ状態となるように設定する。その結果、信号制御回路3211a~dの各々からオープンドレインタイプの信号出力が行われない。
レンズ側マイコン3110を送信側とした場合、レンズ側マイコン3110は、図20に示した信号制御回路3111dに対する制御と同様の制御を信号制御回路3111aに対して行う。ただし、入力パラメータOutput Disable1、入力パラメータOutput Disable2として入力する信号は、パルス信号からリードライト信号R/W3とクロックパルス信号CLK4にそれぞれ変更する。
また、レンズ側マイコン3110は、ボディ側マイコン3210が図21に示した信号制御回路3211cに対する制御と同様の制御を信号制御回路3111c対して行う。
ボディ側マイコン3210は、レンズ側マイコン3110が図20に示した信号制御回路3111cに対する制御と同様の制御を信号制御回路3211aおよび3211cに対して行う。ただし、信号制御回路3211aについては、入力パラメータOutput Disable2として入力する信号は、データ信号DATA3からリードライト信号R/W3に変更する。
レンズ側マイコン3110を受信側とした場合、すなわちアダプタ側マイコン3450を送信側とした場合、レンズ側マイコン3110は、図21に示した信号制御回路3211dに対する制御と同様の制御を信号制御回路3111bに対して行う。ただし、Receive DATA1とReceive DATA2として受信する信号は、クロックパルス信号CLK3とデータ信号DATA4にそれぞれ変更する。
図19の説明に戻り、通信パターン(2)について説明する。通信パターン(2)では、信号出力方式をオープンドレインタイプからCMOSタイプに切り替えると共に、LB-BB端子間、LD-BD端子間、LI-BI端子間、LJ-BJ端子間で行う通信の通信方式を半二重通信から片方向通信に切り替える。具体的には、LB-BB端子間では、ボディ側マイコン3210がBB端子からLB端子への片方向通信によりリードライト信号R/W3を送信する。LD-BD端子間では、ボディ側マイコン3210がBD端子からLD端子への片方向通信によりデータ信号DATA3を送信する。LI-BI端子間では、レンズ側マイコン3110がLI端子からBI端子への片方向通信によりリードライト信号R/W5を送信する。LJ-BJ端子間では、レンズ側マイコン3110がLJ端子からBJ端子への片方向通信によりデータ信号DATA5を送信する。
図23に示されるように、レンズ側マイコン3110は、信号制御回路3111a~cの各々に対して、入力パラメータPull-up Enable1をLレベルに設定する。そのため、信号制御回路3111a~cの各々に内蔵される電界効果トランジスタQ2がオン状態となり、接続端子IN/OUT1がプルアップされる。
また、信号制御回路3111a~cの各々では、NOT素子X1の出力がLレベルとなって、NAND素子X5から電界効果トランジスタQ1のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ1がオフ状態となる。
すなわち、レンズ側マイコン3110は、信号制御回路3111a~cの各々に対して、電界効果トランジスタQ1とQ5とが共にオフ状態となるように設定する。
また、信号制御回路3111cでは、NOT素子X4の出力がLレベルとなって、NAND素子X6から電界効果トランジスタQ3のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ3がオフ状態となる。
すなわち、ボディ側マイコン3210は、信号制御回路3111cに対して、電界効果トランジスタQ6とQ3とが共にオフ状態となるように設定する。その結果、信号制御回路3111cからCMOSタイプの信号出力が行われない。
レンズ側マイコン3110は、信号制御回路3111dに対しては、入力パラメータPull-up Enable1をHレベルに設定する。そのため、信号制御回路3111dに内蔵される電界効果トランジスタQ2がオフ状態となる。
図24に示されるように、ボディ側マイコン3210は、信号制御回路3211a~cの各々に対して、入力パラメータPull-up Enable1をHレベルに設定する。そのため、信号制御回路3211a~cの各々に内蔵される電界効果トランジスタQ2がオフ状態となる。
また、信号制御回路3211a~cの各々では、NOT素子X4の出力がLレベルとなって、NAND素子X6から電界効果トランジスタQ3のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ3がオフ状態となる。
すなわち、ボディ側マイコン3210は、信号制御回路3211a~cの各々に対して、電界効果トランジスタQ3とQ6とが共にオフ状態となるように設定する。
ボディ側マイコン3210は、信号制御回路3211dに対しては、入力パラメータPull-up Enable1をLレベルに設定する。そのため、信号制御回路3211dに内蔵される電界効果トランジスタQ2がオン状態となり、接続端子IN/OUT1がプルアップされる。
また、信号制御回路3211dでは、NOT素子X1の出力がLレベルとなって、NAND素子X5から電界効果トランジスタQ1のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ1がオフ状態となる。
すなわち、ボディ側マイコン3210は、信号制御回路3211dに対して、電界効果トランジスタQ1とQ5とが共にオフ状態となるように設定する。
また、信号制御回路3211dでは、NOT素子X4の出力がLレベルとなって、NAND素子X6から電界効果トランジスタQ1のゲートへHレベルの出力信号が出力されて、電界効果トランジスタQ3がオフ状態となる。
すなわち、ボディ側マイコン3210は、信号制御回路3211dに対して、電界効果トランジスタQ3とQ6とが共にオフ状態となるように設定する。
図19の説明に再び戻り、通信パターン(3)について説明する。通信パターン(3)の場合、LB-BB端子間、LD-BD端子間、LI-BI端子間で行う通信の通信方式と、LH-BH端子間、LI-BI端子間、LJ-BJ端子間で行う通信の内容とが通信パターン(2)と異なる。また、通信パターン(3)の場合、LK-BK端子間を通信に用いることが通信パターン(1)や通信パターン(2)と大きく異なる。
図25に示されるように、レンズ側マイコン3110は、信号制御回路3111a、3111c、3111dの各々に対して、入力パラメータPull-up Enable1をHレベルに設定する。そのため、信号制御回路3111a、3111c、3111dの各々に内蔵される電界効果トランジスタQ2がオフ状態となる。
レンズ側マイコン3110は、信号制御回路3111bに対しては、入力パラメータPull-up Enable1をHレベルに設定する。そのため、信号制御回路3111bに内蔵される電界効果トランジスタQ2がオフ状態となる。
ボディ側マイコン3210は、信号制御回路3211a、3211c、3211dの各々に対して、(3.2)でレンズ側マイコン3110が信号制御回路3111bに対して行った制御と同様の制御を行う。
ボディ側マイコン3210は、信号制御回路3211bに対して、(3.1)でレンズ側マイコン3110が信号制御回路3111a、3111c、3111dに対して行った制御と同様の制御を行う。なお、ボディ側マイコン3210は、信号制御回路3211bに対して、入力パラメータSend DATA1としてクロックパルス信号CLK3を入力する。
本発明の第3の実施の形態におけるデジタルカメラ3の通信動作に関するフローチャートは、第2の実施の形態におけるデジタルカメラ2の通信動作に関するフローチャートと同様である。デジタルカメラ3の通信動作に関するフローチャートは、図9(a)のステップS8およびステップS9で実行される初期通信動作が第2の実施の形態と相異する。
ステップS1200では、交換レンズ3100のレンズ側マイコン3110は、LA端子、LF端子を介して電源の供給を受けると、交換レンズ3100の各部の制御を開始して通信の初期化を行う。レンズ側マイコン3110は、信号制御回路3111a~dに対して、図20に示した制御を行う。
ステップS1210では、交換レンズ3100のレンズ側マイコン3110は、フォーカスレンズ駆動部141などの駆動系の初期化動作を行う。
ステップS1410では、アダプタ側マイコン3450は、ステップS1230においてレンズ側マイコン3110から送信された補正パラメータの要求コマンドとクロックパルス信号CLK4とを受信する。
ステップS1240では、レンズ側マイコン3110は、ステップS1420においてアダプタ側マイコン3450から出力された補正パラメータをRecieve DATA2として受信する。レンズ側マイコン3110は、補正パラメータの受信が完了した後、信号制御回路3111aおよび3111cに対する制御を図22に示した制御に切り替える。
ステップS1250では、レンズ側マイコン3110は、Lレベルのリードライト信号R/W3をLB-BB端子間へ出力して、補正後のレンズ情報(仕様情報を含む)をデータ信号DATA3としてLD―BD端子間へ出力する。レンズ側マイコン3110は、補正後のレンズ情報を出力するとき、ボディ側マイコン3210がLC-BC端子間に出力しているクロックパルス信号CLK3に同期させる。レンズ側マイコン3110は、補正後のレンズ情報の出力を完了した後、信号制御回路3111a~dに対する制御を図20に示す制御に切り替えて、通信切替コマンドの送信待ち状態に移行する。
ステップS1040では、ボディ側マイコン3210は、ステップS1250においてレンズ側マイコン3110から送信されたレンズ情報をデータ信号DATA3として受信する。
ステップS1070では、ボディ側マイコン3210は、LB-BB端子間、LD-BD端子間にそれぞれHレベルのリードライト信号R/W3、通信切替コマンドを出力する。通信切替コマンドとは、ステップS1060において選択された通信パターンに切り替えるようにレンズ側マイコン3110へ指示するためのコマンドである。
ステップS1260では、レンズ側マイコン3110は、ステップS1070においてボディ側マイコン3210から送信された通信切替コマンドを受信する。
ステップS1430では、アダプタ側マイコン3450は、ステップS1270においてレンズ側マイコン3110から送信された遮断コマンドを受信する。
ステップS1440では、アダプタ側マイコン3450は、LI-BI端子間とLJ-BJ端子間への接続を遮断する(切断する、Hi-Zにする)。
ステップ1080では、ボディ側マイコン3210は、ステップS1280においてレンズ側マイコン3110から送信された開始信号を受信する。
ステップS1290では、レンズ側マイコン3110は、信号制御回路3111a~3111dをステップS1260で受信した通信切替コマンドに応じた通信パターンに切り替える。
本発明の第1および第2の実施の形態による交換レンズ100は、アクセサリの一種であって、レンズ側マウント部120を介してカメラボディ200に着脱可能に装着される。交換レンズ100のレンズ側マイコン110は、レンズ側第1通信接点群111を有し、カメラボディ200のボディ側第1通信接点群211との間に形成される伝送線路を用いてデータ通信を行う。また、レンズ側マイコン110は、レンズ側第2通信接点群112をさらに有し、カメラボディ200のボディ側第2通信接点群212との間に伝送線路を形成し、レンズ情報の仕様情報にCMOSタイプの信号出力方式に関する情報と差動伝送方式に関する情報とが含まれている場合は、ボディ側第2通信接点群212との間で差動伝送方式による定常通信を行う。レンズ側マイコン110は、切替器302と切替制御回路303とを有し、レンズ情報の仕様情報にCMOSタイプの信号出力方式に関する情報と差動伝送方式に関する情報とが含まれている場合は、レンズ側第1通信接点群111およびレンズ側第2通信接点群112の各端子に接続される通信回路(第1通信回路300および第2通信回路301)を切り替える。
交換レンズ100は、上記のような構成を有し、差動伝送方式による通信に切り替えることができるため、カメラボディ200との間で高速に定常通信を行うことができる。
カメラボディ200は、上記のような構成を有し、差動伝送方式による通信に切り替えることができるため、交換レンズ100のようなアクセサリとの間で高速に定常通信を行うことができる。
交換レンズ3100は、通信パターン(1)では、LB-BB端子間、LC-BC端子間、およびLD-BD端子間の各伝送線路を用いて、信号出力方式がオープンドレインタイプであって伝送方式がシングルエンド方式である通信をカメラボディ3200との間で行う。
通信パターン(2)では、信号出力方式をCMOSタイプに切り替える。通信パターン(2)では、LI-BI端子間、LJ-BJ端子間の伝送線路をさらにカメラボディとの間の通信に用いることにより、すべての通信を片方向通信として実施している。このようにすることで、半二重通信において一つの伝送線路にボディ側マイコン3210とレンズ側マイコン3110とが同時にデータを送信するなどの誤動作を防止する処理を行う必要が無くなるため、通信パターン(1)よりも高速な通信を実現することができる。
通信パターン(3)では、さらに伝送方式を差動伝送方式に切り替える。これにより、さらに高速な通信を実現することができる。
(変形例1)第1および第2の実施の形態において、第2通信回路301を用いる高速な通信は、差動伝送方式だけに限定しない。たとえば、第1通信接点群と第2通信接点群とを用いたパラレル通信によっても高速化できる。第1通信接点群を交換レンズ100からカメラボディ200へのデータ転送専用、第2通信接点群をカメラボディ200から交換レンズ100へのデータ転送専用とすることで、半二重通信における誤動作(同時にデータを送信するなど)を防止する処理が不要となるため、通信の高速化を実現できる。
〔1〕交換レンズ100は、カメラボディ200からレンズ情報の要求コマンドを受信してから(図4(b)および図9(b)のステップS120、図27のステップS1030)、中間アダプタ400へ補正パラメータの要求コマンドを送信するまで(図4(b)のステップS130、図9(b)のステップS330、図27のステップS1230)の間に、カメラボディ200へ補正前のレンズ情報を送信することにしてもよい。このとき、カメラボディ200は、レンズ情報を2回受信して1回目に受信したレンズ情報と2回目に受信したレンズ情報とに基づいて中間アダプタ400または3400の有無を判断することができる。
〔2〕開始信号の送受信は省略できる。第1および第2の実施の形態では、カメラボディ200は、ステップS50の処理の後、ステップS60の処理を飛ばしてステップS70へ処理を進めることにしてもよい。また、交換レンズ100は、ステップS170(図4)またはステップS370(図9)の処理の後、ステップS180を飛ばしてステップS190へ処理を進めてもよい。第3の実施の形態では、カメラボディ3200は、ステップS1070の処理の後、ステップS1080の処理を飛ばしてステップS1090へ処理を進めることにしてもよい。また、交換レンズ3100は、ステップS1260の処理の後、ステップS1280を飛ばしてステップS1290へ処理を進めてもよい。
〔3〕遮断コマンドの送受信は省略できる。第1および第2の実施の形態では、交換レンズ100は、ステップS160の処理の後、ステップS170(図4)またはステップS370(図9)の処理を飛ばしてステップS180へ処理を進めることにしてもよい。また、中間アダプタ400は、ステップS430の処理の後、ステップS440を飛ばしてステップS450へ処理を進めてもよい。第3の実施の形態では、交換レンズ3100は、ステップS1260の処理の後、ステップS1270の処理を飛ばしてステップS1280へ処理を進めることにしてもよい。また、中間アダプタ3400は、ステップS1420の処理の後、ステップS1430を飛ばしてステップS1440へ処理を進めてもよい。なお、この変形例は、上記〔2〕と組み合わせてもよく、たとえば、第3の実施の形態の場合、交換レンズ3100はステップS1260の処理の後ステップS1270とステップS1280を飛ばしてステップS1290へ処理を進めることにしてもよい。
〔4〕図4のフローチャートにおいて、ボディ側マイコン210は、ステップS10にてボディ側第2通信接点群212の各端子に接続される通信回路を遮断(切断、オープン、開放、Hi-Z状態にする)することとしたが、第1通信回路300側に切り替えることにしてもよい。この場合、ボディ側マイコン210は、ステップS130で送信される補正パラメータの要求コマンドやステップS170で送信される遮断コマンドを、ボディ側第2通信接点群212を用いて受信する。ボディ側マイコン210は、補正パラメータの要求コマンドや遮断コマンドを受信したとき、ただちに通信切替コマンドを送信することにしてもよい。なお、レンズ側マイコン110が補正パラメータの要求コマンドを受信した後ただちに通信切替コマンドを送信した場合、カメラボディ210は差動伝送方式を用いた通信などを用いてレンズ情報を交換レンズ100から受信することが好ましい。
日本国特許出願2012年第106851号(2012年5月8日出願)
100,3100 交換レンズ
110,3110 レンズ側マイコン
111 レンズ側第1通信接点群
112 レンズ側第2通信接点群
120 レンズ側マウント部
130,3130 レンズ側接点群
200,3200 カメラボディ
210,3210 ボディ側マイコン
211 ボディ側第1通信接点群
212 ボディ側第2通信接点群
220 ボディ側マウント部
230,3230 ボディ側接点群
300 第1通信回路
301 第2通信回路
302 切替器
303 切替制御回路
304 開閉器
305 開閉制御回路
400,3400 中間アダプタ
410 前マウント部
420 後マウント部
430 前接点群
440 後接点群
450,3450 アダプタ側マイコン
3111a,3111b,3111c,3111d,3211a,3211b,3211c,3211d,3451a,3451b 信号制御回路
Claims (16)
- カメラボディに着脱可能に装着されるアクセサリであって、
第1の伝送線路を用いて前記カメラボディと通信する第1通信部と、
所定条件が成立すると、前記第1の伝送線路と、前記第1の伝送線路とは異なる第2の伝送線路とを用いて前記カメラボディと通信する第2通信部と、
前記所定条件が成立すると、前記カメラボディとの通信を前記第1通信部による通信から前記第2通信部による通信に切り替える切替部と、
を備えるアクセサリ。 - 請求項1に記載のアクセサリにおいて、
前記第2通信部は、前記第1通信部を含むアクセサリ。 - 請求項1または2に記載のアクセサリにおいて、
前記第2通信部は、前記第1の伝送線路に出力された信号に相補的な反転信号を前記第2の伝送線路へ出力するアクセサリ。 - 請求項1から3のいずれか一項に記載のアクセサリにおいて、
前記アクセサリが前記第2通信部を備えることを表す仕様情報を記憶する情報記憶部をさらに備え、
前記第1通信部は、前記仕様情報を前記カメラボディへ送信し、
前記所定条件には、前記第1通信部が前記仕様情報を送信したことが含まれるアクセサリ。 - 請求項1から4のいずれか一項に記載のアクセサリにおいて、
前記アクセサリには、前記第2の伝送線路に電気的に接続する第2アクセサリが着脱可能に接続され、
前記第1通信部は、前記第2の伝送線路を用いて前記第2アクセサリとさらに通信するアクセサリ。 - カメラボディと前記カメラボディに着脱可能に装着される交換レンズとを有し、前記交換レンズと前記カメラボディとの間に第1の伝送線路と第2の伝送線路とを有するカメラシステムに用いられ、少なくとも前記交換レンズに着脱可能に装着されるアクセサリであって、
前記第1の伝送線路を用いて前記交換レンズと通信する通信部と、
前記交換レンズが前記第1伝送線路と前記第2伝送線路とを用いて前記カメラボディと通信を開始する際に、前記通信部による前記交換レンズとの通信を遮断する遮断部と、
を備えるアクセサリ。 - アクセサリが着脱可能に装着されるカメラボディであって、
第1の伝送線路を用いて前記アクセサリと通信する第1通信部と、
所定条件が成立すると、前記第1の伝送線路と、前記第1の伝送線路とは異なる第2の伝送線路とを用いて前記アクセサリと通信する第2通信部と、
前記所定条件が成立すると、前記アクセサリとの通信を前記第1通信部による通信から前記第2通信部による通信に切り替える切替部とを備えるカメラボディ。 - 請求項7に記載のカメラボディにおいて、
前記第2通信部は、前記第1通信部を含むカメラボディ。 - 請求項7または8に記載のカメラボディにおいて、
前記第2通信部は、前記第1の伝送線路に出力された信号に相補的な反転信号を前記第2の伝送線路へ出力するカメラボディ。 - 請求項7から9のいずれか一項に記載のカメラボディにおいて、
前記所定条件には、前記第1の伝送線路と前記第2の伝送線路とを用いて前記第2通信部と通信を行うアクセサリ側通信部を前記アクセサリが有していることに関する仕様情報を前記第1通信部が受信したことが含まれるカメラボディ。 - 第1ボディ接点と第2ボディ接点と第3ボディ接点と第4ボディ接点と第5ボディ接点と第6ボディ接点とを備えるカメラボディに着脱可能に装着されるアクセサリであって、
前記カメラボディに装着されているとき前記第1ボディ接点に接続される第1アクセサリ接点と、
前記カメラボディに装着されているとき前記第2ボディ接点に接続される第2アクセサリ接点と、
前記カメラボディに装着されているとき前記第3ボディ接点に接続される第3アクセサリ接点と、
前記カメラボディに装着されているとき前記第4ボディ接点に接続される第4アクセサリ接点と、
前記カメラボディに装着されているとき前記第5ボディ接点に接続される第5アクセサリ接点と、
前記カメラボディに装着されているとき前記第6ボディ接点に接続される第6アクセサリ接点と、
複数の第1伝送線路の各々を前記第1アクセサリ接点と前記第1ボディ接点との間、前記第2アクセサリ接点と前記第2ボディ接点との間、前記第3アクセサリ接点と前記第3ボディ接点との間にそれぞれ形成して、前記複数の第1伝送線路を用いて前記カメラボディと通信する第1通信部と、
所定条件が成立すると、複数の第2伝送線路の各々を前記第4アクセサリ接点と前記第4ボディ接点との間、前記第5アクセサリ接点と前記第5ボディ接点との間、前記第6アクセサリ接点と前記第6ボディ接点との間にそれぞれ形成して、前記複数の第1伝送線路と前記複数の第2伝送線路とを用いて前記カメラボディと通信する第2通信部と、
前記所定条件が成立すると、前記カメラボディとの通信を前記第1通信部による通信から前記第2通信部による通信に切り替える切替部と、
を備え、
前記第1通信部は、
前記第1アクセサリ接点と前記第1ボディ接点との間でリードライト信号を送受信し、
前記第2アクセサリ接点を介して前記第2ボディ接点から第1のクロックパルス信号を受信し、
前記リードライト信号が第1の真理値に対応するレベルの場合、前記第1のクロックパルス信号に同期した第1のデータ信号を前記第3アクセサリ接点を介して前記第3ボディ接点から受信し、
前記リードライト信号が前記第1の真理値とは異なる第2の真理値に対応するレベルの場合、前記第3アクセサリ接点を介して前記第3ボディ接点へ前記第1のデータ信号を送信し、
前記第2通信部は、
前記第1アクセサリ接点と前記第1ボディ接点との間で前記リードライト信号を送受信すると共に、前記リードライト信号に相補的な第1の反転信号を前記第4アクセサリ接点と前記第4ボディ接点との間で送受信し、
前記第2アクセサリ接点を介して前記第2ボディ接点から前記第1クロックパルス信号より周波数が高い第2のクロックパルス信号を受信すると共に、前記第2のクロックパルス信号に相補的な第2の反転信号を前記第5アクセサリ接点を介して前記第5ボディ接点から受信し、
前記リードライト信号が前記第1の真理値に対応するレベルの場合、前記第2のクロックパルス信号に同期した第2のデータ信号を前記第3アクセサリ接点を介して前記第3ボディ接点から受信すると共に、前記第2のデータ信号に相補的な第3の反転信号を前記第6アクセサリ接点を介して前記第6ボディ接点から受信し、
前記リードライト信号が前記第2の真理値に対応するレベルの場合、前記第3アクセサリ接点を介して前記第3ボディ接点へ前記第2のデータ信号を送信すると共に、前記第3の反転信号を前記第6アクセサリ接点を介して前記第6ボディ接点へ送信するアクセサリ。 - 請求項11に記載のアクセサリにおいて、
前記第2通信部は、前記第1通信部を含むアクセサリ。 - 請求項11または12に記載のアクセサリにおいて、
前記アクセサリが前記第2通信部を備えることを表す仕様情報を記憶する情報記憶部をさらに備え、
前記第1通信部は、前記仕様情報を前記カメラボディへ送信し、
前記所定条件には、前記第1通信部が前記仕様情報を送信したことが含まれるアクセサリ。 - 請求項11から13のいずれか一項に記載のアクセサリにおいて、
前記アクセサリには、前記第2の伝送線路に電気的に接続する第2アクセサリが着脱可能に接続され、
前記第1通信部は、
前記アクセサリに前記第2アクセサリが装着されているとき、前記第4アクセサリ接点を介して前記第2アクセサリへ第3のクロックパルス信号を送信し、
前記アクセサリに前記第2アクセサリが装着されているとき、前記第5アクセサリ接点を介して前記第2アクセサリとの間で前記第3のクロックパルス信号に同期する第3のデータ信号を送受信するアクセサリ。 - 第1ボディ接点と第2ボディ接点と第3ボディ接点と第4ボディ接点と第5ボディ接点と第6ボディ接点とを備えるカメラボディと、前記カメラボディに着脱可能に装着される交換レンズとを有するカメラシステムに用いられ、少なくとも前記交換レンズに着脱可能に装着されるアクセサリであって、
前記交換レンズは、
前記交換レンズが前記カメラボディに装着されているとき前記第1ボディ接点に接続される第1レンズ接点と、
前記交換レンズが前記カメラボディに装着されているとき前記第2ボディ接点に接続される第2レンズ接点と、
前記交換レンズが前記カメラボディに装着されているとき前記第3ボディ接点に接続される第3レンズ接点と、
前記交換レンズが前記カメラボディに装着されているとき前記第4ボディ接点に接続される第4レンズ接点と、
前記交換レンズが前記カメラボディに装着されているとき前記第5ボディ接点に接続される第5レンズ接点と、
前記交換レンズが前記カメラボディに装着されているとき前記第6ボディ接点に接続される第6レンズ接点と、
複数の第1伝送線路の各々を前記第1レンズ接点と前記第1ボディ接点との間、前記第2レンズ接点と前記第2ボディ接点との間、前記第3レンズ接点と前記第3ボディ接点との間にそれぞれ形成して、前記複数の第1伝送線路を用いて前記カメラボディと通信する第1通信部と、
所定条件が成立すると、複数の第2伝送線路の各々を前記第4レンズ接点と前記第4ボディ接点との間、前記第5レンズ接点と前記第5ボディ接点との間、前記第6レンズ接点と前記第6ボディ接点との間にそれぞれ形成して、前記複数の第1伝送線路と前記複数の第2伝送線路とを用いて前記カメラボディと通信する第2通信部と、
を備え、
前記アクセサリは、
前記交換レンズに装着されているとき前記第5レンズ接点に接続される第1アクセサリ接点と、
前記交換レンズに装着されているとき前記第6レンズ接点に接続される第2アクセサリ接点と、
前記第1アクセサリ接点と前記第2アクセサリ接点とを用いて前記交換レンズと通信する通信部と、
前記交換レンズが前記第2通信部を用いて前記カメラボディと通信を開始する際に、前記通信部による前記交換レンズとの通信を遮断する遮断部と、
を備えるアクセサリ。 - 第1アクセサリ接点と第2アクセサリ接点と第3アクセサリ接点と第4アクセサリ接点と第5アクセサリ接点と第6アクセサリ接点とを備えるアクセサリに着脱可能に装着されるカメラボディであって、
前記アクセサリに装着されているとき前記第1アクセサリ接点に接続される第1ボディ接点と、
前記アクセサリに装着されているとき前記第2アクセサリ接点に接続される第2ボディ接点と、
前記アクセサリに装着されているとき前記第3アクセサリ接点に接続される第3ボディ接点と、
前記アクセサリに装着されているとき前記第4アクセサリ接点に接続される第4ボディ接点と、
前記アクセサリに装着されているとき前記第5アクセサリ接点に接続される第5ボディ接点と、
前記アクセサリに装着されているとき前記第6アクセサリ接点に接続される第6ボディ接点と、
複数の第1伝送線路の各々を前記第1アクセサリ接点と前記第1ボディ接点との間、前記第2アクセサリ接点と前記第2ボディ接点との間、前記第3アクセサリ接点と前記第3ボディ接点との間にそれぞれ形成して、前記複数の第1伝送線路を用いて前記アクセサリと通信する第1通信部と、
所定条件が成立すると、複数の第2伝送線路の各々を前記第4アクセサリ接点と前記第4ボディ接点との間、前記第5アクセサリ接点と前記第5ボディ接点との間、前記第6アクセサリ接点と前記第6ボディ接点との間にそれぞれ形成して、前記複数の第1伝送線路と前記複数の第2伝送線路とを用いて前記アクセサリと通信する第2通信部と、
前記所定条件が成立すると、前記カメラボディとの通信を前記第1通信部による通信から前記第2通信部による通信に切り替える切替部と、
を備え、
前記第1通信部は、
前記第1アクセサリ接点と前記第1ボディ接点との間でリードライト信号を送受信し、
前記第2ボディ接点を介して前記第2アクセサリ接点へ第1のクロックパルス信号を送信し、
前記リードライト信号が第1の真理値に対応するレベルの場合、前記第1のクロックパルス信号に同期した第1のデータ信号を前記第3ボディ接点を介して前記第3アクセサリ接点へ送信し、
前記リードライト信号が前記第1の真理値とは異なる第2の真理値に対応するレベルの場合、前記第3ボディ接点を介して前記第3アクセサリ接点から前記第1のデータ信号を受信し、
前記第2通信部は、
前記第1アクセサリ接点と前記第1ボディ接点との間で前記リードライト信号を送受信すると共に、前記リードライト信号に相補的な第1の反転信号を前記第4アクセサリ接点と前記第4ボディ接点との間で送受信し、
前記第2ボディ接点を介して前記第2アクセサリ接点へ前記第1クロックパルス信号よりも周波数が高い第2のクロックパルス信号を送信すると共に、前記第2のクロックパルス信号に相補的な第2の反転信号を前記第5ボディ接点を介して前記第5アクセサリ接点へ送信し、
前記リードライト信号が前記第1の真理値に対応するレベルの場合、前記第2のクロックパルス信号に同期した第2のデータ信号を前記第3ボディ接点を介して前記第3アクセサリ接点へ送信すると共に、前記第6ボディ接点を介して前記第2のデータ信号に相補的な第3の反転信号を前記第6ボディ接点を介して前記第6アクセサリ接点へ送信し、
前記リードライト信号が前記第2の真理値に対応するレベルの場合、前記第2のデータ信号を前記第3ボディ接点を介して前記第3アクセサリ接点から受信すると共に、前記第3の反転信号を前記第6ボディ接点を介して前記第6アクセサリ接点から受信するカメラボディ。
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EP13787928.4A EP2848994A4 (en) | 2012-05-08 | 2013-05-08 | ACCESSORY AND BODY FOR TAKING APPARATUS |
US14/399,730 US20150116592A1 (en) | 2012-05-08 | 2013-05-08 | Accessory, and camera body |
CN201380024184.9A CN104272181A (zh) | 2012-05-08 | 2013-05-08 | 附件和相机机身 |
IN10405DEN2014 IN2014DN10405A (ja) | 2012-05-08 | 2014-12-05 |
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EP (1) | EP2848994A4 (ja) |
JP (1) | JPWO2013168742A1 (ja) |
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Also Published As
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US20150116592A1 (en) | 2015-04-30 |
EP2848994A4 (en) | 2016-05-11 |
EP2848994A1 (en) | 2015-03-18 |
CN104272181A (zh) | 2015-01-07 |
JPWO2013168742A1 (ja) | 2016-01-07 |
IN2014DN10405A (ja) | 2015-08-14 |
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