WO2013097046A1 - 电极共平面的发光二极管元件、封装结构及光反射结构 - Google Patents

电极共平面的发光二极管元件、封装结构及光反射结构 Download PDF

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Publication number
WO2013097046A1
WO2013097046A1 PCT/CN2011/002183 CN2011002183W WO2013097046A1 WO 2013097046 A1 WO2013097046 A1 WO 2013097046A1 CN 2011002183 W CN2011002183 W CN 2011002183W WO 2013097046 A1 WO2013097046 A1 WO 2013097046A1
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electrode
layer
emitting diode
light emitting
separate
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PCT/CN2011/002183
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English (en)
French (fr)
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赖东昇
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璩泽明
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Priority to PCT/CN2011/002183 priority Critical patent/WO2013097046A1/zh
Publication of WO2013097046A1 publication Critical patent/WO2013097046A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes

Definitions

  • Electrode coplanar light emitting diode element package structure and light reflecting structure
  • the present invention relates to an LED device, and more particularly to a structure in which a photo-planar flip-chip LED element, a flip-chip LED package structure, and a light-reflecting structure suitable for a flip-chip LED element.
  • Taiwan Patent Publication No. 573330, New Type M350824 US Patent No. 6,914,268, US 8,049,230, US 7,985,979, US 7,939,832, US 7,713,353, US 7,642, 121, US 7,462,86 US7 , 393,41 1, US 7,335,519, US 7,294,866, US 7,087,526, US 5,557, 1 15 , US 6,514,782, US 6,497,944, US 6,791, 1 19; and US Patent Publication No. US 2002/0163302 ,
  • US 6,914,268 for example, US 6,914,268 discloses a light emitting diode (LED) component, a package structure of a flip chip light emitting diode, and a reflective structure suitable for a flip chip light emitting diode component (LED DEVICE, FLIP-CHIP LED) PACKAGE AND LIGHT REFLECTING STRUCTURE ) , but its LED structure still has the following disadvantages:
  • the light-emitting diode element of the present invention proposes an invention of the light-emitting diode element to achieve an effect of effectively improving the assembly yield, simplifying the process, and effectively reducing the manufacturing cost. Summary of the invention
  • the main object of the present invention is to provide an LED component having at least two second electrodes of different and different poles, and the upper surface of the second electrode of the at least two different poles is designed to be coplanar, thereby enabling Effectively improve the assembly yield of the flip-chip LED package structure.
  • a further object of the present invention is to provide a light emitting diode element having at least two second electrodes of separate and different poles, and the second portion of the electrodes of the at least two different poles is relatively enlarged to cover the light emitting diode
  • a majority of the surface of the luminescent layer of the element is such that the two separate portions of the electrode can act as a reflective layer of light emitted by the luminescent layer to achieve a simplified process and an effective reduction in manufacturing cost.
  • the present invention provides an electrode coplanar light emitting diode device, comprising: an element substrate; a first type doped layer formed on the element substrate; a second type doped layer, Forming and disposed on a portion of the first doped layer, the interface of the second doped layer and the first doped layer forms a light emitting layer to emit light; a transparent conductive metal oxide layer, Forming and disposed on the second type doped layer as an ohmic contact layer; at least two different pole electrode first portions, comprising: at least one first electrode first portion, the first electrode first portion forming And being disposed on the first type doped layer to be electrically connected to the first type doped layer; and at least a second electrode first portion, the second electrode first portion passing through the transparent conductive gold Formed on the second type doped layer to be electrically connected to the second type doped layer, wherein the at least one first electrode first portion and the at least one second electrode first The top surfaces of the portions are respectively located at different height positions; a first transparent insulator
  • the light emitting diode element wherein the range of the at least two separate grooves is relatively enlarged to cover a majority of the surface of the light emitting layer, so that the at least two formed in the at least two separate grooves
  • the second electrode of the separate and different poles serves as a reflective layer of light emitted by the luminescent layer for reflecting light emitted by the luminescent layer and directed toward the reflective layer.
  • the light emitting diode element wherein the second portion of the at least two separate and different pole electrodes is formed by deposition using a sputtering method, a plating method, or a plating (electroless metal) method.
  • the light emitting diode element wherein the at least two separate and different pole electrode second portions can be further subjected to a flattening operation after the deposition is formed to make the at least two separate and different pole electrodes on the second portion The surface becomes coplanar.
  • the element substrate comprises a sapphire substrate and a glass substrate.
  • the first doped layer and the second doped layer are each composed of a III-V compound semiconductor material.
  • III-V compound semiconductor material is nitrided Gallium nitride (GaN), gallium phosphide (GaP) and/or gallium phosphide arsenide (GaAsP).
  • the transparent conductive metal oxide layer is made of a material selected from the group consisting of indium tin oxide (ITO), cerium tin oxide (CTO), and oxidized 4 tin (ATO, antimony).
  • ITO indium tin oxide
  • CTO cerium tin oxide
  • ATO oxidized 4 tin
  • Tin oxide aluminum zinc oxide
  • IZO indium zinc oxide
  • ZO zinc oxide
  • the light emitting diode device wherein when the first type doped layer is an N type doped layer, the second type doped layer is a P type doped layer; when the first type doped layer is A P-type doped layer, the second type doped layer is an N-type doped layer.
  • the light emitting diode element wherein when the first portion of the electrode of the at least two different poles is made of gold, the second portion of the electrode of the at least two separate and different poles is formed by using tin as a conductive metal and filling up separately
  • the first portion of the electrode electrically connected to the at least two different poles is respectively provided in the at least two separate W slots.
  • the light emitting diode element wherein when the first portion of the electrode of the at least two different poles is made of aluminum, the second portion of the electrode of the at least two separate and different poles first utilizes nickel as a conductive metal to A nickel layer is formed in the two separate grooves to be electrically connected to the first portion of the at least two electrodes, respectively, and the gold is used as a conductive metal to form a gold layer on the nickel layer.
  • the present invention also provides an electrode coplanar flip-chip LED package structure, comprising: a package substrate; and at least one light emitting diode element, wherein the light emitting diode element is the light emitting diode element, which is overturned
  • the package substrate is electrically connected to the package substrate.
  • the flip-chip LED package structure wherein the LED component is electrically connected to the package substrate through at least two conductive metal bumps, and the at least two conductive metal bumps are respectively disposed on the LED component
  • the at least two separate and different pole electrodes are on the second portion.
  • the flip-chip LED package structure wherein the package substrate is a printed circuit (PCB) substrate having a heat dissipation function, comprising:
  • An insulating substrate having upper and lower side surfaces
  • Two circuit layers are respectively formed and disposed on both side surfaces of the insulating substrate, wherein The circuit layer on one side surface is respectively disposed on the second portion of the electrode of the at least two separate and different poles of the at least one light emitting diode element through at least two conductive metal bumps, so that the at least one light emitting diode element passes the at least one light emitting diode element
  • Two second electrodes of different and different poles are electrically connected to the package substrate;
  • At least two heat dissipation holes are disposed between the two side surfaces of the insulating substrate, and the plurality of heat dissipation holes are provided with a heat conductive material to electrically connect the light emitting diode elements on one side surface of the insulating substrate
  • the heat source generated in the operation is conducted from one side surface of the insulating substrate to the other side surface to dissipate heat outward.
  • the flip-chip light emitting diode package structure wherein a reflective layer is further disposed on a side surface of the package substrate facing the light emitting diode element for use as a reflective layer of light emitted by the light emitting layer of the light emitting diode element. Light rays emitted by the light emitting diode element and directed toward the reflective layer can be reflected.
  • the flip-chip LED package structure wherein the reflective layer is formed on a surface of the package substrate facing the light emitting diode element by a method of a sputtering method or a tin-spraying method.
  • the flip-chip LED package structure wherein the plurality of heat dissipation holes provided in the plurality of heat dissipation holes comprise a resin, a silver paste and a thermal paste.
  • the present invention further provides a light reflecting structure suitable for a flip-chip light emitting diode device, comprising: a transparent conductive metal oxide layer formed on a semiconductor layer of a light emitting diode element; a first transparent insulating layer Forming and covering the transparent conductive metal oxide layer; and at least two separate and different electrode second portions comprising at least a first electrode second portion and at least a second electrode second portion, Forming at least one conductive metal respectively corresponding to two separate electrodes electrically connected to the light emitting diode element; wherein an upper surface of the second portion of the at least two separate and different pole electrodes is coplanar;
  • the second portion of the electrode of the at least two separate and different poles is relatively enlarged to cover a majority of the surface of the semiconductor layer covering the light emitting diode element such that the second portion of the electrode of the at least two separate and different poles
  • a reflective layer of light emitted by the light emitting diode element is for reflecting light emitted by the light emitting diode element and directed toward the reflective layer.
  • FIG. 1 is a schematic cross-sectional view showing an embodiment of an electrode coplanar light emitting diode device according to an embodiment of the present invention
  • FIG. 2 is a top plan view of an embodiment of an electrode coplanar light emitting diode device of the present invention
  • FIG. 3 is a cross-sectional view showing a structure of an embodiment of an electrode coplanar light emitting diode device according to an embodiment of the present invention
  • FIG. 4 is a cross-sectional view showing the structure of another embodiment of the electrode coplanar light emitting diode device of the present invention.
  • Electrodes are respectively formed of different conductive metals
  • Electrodes are respectively formed of different conductive metals
  • FIG. 7 to 9 are schematic cross-sectional views showing the structure of three embodiments of the flip-chip type LED package structure of the present invention.
  • FIG. 10 is a schematic cross-sectional view and a light path diagram of an embodiment of a light-reflecting structure of the present invention
  • FIG. 11 is a schematic cross-sectional view and a light path diagram of another embodiment of the light-reflecting structure of the present invention.
  • the LED device 1 of the present embodiment includes a device substrate 10, a st-type doped layer 20, and a 2nd-type doped layer 30. a transparent conductive oxide layer 50, at least two different poles of a first portion of an electrode (60, 70), and a first transparent insulating passivation layer 80 a second insulating layer 90 and at least two separate second portions of electrodes (100, 1 10 ).
  • the element substrate 10 of this embodiment can be constructed using a sapphire substrate, but is not limited, and can be constructed using a glass substrate.
  • the first type doping layer 20 of the present embodiment is formed and disposed on the element substrate 10, and the second type doping layer 30 is formed and disposed on a portion of the first type doping layer 20, wherein the second The interface of the doped layer 30 and the first doped layer 20 forms a light emitting layer 40 to emit light.
  • the first doped layer 20 may be a P-type doped layer or an N-type doped layer, and the second doped layer 30 is the first doped layer
  • the second doped layer 30 is a P-type doped layer; the first and second doped layers 20, 30 utilize a A III-V compound semiconductor material, such as gallium nitride (GaN), gallium phosphide (GaP) or gallium phosphide arsenide (GaAsP).
  • a A III-V compound semiconductor material such as gallium nitride (GaN), gallium phosphide (GaP) or gallium phosphide arsenide (GaAsP).
  • the transparent conductive metal oxide layer 50 of the present embodiment is formed and disposed on the second type doped layer 30 as an ohmic contact layer; the transparent conductive metal oxide layer 50 is made of indium tin oxide (ITO, indium tin) Oxide is preferred but not limited.
  • ITO indium tin oxide
  • CTO cerium tin oxide
  • antimony tin oxide AT O
  • aluminum zinc oxide AZO , aluminum zinc oxide
  • IZO indium zinc oxide
  • ZO zinc oxide
  • the first portion of the at least two different pole electrodes of the embodiment includes at least one second electrode first portion 60 and at least one first electrode first portion 70, wherein the at least one second electrode first portion 60 passes through the The transparent conductive metal oxide layer 50 is formed and disposed on the second type doped layer 30 to be electrically connected to the second type doped layer 30.
  • the second and the second The electrode first portion 60 electrically conductively defined by the doped layer 30 is defined as a second electrode first portion 60; wherein the at least one first electrode first portion 70 is formed and disposed on the first doped layer 20 Electrically conducting with the first doped layer 20, for convenience of explanation, the first portion 70 of the electrode electrically connected to the first doped layer 20 in FIG. 1 is defined as the first portion of the first electrode.
  • the second electrode first portion 60 and the top surface of the first electrode first portion 70 are respectively located at different height positions to form two electrode first portions that are non-coplanar.
  • the number of the at least one second electrode first portion 60 and the first electrode first portion 70 is not limited, and the requirements of the visible conductive performance such as the magnitude of the current amount or the current distribution are hooked.
  • a plurality of second electrode first portions 60 and a plurality of first electrode first portions 70 are respectively disposed, and four second electrodes first portions 60 and four are respectively disposed as shown in FIG. 2
  • the first electrode portion 70 is not limited, and is respectively hooked and electrically connected to the second doping layer 30 and the first doping layer 20 .
  • the second electrode first portion 60 and the first electrode first portion 70 are herein defined as “electrode first portion”, which is the “electrode first portion (60, 70)” and then the “electrode first portion”” (described later) to combine to form a complete electrode.
  • the first transparent insulating layer 80 of the present embodiment is formed on and covers the surface of the element substrate 10, the first doping layer 20, the second doping layer 30, and the transparent conductive metal oxide layer 50, The at least one first electrode first portion 70 and the at least one second electrode first portion 60 can be exposed to the outside through the first insulating layer 80.
  • the first transparent insulating layer 80 can be regarded as a transparent insulating passivation layer.
  • the second insulating layer 90 of the present embodiment is formed and covers the first insulating layer 80 and the at least one first and second electrode first portions 70, 60.
  • the upper surface 91 of the second insulating layer 90 is a plane having a uniform height or a nearly uniform height, and the upper surface 91 is provided with at least two separate grooves 92, 93 (as shown in FIG. 3) to respectively Corresponding to the at least one first and second electrode first portions 70, 60 such that the at least one first and second electrode first portions 70, 60 respectively pass through the at least two separate grooves 92, 93 Appearing outward as shown in FIG.
  • the at least two separate and different pole electrode second portions 100, 1 10 of the embodiment are included to a second electrode second portion 100 and at least one first electrode second portion 110 formed by using at least one conductive metal to fill the at least two separate grooves 92, 93, respectively, to
  • the at least one second electrode second portion 100 and the at least one first electrode second portion 110 are electrically coupled to the at least one second electrode first portion 60 and the at least one second electrode first portion 70, respectively.
  • the upper surfaces 101, 1 1 1 of the second and different pole electrode portions 100, 1 10 are coplanar or nearly coplanar.
  • the at least one second electrode second portion 100 and the first electrode second portion 1 10 are herein defined as “electrode second portion", which is the “electrode second portion (100, 1 10)" for respectively
  • the “electrode first part (60, 70)” combines to form a complete and integral electrode.
  • the at least one second electrode second portion 100 and the at least one first electrode second portion 110 indicate that the second electrode second portion 100 and the first electrode second portion 110 are not limited to one, that is,
  • the second electrode 100 of the second electrode can be electrically connected to the first electrode 60 of the second electrode. As shown in FIG. 2, two (at least one) second electrode and the second portion 100 can also be utilized.
  • the first portion 60 (not shown) is electrically connected to each of the two second electrodes.
  • the extent of the at least two separate grooves 92, 93 of the present embodiment is further expandable to cover a substantial portion of the surface of the luminescent layer 40, thus at least two separate The at least two separate electrode second portions 100, 110 formed in the recesses 92, 93 are also relatively enlarged to cover a majority of the surface of the luminescent layer 40, such that the at least two separate electrodes second portion 100 1 10 can further serve as a reflective layer of light emitted by the luminescent layer 40 for reflecting light emitted by the luminescent layer 40 and directed toward the reflective layer.
  • a reflective layer such as the reflective layer 150/250 disclosed in U.S. Patent No. 6,914,268) can be reduced.
  • the at least two separate and different pole electrode portions 100, 110 of this embodiment may be formed by depositing at least two of the sputtering method, the plating method, and the plating (electroless metal) method. Separate grooves 92, 93.
  • the at least two separate and different pole electrode portions 100, 110 may be further planarized by a flattening operation such that the upper surfaces 101, 1 1 1 of the electrode second portions 100, 110 become coplanar Or nearly coplanar, so as to effectively improve the assembly yield of the flip-chip LED package structure.
  • the light emitting diode element 1 of the present invention may be further formed on the second type doping layer 30 and provided with a trained-layer superlattice contact layer (not shown). So that the stress superlattice layer is disposed in the second The doped layer 30 is interposed between the doped layer 30 and the transparent conductive metal oxide layer 50.
  • the stress superlattice layer is a strained-layer superlattice (SLS) contact layer 135/235 as disclosed in the prior art, for example, US 6,914,268 B2.
  • the at least two separate and different pole electrode portions 100, 110 including the at least one second electrode second portion 100 and the at least one first electrode second portion 1 10, utilize tin
  • the conductive metal is filled in the at least two separate grooves 92, 93, respectively, for respectively corresponding to the electrode first portions 60, 70 electrically coupled to the at least two different poles.
  • FIG. 5 and FIG. 6 are respectively a schematic cross-sectional view of another embodiment of the electrode coplanar light-emitting diode element of the present invention and a structural cross-sectional view of the electrodes respectively formed of different conductive metals.
  • the structure of the light emitting diode element 1a of the present embodiment is mostly the same as that of the light emitting diode element 1 shown in FIG. 1 to FIG. 3, and also includes an element substrate 10, a first type doping layer 20, and a second type doping layer. 30.
  • the light-emitting diode element 1a of the present embodiment is further compared with the light-emitting diode element 1 shown in FIG. 1 to FIG. 3, and the upper surface 91 of the second insulating layer 90 of the present embodiment is also a plane of uniform height or nearly uniform height.
  • the upper surface 91 is provided with at least two separate recesses 92a, 93a (shown in FIG. 4) corresponding to the at least one first and second electrode first portions 70, 60, respectively. So that the at least one first and second electrode first portions 70, 60 are respectively exposed outwardly through the at least two separate grooves 92a, 93a as shown in FIG. 4, wherein the at least two separate grooves
  • the notch openings of 92a, 93a are also coplanar or nearly coplanar.
  • the greatest difference between the above two embodiments 1, la is that the range of the at least two separate grooves 92a, 93a of the present embodiment is not expanded to the light-emitting diode element 1 shown in FIGS. Covering most of the surface of the luminescent layer 40, that is, the at least two separate grooves 92a, 93a of the present embodiment exhibit a circular hole shape, thus forming within the at least two separate grooves 92a, 93a The at least two separate electrode second portions 100, 1 10 are also confined within the circular hole-shaped recesses 92a, 93a.
  • the first portion of the electrode of the at least two different poles that is, the at least one second electrode first portion 60 and At least one first electrode first portion 70
  • the at least two separate and different electrode second portions 100, 110 that is, at least one second electrode second portion 100 and at least one first electrode
  • the second portion 110 is formed by using tin as a conductive metal to fill the at least two separate grooves 92a, 93a, respectively, for electrically connecting to the at least two electrode first portions 60, 70, respectively.
  • the first part of the electrode of the at least two different poles that is, the at least one second electrode first part 60 and at least one
  • the second portion 100, 110 of the at least two separate and different poles includes at least a second electrode portion 100 and at least a first electrode portion 110, first using nickel (electroless metal) as a conductive metal to form a nickel layer 102, 112 (shown in FIG.
  • FIG. 7 there are shown schematic cross-sectional views of three embodiments of a flip-chip LED package structure obtained by flip-chip mounting of the light-emitting diode element 1 and la of the present invention.
  • the flip-chip type LED package structure 2 of the present invention is formed by assembling a package substrate 120 with at least one of the foregoing light-emitting diode elements 1 or la.
  • the flip-chip LED package structure 2 mainly comprises a package substrate 120 and at least one light emitting diode element 1 as shown in FIG. 7 or at least one light emitting diode element la as shown in FIG. 8 and FIG.
  • the flip-chip LED package structure 2 is illustrated by a package substrate 120 and two LED elements 1 as shown in FIG.
  • the diode package structure 2 is illustrated by a package substrate 120 and two LED elements 1a as shown in FIG. 5 as an example. However, in FIG. 9, the flip-chip LED package structure 2 is packaged with a substrate 120 and Two LED elements la as shown in FIG. 6 are assembled as an example but are not limited.
  • the at least one light emitting diode element 1 or la is overlaid on the package substrate 120 and electrically connected to the package substrate 120 through at least two conductive metal bumps 130, wherein the at least two conductive metal bumps 130 are respectively disposed on The at least two points of the light emitting diode element 1 or la
  • the second electrode 100, 1 10 is opened.
  • the package substrate 120 can be used as a substrate by using a printed circuit board having a heat dissipation function instead of the prior art.
  • the package substrate 120 includes: an insulating substrate 121, at least two circuit layers 122, 123, and at least two heat dissipation holes 124, 125 as shown in FIGS. 7-9; wherein the insulating substrate 121 has upper and lower sides
  • the at least two circuit layers 122, 123 are respectively formed on the two side surfaces of the substrate 121, and the circuit layer 122 on one side surface passes through the at least two conductive metal bumps 130 to make the at least one
  • the light emitting diode element 1 or 1b can be electrically connected to the package substrate 120 through the at least two separate electrode second portions 100, 110; the at least two heat dissipation holes 124, 125 are disposed on the insulating substrate 121.
  • each of the heat dissipation holes 124, 125 is provided with a heat conductive material such as a resin, a silver paste, a thermal paste or the like to electrically connect the at least the side surface 122 of the package substrate 120.
  • a heat source generated by an LED component 1 or 1a is conducted by one side surface 122 of the package substrate 120 to the other side surface 123 to dissipate heat outward.
  • At least one reflective layer 140 is further disposed on the one side surface 122 of the package substrate 120 facing the at least one light emitting diode element 1a, as the at least one light emitting diode element 1a.
  • a reflective layer of light emitted by the luminescent layer 40 is configured to reflect light emitted by the at least one light emitting diode element 1a and directed toward the reflective layer 140.
  • the reflective layer 140 can be formed on the side surface 122 of the package substrate 120 facing the light emitting diode element by a sputtering method or a soldering method, that is, the reflective layer 140 can be regarded as a spray formed on the circuit layer 122.
  • the tin layer also has an effect of protecting the circuit layer 122 from oxidation.
  • the present invention further provides a light reflecting structure suitable for a flip-chip light emitting diode element for the light emitting diode element 1 or 1a as shown in FIG. 1 or FIG. 6 . 3 or 3a, comprising: a transparent conductive metal oxide layer 50 formed on a semiconductor layer of a light emitting diode element 1; a first transparent insulating layer 80 Forming and covering the transparent conductive metal oxide layer 50; and at least two separate electrode second portions 100, 110 comprising at least one second electrode second portion 100 and at least one first electrode second
  • the portion 1 10 is formed by using at least one conductive metal and corresponding to the at least one second electrode first portion 60 and the at least one second electrode portion electrically connected to the light emitting diode element 1 A 70.
  • the reflective structure 3 or 3a of the present invention is compared with the prior art, such as US 6,914,268, the main distinguishing feature of which is that the upper surfaces 101, 1 1 1 of the at least two separate and different pole electrode portions 100, 1 10 are The coplanar structure, the reflective structure 3 of the present invention has the effect of improving the assembly yield of the flip-chip LED package structure as compared with the prior art, such as US 6,914,268.
  • a further distinguishing feature of the light reflecting structure 3 of the present invention as shown in FIG. 10 is that the range of the at least two separate electrode second portions 100, 110 is relatively expanded to cover a semiconductor layer of the light emitting diode element 1 such as light. Most of the surface of layer 40 such that the two separate electrode second portions 100, 1 10 can serve as light from luminescent layer 40 of light-emitting diode element 1, as shown in Figure 10 as a reflective layer that emits light A. For reflecting light emitted by the light-emitting layer 40 of the light-emitting diode element 1 and directed toward the reflective layer, the reflected light B as shown in FIG. Therefore, the reflective structure 3 of the present invention has the advantages of simplifying the process and effectively reducing the manufacturing cost as compared with the prior art, such as US 6,914,268.
  • a further distinguishing feature of the light-reflecting structure 3a of the present invention as shown in FIG. 11 is as follows: Referring to FIG. 8 and FIG. 9, a package substrate 120 assembled with the light-emitting diode element 1a faces the at least one light-emitting diode element. Further, at least one reflective layer 140 may be disposed on the one side surface of the la for the light emitted by the light emitting layer 40 of the at least one light emitting diode element 1a, as shown in FIG. Light rays emitted from the at least one light emitting diode element 1a and directed toward the reflective layer 140 may be reflected, as reflected in the light B as shown in FIG.
  • the reflective layer 140 can be formed on the side surface of the package substrate 120 facing the light emitting diode element 1a by a sputtering method or a tin-spraying method, so that the reflective structure 3a of the present invention has a simplified process compared with the prior art, such as US 6,914,268. And effectively reduce the cost of production.

Abstract

一种电极共平面的发光二极管元件、封装结构及光反射结构,发光二极管元件包含:元件基板、第一、第二型掺杂层、发光层、透明导电金属氧化物层、不同极的电极第一部、第一绝缘层、第二绝缘层及不同极的电极第二部;第二绝缘层覆盖第一绝缘层及不同极的电极第一部上,其上表面为平面且其上设有分开的凹槽供对应于不同极的电极第一部;电极第二部利用导电金属布满在凹槽内且分别对应电性连结于不同的电极第一部而形成不同极的完整电极,电极第二部的上表面为共平面;凹槽的范围能相对地扩大至涵盖该发光层的大部分表面,以使电极第二部能同时作为该发光层发出的光的反射层;由此达成提升组装良率、简化制程及降低制作成本的功效。

Description

电极共平面的发光二极管元件、 封装结构及光反射结构 技术领域
本发明有关一种发光二极管元件, 尤指一种电极为共平面的覆晶式 发光二极管元件的结构、 覆晶式发光二极管封装结构, 及适用于覆晶式 发光二极管元件的光反射结构。 背景技术
在有关覆晶式发光二极管元件 ( flip-chip light emitting diode ) 或覆 晶式发光二极管封装结构或适用于覆晶式发光二极管的反射结构等技术 领域中, 目前已存在多种现有技术, 如: 中国台湾专利公告第 573330号、 新型第 M350824号; 美国专利 US6,914,268、 US8,049,230、 US7,985,979、 US7, 939,832、 US7,713,353、 US7,642, 121、 US7,462,86 US7, 393,41 1、 US7,335,519、 US7,294,866、 US7,087,526、 US5,557, 1 15、 US6, 514,782、 US6,497,944、 US6,791 , 1 19; 及美国专利公开号 US2002/0163302、
US2004/01 13 156等。 而上述该多个现有技术大都是针对一发光二极管 ( LED ) 元件结构或其封装 ( package ) 结构, 在发光效率、 散热功能、 使用寿命、 制造成本、 组装良率、 制程简化、 光衰等方面所产生的问题 与缺失, 而提出可解决该多个问题与缺失的不同的技术手段。
以 US6,914,268为例说明, US6, 914,268揭示一种发光二极管( LED ) 元件、 覆晶式发光二极管的封装结构及一适用于覆晶式发光二极管元件 的反射结构 ( LED DEVICE, FLIP-CHIP LED PACKAGE AND LIGHT REFLECTING STRUCTURE ) , 但其 LED结构仍然存在下列缺点:
( 1 ) US6, 914,268所揭示的两个电极连接垫, 如其图 1 -3 中所示的 正极 ( anode , 160/260 ) 及负极 ( cathode , 170/270 ) , 均非共平面, 致 造成后续制程如覆晶式发光二极管封装结构 (如该专利的图 3所示) 的 组装良率无法有效提升, 且相对无法简化制程及有效降低制作成本。
( 2 ) US6, 914, 268所揭示的一电极连接垫, 如其图 1 -3 中所示的正 极( anode , 160/260 ) , 形成并位于一反射层 ( reflecting layer, 150/250 ) 上, 而该反射层 ( reflecting layer, 150/250 ) 又系形成并位于一透明导电 金属氧化物层 ( transparent conductive oxide layer , 140/240 ) 上, 因此制 程中, 该正极 ( anode , 160/260 ) 须穿过该反射层 ( 150/250 ) 及该透明 导电金属氧化物层( 140/240 ) 以能与一 P型掺杂层( P-type doped layer, 130/230 ) 电性连接, 如此相对造成制程的复杂化, 无法简化制程及有效 降低制作成本。
由上可知, 上述该多个现有技术的结构及制程实难以符合实际使用 时的需求, 因此在发光二极管元件、 覆晶式发光二极管封装结构及光反 射结构等结构设计方面, 尤其针对一覆晶式发光二极管元件的电极连接 垫 (如 US6, 914,268的正极 160/260 ) 及反射层 (如 US6,914,268的
150/250 ) , 仍存在进一步改进的需要性。 本发明的发光二极管元件在此 技术发展空间有限的领域中, 提出一种发光二极管元件的发明, 以达成 有效提升组装良率、 简化制程及有效降低制作成本的功效。 发明内容
本发明主要目的在于提供一种发光二极管元件, 其具有至少两个分 开且不同极的电极第二部, 且该至少两个不同极的电极第二部的上表面 设计为共平面, 由此能有效提升覆晶式发光二极管封装结构的组装良率。
本发明再一目的在于提供一种发光二极管元件, 其具有至少两个分 开且不同极的电极第二部, 且该至少两个不同极的电极第二部的范围相 对地扩大至涵盖该发光二极管元件的发光层的大部分表面, 以使该两个 分开的电极第二部能作为该发光层发出的光的反射层, 以达成简化制程 及有效降低制作成本的功效。
为达成上述目的, 本发明提供一种电极共平面的发光二极管元件, 包含: 一元件基板; 一第一型掺杂层, 其形成且设置在该元件基板上; 一第二型掺杂层, 其形成且设置在部分的该第一型掺杂层上, 该第二型 掺杂层与该第一型掺杂层的交界面形成一发光层以发出光; 一透明导电 金属氧化物层, 其形成且设置在该第二型掺杂层上供作为欧姆接触层; 至少两个不同极的电极第一部, 其包含: 至少一第一电极第一部, 该第 一电极第一部形成且设置在该第一型掺杂层上以与该第一型掺杂层电性 导通; 及至少一第二电极第一部, 该第二电极第一部穿过该透明导电金 属氧化物层而形成且设置在该第二型掺杂层上以与该第二型掺杂层电性 导通, 其中该至少一第一电极第一部及该至少一第二电极第一部的顶面 分别位于不同的高度位置; 一第一透明绝缘层, 其形成且覆盖在该元件 基板、 该第一型掺杂层、 该第二型掺杂层及该透明导电金属氧化物层的 表面上, 以使该至少一第一电极第一部及该至少一第二电极第一部能由 该第一绝缘层向外显露; 一第二绝缘层, 其形成且覆盖在该第一绝缘层 及该至少一第一电极第一部和第二电极第一部上, 该第二绝缘层的上表 面为一均匀高度的平面, 且该上表面上开设有至少两个分开的凹槽以分 别对应于该至少一第一电极第一部及第二电极第一部以使该至少一第一 电极第一部及第二电极第一部能够分别通过该至少两个分开的凹槽而向 外显露, 其中该至少两个分开的凹槽的 w槽口为共平面; 及至少两个分 开且不同极的电极第二部, 包含至少一第一电极第二部及至少一第二电 极第二部, 其利用至少一导电金属以形成且分别填满在该至少两个分开 的凹槽内供分别对应电性连结于该至少一第一电极第一部及该至少一第 二电极第一部以形成至少两个分开的一体式电极, 且该至少两个分开的 电极第二部的上表面为共平面。
所述的发光二极管元件, 其中, 该至少两个分开的凹槽的范围是相 对地扩大至涵盖该发光层的大部分表面, 以使形成在该至少两个分开的 凹槽内的该至少两个分开且不同极的电极第二部作为该发光层发出的光 的反射层, 供能够反射由该发光层发出并射向该反射层的光线。
所述的发光二极管元件, 其中, 该至少两个分开且不同极的电极第 二部利用溅镀方法、 电镀方法、 化镀 (无电解金属) 方法中一种形成方 法以沉积形成。
所述的发光二极管元件, 其中, 该至少两个分开且不同极的电极第 二部在沉积形成之后, 能够进一步通过磨平作业以使该至少两个分开且 不同极的电极第二部的上表面成为共平面。
所述的发光二极管元件, 其中, 该元件基板包含蓝宝石基板及玻璃 基板。
所述的发光二极管元件, 其中, 该第一型掺杂层及第二型掺杂层皆 由一 III- V族化合物半导体材料所构成。
所述的发光二极管元件, 其中, 该 III- V族化合物半导体材料为氮化 镓 ( gallium nitride , GaN ) 、 磚化镓 ( gallium phosphide , GaP ) 及 /或碑 砷化镓 ( gallium phosphide arsenide , GaAsP ) 。
所述的发光二极管元件, 其中, 该透明导电金属氧化物层的材质选 自由氧化铟锡( ITO , indium tin oxide )、氧化铈锡( CTO , cerium tin oxide )、 氧化 4弟锡 ( ATO , antimony tin oxide ) 、 氧化铝锌 ( AZO, aluminum zinc oxide ) 、 氧化铟锌 ( IZO , indium zinc oxide ) 、 氧化锌 ( ZO , zinc oxide ) 所组成的族群。
所述的发光二极管元件, 其中, 当该第一型掺杂层为一 N型掺杂层 时, 该第二型掺杂层为一 P型掺杂层; 当该第一型掺杂层为一 P型掺杂 层, 该第二型掺杂层为一 N型掺杂层。
所述的发光二极管元件, 其中, 当该至少两个不同极的电极第一部 以金构成时, 该至少两个分开且不同极的电极第二部利用锡为导电金属 以形成且分别填满在该至少两个分开的 W槽内供分别对应电性连结于该 至少两个不同极的电极第一部。
所述的发光二极管元件, 其中, 当该至少两个不同极的电极第一部 以铝构成时, 该至少两个分开且不同极的电极第二部先利用化镍为导电 金属以在该至少两个分开的凹槽内先形成一化镍层供分别对应电性连结 于该至少两个电极第一部, 再利用化金为导电金属以在该化镍层上形成 一化金层。
本发明还提供一种电极共平面的覆晶式发光二极管封装结构, 包含: 一封装基板 ( package substrate ) ; 及至少一发光二极管元件, 该发光二 极管元件为所述的发光二极管元件, 其倒覆在该封装基板上而与该封装 基板电性连接。
所述的覆晶式发光二极管封装结构, 其中, 该发光二极管元件通过 至少两个导电金属凸块以与该封装基板电性连接, 该至少两个导电金属 凸块分别设于该发光二极管元件的该至少两个分开且不同极的电极第二 部上。
所述的覆晶式发光二极管封装结构, 其中, 该封装基板为一具有散 热功能的印刷电路 ( PCB ) 基板, 包含:
一绝缘基板, 具有上、 下两个侧表面;
两个线路层, 分别形成并设置在该绝缘基板的两个侧表面上, 其中 一个侧表面上的线路层通过至少两个导电金属凸块分别设于该至少一发 光二极管元件的至少两个分开且不同极的电极第二部上, 以使该至少一 发光二极管元件通过该至少两个分开且不同极的电极第二部以电性连接 在该封装基板上; 及
至少两个散热孔, 其穿设在该绝缘基板的两个侧表面之间, 该多个 散热孔内设具导热材料以将电性连接在该绝缘基板一侧表面上的该发光 二极管元件在操作中所产生的热源由该绝缘基板的一个侧表面传导至另 一个侧表面而向外散热。
所述的覆晶式发光二极管封装结构, 其中, 该封装基板面向该发光 二极管元件的一个侧表面上进一步设置一反射层, 用以作为该发光二极 管元件的发光层发出的光的反射层, 供能够反射由该发光二极管元件发 出并射向该反射层的光线。
所述的覆晶式发光二极管封装结构, 其中, 该反射层利用溅镀方法、 喷锡方法中一种方法以形成在该封装基板面向该发光二极管元件的表面 上。
所述的覆晶式发光二极管封装结构, 其中, 该多个散热孔内所设具 的导热材料包含树脂、 银膏及导热膏。
本发明又提供一种光反射结构, 其适用于覆晶式发光二极管元件, 包含: 一透明导电金属氧化物层, 其形成且设置在一发光二极管元件的 半导体层上; 一第一透明绝缘层, 其形成且覆盖在该透明导电金属氧化 物层上; 及至少两个分开且不同极的电极第二部, 其包含至少一第一电 极第二部及至少一第二电极第二部, 其利用至少一导电金属形成而分别 对应电性连结于该发光二极管元件的两个分开的电极上; 其中该至少两 个分开且不同极的电极第二部的上表面为共平面;
其中该至少两个分开且不同极的电极第二部的范围是相对地扩大至 涵盖该发光二极管元件的半导体层的大部分表面, 以使该至少两个分开 且不同极的电极第二部作为该发光二极管元件所发出光的反射层供反射 由该发光二极管元件所发出并射向该反射层的光线。
为使本发明更加明确详实, 将本发明的结构、 制程及技术特征, 配 合下列图示详述如后: 附图说明
图 1 为本发明的电极共平面的发光二极管元件一实施例的结构剖面 示意图;
图 2为本发明的电极共平面的发光二极管元件一实施例的上视示意 图;
图 3为本发明的电极共平面的发光二极管元件一实施例的制程中一 结构剖面示意图;
参考图 4、 5、 6所示, 其分别为本发明的电极共平面的发光二极管 元件另一实施例的结构剖面示意图及电极分别以不同导电金属构成的结 构剖面示意图;
图 4为本发明的电极共平面的发光二极管元件另一实施例的结构剖 面示意图;
图 5为本发明的电极共平面的发光二极管元件另一实施例 ( 电极分 别以不同导电金属构成) 的结构剖面示意图;
图 6为本发明的电极共平面的发光二极管元件另一实施例 (电极分 别以不同导电金属构成) 的结构剖面示意图;
图 7-图 9分别为本发明的覆晶式发光二极管封装结构的三个实施例 的结构剖面示意图;
图 10为本发明的光反射结构一实施例的结构剖面及光程示意图; 图 11 为本发明的光反射结构另一实施例的结构剖面及光程示意图。 附图标记说明: 发光二极管元件 1、 la; 元件基板 10; 第一型掺杂 层 20; 第二型掺杂层 30; 发光层 40; 透明导电金属氧化物层 50; 电极 第一部 60、 70; 第一透明绝缘层 80; 第二绝缘层 90; 上表面 91; 凹槽 92、 93、 92a、 93a; 电极第二部 100、 110、 100a, 110a; 上表面 101、 111; 化镍层 102、 112; 化金层 103、 113; 封装基板 120; 绝缘基板 121; 线路层 122、 123; 散热孔 124、 125; 金属凸块 130; 反射层 140; 发出 光线 A; 反射光线 B。 具体实施方式
参考图 1、 图 2、 图 3所示, 其分别为本发明的电极共平面的发光二 极管元件一实施例的结构剖面示意图、 上视示意图及制程中结构剖面示 意图。 本实施例的发光二极管元件 1 包含一元件基板 ( device substrate ) 10、一第一型掺杂层( l st-type doped layer ) 20 一第二型掺杂层( 2nd-type doped layer ) 30、 一透明导电金属氧化物层 ( transparent conductive oxide layer ) 50、至少两个不同极的电极第一部( first portion of electrode ) ( 60、 70 ) 、 一第一透明绝缘层 ( transparent insulating passivation layer ) 80、 一第二绝缘层 90及至少两个分开的电极第二部 ( second portion of electrode ) ( 100、 1 10 ) 。
本实施例的该元件基板 10可利用一蓝宝石 ( sapphire ) 基板构成但 不限制, 如可利用一玻璃基板构成。
本实施例的该第一型掺杂层 20形成且设置在该元件基板 10上, 该 第二型掺杂层 30形成且设置在部分的该第一型掺杂层 20上, 其中该第 二型掺杂层 30与该第一型掺杂层 20的交界面形成一发光层 40以发出 光。 该第一型掺杂层 20可为一 P型掺杂层 ( P-type doped layer ) 或一 N 型掺杂层 ( N-type doped layer ) , 而该第二型掺杂层 30为该第一型掺杂 层 20的相对型掺杂层, 即当该第一型掺杂层 20为一 P型掺杂层时, 该 第二型掺杂层 30即为一 N型掺杂层, 反之, 当该第一型掺杂层 20为一 N型掺杂层时, 则该第二型掺杂层 30为一 P型掺杂层; 该第一、 二型掺 杂层 20、 30利用一 III- V族化合物半导体材料所构成,例如氮化镓( gallium nitride , GaN ) 、 碑化镓 ( gallium phosphide , GaP ) 或磷砷化镓 ( gallium phosphide arsenide , GaAsP ) 等。
本实施例的该透明导电金属氧化物层 50形成且设置在该第二型掺 杂层 30上供作为欧姆接触层; 该透明导电金属氧化物层 50的材质以氧 化铟锡 ( ITO , indium tin oxide ) 为较佳但不限制, 例如亦可选用氧化铈 ( CTO , cerium tin oxide ) 、 氧化娣锡 ( AT O , antimony tin oxide ) 、 氧化铝锌 ( AZO , aluminum zinc oxide ) 、 氧化铟锌 ( IZO, indium zinc oxide ) 、 氧化锌 ( ZO, zinc oxide ) 或其他类似的透明导电金属氧化物 材科。
本实施例的该至少两个不同极的电极第一部包含至少一第二电极第 一部 60及至少一第一电极第一部 70, 其中该至少一第二电极第一部 60 穿过该透明导电金属氧化物层 50而形成且设置在该第二型掺杂层 30上 以与该第二型掺杂层 30电性导通, 为方便说明, 因此将图 1 中与该第二 型掺杂层 30电性导通的电极第一部 60定义为第二电极第一部 60 ; 其中 该至少一第一电极第一部 70形成且设置在该第一型掺杂层 20上以与该 第一型掺杂层 20电性导通, 为方便说明, 因此将图 1 中与该第一型掺杂 层 20电性导通的电极第一部 70定义为第一电极第一部 70。 该第二电极 第一部 60及该第一电极第一部 70的顶面分别位于不同的高度位置而形 成非共平面的两个电极第一部。 请再参考图 2所示, 该至少一第二电极 第一部 60及该第一电极第一部 70的数目不限制, 可视导电性能的需要 如电流量的大小要求或电流的分布均勾性要求或散热性能等, 而分别设 置多个第二电极第一部 60及多个第一电极第一部 70, 如图 2所示分别 设有四个第二电极第一部 60及四个第一电极第一部 70但不限制, 且分 别均勾布设并电性导通在该第二型掺杂层 30及该第一型掺杂层 20上。 该第二电极第一部 60及第一电极第一部 70在此被定义为 "电极第一部 ", 是该 "电极第一部 ( 60、 70 ) " 将再与一 "电极第二部" (容后述) 以 结合组成一完整的电极。
本实施例的该第一透明绝缘层 80形成且覆盖在该元件基板 10、 该 第一型掺杂层 20、 该第二型掺杂层 30及该透明导电金属氧化物层 50的 表面上, 以使该至少一第一电极第一部 70及该至少一第二电极第一部 60能穿过该第一绝缘层 80而向外显露。 在本发明的发光二极管元件 1 中, 该第一透明绝缘层 80可视为一透明绝缘钝化层 ( transparent insulating passivation layer ) 。
本实施例的该第二绝缘层 90形成且覆盖在该第一绝缘层 80及该至 少一第一及第二电极第一部 70、 60上。 该第二绝缘层 90的上表面 9 1 为 一均匀高度或近乎均勾高度的平面,且该上表面 91上开设有至少两个分 开的凹槽 92、 93 (如图 3所示) 以分别对应于该至少一第一及第二电极 第一部 70、 60 , 以使该至少一第一及第二电极第一部 70、 60得分别通 过该至少两个分开的凹槽 92、 93 而向外显露如图 3所示, 其中该至少两 个分开的凹槽 92、 93的凹槽口为共平面或近乎共平面, 也就是, 当凹槽 92、 93的凹槽口的高度或斜度在加工裕度容许的范围内以致仍能达成本 发明设计成 "共平面" 所预期的相同或近似的功效及目的, 则在此皆视 为本发明所称的 "共平面" 。
本实施例的该至少两个分开且不同极的电极第二部 100、 1 10 包含至 少一第二电极第二部 100及至少一第一电极第二部 1 10, 其利用至少一 导电金属以分别填满在该至少两个分开的凹槽 92、 93 内而形成, 以使该 至少一第二电极第二部 100及至少一第一电极第二部 1 10分别对应电性 连结于该至少一第二电极第一部 60及该至少一第二电极第一部 70 , 且 该两个分开且不同极的电极第二部 100、 1 10的上表面 101、 1 1 1 为共平 面或近乎共平面。 该至少一第二电极第二部 100及第一电极第二部 1 10 在此被定义为 "电极第二部" , 是该 "电极第二部 ( 100、 1 10 ) " 用以 分别与前述的该 "电极第一部 ( 60、 70 ) " 结合组成一完整且一体的电 极。 其中该至少一第二电极第二部 100及至少一第一电极第二部 1 10, 表示该第二电极第二部 100及该第一电极第二部 1 10并不限制为一个, 也就是本发明可利用一第二电极第二部 100以对应电性连结于四个第二 电极第一部 60如图 2所示, 亦可利用两个 (至少一) 第二电极第二部 100但不限制以分别对应电性连结于各两个第二电极第一部 60 (图未 示) 。
参考图 1 -图 3所示, 本实施例的该至少两个分开的凹槽 92、 93的范 围进一步可相对地扩大至涵盖该发光层 40的大部分表面, 因此在该至少 两个分开的凹槽 92、 93 内所形成的该至少两个分开的电极第二部 100、 1 10也相对地扩大至涵盖该发光层 40的大部分表面, 故该至少两个分开 的电极第二部 100、 1 10能进一步作为该发光层 40发出的光的反射层, 供可反射由该发光层 40发出并射向该反射层的光线。如此在制作本实施 例的发光二极管元件 1 时, 至少能减少一反射层 (如 US6, 914,268所揭 示的反射层 150/250 ) 的制程。
本实施例的该至少两个分开且不同极的电极第二部 100、 1 10可利用 溅镀方法、 电镀方法、 化镀 (无电解金属) 方法中一种形成方法以沉积 形成在该至少两个分开的凹槽 92、 93 中。 该至少两个分开且不同极的电 极第二部 100、 1 10在沉积形成之后, 可进一步通过磨平作业以使该电极 第二部 100、 1 10的上表面 101、 1 1 1成为共平面或近乎共平面, 如此可 借此有效提升覆晶式发光二极管封装结构的组装良率。
为发光二极管元件的结构上需要, 本发明的发光二极管元件 1可进 一步在该第二型掺杂层 30上形成且设置一应力超晶格层 ( trained-layer superlattice contact layer ) (图未示) , 以使该应力超晶格层设在该第二 型掺杂层 30与该透明导电金属氧化物层 50之间。 该应力超晶格层为一 现有技术如 US6,914,268B2所揭示的应力超晶格层 ( strained-layer superlattice ( SLS ) contact layer 135/235 ) 。
以本实施例的发光二极管元件 1 而言, 当该至少两个不同极的电极 第一部, 即包含该至少一第二电极第一部 60及该至少一第一电极第一部 70 , 以金构成时, 则该至少两个分开且不同极的电极第二部 100、 1 10, 即包含该至少一第二电极第二部 100及该至少一第一电极第二部 1 10, 利用锡为导电金属以分别填满在该至少两个分开的凹槽 92、 93而形成以 供分别对应电性连结于该至少两个不同极的电极第一部 60、 70。
参考图 4、 图 5、 图 6所示, 其分别为本发明的电极共平面的发光二 极管元件另一实施例的结构剖面示意图及电极分别以不同导电金属构成 的结构剖面示意图。 本实施例的发光二极管元件 l a的结构大部分相同于 图 1 -图 3所示的发光二极管元件 1 , 亦包含一元件基板 10、 一第一型掺 杂层 20、 一第二型掺杂层 30、 一透明导电金属氧化物层 50、 至少两个 不同极的电极第一部 60、 70、 一第一透明绝缘层 80、 一第二绝缘层 90 及至少两个分开的电极第二部 100、 1 10。 本实施例的发光二极管元件 l a 进一步与图 1 -图 3所示发光二极管元件 1 比较, 可知本实施例的该第二 绝缘层 90的上表面 91 亦为一均匀高度或近乎均匀高度的平面如图 4所 示,且该上表面 91上开设有至少两个分开的凹槽 92a、 93a (如图 4所示) 以分别对应于该至少一第一及第二电极第一部 70、 60, 以使该至少一第 一及第二电极第一部 70、 60得分别通过该至少两个分开的凹槽 92a、 93a 而向外显露如图 4所示, 其中该至少两个分开的凹槽 92a、 93a的凹槽口 亦为共平面或近乎共平面。
上述两个实施例 1、 l a之间的最大不同点在于: 本实施例的该至少 两个分开的凹槽 92a、 93a的范围并未如图 1 -图 3所示的发光二极管元件 1扩大至涵盖该发光层 40的大部分表面, 也就是本实施例的该至少两个 分开的凹槽 92a、 93a呈现一圆孔造型, 因此在该至少两个分开的凹槽 92a、 93a内所形成的该至少两个分开的电极第二部 100、 1 10也局限在该 圆孔状的凹槽 92a、 93a内。
再以发光二极管元件 1或图 4、 5所示的发光二极管元件 l a而言, 当该至少两个不同极的电极第一部, 即包含至少一第二电极第一部 60及 至少一第一电极第一部 70, 以金构成时, 则该至少两个分开且不同极的 电极第二部 100、 110, 即包含至少一第二电极第二部 100及至少一第一 电极第二部 110, 利用锡为导电金属以分别填满在该至少两个分开的凹 槽 92a、 93a而形成以供分别对应电性连结于该至少两个电极第一部 60、 70。
另以发光二极管元件 1或图 4、图 6所示的发光二极管元件 la而言, 当该至少两个不同极的电极第一部, 即包含至少一第二电极第一部 60及 至少一第一电极第一部 70, 以铝构成时, 则该至少两个分开且不同极的 电极第二部 100、 110, 即包含至少一第二电极第二部 100及至少一第一 电极第二部 110, 先利用化镍 (无电解金属) 为导电金属以在该至少两 个分开的凹槽 92/92a、 93/93a内先形成一化镍层 102、 112 (如图 6所示) 供分别对应电性连结于该至少两个电极第一部 60、 70, 再利用化金 (无 电解金属) 为导电金属以分别在该化镍层 102、 112上各形成一化金层 103、 113 (如图 6所示) , 则该化镍层 102、 112分别与化金层 103、 113 结合形成该至少两个分开且不同极的电极第二部 100、 110, 且仍维持共 平面状态。
参考图 7-图 9所示, 其分别为本发明的发光二极管元件 1、 la经覆 晶封装所得的覆晶式发光二极管封装结构的三个实施例的结构剖面示意 图。 本发明的覆晶式发光二极管封装结构 2利用一封装基板 ( package substrate) 120以与至少一前述的发光二极管元件 1或 la组装形成。 该 覆晶式发光二极管封装结构 2主要包含一封装基板 120以及至少一发光 二极管元件 1如图 7所示或至少一发光二极管元件 la如图 8、图 9所示。 在图 7中, 该覆晶式发光二极管封装结构 2以一封装基板 120与两个如 图 1所示的发光二极管元件 1组装为例说明但不限制; 在图 8 中, 该覆 晶式发光二极管封装结构 2以一封装基板 120与两个如图 5所示的发光 二极管元件 la组装为例说明但不限制; 在图 9中, 该覆晶式发光二极管 封装结构 2以一封装基板 120与两个如图 6所示的发光二极管元件 la组 装为例说明但不限制。
该至少一发光二极管元件 1或 la倒覆在该封装基板 120上并通过至 少两个导电金属凸块 130以与该封装基板 120电性连接, 其中该至少两 个导电金属凸块 130分别设于该发光二极管元件 1或 la的该至少两个分 开的电极第二部 100、 1 10上。
该封装基板 120可选用一具有散热功能的印刷电路 ( PCB , printed circuit board ) 作为基板, 用以取代现有技术在封装时采用硅基板
(submount) 并加上铝基板。 该封装基板 120 包含: 一绝缘基板 121、 至 少两个线路层 122、 123及至少两个散热孔 124、 125如图 7-图 9所示; 其中, 该绝缘基板 121具有上、 下两个侧表面; 该至少两个线路层 122、 123分别形成并设置在该基板 121 的两个側表面上, 其中一个侧表面上 的线路层 122通过该至少两个导电金属凸块 130以使该至少一发光二极 管元件 1或 l a能通过该至少两个分开的电极第二部 100、 1 10以电性连 接在该封装基板 120上; 该至少两个散热孔 124、 125穿设在该绝缘基板 121 的上、 下两个侧表面之间, 各散热孔 124、 125 内设具导热材料, 如 树脂、 银膏、 导热膏等, 以将电性连接在该封装基板 120—侧表面 122 上的该至少一发光二极管元件 1或 l a在操作中所产生的热源由该封装基 板 120的一侧表面 122传导至另一侧表面 123 而向外散热。
参考图 8、 图 9所示, 在该封装基板 120面向该至少一发光二极管 元件 l a的一侧表面 122上, 进一步可对应设置至少一反射层 140 , 用以 作为该至少一发光二极管元件 l a的发光层 40所发出的光的反射层, 供 可反射由该至少一发光二极管元件 l a所发出并射向该反射层 140的光 线。 该反射层 140可利用溅镀方法或喷锡方法形成在该封装基板 120面 向该发光二极管元件的侧表面 122上, 即该反射层 140可视为一形成且 覆盖在该线路层 122上的喷锡层, 除具有反射层 140的作用功效外, 对 该线路层 122亦具有防氧化的保护层的作用功效。
参考图 10、 图 1 1所示, 针对如图 1或图 6所示的发光二极管元件 1 或 l a, 本发明进一步提供一种适用于覆晶式发光二极管元件的光反射结 构 ( a light reflecting structure for flip-chip light emitting diode device with coplanar pads ) 3或 3a, 其包含: 一透明导电金属氧化物层 50 , 其 形成且设置在一发光二极管元件 1的半导体层上;一第一透明绝缘层 80, 其形成且覆盖在该透明导电金属氧化物层 50上; 以及至少两个分开的电 极第二部 100、 1 10 , 其包含至少一第二电极第二部 100及至少一第一电 极第二部 1 10, 其利用至少一导电金属形成, 并分别对应电性连结于该 发光二极管元件 1的该至少一第二电极第一部 60及该至少一第二电极第 一部 70。
本发明的反射结构 3或 3a与现有技术如 US6,914,268比较, 其主要 区别特征在于: 该至少两个分开且不同极的电极第二部 100、 1 10的上表 面 101、 1 1 1 为共平面,故本发明的反射结构 3与现有技术如 US6, 914,268 比较, 具有提升覆晶式发光二极管封装结构的组装良率的功效。
本发明的光反射结构 3如图 10所示的再一区别特征在于: 该至少两 个分开的电极第二部 100、 1 10的范围相对地扩大至涵盖该发光二极管元 件 1 的半导体层如发光层 40的大部分表面, 以使该两个分开的电极第二 部 100、 1 10可作为该发光二极管元件 1 的发光层 40发出的光, 如图 10 中所示的发出光线 A的反射层, 供反射由该发光二极管元件 1 的发光层 40所发出并射向该反射层的光线, 如图 10中所示的反射光线 B。 故本发 明的反射结构 3与现有技术如 US6,914,268比较, 具有简化制程及有效 降低制作成本的功效。
本发明的光反射结构 3a如图 1 1所示的再一区别特征在于: 同时参 考图 8、 图 9所示, 在与该发光二极管元件 l a组装的一封装基板 120面 向该至少一发光二极管元件 l a的一侧表面上, 进一步可对应设置至少一 反射层 140供作为该至少一发光二极管元件 l a的发光层 40所发出的光, 如图 1 1 中所示的发出光线 A的反射层, 供可反射由该至少一发光二极 管元件 la发出并射向该反射层 140的光线, 如图 1 1 中所示的反射光线 B。该反射层 140可利用溅镀方法或喷锡方法形成在该封装基板 120面向 该发光二极管元件 l a的侧表面上, 故本发明的反射结构 3a与现有技术 如 US6, 914,268比较, 具有简化制程及有效降低制作成本的功效。
以上所示仅为本发明的优选实施例, 对本发明而言仅是说明性的, 而非限制性的。 在本专业技术领域具通常知识人员理解, 在本发明权利 要求所限定的精神和范围内可对其进行许多改变, 修改, 甚至等效的变 更, 但都将落入本发明的保护范围内。

Claims

权 利 要 求
1、 一种电极共平面的发光二极管元件, 其特征在于, 包含: 一元件基板;
一第一型掺杂层, 其形成且设置在该元件基板上;
一第二型掺杂层, 其形成且设置在部分的该第一型掺杂层上, 该第 二型掺杂层与该第一型掺杂层的交界面形成一发光层以发出光;
一透明导电金属氧化物层, 其形成且设置在该第二型掺杂层上供作 为欧姆接触层;
至少两个不同极的电极第一部, 其包含: 至少一第一电极第一部, 该第一电极第一部形成且设置在该第一型掺杂层上以与该第一型掺杂层 电性导通; 及至少一第二电极第一部, 该第二电极第一部穿过该透明导 电金属氧化物层而形成且设置在该第二型掺杂层上以与该第二型掺杂层 电性导通, 其中该至少一第一电极第一部及该至少一第二电极第一部的 顶面分别位于不同的高度位置;
一第一透明绝缘层, 其形成且覆盖在该元件基板、 该第一型掺杂层、 该第二型掺杂层及该透明导电金属氧化物层的表面上, 以使该至少一第 一电极第一部及该至少一第二电极第一部能由该第一绝缘层向外显露; 一第二绝缘层, 其形成且覆盖在该第一绝缘层及该至少一第一电极 第一部和第二电极第一部上, 该第二绝缘层的上表面为一均勾高度的平 面, 且该上表面上开设有至少两个分开的凹槽以分别对应于该至少一第 一电极第一部及第二电极第一部以使该至少一第一电极第一部及第二电 极第一部能够分别通过该至少两个分开的凹槽而向外显露, 其中该至少 两个分开的凹槽的凹槽口为共平面; 及
至少两个分开且不同极的电极第二部, 包含至少一第一电极第二部 及至少一第二电极第二部, 其利用至少一导电金属以形成且分别填满在 该至少两个分开的凹槽内供分别对应电性连结于该至少一第一电极第一 部及该至少一第二电极第一部以形成至少两个分开的一体式电极, 且该 至少两个分开的电极第二部的上表面为共平面。
2、 如权利要求 1所述的发光二极管元件, 其特征在于, 该至少两个 分开的凹槽的范围是相对地扩大至涵盖该发光层的大部分表面, 以使形 成在该至少两个分开的凹槽内的该至少两个分开且不同极的电极第二部 作为该发光层发出的光的反射层, 供能够反射由该发光层发出并射向该 反射层的光线。
3、 如权利要求 1所述的发光二极管元件, 其特征在于, 该至少两个 分开且不同极的电极第二部利用溅镀方法、 电镀方法、 化镀方法中一种 形成方法以沉积形成。
4、 如权利要求 3所述的发光二极管元件, 其特征在于, 该至少两个 分开且不同极的电极第二部在沉积形成之后, 能够进一步通过磨平作业 以使该至少两个分开且不同极的电极第二部的上表面成为共平面。
5、 如权利要求 1所述的发光二极管元件, 其特征在于, 该元件基板 包含蓝宝石基板及玻璃基板。
6、 如权利要求 1所述的发光二极管元件, 其特征在于, 该第一型掺 杂层及第二型掺杂层皆由一 III- V族化合物半导体材料所构成。
7、 如权利要求 6所述的发光二极管元件, 其特征在于, 该 III- V族 化合物半导体材料为氮化镓、 磷化镓及 /或磷砷化镓。
8、 如权利要求 1 所述的发光二极管元件, 其特征在于, 该透明导电 金属氧化物层的材质选自由氧化铟锡、 氧化铈锡、 氧化锑锡、 氧化铝锌、 氧化铟锌、 氧化锌所组成的族群。
9、 如权利要求 1 所述的发光二极管元件, 其特征在于, 当该第一型 掺杂层为一 N型掺杂层时, 该第二型掺杂层为一 P型掺杂层; 当该第一 型掺杂层为一 P型掺杂层, 该第二型掺杂层为一 N型掺杂层。
10、 如权利要求 1所述的发光二极管元件, 其特征在于, 当该至少 两个不同极的电极第一部以金构成时, 该至少两个分开且不同极的电极 第二部利用锡为导电金属以形成且分别填满在该至少两个分开的凹槽内 供分别对应电性连结于该至少两个不同极的电极第一部。
11、 如权利要求 1所述的发光二极管元件, 其特征在于, 当该至少 两个不同极的电极第一部以铝构成时, 该至少两个分开且不同极的电极 第二部先利用化镍为导电金属以在该至少两个分开的 IHJ槽内先形成一化 镍层供分别对应电性连结于该至少两个电极第一部, 再利用化金为导电 金属以在该化镍层上形成一化金层。
12、 一种电极共平面的覆晶式发光二极管封装结构, 其特征在于, 包含: 一封装基板; 及
至少一发光二极管元件, 该发光二极管元件为权利要求 1至权利要 求 1 1 中任一项所述的发光二极管元件, 其倒覆在该封装基板上而与该封 装基板电性连接。
13、如权利要求 12所述的覆晶式发光二极管封装结构,其特征在于, 该发光二极管元件通过至少两个导电金属凸块以与该封装基板电性连 接, 该至少两个导电金属凸块分别设于该发光二极管元件的该至少两个 分开且不同极的电极第二部上。
14、如权利要求 12所述的覆晶式发光二极管封装结构,其特征在于, 该封装基板为一具有散热功能的印刷电路基板, 包含:
一绝缘基板, 具有上、 下两个侧表面;
两个线路层, 分别形成并设置在该绝缘基板的两个侧表面上, 其中 一个侧表面上的线路层通过至少两个导电金属凸块分别设于该至少一发 光二极管元件的至少两个分开且不同极的电极第二部上, 以使该至少一 发光二极管元件通过该至少两个分开且不同极的电极第二部以电性连接 在该封装基板上; 及
至少两个散热孔, 其穿设在该绝缘基板的两个侧表面之间, 该多个 散热孔内设具导热材料以将电性连接在该绝缘基板一侧表面上的该发光 二极管元件在操作中所产生的热源由该绝缘基板的一个侧表面传导至另 一个侧表面而向外散热。
15、如权利要求 14所述的覆晶式发光二极管封装结构,其特征在于, 该封装基板面向该发光二极管元件的一个侧表面上进一步设置一反射 层, 用以作为该发光二极管元件的发光层发出的光的反射层, 供能够反 射由该发光二极管元件发出并射向该反射层的光线。
16、如权利要求 15所述的覆晶式发光二极管封装结构,其特征在于, 该反射层利用溅镀方法、 喷锡方法中一种方法以形成在该封装基板面向 该发光二极管元件的表面上。
17、如权利要求 14所述的覆晶式发光二极管封装结构,其特征在于, 该多个散热孔内所设具的导热材料包含树脂、 银膏及导热膏。
18、 一种光反射结构, 其适用于覆晶式发光二极管元件, 其特征在 于, 包含: 一透明导电金属氧化物层, 其形成且设置在一发光二极管元件的半 导体层上;
一第一透明绝缘层, 其形成且覆盖在该透明导电金属氧化物层上; 及
至少两个分开且不同极的电极第二部, 其包含至少一第一电极第二 部及至少一第二电极第二部, 其利用至少一导电金属形成而分别对应电 性连结于该发光二极管元件的两个分开的电极上;
其中该至少两个分开且不同极的电极第二部的上表面为共平面; 其中该至少两个分开且不同极的电极第二部的范围是相对地扩大至 涵盖该发光二极管元件的半导体层的大部分表面, 以使该至少两个分开 且不同极的电极第二部作为该发光二极管元件所发出光的反射层供反射 由该发光二极管元件所发出并射向该反射层的光线。
PCT/CN2011/002183 2011-12-26 2011-12-26 电极共平面的发光二极管元件、封装结构及光反射结构 WO2013097046A1 (zh)

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