WO2013069415A1 - Appareil de conversion électrique et procédé de placement de conducteur dans appareil de conversion électrique - Google Patents

Appareil de conversion électrique et procédé de placement de conducteur dans appareil de conversion électrique Download PDF

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Publication number
WO2013069415A1
WO2013069415A1 PCT/JP2012/076671 JP2012076671W WO2013069415A1 WO 2013069415 A1 WO2013069415 A1 WO 2013069415A1 JP 2012076671 W JP2012076671 W JP 2012076671W WO 2013069415 A1 WO2013069415 A1 WO 2013069415A1
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Prior art keywords
conductor
conductive portion
semiconductor package
power converter
semiconductor
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PCT/JP2012/076671
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English (en)
Japanese (ja)
Inventor
裕加 山本
圭一 小太刀
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株式会社明電舎
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Publication of WO2013069415A1 publication Critical patent/WO2013069415A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters

Definitions

  • the present invention relates to a power conversion device, and more particularly, to an arrangement of conductors constituting a circuit of the power conversion device.
  • a three-level inverter that performs PWM (Pulse ⁇ ⁇ ⁇ ⁇ Width Modulation) control is known as a power converter that performs power conversion between direct current and alternating current using a switching element and a passive element.
  • IGBT Insulated Gate Bipolar Transistor
  • Etc. Etc.
  • the surge voltage when the switching element is turned off may be high. And when this surge voltage exceeds the safe operation area
  • the conductor which is the current path is made flat and connected to each switching element (DC voltage source, AC terminal).
  • a parallel plate-like conductor arrangement structure in which conductors are arranged close to each other is employed (for example, Patent Documents 1 to 6).
  • the conductor plates arranged close to each other by arranging the directions of the currents flowing through the conductor plates to be opposite to each other, the changes in the magnetic flux due to the current flowing through the conductor plates are offset each other.
  • the change in magnetic flux is reduced (for example, Patent Documents 3 and 5).
  • the inductance between the terminals of the IGBT package is reduced by arranging the capacitors so that the distance between the capacitors connected in series is shortened (for example, Patent Document 7).
  • the size of the power conversion device is increased by the surface of the conductor, which may be a factor that hinders downsizing of the power conversion device.
  • the wiring inductance of this portion is increased and the surge voltage may be increased.
  • One aspect of the power conversion device of the present invention is a power conversion device that converts direct current to alternating current or alternating current to direct current.
  • the conductor that connects the switching element and the direct current voltage source is provided on the surface on which the switching element is provided. It has a plate-like conductive part standing upright, and a DC voltage source is connected to this conductive part.
  • a conductor that constitutes a circuit of the power conversion device in a power conversion device that converts direct current to alternating current or alternating current to direct current, includes an element package group that constitutes the circuit. It has plate-like conductive parts standing up to the surface to be provided, and conductive parts in which the currents flowing through the conductive parts of the respective conductors are in opposite directions are provided in parallel and close together to constitute a parallel laminated conductor. It is characterized by.
  • one aspect of the conductor arrangement method in the power conversion device of the present invention is a conductor arrangement method in the power conversion device that converts direct current into alternating current or alternating current into direct current, and is provided for a surface on which a switching element is provided. It is characterized by connecting a switching element and a DC voltage source with a conductor having a plate-like conductive portion standing upright.
  • Another aspect of the conductor arrangement method in the power conversion device of the present invention is a conductor arrangement method in the power conversion device that converts direct current into alternating current or alternating current into direct current, and constitutes a circuit of the power conversion device.
  • a circuit is constituted by a conductor having a plate-like conductive portion standing upright with respect to the surface on which the element package group is provided, and conductive portions of conductors in which the current flowing through the conductive portion is in the opposite direction are provided in parallel and close to each other. It is characterized by that.
  • FIG. 2 is an electric circuit diagram of the power conversion device according to the first embodiment.
  • FIG. 1 In the power converter device according to the second embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 1, (b) In the power converter device according to the second embodiment, the direction of the current flowing in the conductor in mode 1 It is explanatory drawing demonstrated.
  • FIG. 1 and 2 are diagrams showing a structure of one phase of a three-level inverter device 1 that is a power conversion device according to the first embodiment
  • FIG. 1 is a diagram before connecting smoothing capacitors 8 and 9.
  • FIG. 2 is a diagram in which smoothing capacitors 8 and 9 are connected.
  • FIG. 3 is an electric circuit diagram corresponding to the three-level inverter device 1 according to the first embodiment.
  • the IGBT is described as an example of the switching element, but the same effect can be obtained when other switching elements such as a MOSFET and a bipolar transistor are used (the same applies to the second embodiment).
  • the number of collectors and emitters of the semiconductor package is two. However, the number of collectors / emitters may be one or more. 1 can be configured similarly to the inverter device according to the first embodiment.
  • the three-level inverter device 1 includes element package groups 2 to 7 arranged on a substantially straight line and a first voltage source constituting a DC voltage source. 1 and smoothing capacitors 8 and 9 as second unit voltage sources.
  • Each of the element packages constituting the element package groups 2 to 7 or conductors 10 to 16 for electrically connecting the element package and the smoothing capacitor (or AC terminal) are provided.
  • the conductors 10 to 16 are plate-like erected with respect to the surface on which the element package groups 2 to 7 are arranged (hereinafter referred to as package surfaces). Conductive portions 10a to 16a.
  • the three-level inverter device 1 includes semiconductor packages 2 and 3 connected in series between the smoothing capacitor 8 and the AC terminal 17, and the semiconductor package 2 and the semiconductor package 3.
  • the coupling diode 6 connected between the series connection point and the series connection point of the smoothing capacitors 8 and 9, the semiconductor packages 4 and 5 connected in series between the AC terminal 17 and the smoothing capacitor 9, and the semiconductor package 4
  • a coupling diode 7 connected between the series connection point of the semiconductor package 5 and the series connection point of the smoothing capacitors 8 and 9.
  • Each of the element package groups 2 to 7 is disposed on the heat sink 18.
  • Each of the semiconductor packages 2 to 5 includes IGBTs 2a to 5a and diodes 2b to 5b connected in reverse parallel thereto.
  • the emitter E of the semiconductor package 2 is provided adjacent to the collector C of the semiconductor package 3, and the collector C of the semiconductor package 3 and the cathode K1 of the coupling diode 6 are adjacent.
  • a coupling diode 6 is provided.
  • the collector C of the semiconductor package 5 is provided adjacent to the emitter E of the semiconductor package 4, and the coupling diode 7 is provided so that the emitter E of the semiconductor package 4 and the anode A 2 of the coupling diode 7 are adjacent.
  • the coupling diodes 6 and 7 are integrally formed so that the anode A1 of the coupling diode 6 and the anode A2 of the coupling diode 7 are adjacent to each other, and the cathode K1 of the coupling diode 6 and the cathode K2 of the coupling diode 7 are adjacent to each other. Yes.
  • the semiconductor packages 2 to 5 and the coupling diodes 6 and 7 are arranged side by side on a substantially straight line.
  • the coupling diode 6 and the coupling diode 7 constitute an integrated package, but the shape and configuration of the coupling diode 6 and the coupling diode 7 are not particularly limited, and the coupling diode 6 and the coupling diode are not limited. 7 may be provided separately.
  • Each coupling diode 6, 7 may have a form in which a plurality of diodes are connected in series (substantially a form in which the diodes are connected in parallel) in addition to a form in which one coupling diode is provided.
  • the conductor 10 that connects the collector C of the semiconductor package 2 and the positive terminal of the smoothing capacitor 8 is a plate-like conductive portion that is erected with respect to the package surface. 10a.
  • the conductive portion 10a has a standing portion 10b standing from the semiconductor package 2, and an extending portion 10c extending from the upper end portion of the standing portion 10b toward the adjacent semiconductor package 3.
  • a connecting portion 10d such as a stud bolt connected to the positive terminal of the smoothing capacitor 8 is provided at the end of the extending portion 10c so as to protrude from the surface of the extending portion 10c.
  • the extending portion 10c is provided away from the semiconductor package 3 by a distance that is about the height of a conductive portion 12a of the conductor 12 described later.
  • the connecting portion 10d is fastened with a nut or the like (the connection between the other connecting portions and the smoothing capacitors 8 and 9 is the same). is there).
  • a well-known connection method suitably for the connection method in the connection part 10d, such as using a detachable connector.
  • the conductor 11 connecting the emitter E of the semiconductor package 5 and the negative electrode terminal of the smoothing capacitor 9 is a plate-like shape standing on the package surface. It has a conductive portion 11a.
  • the conductive portion 11a has a standing portion 11b standing from the semiconductor package 5 and an extending portion 11c extending from the upper end of the standing portion 11b toward the adjacent semiconductor package 4, and the extending portion 11c.
  • a connecting portion 11d connected to the negative electrode terminal of the smoothing capacitor 9 is provided to protrude from the surface of the extending portion 11c.
  • the extending portion 11c is provided away from the semiconductor package 4 by a distance that is about the height of a conductive portion 13a of the conductor 13 described later.
  • the conductor 12 connecting the emitter E of the semiconductor package 2, the collector C of the semiconductor package 3, and the cathode K1 of the coupling diode 6 is connected to the package surface. It has a plate-like conductive portion 12a standing upright.
  • the conductor 13 that connects the collector C of the semiconductor package 5, the emitter E of the semiconductor package 4, and the anode A2 of the coupling diode 7 has a plate-like conductive portion 13a that stands upright with respect to the package surface.
  • the conductor 14 that connects the anode A1 of the coupling diode 6, the cathode K2 of the coupling diode 7, and the connection point of the smoothing capacitors 8 and 9 is formed on the package surface.
  • the conductive portion 14a includes first and second extending portions 14b and 14c, first and second folded portions 14d and 14e, and a connecting conductor portion 14f.
  • the first extending portion 14b is a plate-like conductor standing on the package surface, and is provided extending from the anode A1 of the coupling diode 6 to the semiconductor package 3 and the semiconductor package 2.
  • the second extending portion 14 c is a plate-like conductor standing on the package surface, and is provided extending from the cathode K 2 of the coupling diode 7 to the semiconductor package 4 and the semiconductor package 5.
  • the first extending portion 14b is substantially equal to the height of the conductive portion 12a of the conductor 12 shown in FIG. 5A, and is disposed along the conductive portion 12a.
  • stretching part 14c is substantially equal to the height of the electroconductive part 13a of the conductor 13 shown to Fig.5 (a), and is arrange
  • first and second folded portions 14d and 14e are provided so as to stand upright from the end portions of the first and second extending portions 14b and 14c, respectively, with respect to the package surface.
  • the plate-like connecting conductor portion 14f is provided so as to connect the folded portion 14d and the folded portion 14e.
  • the connecting conductor portion 14f is provided at a position higher than the height of the first extending portion 14b and the second extending portion 14c.
  • the connecting conductor portion 14f is provided with a connecting portion 14g connected to the connecting point of the smoothing capacitors 8 and 9, protruding from the surface of the connecting conductor portion 14f.
  • the connecting conductor portion 14f is formed with a through hole 14h through which an AC terminal connecting portion 16e of the conductor 16 described later passes.
  • the conductor 15 that connects the semiconductor package 3 and the AC terminal 17 is formed along the conductor 14. That is, the conductor 15 includes a plate-like first conductive portion 15b arranged in parallel with the first extending portion 14b of the conductor 14, and a plate-like folded portion 15c arranged in parallel with the folded portion 14d of the conductor 14. And a plate-like second conductive portion 15d arranged in parallel with the connecting conductor portion 14f of the conductor 14. Note that a connection portion 15e for connecting to the AC terminal 17 is provided at the end of the second conductive portion 15d so as to protrude from the surface of the second conductive portion 15d.
  • the conductor 16 connecting the semiconductor package 4 and the AC terminal 17 is formed along the conductor 14. That is, the conductor 16 includes a plate-like first conductive portion 16b arranged in parallel with the second extending portion 14c of the conductor 14 and a plate-like folded portion 16c arranged in parallel with the folded portion 14e of the conductor 14. And a plate-like second conductive portion 16d disposed in parallel with the connecting conductor portion 14f of the conductor 14.
  • the connection part 16e for connecting with the alternating current terminal 17 is provided in the edge part of the 2nd electroconductive part 16d, and protrudes from the 2nd electroconductive part 16d surface.
  • FIGS. 8 to 11 are explanatory diagrams illustrating current paths in the respective operation modes (mode 1 to mode 4) of the three-level inverter device 1 according to the first embodiment.
  • the current flowing through the three-level inverter circuit is the conductor 10 ⁇ semiconductor.
  • the three-level inverter device 1 is configured so that the standing portion 10 b of the conductor 10 and the folded portion 15 c of the conductor 15 are aligned.
  • the extending portion 10c and the second conductive portion 15d of the conductor 15 are arranged in parallel so as to be along each other.
  • the conductive portion 12a of the conductor 12 and the first conductive portion 15b of the conductor 15 are arranged so as to be close to each other, so that the direction of the current flowing through the conductive portion 12a of the conductor 12 (in FIG.
  • the direction of the current flowing through the first conductive portion 15b of the conductor 15 is opposite to that of the conductor 15 and the wiring inductance is reduced.
  • the current flowing through the three-level inverter circuit is as follows: conductor 14 ⁇ coupled diode 6 ⁇ conductor 12 ⁇ semiconductor package 3 ⁇ conductor 15 ⁇ AC terminal 17
  • the direction of the current flowing through the flat conductors 12, 14, and 15 is reversed even in the mode 2.
  • the respective conductors 12, 14, 15 are arranged in close proximity. That is, the connecting conductor portion 14f of the conductor 14 (the direction of current is indicated by a thin arrow) and the second conductive portion 15d of the conductor 15 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. .
  • the folded portion 14d of the conductor 14 (the direction of current is indicated by a thin arrow) and the folded portion 15c of the conductor 15 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. Further, the first extending portion 14b of the conductor 14 (the direction of current is indicated by a thin arrow) and the conductive portion 12a of the conductor 12 and the first conductive portion 15b of the conductor 15 (the direction of current is indicated by a bold arrow) are close to each other.
  • the laminated conductors are arranged along the line.
  • the wiring inductance is further reduced by forming a laminated conductor structure in which the standing portion 10b of the conductor 10, the folded portion 15c of the conductor 15, and the folded portion 14d of the conductor 14 are laminated in substantially the same shape.
  • the direction of the current flowing through the flat conductors 11, 13, and 16 is reversed even in the mode 3.
  • the respective conductors 11, 13, and 16 are arranged close to each other. That is, the second conductive portion 16d of the conductor 16 (the direction of current is indicated by a thin arrow) and the extending portion 11c of the conductor 11 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other.
  • the folded portion 16c (the direction of current is indicated by a thin arrow) of the conductor 16 and the standing portion 11b (the direction of current is indicated by a bold arrow) of the conductor 11 are arranged so as to be close to each other to constitute a laminated conductor. is doing.
  • the first conductive portion 16b of the conductor 16 (the direction of current is indicated by a thin arrow) and the conductive portion 13a of the conductor 13 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor Is configured.
  • the current flowing through the three-level inverter circuit is as follows: AC terminal 17 ⁇ conductor 16 ⁇ semiconductor Package 4 ⁇ conductor 13 ⁇ coupling diode 7 ⁇ conductor 14.
  • the three-level inverter device 1 is configured so that the direction of the current flowing through the flat conductors 13, 14, 16 is reversed even in the mode 4.
  • the respective conductors 13, 14, and 16 are arranged close to each other. That is, the second conductive portion 16d of the conductor 16 (the direction of current is indicated by a thin arrow) and the connection conductor portion 14f of the conductor 14 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor Is configured.
  • the folded portion 16c of the conductor 16 (the direction of current is indicated by a thin arrow) and the folded portion 14e of the conductor 14 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other to constitute a laminated conductor. ing. Further, the first conductive portion 16b of the conductor 16 and the conductive portion 13a of the conductor 13 (the direction of current is indicated by a thin arrow) and the second extending portion 14c of the conductor 14 (the direction of current is indicated by a bold arrow) are close to each other. Accordingly, the laminated conductors are arranged.
  • the wiring inductance is further reduced by providing a laminated conductor structure in which the standing portion 11b of the conductor 11, the folded portion 14e of the conductor 14, and the folded portion 16c of the conductor 16 are laminated in substantially the same shape.
  • the circuit is configured by the conductor having the plate-like conductive portion standing on the package surface.
  • the distance between the smoothing capacitor and the terminal of the semiconductor package connected to the smoothing capacitor can be shortened.
  • the surge voltage of the power converter can be reduced.
  • the mutual wiring inductance can be reduced, and the surge voltage of the power conversion device Can be reduced.
  • the conductive portions of the conductors are erected with respect to the package surface, the work for assembling the conductors can be facilitated, and the DC voltage source can be applied from either the back surface of the laminate in which the conductive portions are stacked. Alternatively, an AC terminal can be connected. As a result, the layout design of the constituent members constituting the power conversion device is facilitated. Further, since the conductor area in the direction parallel to the package surface is reduced by standing the conductor with respect to the package surface, the power conversion device can be reduced in size. Moreover, since the flat conductor does not cover the package surface, the heat dissipation of the semiconductor package is improved.
  • Embodiment 2 A three-level inverter device that is a power converter according to Embodiment 2 of the present invention will be described with reference to the drawings.
  • the three-level inverter device according to the second embodiment of the present invention is the same as the three-level inverter device 1 according to the first embodiment except that the arrangement form of the semiconductor packages 2 to 5 is different. Therefore, the same components as those of the three-level inverter device 1 according to the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.
  • the electric circuit diagram of the three-level inverter device according to the second embodiment is the same as the electric circuit diagram of the three-level inverter device 1 according to the first embodiment shown in FIG.
  • FIG. 12 and 13 are diagrams showing a structure of one phase of the three-level inverter device 19 according to the second embodiment.
  • FIG. 12 is a diagram before the smoothing capacitors 8 and 9 are connected, and FIG. It is the figure which connected the smoothing capacitors 8 and 9.
  • FIG. 12 is a diagram before the smoothing capacitors 8 and 9 are connected, and FIG. It is the figure which connected the smoothing capacitors 8 and 9.
  • FIG. 12 is a diagram before the smoothing capacitors 8 and 9 are connected
  • the three-level inverter device 19 includes element package groups 2 to 7 arranged in a substantially straight line and a first voltage source constituting a DC voltage source. , And smoothing capacitors 8 and 9 as second unit voltage sources.
  • Each of the device packages constituting the device package groups 2 to 7 or conductors 20 to 26 for connecting the device package and the smoothing capacitors 8 and 9 (or the AC terminal 17) are provided.
  • the conductors 20 to 26 have plate-like conductive portions 20a to 26a standing on the package surface.
  • the three-level inverter device 19 according to the second embodiment is a semiconductor connected in series between the smoothing capacitor 8 and the AC terminal 17 in the same manner as the three-level inverter device 1 according to the first embodiment.
  • the series connection point of the semiconductor package 2 and the semiconductor package 3 and the series connection point of the smoothing capacitors 8 and 9, and between the AC terminal 17 and the smoothing capacitor 9 The semiconductor packages 4 and 5 are connected in series, and the coupling diode 7 is connected between the series connection point of the semiconductor package 4 and the semiconductor package 5 and the series connection point of the smoothing capacitors 8 and 9.
  • the semiconductor package 2 is provided between the semiconductor package 3 and the coupling diode 6. At this time, the semiconductor package 2 is provided such that the emitter E of the semiconductor package 2 is adjacent to the cathode K1 of the coupling diode 6 and the collector C of the semiconductor package 3.
  • the semiconductor package 5 is provided between the semiconductor package 4 and the coupling diode 7. At this time, the semiconductor package 5 is provided so that the collector C of the semiconductor package 5 is adjacent to the anode A 2 of the coupling diode 7 and the emitter E of the semiconductor package 4.
  • the coupling diodes 6 and 7 are integrally formed so that the anode A1 of the coupling diode 6 and the anode A2 of the coupling diode 7 are adjacent to each other, and the cathode K1 of the coupling diode 6 and the cathode K2 of the coupling diode 7 are adjacent to each other. .
  • the semiconductor packages 2 to 5 and the coupling diodes 6 and 7 are arranged side by side on a substantially straight line.
  • the conductor 20 that connects the collector C of the semiconductor package 2 and the positive terminal of the smoothing capacitor 8 is a plate-like conductive portion that stands upright with respect to the package surface. 20a.
  • a connection portion 20b connected to the positive terminal of the smoothing capacitor 8 is provided at the end of the conductive portion 20a so as to protrude from the surface of the conductive portion 20a.
  • the conductor 21 that connects the emitter E of the semiconductor package 5 and the negative terminal of the smoothing capacitor 9 has a plate-like conductive portion 21a that stands upright with respect to the package surface.
  • a connecting portion 21b connected to the negative electrode terminal of the smoothing capacitor 9 is provided at the end of the conductive portion 21a so as to protrude from the surface of the conductive portion 21a.
  • the conductor 22 connecting the emitter E of the semiconductor package 2, the collector C of the semiconductor package 3, and the cathode K1 of the coupling diode 6 is connected to the package surface. It has a plate-like conductive portion 22a standing upright.
  • the conductor 23 that connects the collector C of the semiconductor package 5, the emitter E of the semiconductor package 4, and the anode A2 of the coupling diode 7 has a plate-like conductive portion 23a that stands upright with respect to the package surface.
  • the conductor 24 connecting the anode A1 of the coupling diode 6, the cathode K2 of the coupling diode 7, and the connection point of the smoothing capacitors 8 and 9 is formed on the package surface.
  • the conductive portion 24a includes first and second extending portions 24b and 24c, first and second folded portions 24d and 24e, and a connecting conductor portion 24f.
  • the first extending portion 24b is a plate-like conductor standing on the package surface, and the first extending portion 24b extends from the anode A1 of the coupling diode 6 to the semiconductor package 2.
  • the second extending portion 24 c is a plate-like conductor standing on the package surface, and the second extending portion 24 c extends from the cathode K 2 of the coupling diode 7 to the semiconductor package 5.
  • the first extending portion 14b is substantially equal to the height of the conductive portion 22a of the conductor 22 shown in FIG. 15A, and is arranged along the conductive portion 22a.
  • the second extending portion 24c is substantially equal to the height of the conductive portion 23a of the conductor 23 shown in FIG. 15A, and is arranged along the conductive portion 23a.
  • first and second folded portions 24d and 24e are provided so as to stand from the end portions of the first and second extending portions 24b and 24c, respectively, with respect to the package surface.
  • the plate-like connecting conductor portion 24f is provided so as to connect the first folded portion 24d and the second folded portion 24e.
  • the connecting conductor portion 24f is provided at a position higher than the height of the first extending portion 24b and the second extending portion 24c.
  • the connection conductor portion 24f is provided with a connection portion 24g connected to the connection point of the smoothing capacitors 8 and 9 so as to protrude from the surface of the connection conductor portion 24f.
  • the connecting conductor portion 24f is formed with a through hole 24h through which an AC terminal connecting portion 26e of the conductor 26 described later passes.
  • the conductor 25 that connects the semiconductor package 3 and the AC terminal 17 is formed along the conductor 22 and the conductor 24. That is, the conductor 25 has a conductive portion 25a standing on the package surface, and the conductive portion 25a includes a plate-like first conductive portion 25b arranged in parallel with the conductive portion 22a of the conductor 22, It has a plate-like second conductive portion 25 c arranged in parallel with the first folded portion 24 d of the conductor 24, and a plate-like connecting conductor portion 25 d arranged in parallel with the connection conductor portion 24 f of the conductor 24.
  • the connecting conductor portion 25d is provided with an AC terminal connecting portion 25e for connecting to the AC terminal 17 so as to protrude from the surface of the connecting conductor portion 25d.
  • the conductor 26 that connects the semiconductor package 4 and the AC terminal 17 is formed along the conductor 23 and the conductor 24. That is, the conductor 26 has a conductive portion 26a standing on the package surface, and the conductive portion 26a includes a plate-like first conductive portion 26b arranged in parallel with the conductive portion 23a of the conductor 23; It has a plate-like second conductive portion 26c arranged in parallel with the second folded portion 24e of the conductor 24 and a plate-like connecting conductor portion 26d arranged in parallel with the connecting conductor portion 24f of the conductor 24.
  • the connecting conductor portion 26d is provided with an AC terminal connecting portion 26e for connecting to the AC terminal 17 so as to protrude from the surface of the connecting conductor portion 26d.
  • FIGS. 18 to 21 are explanatory diagrams for explaining current paths in the respective operation modes (mode 1 to mode 4) of the three-level inverter device 19 according to the embodiment.
  • the current flowing through the three-level inverter circuit is the conductor 20 ⁇ semiconductor.
  • the three-level inverter device 19 is parallel to the conductive portion 20a of the conductor 20 and the second conductive portion 25c of the conductor 25 in close proximity. Are arranged. Further, the conductive portion 22a of the conductor 22 and the first conductive portion 25b of the conductor 25 are arranged in parallel so as to be along each other.
  • the current flowing through the three-level inverter circuit is as follows: conductor 24 ⁇ coupled diode 6 ⁇ conductor 22 ⁇ semiconductor package 3 ⁇ conductor 25 ⁇ AC terminal 17
  • connection conductor portion 24f of the conductor 24 (the direction of current is indicated by a thin arrow) and the connection conductor portion 25d of the conductor 25 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other.
  • the folded portion 24d of the conductor 24 (the direction of current is indicated by a thin arrow) and the second conductive portion 25c of the conductor 25 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. Furthermore, the conductive portion 22a of the conductor 22 (the direction of current is indicated by a bold arrow), the first conductive portion 25b of the conductor 25 (the direction of current is indicated by a bold arrow), and the first extended portion 24b of the conductor 24 (the current direction)
  • the laminated conductors are arranged so that the directions thereof are close to each other (indicated by thin arrows).
  • the wiring inductance is further reduced by adopting a laminated conductor structure in which the conductive portion 20a of the conductor 20, the folded portion 24d of the conductor 24, and the second conductive portion 25c of the conductor 25 are laminated in substantially the same shape.
  • the three-level inverter device 19 is configured so that the direction of the current flowing through the flat conductors 21, 23, 26 is reversed even in the mode 3.
  • the respective conductors 21, 23, and 26 are arranged close to each other. That is, the second conductive portion 26c of the conductor 26 (the direction of current is indicated by a thin arrow) and the conductive portion 21a of the conductor 21 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed.
  • the first conductive portion 26b of the conductor 26 (the direction of the current is indicated by a thin arrow) and the conductive portion 23a of the conductor 23 (the direction of the current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed.
  • the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do.
  • the current flowing through the three-level inverter circuit is as follows: AC terminal 17 ⁇ conductor 26 ⁇ semiconductor Package 4 ⁇ conductor 23 ⁇ coupling diode 7 ⁇ conductor 24.
  • the three-level inverter device 19 is configured so that the direction of the current flowing through the flat conductors 23, 24, and 26 is reversed even in the mode 4.
  • the respective conductors 23, 24, and 26 are arranged close to each other. That is, the connection conductor portion 26d of the conductor 26 (the direction of current is indicated by a thin arrow) and the connection conductor portion 24f of the conductor 24 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed.
  • the second conductive portion 26c of the conductor 26 (the direction of current is indicated by a thin arrow) and the folded portion 24e of the conductor 24 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed. Furthermore, the first conductive portion 26b of the conductor 26 (the direction of current is indicated by a thin arrow), the second extension portion 24c of the conductor 24 (the direction of the current is indicated by a bold arrow), and the conductive portion 23a of the conductor 23 (the current direction) Are arranged so that their directions are close to each other and constitute a laminated conductor.
  • the wiring inductance is further reduced by adopting a laminated conductor structure in which the conductive portion 21a of the conductor 21, the folded portion 24e of the conductor 24, and the second conductive portion 26c of the conductor 26 are laminated in substantially the same shape.
  • the circuit is configured by the conductor having the flat conductive portion standing on the package surface.
  • the power conversion device 19 according to the second embodiment is different from the power conversion device 1 according to the first embodiment in that the length of the conductor connecting the smoothing capacitor 8 and the semiconductor package 2 (or the smoothing capacitor 9 and the semiconductor package 5) is the same as that of the power conversion device 1 according to the first embodiment. Since the comparison is short, in addition to the effect of the power conversion device 1 according to the first embodiment, the wiring inductance can be further reduced.
  • the power converter of the present invention and the conductor arrangement method of the power converter have been described in detail only for the specific examples described.
  • the present invention includes various modifications and variations within the scope of the technical idea of the present invention. It is obvious to those skilled in the art that the modification is possible, and it is natural that such variations and modifications belong to the power conversion device and the conductor arrangement method of the power conversion device of the present invention.
  • the conductive portions in which the flowing current is in the opposite direction are provided close to each other. Therefore, as described in the embodiment, it is preferable that all the combinations of the conductive parts are provided close to each other. However, in consideration of the configuration of the power converter, the combination of only some of the conductive parts is provided close to each other. Even in this case, the effects of the power conversion device and the conductor arrangement method for the power conversion device of the present invention can be partially obtained.
  • the three-level inverter device has been described as an example.
  • the power conversion device is not limited to the power conversion device of the embodiment, and various power conversion devices such as connection of a switching element and a DC power source (or AC power source)
  • the present invention can be applied to a conductor forming a circuit of a conversion device.
  • the structure for one phase is shown and described.
  • three sets of three-level inverter devices 1 may be used.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

L'invention concerne un appareil de conversion électrique dans lequel une surtension temporaire est réduite en réduisant l'inductance du câblage formant les sections de conduction d'un circuit. Dans un appareil inverseur à trois niveaux (1) présentant des éléments à semi-conducteurs (2 à 5), des diodes couplées (6, 7) et des condensateurs de lissage (8, 9), un circuit inverseur est constitué de sections de conducteurs (10 à 16) qui possèdent respectivement des parties conductrices de type plaque (10a à 16a) qui sont placées sur une surface où sont disposés les groupes d'éléments à semi-conducteurs (2 à 7). Une électrode positive et une électrode négative des condensateurs de lissage (8, 9) et un point de connexion en série des condensateurs de lissage (8, 9) sont connectés respectivement aux parties conductrices (10A, 11a, 14a) des sections de conducteur (10, 11, 14). Par ailleurs, un conducteur stratifié est configuré en disposant les parties conductrices (10a à 16a) à proximité l'une de l'autre le long du conducteur stratifié, les directions de circulation du courant dans lesdites parties conductrices étant opposées les unes aux autres.
PCT/JP2012/076671 2011-11-09 2012-10-16 Appareil de conversion électrique et procédé de placement de conducteur dans appareil de conversion électrique WO2013069415A1 (fr)

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JP2011-245117 2011-11-09
JP2011245117A JP5807516B2 (ja) 2011-11-09 2011-11-09 電力変換装置及び電力変換装置における導体の配置方法

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WO2014122877A1 (fr) * 2013-02-06 2014-08-14 富士電機株式会社 Dispositif à semi-conducteurs
WO2016023873A1 (fr) * 2014-08-11 2016-02-18 Woodward Kempen Gmbh Circuit faiblement inductif d'un convertisseur
CN107843806A (zh) * 2017-10-30 2018-03-27 阳光电源股份有限公司 一种接线检测方法、装置和光伏发电系统
EP3451377A4 (fr) * 2016-05-03 2019-03-27 Yangzhou Guoyang Electronic Co., Ltd. Électrode combinée et son module à haute puissance à trois niveaux
WO2020021655A1 (fr) * 2018-07-25 2020-01-30 東芝三菱電機産業システム株式会社 Convertisseur de courant
CN112367760A (zh) * 2020-10-29 2021-02-12 科华恒盛股份有限公司 过流结构、电容模块和变流装置

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JP6179487B2 (ja) * 2014-08-26 2017-08-16 富士電機株式会社 ３レベル電力変換装置の半導体モジュールユニット
JP6160780B2 (ja) * 2014-08-26 2017-07-12 富士電機株式会社 ３レベル電力変換装置
JP6575072B2 (ja) * 2015-02-03 2019-09-18 富士電機株式会社 相ユニット及びこれを用いた３レベル電力変換装置
JP6234393B2 (ja) * 2015-03-03 2017-11-22 三菱電機株式会社 電力用半導体装置および電力変換装置
JP7443687B2 (ja) * 2019-07-23 2024-03-06 富士電機株式会社 電力変換装置
JP7408941B2 (ja) * 2019-07-25 2024-01-09 富士電機株式会社 電力変換装置

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WO2014122877A1 (fr) * 2013-02-06 2014-08-14 富士電機株式会社 Dispositif à semi-conducteurs
US9871465B2 (en) 2013-02-06 2018-01-16 Fuji Electric Co., Ltd. Semiconductor device including positive, negative and intermediate potential conductor plates
WO2016023873A1 (fr) * 2014-08-11 2016-02-18 Woodward Kempen Gmbh Circuit faiblement inductif d'un convertisseur
CN106716808A (zh) * 2014-08-11 2017-05-24 伍德沃德肯彭有限公司 逆变器的低电感电路装置
CN106716808B (zh) * 2014-08-11 2019-09-13 伍德沃德肯彭有限公司 逆变器的低电感电路装置
US9998028B2 (en) 2014-08-11 2018-06-12 Woodward Kempen Gmbh Low inductivity circuit arrangement of an inverter
EP3451377A4 (fr) * 2016-05-03 2019-03-27 Yangzhou Guoyang Electronic Co., Ltd. Électrode combinée et son module à haute puissance à trois niveaux
CN107843806A (zh) * 2017-10-30 2018-03-27 阳光电源股份有限公司 一种接线检测方法、装置和光伏发电系统
CN107843806B (zh) * 2017-10-30 2020-08-28 阳光电源股份有限公司 一种接线检测方法、装置和光伏发电系统
WO2020021655A1 (fr) * 2018-07-25 2020-01-30 東芝三菱電機産業システム株式会社 Convertisseur de courant
CN112119581A (zh) * 2018-07-25 2020-12-22 东芝三菱电机产业系统株式会社 电力转换装置
JPWO2020021655A1 (ja) * 2018-07-25 2021-01-07 東芝三菱電機産業システム株式会社 電力変換装置
CN112119581B (zh) * 2018-07-25 2024-02-06 东芝三菱电机产业系统株式会社 电力转换装置
CN112367760A (zh) * 2020-10-29 2021-02-12 科华恒盛股份有限公司 过流结构、电容模块和变流装置
CN112367760B (zh) * 2020-10-29 2022-06-10 科华恒盛股份有限公司 过流结构、电容模块和变流装置

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