WO2013069415A1

WO2013069415A1 - Power conversion apparatus, and method for disposing conductor in power conversion apparatus

Info

Publication number: WO2013069415A1
Application number: PCT/JP2012/076671
Authority: WO
Inventors: 裕加山本; 圭一小太刀
Original assignee: 株式会社明電舎
Priority date: 2011-11-09
Filing date: 2012-10-16
Publication date: 2013-05-16
Also published as: JP5807516B2; JP2013102627A

Abstract

In this power conversion apparatus, a surge voltage is reduced by reducing wiring inductance of conductor sections constituting a circuit. In a three-level inverter apparatus (1) having semiconductor packages (2-5), coupled diodes (6, 7), and smoothing capacitors (8, 9), an inverter circuit is configured of conductor sections (10-16) respectively having board-like conductive portions (10a-16a) that stand on a surface where the element package groups (2-7) are disposed. A positive electrode and a negative electrode of the smoothing capacitors (8, 9), and a serial connection point of the smoothing capacitors (8, 9) are respectively connected to the conductive portions (10a, 11a, 14a) of the conductor sections (10, 11, 14). Furthermore, a laminated conductor is configured by disposing the conductive portions (10a-16a) in proximity to each other along the laminated conductor, said conductive portions respectively having the directions of currents flowing therein reverse to each other.

Description

Power converter and method of arranging conductor in power converter

The present invention relates to a power conversion device, and more particularly, to an arrangement of conductors constituting a circuit of the power conversion device.

For example, a three-level inverter that performs PWM (Pulse によって Width Modulation) control is known as a power converter that performs power conversion between direct current and alternating current using a switching element and a passive element.

In such a three-level inverter, IGBT (Insulated Gate Bipolar Transistor) is used as an element for the power device that constitutes the inverter circuit from the viewpoints of small size, light weight, low loss, high efficiency, low noise, harmonics, high reliability, etc. ), Etc. are used.

In the circuit of the power conversion device, if the numerical value of the wiring inductance between each package is large, the surge voltage when the switching element is turned off may be high. And when this surge voltage exceeds the safe operation area | region of a switching element, it may lead to the damage of a switching element.

Therefore, as a method of reducing the wiring inductance and suppressing the surge voltage at the time of switching of the switching element, the conductor which is the current path is made flat and connected to each switching element (DC voltage source, AC terminal). A parallel plate-like conductor arrangement structure in which conductors are arranged close to each other is employed (for example, Patent Documents 1 to 6). Furthermore, in the conductor plates arranged close to each other, by arranging the directions of the currents flowing through the conductor plates to be opposite to each other, the changes in the magnetic flux due to the current flowing through the conductor plates are offset each other. Apparently, the change in magnetic flux is reduced (for example, Patent Documents 3 and 5). In addition, the inductance between the terminals of the IGBT package is reduced by arranging the capacitors so that the distance between the capacitors connected in series is shortened (for example, Patent Document 7).

However, when a plate-shaped conductor is laminated in parallel with the surface on which the switching element is disposed, the size of the power conversion device is increased by the surface of the conductor, which may be a factor that hinders downsizing of the power conversion device. . In addition, when the distance between the capacitor and the switching element connected to the capacitor is increased, the wiring inductance of this portion is increased and the surge voltage may be increased.

In addition, when the capacity of a load to which power is supplied from the power converter increases, a large current output is also required for the power converter. And in order to reduce the power loss which increases with the increase in the load current, the increase in the load current has been accompanied by an increase in the output voltage of the power converter. Thus, the surge voltage at the time of switching of the switching element increases as the current of the power converter increases and the voltage increases. Therefore, in order to reduce the switching loss of the power converter, further reduction in wiring inductance is required.

Japanese Patent Application Laid-Open No. 2010-200525 JP 2005-160248 A JP 2002-153078 A JP 2006-280191 A JP 2005-287267 A Japanese Patent Laid-Open No. 11-4484 JP 2010-288415 A

One aspect of the power conversion device of the present invention is a power conversion device that converts direct current to alternating current or alternating current to direct current. The conductor that connects the switching element and the direct current voltage source is provided on the surface on which the switching element is provided. It has a plate-like conductive part standing upright, and a DC voltage source is connected to this conductive part.

Further, according to another aspect of the power conversion device of the present invention, in a power conversion device that converts direct current to alternating current or alternating current to direct current, a conductor that constitutes a circuit of the power conversion device includes an element package group that constitutes the circuit. It has plate-like conductive parts standing up to the surface to be provided, and conductive parts in which the currents flowing through the conductive parts of the respective conductors are in opposite directions are provided in parallel and close together to constitute a parallel laminated conductor. It is characterized by.

Moreover, one aspect of the conductor arrangement method in the power conversion device of the present invention is a conductor arrangement method in the power conversion device that converts direct current into alternating current or alternating current into direct current, and is provided for a surface on which a switching element is provided. It is characterized by connecting a switching element and a DC voltage source with a conductor having a plate-like conductive portion standing upright.

Another aspect of the conductor arrangement method in the power conversion device of the present invention is a conductor arrangement method in the power conversion device that converts direct current into alternating current or alternating current into direct current, and constitutes a circuit of the power conversion device. A circuit is constituted by a conductor having a plate-like conductive portion standing upright with respect to the surface on which the element package group is provided, and conductive portions of conductors in which the current flowing through the conductive portion is in the opposite direction are provided in parallel and close to each other. It is characterized by that.

(A) The perspective view of the power converter device which concerns on Embodiment 1, (b) The side view of the power converter device which concerns on Embodiment 1, (c) The top view of the power converter device which concerns on Embodiment 1. FIG. (A) The perspective view of the power converter device which concerns on Embodiment 1 provided with the DC voltage source, (b) The side view of the power converter device which concerns on Embodiment 1 provided with the DC voltage source. FIG. 2 is an electric circuit diagram of the power conversion device according to the first embodiment. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 1, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor which concerns on Embodiment 1. FIG. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 1, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor which concerns on Embodiment 1. FIG. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 1, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor which concerns on Embodiment 1. FIG. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 1, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor which concerns on Embodiment 1. FIG. (A) In the power converter device according to the first embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 1, and (b) in the power converter device according to the first embodiment, the direction of the current flowing in the conductor in mode 1. It is explanatory drawing demonstrated. (A) In the power converter according to the first embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 2, (b) In the power converter according to the first embodiment, the direction of the current flowing in the conductor in mode 2 It is explanatory drawing demonstrated. (A) In the power converter device according to the first embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 3, and (b) in the power converter device according to the first embodiment, the direction of the current flowing in the conductor in mode 3. It is explanatory drawing demonstrated. (A) In the power converter device according to the first embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 4, (b) In the power converter device according to the first embodiment, the direction of the current flowing in the conductor in mode 4 It is explanatory drawing demonstrated. (A) The perspective view of the power converter device which concerns on Embodiment 2, (b) The side view of the power converter device which concerns on Embodiment 2, (c) The top view of the power converter device which concerns on Embodiment 2. FIG. (A) The perspective view of the power converter device which concerns on Embodiment 2 provided with the DC voltage source, (b) The side view of the power converter device which concerns on Embodiment 2 provided with the DC voltage source. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 2, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor concerning Embodiment 2. FIG. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 2, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor concerning Embodiment 2. FIG. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 2, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor concerning Embodiment 2. FIG. (A) Explanatory drawing explaining the arrangement | positioning form of the conductor which concerns on Embodiment 2, (b) It is explanatory drawing which shows the position in the electric circuit of the conductor concerning Embodiment 2. FIG. (A) In the power converter device according to the second embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 1, (b) In the power converter device according to the second embodiment, the direction of the current flowing in the conductor in mode 1 It is explanatory drawing demonstrated. (A) In the power converter according to the second embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 2, (b) In the power converter according to the second embodiment, the direction of the current flowing in the conductor in mode 2 It is explanatory drawing demonstrated. (A) In the power converter according to the second embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 3, (b) In the power converter according to the second embodiment, the direction of the current flowing in the conductor in mode 3 It is explanatory drawing demonstrated. (A) In the power converter according to the second embodiment, an explanatory diagram for explaining the current flowing in the electric circuit in mode 4, (b) In the power converter according to the second embodiment, the direction of the current flowing in the conductor in mode 4 It is explanatory drawing demonstrated.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A power converter according to an embodiment of the present invention and a conductor arrangement method in the power converter will be described in detail with reference to the drawings.

(Embodiment 1)
1 and 2 are diagrams showing a structure of one phase of a three-level inverter device 1 that is a power conversion device according to the first embodiment, and FIG. 1 is a diagram before connecting smoothing

capacitors

8 and 9. FIG. 2 is a diagram in which smoothing

capacitors

8 and 9 are connected. FIG. 3 is an electric circuit diagram corresponding to the three-level inverter device 1 according to the first embodiment. In the description of the embodiment, the IGBT is described as an example of the switching element, but the same effect can be obtained when other switching elements such as a MOSFET and a bipolar transistor are used (the same applies to the second embodiment). ). In the embodiment, an example is shown in which the number of collectors and emitters of the semiconductor package is two. However, the number of collectors / emitters may be one or more. 1 can be configured similarly to the inverter device according to the first embodiment.

As shown in FIGS. 1 (a) and 2 (a), the three-level inverter device 1 according to the first embodiment includes element package groups 2 to 7 arranged on a substantially straight line and a first voltage source constituting a DC voltage source. 1 and smoothing

capacitors

8 and 9 as second unit voltage sources. Each of the element packages constituting the element package groups 2 to 7 or conductors 10 to 16 for electrically connecting the element package and the smoothing capacitor (or AC terminal) are provided. As shown in FIGS. 1B and 2B, the conductors 10 to 16 are plate-like erected with respect to the surface on which the element package groups 2 to 7 are arranged (hereinafter referred to as package surfaces). Conductive portions 10a to 16a.

First, the element package groups 2 to 7 will be described with reference to FIGS. As illustrated in FIG. 3, the three-level inverter device 1 according to the first embodiment includes

semiconductor packages

2 and 3 connected in series between the smoothing capacitor 8 and the AC terminal 17, and the semiconductor package 2 and the semiconductor package 3. The coupling diode 6 connected between the series connection point and the series connection point of the smoothing

capacitors

8 and 9, the

semiconductor packages

4 and 5 connected in series between the AC terminal 17 and the smoothing capacitor 9, and the semiconductor package 4 And a coupling diode 7 connected between the series connection point of the semiconductor package 5 and the series connection point of the smoothing

capacitors

8 and 9. Each of the element package groups 2 to 7 is disposed on the heat sink 18. Each of the semiconductor packages 2 to 5 includes IGBTs 2a to 5a and diodes 2b to 5b connected in reverse parallel thereto.

As shown in FIG. 1C, the emitter E of the semiconductor package 2 is provided adjacent to the collector C of the semiconductor package 3, and the collector C of the semiconductor package 3 and the cathode K1 of the coupling diode 6 are adjacent. A coupling diode 6 is provided. In addition, the collector C of the semiconductor package 5 is provided adjacent to the emitter E of the semiconductor package 4, and the coupling diode 7 is provided so that the emitter E of the semiconductor package 4 and the anode A 2 of the coupling diode 7 are adjacent. Further, the

coupling diodes

6 and 7 are integrally formed so that the anode A1 of the coupling diode 6 and the anode A2 of the coupling diode 7 are adjacent to each other, and the cathode K1 of the coupling diode 6 and the cathode K2 of the coupling diode 7 are adjacent to each other. Yes. As a result, the semiconductor packages 2 to 5 and the

coupling diodes

6 and 7 are arranged side by side on a substantially straight line. In the embodiment, the coupling diode 6 and the coupling diode 7 constitute an integrated package, but the shape and configuration of the coupling diode 6 and the coupling diode 7 are not particularly limited, and the coupling diode 6 and the coupling diode are not limited. 7 may be provided separately. Each

coupling diode

6, 7 may have a form in which a plurality of diodes are connected in series (substantially a form in which the diodes are connected in parallel) in addition to a form in which one coupling diode is provided.

Next, the conductors 10 to 16 constituting the three-level inverter device 1 will be described in detail with reference to the state where the conductors 10 to 16 are individually provided in the three-level inverter device 1.

As shown in FIGS. 4A and 4B, the conductor 10 that connects the collector C of the semiconductor package 2 and the positive terminal of the smoothing capacitor 8 is a plate-like conductive portion that is erected with respect to the package surface. 10a. The conductive portion 10a has a standing portion 10b standing from the semiconductor package 2, and an extending portion 10c extending from the upper end portion of the standing portion 10b toward the adjacent semiconductor package 3. A connecting portion 10d such as a stud bolt connected to the positive terminal of the smoothing capacitor 8 is provided at the end of the extending portion 10c so as to protrude from the surface of the extending portion 10c. The extending portion 10c is provided away from the semiconductor package 3 by a distance that is about the height of a conductive portion 12a of the conductor 12 described later. As shown in FIG. 2A, after the smoothing capacitor 8 is connected to the connecting portion 10d, the connecting portion 10d is fastened with a nut or the like (the connection between the other connecting portions and the smoothing

capacitors

8 and 9 is the same). is there). In addition, what is necessary is just to apply a well-known connection method suitably for the connection method in the connection part 10d, such as using a detachable connector.

Further, as shown in FIGS. 4A and 4B, the conductor 11 connecting the emitter E of the semiconductor package 5 and the negative electrode terminal of the smoothing capacitor 9 is a plate-like shape standing on the package surface. It has a conductive portion 11a. The conductive portion 11a has a standing portion 11b standing from the semiconductor package 5 and an extending portion 11c extending from the upper end of the standing portion 11b toward the adjacent semiconductor package 4, and the extending portion 11c. A connecting portion 11d connected to the negative electrode terminal of the smoothing capacitor 9 is provided to protrude from the surface of the extending portion 11c. The extending portion 11c is provided away from the semiconductor package 4 by a distance that is about the height of a conductive portion 13a of the conductor 13 described later.

As shown in FIGS. 5A and 5B, the conductor 12 connecting the emitter E of the semiconductor package 2, the collector C of the semiconductor package 3, and the cathode K1 of the coupling diode 6 is connected to the package surface. It has a plate-like conductive portion 12a standing upright. Similarly, the conductor 13 that connects the collector C of the semiconductor package 5, the emitter E of the semiconductor package 4, and the anode A2 of the coupling diode 7 has a plate-like conductive portion 13a that stands upright with respect to the package surface.

As shown in FIGS. 6A and 6B, the conductor 14 that connects the anode A1 of the coupling diode 6, the cathode K2 of the coupling diode 7, and the connection point of the smoothing

capacitors

8 and 9 is formed on the package surface. Has a plate-like conductive portion 14a. The conductive portion 14a includes first and second extending

portions

14b and 14c, first and second folded

portions

14d and 14e, and a connecting conductor portion 14f.

The first extending portion 14b is a plate-like conductor standing on the package surface, and is provided extending from the anode A1 of the coupling diode 6 to the semiconductor package 3 and the semiconductor package 2. The second extending portion 14 c is a plate-like conductor standing on the package surface, and is provided extending from the cathode K 2 of the coupling diode 7 to the semiconductor package 4 and the semiconductor package 5. The first extending portion 14b is substantially equal to the height of the conductive portion 12a of the conductor 12 shown in FIG. 5A, and is disposed along the conductive portion 12a. Moreover, the 2nd extending | stretching part 14c is substantially equal to the height of the electroconductive part 13a of the conductor 13 shown to Fig.5 (a), and is arrange | positioned along this electroconductive part 13a.

As shown in FIG. 6A, first and second folded

portions

14d and 14e are provided so as to stand upright from the end portions of the first and second extending

portions

14b and 14c, respectively, with respect to the package surface. The plate-like connecting conductor portion 14f is provided so as to connect the folded portion 14d and the folded portion 14e. The connecting conductor portion 14f is provided at a position higher than the height of the first extending portion 14b and the second extending portion 14c. The connecting conductor portion 14f is provided with a connecting portion 14g connected to the connecting point of the smoothing

capacitors

8 and 9, protruding from the surface of the connecting conductor portion 14f. The connecting conductor portion 14f is formed with a through hole 14h through which an AC terminal connecting portion 16e of the conductor 16 described later passes.

7A and 7B, the conductor 15 that connects the semiconductor package 3 and the AC terminal 17 is formed along the conductor 14. That is, the conductor 15 includes a plate-like first conductive portion 15b arranged in parallel with the first extending portion 14b of the conductor 14, and a plate-like folded portion 15c arranged in parallel with the folded portion 14d of the conductor 14. And a plate-like second conductive portion 15d arranged in parallel with the connecting conductor portion 14f of the conductor 14. Note that a connection portion 15e for connecting to the AC terminal 17 is provided at the end of the second conductive portion 15d so as to protrude from the surface of the second conductive portion 15d.

Similarly, the conductor 16 connecting the semiconductor package 4 and the AC terminal 17 is formed along the conductor 14. That is, the conductor 16 includes a plate-like first conductive portion 16b arranged in parallel with the second extending portion 14c of the conductor 14 and a plate-like folded portion 16c arranged in parallel with the folded portion 14e of the conductor 14. And a plate-like second conductive portion 16d disposed in parallel with the connecting conductor portion 14f of the conductor 14. In addition, the connection part 16e for connecting with the alternating current terminal 17 is provided in the edge part of the 2nd electroconductive part 16d, and protrudes from the 2nd electroconductive part 16d surface.

The wiring inductance reduction effect of the three-level inverter device 1 according to the first embodiment of the present invention will be described with reference to FIGS. 8 to 11 are explanatory diagrams illustrating current paths in the respective operation modes (mode 1 to mode 4) of the three-level inverter device 1 according to the first embodiment.

As shown in FIG. 8A, when the semiconductor package 2 and the semiconductor package 3 are turned on and the semiconductor package 4 and the semiconductor package 5 are turned off (mode 1), the current flowing through the three-level inverter circuit is the conductor 10 → semiconductor. Package 2 → conductor 12 → semiconductor package 3 → conductor 15 → AC terminal 17

As illustrated in FIG. 8B, the three-level inverter device 1 according to the first embodiment of the present invention is configured so that the standing portion 10 b of the conductor 10 and the folded portion 15 c of the conductor 15 are aligned. The extending portion 10c and the second conductive portion 15d of the conductor 15 are arranged in parallel so as to be along each other. Direction of current flowing through the standing portion 10b (or extending portion 10c) of the conductor 10 (indicated by a thin arrow in the figure) and direction of current flowing through the folded portion 15c (or the second conductive portion 15d) of the conductor 15 ( Since the reverse direction is indicated by a bold arrow in the figure, the current flowing in the standing portion 10b and the folded portion 15c (or the extending portion 10c and the second conductive portion 15d) is increased by the standing portion 10b and the folded portion 15c (or The magnetic fields generated in the extending portion 10c and the second conductive portion 15d) cancel each other, and the wiring inductance is reduced. For the same reason, the conductive portion 12a of the conductor 12 and the first conductive portion 15b of the conductor 15 are arranged so as to be close to each other, so that the direction of the current flowing through the conductive portion 12a of the conductor 12 (in FIG. The direction of the current flowing through the first conductive portion 15b of the conductor 15 (indicated by a bold arrow in the figure) is opposite to that of the conductor 15 and the wiring inductance is reduced.

As shown in FIG. 9A, when the semiconductor package 3 is turned on and the

semiconductor packages

2, 4 and 5 are turned off (mode 2), the current flowing through the three-level inverter circuit is as follows: conductor 14 → coupled diode 6 → conductor 12 → semiconductor package 3 → conductor 15 → AC terminal 17

As shown in FIG. 9B, in the three-level inverter device 1 according to the first embodiment, the direction of the current flowing through the

flat conductors

12, 14, and 15 is reversed even in the mode 2. The

respective conductors

12, 14, 15 are arranged in close proximity. That is, the connecting conductor portion 14f of the conductor 14 (the direction of current is indicated by a thin arrow) and the second conductive portion 15d of the conductor 15 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. . The folded portion 14d of the conductor 14 (the direction of current is indicated by a thin arrow) and the folded portion 15c of the conductor 15 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. Further, the first extending portion 14b of the conductor 14 (the direction of current is indicated by a thin arrow) and the conductive portion 12a of the conductor 12 and the first conductive portion 15b of the conductor 15 (the direction of current is indicated by a bold arrow) are close to each other. The laminated conductors are arranged along the line. As a result, the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do. In particular, the wiring inductance is further reduced by forming a laminated conductor structure in which the standing portion 10b of the conductor 10, the folded portion 15c of the conductor 15, and the folded portion 14d of the conductor 14 are laminated in substantially the same shape.

As shown in FIG. 10A, when the semiconductor package 4 and the semiconductor package 5 are turned on and the semiconductor package 2 and the semiconductor package 3 are turned off (mode 3), the current flowing through the three-level inverter circuit is changed to the AC terminal 17 → Conductor 16 → semiconductor package 4 → conductor 13 → semiconductor package 5 → conductor 11

As shown in FIG. 10B, in the three-level inverter device 1 according to the first embodiment, the direction of the current flowing through the

flat conductors

11, 13, and 16 is reversed even in the mode 3. The

respective conductors

11, 13, and 16 are arranged close to each other. That is, the second conductive portion 16d of the conductor 16 (the direction of current is indicated by a thin arrow) and the extending portion 11c of the conductor 11 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. Further, the folded portion 16c (the direction of current is indicated by a thin arrow) of the conductor 16 and the standing portion 11b (the direction of current is indicated by a bold arrow) of the conductor 11 are arranged so as to be close to each other to constitute a laminated conductor. is doing. Further, the first conductive portion 16b of the conductor 16 (the direction of current is indicated by a thin arrow) and the conductive portion 13a of the conductor 13 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor Is configured. As a result, the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do.

As shown in FIG. 11A, when the semiconductor package 4 is turned on and the

semiconductor packages

2, 3 and 5 are turned off (mode 4), the current flowing through the three-level inverter circuit is as follows: AC terminal 17 → conductor 16 → semiconductor Package 4 → conductor 13 → coupling diode 7 → conductor 14.

As shown in FIG. 11 (b), the three-level inverter device 1 according to the first embodiment is configured so that the direction of the current flowing through the

flat conductors

13, 14, 16 is reversed even in the mode 4. The

respective conductors

13, 14, and 16 are arranged close to each other. That is, the second conductive portion 16d of the conductor 16 (the direction of current is indicated by a thin arrow) and the connection conductor portion 14f of the conductor 14 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor Is configured. Further, the folded portion 16c of the conductor 16 (the direction of current is indicated by a thin arrow) and the folded portion 14e of the conductor 14 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other to constitute a laminated conductor. ing. Further, the first conductive portion 16b of the conductor 16 and the conductive portion 13a of the conductor 13 (the direction of current is indicated by a thin arrow) and the second extending portion 14c of the conductor 14 (the direction of current is indicated by a bold arrow) are close to each other. Accordingly, the laminated conductors are arranged. As a result, the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do. In particular, the wiring inductance is further reduced by providing a laminated conductor structure in which the standing portion 11b of the conductor 11, the folded portion 14e of the conductor 14, and the folded portion 16c of the conductor 16 are laminated in substantially the same shape.

As described above, according to the power conversion device and the conductor arrangement method of the power conversion device according to the first embodiment of the present invention, the circuit is configured by the conductor having the plate-like conductive portion standing on the package surface. Thus, the distance between the smoothing capacitor and the terminal of the semiconductor package connected to the smoothing capacitor can be shortened. As a result, since the wiring inductance between the smoothing capacitor and the semiconductor package is reduced, the surge voltage of the power converter can be reduced.

Also, in the conductors that make up the circuit, by providing the conductive parts in the opposite directions of the flowing current in close proximity to each other to form the laminated conductors, the mutual wiring inductance can be reduced, and the surge voltage of the power conversion device Can be reduced.

In addition, since the conductive portions of the conductors are erected with respect to the package surface, the work for assembling the conductors can be facilitated, and the DC voltage source can be applied from either the back surface of the laminate in which the conductive portions are stacked. Alternatively, an AC terminal can be connected. As a result, the layout design of the constituent members constituting the power conversion device is facilitated. Further, since the conductor area in the direction parallel to the package surface is reduced by standing the conductor with respect to the package surface, the power conversion device can be reduced in size. Moreover, since the flat conductor does not cover the package surface, the heat dissipation of the semiconductor package is improved.

(Embodiment 2)
A three-level inverter device that is a power converter according to Embodiment 2 of the present invention will be described with reference to the drawings. The three-level inverter device according to the second embodiment of the present invention is the same as the three-level inverter device 1 according to the first embodiment except that the arrangement form of the semiconductor packages 2 to 5 is different. Therefore, the same components as those of the three-level inverter device 1 according to the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted. The electric circuit diagram of the three-level inverter device according to the second embodiment is the same as the electric circuit diagram of the three-level inverter device 1 according to the first embodiment shown in FIG.

12 and 13 are diagrams showing a structure of one phase of the three-level inverter device 19 according to the second embodiment. FIG. 12 is a diagram before the smoothing

capacitors

8 and 9 are connected, and FIG. It is the figure which connected the smoothing

capacitors

8 and 9. FIG.

As shown in FIGS. 12 (a) and 13 (a), the three-level inverter device 19 according to the second embodiment includes element package groups 2 to 7 arranged in a substantially straight line and a first voltage source constituting a DC voltage source. , And smoothing

capacitors

8 and 9 as second unit voltage sources. Each of the device packages constituting the device package groups 2 to 7 or conductors 20 to 26 for connecting the device package and the smoothing capacitors 8 and 9 (or the AC terminal 17) are provided. As shown in FIGS. 12B and 13B, the conductors 20 to 26 have plate-like conductive portions 20a to 26a standing on the package surface.

First, the element package groups 2 to 7 will be described with reference to FIGS. 3 and 12C. As shown in FIG. 3, the three-level inverter device 19 according to the second embodiment is a semiconductor connected in series between the smoothing capacitor 8 and the AC terminal 17 in the same manner as the three-level inverter device 1 according to the first embodiment. Between the

diodes

2 and 3, the series connection point of the semiconductor package 2 and the semiconductor package 3, and the series connection point of the smoothing

capacitors

8 and 9, and between the AC terminal 17 and the smoothing capacitor 9 The semiconductor packages 4 and 5 are connected in series, and the coupling diode 7 is connected between the series connection point of the semiconductor package 4 and the semiconductor package 5 and the series connection point of the smoothing

capacitors

8 and 9.

As shown in FIG. 12 (c), the semiconductor package 2 is provided between the semiconductor package 3 and the coupling diode 6. At this time, the semiconductor package 2 is provided such that the emitter E of the semiconductor package 2 is adjacent to the cathode K1 of the coupling diode 6 and the collector C of the semiconductor package 3. The semiconductor package 5 is provided between the semiconductor package 4 and the coupling diode 7. At this time, the semiconductor package 5 is provided so that the collector C of the semiconductor package 5 is adjacent to the anode A 2 of the coupling diode 7 and the emitter E of the semiconductor package 4. Further, the

coupling diodes

6 and 7 are integrally formed so that the anode A1 of the coupling diode 6 and the anode A2 of the coupling diode 7 are adjacent to each other, and the cathode K1 of the coupling diode 6 and the cathode K2 of the coupling diode 7 are adjacent to each other. . As a result, the semiconductor packages 2 to 5 and the

coupling diodes

6 and 7 are arranged side by side on a substantially straight line.

Next, the conductors 20 to 26 constituting the three-level inverter device 19 according to the second embodiment will be described with reference to the state where the conductors 20 to 26 are individually provided in the three-level inverter device 19.

As shown in FIGS. 14A and 14B, the conductor 20 that connects the collector C of the semiconductor package 2 and the positive terminal of the smoothing capacitor 8 is a plate-like conductive portion that stands upright with respect to the package surface. 20a. A connection portion 20b connected to the positive terminal of the smoothing capacitor 8 is provided at the end of the conductive portion 20a so as to protrude from the surface of the conductive portion 20a. The conductor 21 that connects the emitter E of the semiconductor package 5 and the negative terminal of the smoothing capacitor 9 has a plate-like conductive portion 21a that stands upright with respect to the package surface. A connecting portion 21b connected to the negative electrode terminal of the smoothing capacitor 9 is provided at the end of the conductive portion 21a so as to protrude from the surface of the conductive portion 21a.

As shown in FIGS. 15A and 15B, the conductor 22 connecting the emitter E of the semiconductor package 2, the collector C of the semiconductor package 3, and the cathode K1 of the coupling diode 6 is connected to the package surface. It has a plate-like conductive portion 22a standing upright. Similarly, the conductor 23 that connects the collector C of the semiconductor package 5, the emitter E of the semiconductor package 4, and the anode A2 of the coupling diode 7 has a plate-like conductive portion 23a that stands upright with respect to the package surface.

As shown in FIGS. 16A and 16B, the conductor 24 connecting the anode A1 of the coupling diode 6, the cathode K2 of the coupling diode 7, and the connection point of the smoothing

capacitors

8 and 9 is formed on the package surface. Has a plate-like conductive portion 24a erected. The conductive portion 24a includes first and second extending

portions

24b and 24c, first and second folded

portions

24d and 24e, and a connecting conductor portion 24f.

The first extending portion 24b is a plate-like conductor standing on the package surface, and the first extending portion 24b extends from the anode A1 of the coupling diode 6 to the semiconductor package 2. The second extending portion 24 c is a plate-like conductor standing on the package surface, and the second extending portion 24 c extends from the cathode K 2 of the coupling diode 7 to the semiconductor package 5. The first extending portion 14b is substantially equal to the height of the conductive portion 22a of the conductor 22 shown in FIG. 15A, and is arranged along the conductive portion 22a. The second extending portion 24c is substantially equal to the height of the conductive portion 23a of the conductor 23 shown in FIG. 15A, and is arranged along the conductive portion 23a.

Then, as shown in FIG. 16A, first and second folded

portions

24d and 24e are provided so as to stand from the end portions of the first and second extending

portions

24b and 24c, respectively, with respect to the package surface. The plate-like connecting conductor portion 24f is provided so as to connect the first folded portion 24d and the second folded portion 24e. The connecting conductor portion 24f is provided at a position higher than the height of the first extending portion 24b and the second extending portion 24c. The connection conductor portion 24f is provided with a connection portion 24g connected to the connection point of the smoothing

capacitors

8 and 9 so as to protrude from the surface of the connection conductor portion 24f. The connecting conductor portion 24f is formed with a through hole 24h through which an AC terminal connecting portion 26e of the conductor 26 described later passes.

17A and 17B, the conductor 25 that connects the semiconductor package 3 and the AC terminal 17 is formed along the conductor 22 and the conductor 24. That is, the conductor 25 has a conductive portion 25a standing on the package surface, and the conductive portion 25a includes a plate-like first conductive portion 25b arranged in parallel with the conductive portion 22a of the conductor 22, It has a plate-like second conductive portion 25 c arranged in parallel with the first folded portion 24 d of the conductor 24, and a plate-like connecting conductor portion 25 d arranged in parallel with the connection conductor portion 24 f of the conductor 24. The connecting conductor portion 25d is provided with an AC terminal connecting portion 25e for connecting to the AC terminal 17 so as to protrude from the surface of the connecting conductor portion 25d.

Similarly, the conductor 26 that connects the semiconductor package 4 and the AC terminal 17 is formed along the conductor 23 and the conductor 24. That is, the conductor 26 has a conductive portion 26a standing on the package surface, and the conductive portion 26a includes a plate-like first conductive portion 26b arranged in parallel with the conductive portion 23a of the conductor 23; It has a plate-like second conductive portion 26c arranged in parallel with the second folded portion 24e of the conductor 24 and a plate-like connecting conductor portion 26d arranged in parallel with the connecting conductor portion 24f of the conductor 24. The connecting conductor portion 26d is provided with an AC terminal connecting portion 26e for connecting to the AC terminal 17 so as to protrude from the surface of the connecting conductor portion 26d.

The wiring inductance reduction effect of the three-level inverter device 19 according to the second embodiment of the present invention will be described with reference to FIGS. 18 to 21 are explanatory diagrams for explaining current paths in the respective operation modes (mode 1 to mode 4) of the three-level inverter device 19 according to the embodiment.

As shown in FIG. 18A, when the semiconductor package 2 and the semiconductor package 3 are turned on and the semiconductor package 4 and the semiconductor package 5 are turned off (mode 1), the current flowing through the three-level inverter circuit is the conductor 20 → semiconductor. Package 2 → conductor 22 → semiconductor package 3 → conductor 25 → AC terminal 17

As shown in FIG. 18B, the three-level inverter device 19 according to the second embodiment of the present invention is parallel to the conductive portion 20a of the conductor 20 and the second conductive portion 25c of the conductor 25 in close proximity. Are arranged. Further, the conductive portion 22a of the conductor 22 and the first conductive portion 25b of the conductor 25 are arranged in parallel so as to be along each other.

Since the direction of current flowing through the conductive portion 20a of the conductor 20 (indicated by a thin arrow in the figure) and the direction of current flowing through the second conductive portion 25c of the conductor 25 (indicated by a bold arrow in the figure) are opposite, The current flowing in the part 20a and the second conductive part 25c cancels out the magnetic fields generated in the conductive part 20a and the second conductive part 25c, thereby reducing the wiring inductance. For the same reason, by arranging the conductive portion 22a of the conductor 22 and the first conductive portion 25b of the conductor 25 so as to be close to each other and forming a laminated conductor, the direction of the current flowing through the conductive portion 22a of the conductor 22 The direction of current flowing through the first conductive portion 25b of the conductor 25 (indicated by the bold arrow in the figure) is reversed (indicated by the thin arrow in the figure), and the wiring inductance is reduced.

As shown in FIG. 19A, when the semiconductor package 3 is turned on and the

semiconductor packages

2, 4 and 5 are turned off (mode 2), the current flowing through the three-level inverter circuit is as follows: conductor 24 → coupled diode 6 → conductor 22 → semiconductor package 3 → conductor 25 → AC terminal 17

As shown in FIG. 19B, in the three-level inverter device 19 according to the second embodiment, even in the case of mode 2, the direction of the current flowing through the

flat conductors

22, 24, 25 is reversed. The

respective conductors

22, 24, 25 are arranged close to each other. That is, the connection conductor portion 24f of the conductor 24 (the direction of current is indicated by a thin arrow) and the connection conductor portion 25d of the conductor 25 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. The folded portion 24d of the conductor 24 (the direction of current is indicated by a thin arrow) and the second conductive portion 25c of the conductor 25 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other. Furthermore, the conductive portion 22a of the conductor 22 (the direction of current is indicated by a bold arrow), the first conductive portion 25b of the conductor 25 (the direction of current is indicated by a bold arrow), and the first extended portion 24b of the conductor 24 (the current direction) The laminated conductors are arranged so that the directions thereof are close to each other (indicated by thin arrows). As a result, the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do. In particular, the wiring inductance is further reduced by adopting a laminated conductor structure in which the conductive portion 20a of the conductor 20, the folded portion 24d of the conductor 24, and the second conductive portion 25c of the conductor 25 are laminated in substantially the same shape.

As shown in FIG. 20A, when the semiconductor package 4 and the semiconductor package 5 are turned on and the semiconductor package 2 and the semiconductor package 3 are turned off (mode 3), the current flowing through the three-level inverter circuit is changed to the AC terminal 17 → Conductor 26 → semiconductor package 4 → conductor 23 → semiconductor package 5 → conductor 21.

As shown in FIG. 20B, the three-level inverter device 19 according to the second embodiment is configured so that the direction of the current flowing through the

flat conductors

21, 23, 26 is reversed even in the mode 3. The

respective conductors

21, 23, and 26 are arranged close to each other. That is, the second conductive portion 26c of the conductor 26 (the direction of current is indicated by a thin arrow) and the conductive portion 21a of the conductor 21 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed. Further, the first conductive portion 26b of the conductor 26 (the direction of the current is indicated by a thin arrow) and the conductive portion 23a of the conductor 23 (the direction of the current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed. As a result, the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do.

As shown in FIG. 21A, when the semiconductor package 4 is turned on and the

semiconductor packages

2, 3 and 5 are turned off (mode 4), the current flowing through the three-level inverter circuit is as follows: AC terminal 17 → conductor 26 → semiconductor Package 4 → conductor 23 → coupling diode 7 → conductor 24.

As shown in FIG. 21B, the three-level inverter device 19 according to the second embodiment is configured so that the direction of the current flowing through the

flat conductors

23, 24, and 26 is reversed even in the mode 4. The

respective conductors

23, 24, and 26 are arranged close to each other. That is, the connection conductor portion 26d of the conductor 26 (the direction of current is indicated by a thin arrow) and the connection conductor portion 24f of the conductor 24 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed. Further, the second conductive portion 26c of the conductor 26 (the direction of current is indicated by a thin arrow) and the folded portion 24e of the conductor 24 (the direction of current is indicated by a bold arrow) are arranged so as to be close to each other and the laminated conductor is It is composed. Furthermore, the first conductive portion 26b of the conductor 26 (the direction of current is indicated by a thin arrow), the second extension portion 24c of the conductor 24 (the direction of the current is indicated by a bold arrow), and the conductive portion 23a of the conductor 23 (the current direction) Are arranged so that their directions are close to each other and constitute a laminated conductor. As a result, the magnetic field generated by the current flowing through each plate-like conductive part and the magnetic field generated by other conductive parts arranged close to those conductive parts cancel each other, reducing wiring inductance. To do. In particular, the wiring inductance is further reduced by adopting a laminated conductor structure in which the conductive portion 21a of the conductor 21, the folded portion 24e of the conductor 24, and the second conductive portion 26c of the conductor 26 are laminated in substantially the same shape.

As described above, according to the power conversion device 19 and the conductor arrangement method of the power conversion device 19 according to the second embodiment of the present invention, the circuit is configured by the conductor having the flat conductive portion standing on the package surface. By doing so, the distance between the smoothing capacitor and the terminal of the semiconductor package connected to the smoothing capacitor can be shortened. As a result, since the wiring inductance between the smoothing capacitor and the semiconductor package is reduced, the surge voltage generated in the power conversion device can be reduced. In particular, the power conversion device 19 according to the second embodiment is different from the power conversion device 1 according to the first embodiment in that the length of the conductor connecting the smoothing capacitor 8 and the semiconductor package 2 (or the smoothing capacitor 9 and the semiconductor package 5) is the same as that of the power conversion device 1 according to the first embodiment. Since the comparison is short, in addition to the effect of the power conversion device 1 according to the first embodiment, the wiring inductance can be further reduced.

As described above, the power converter of the present invention and the conductor arrangement method of the power converter have been described in detail only for the specific examples described. However, the present invention includes various modifications and variations within the scope of the technical idea of the present invention. It is obvious to those skilled in the art that the modification is possible, and it is natural that such variations and modifications belong to the power conversion device and the conductor arrangement method of the power conversion device of the present invention.

For example, in the power conversion device of the present invention, in the conductor constituting the circuit, the conductive portions in which the flowing current is in the opposite direction are provided close to each other. Therefore, as described in the embodiment, it is preferable that all the combinations of the conductive parts are provided close to each other. However, in consideration of the configuration of the power converter, the combination of only some of the conductive parts is provided close to each other. Even in this case, the effects of the power conversion device and the conductor arrangement method for the power conversion device of the present invention can be partially obtained.

In the embodiment, the three-level inverter device has been described as an example. However, the power conversion device is not limited to the power conversion device of the embodiment, and various power conversion devices such as connection of a switching element and a DC power source (or AC power source) The present invention can be applied to a conductor forming a circuit of a conversion device. In the description of the embodiment, the structure for one phase is shown and described. However, when the power conversion device has three phases, three sets of three-level inverter devices 1 may be used.

Also, by providing an insulating plate between each conductor (plate-like conductive part), it is possible to prevent a short circuit between the conductors and improve the safety of the power converter.

1, 19 ... 3-level inverter device (power converter)
2. Semiconductor package (first semiconductor switching element)
3. Semiconductor package (second semiconductor switching element)
4. Semiconductor package (third semiconductor switching element)
5 ... Semiconductor package (fourth semiconductor switching element)
6 ... Coupling diode (first coupling diode)
7. Coupling diode (second coupling diode)
8: Smoothing capacitor (first unit voltage source)
9: Smoothing capacitor (second unit voltage source)
10, 20 ... conductor (first conductor)
11, 21 ... conductor (second conductor)
12, 22 ... conductor (third conductor)
13, 23 ... conductor (fifth conductor)
14, 24 ... conductor (fourth conductor)
15, 25 ... conductor (sixth conductor)
16, 26 ... conductor (seventh conductor)
10a to 16a, 20a to 26a ... conductive portion, 10b, 11b ... standing

portion

10c, 11c ... extending portion, 14b, 24b ... first extending

portion

14c, 24c ... second extending portion, 14d, 24d ... first folded

portion

14e, 24e ... second folded portion, 14f, 24f, 25d, 26d ... connecting

conductor portions

15b, 16b, 25b, 26b ... first conductive portion, 15c, 16c ... folded

portions

15d, 16d, 25c, 26c ... second conductive Part 17 ... AC terminal 18 ... Heat sink

Claims

A plurality of semiconductor packages containing semiconductor switching elements;
A power conversion device having a plurality of coupling diodes,
A first conductor connecting a collector of the semiconductor package and a voltage source positive electrode of the power converter, having a plate-like conductive portion standing on a surface on which the plurality of semiconductor packages are provided;
A plate-like conductive portion standing on a surface on which the plurality of semiconductor packages are provided, and a second conductor connecting the emitter of the semiconductor package and the voltage source negative electrode of the power converter. A power conversion device.
A semiconductor package including a semiconductor package connected to the power supply positive electrode and a coupling diode connected to the semiconductor package, having a plate-like conductive portion standing on a surface on which the plurality of semiconductor packages are provided A third conductor that
A conductive portion of the first conductor; and a plate-like conductive portion arranged so as to be close to the conductive portion of the third conductor, and connecting the coupling diode and the voltage source of the power converter. The power converter according to claim 1, further comprising a fourth conductor.
A semiconductor package including a semiconductor package connected to the power supply negative electrode, and a coupling diode connected to the semiconductor package, having a plate-like conductive portion standing on a surface on which the plurality of semiconductor packages are provided And a fifth conductor
The fourth conductor connects the coupling diode and the voltage source, and is a plate-like conductive portion disposed so as to be close to the conductive portion of the second conductor and the conductive portion of the fifth conductor. The power conversion device according to claim 2, further comprising:
A plate-like conductive portion arranged so as to be in close proximity to the conductive portion of the first conductor or the conductive portion of the third conductor, and the third conductor is connected to the semiconductor package connected to the power supply positive electrode The power converter according to claim 2, further comprising: a sixth conductor that connects the semiconductor package connected in series via the AC terminal of the power converter.
A conductive portion disposed so as to be in close proximity to the conductive portion of the second conductor or the fifth conductor, and in series with the semiconductor package connected to the power source negative electrode via the fifth conductor The power converter according to claim 3, further comprising: a seventh conductor that connects the semiconductor package connected to the AC terminal and the AC terminal of the power converter.
A plurality of semiconductor packages;
In a power converter having a plurality of coupling diodes,
A conductor arrangement method in a power converter, wherein a conductor having a plate-like conductive portion standing on a surface on which the semiconductor package is provided constitutes a circuit of the power converter.
The method of arranging conductors in a power converter according to claim 6, wherein in each of the conductive parts constituting the circuit, the conductive parts having opposite directions of flowing current are provided so as to be close to each other.
A direct-current voltage source including first and second unit voltage sources connected in series and having three terminals of three direct-current voltage levels;
First and second semiconductor switching elements connected in series between a positive terminal and an AC terminal of the first unit voltage source;
A first coupling diode connected between the series connection point and the series connection point of the first and second unit voltage sources;
Third and fourth semiconductor switching elements connected in series between the AC terminal and the negative terminal of the second unit voltage source;
A second coupling diode connected between the series connection point and the series connection point of the first and second unit voltage sources;
A method for arranging conductors in a power conversion device comprising:
The conductor connecting the first unit voltage source and the first semiconductor switching element has a plate-like conductive part standing on the surface on which the respective semiconductor switching elements are arranged. A method for arranging conductors in a power converter, wherein the first unit voltage source is connected.
The conductor connecting the first and second semiconductor switching elements and the first coupling diode has a plate-like conductive portion standing on the surface on which the respective semiconductor switching elements are disposed,
Conductors connecting the first and second coupling diodes and the series connection point of the first and second unit voltage sources are conductive conductors connecting the first and second semiconductor switching elements and the first coupling diode. And a conductor in the power converter according to claim 8, wherein the conductor is formed so as to be close to a conductive portion of a conductor connecting the first unit voltage source and the first semiconductor switching element. Placement method.
A conductor connecting the second semiconductor switching element and the AC terminal; a conductive portion of the conductor connecting the first and second semiconductor switching elements and the first coupling diode; and the first unit voltage source and the first The conductor arranging method in the power conversion device according to claim 9, wherein the conductor is formed so as to be close to a conductive portion of a conductor connecting the one semiconductor switching element.
The conductor connecting the second unit voltage source and the fourth semiconductor switching element has a plate-like conductive part standing on the surface on which the respective semiconductor switching elements are arranged. The method of arranging conductors in a power converter according to any one of claims 8 to 10, wherein the second unit voltage source is connected.
The conductor connecting the third and fourth semiconductor switching elements and the second coupling diode has a plate-like conductive portion standing on the surface on which the respective semiconductor switching elements are disposed,
Conductors connecting the first and second coupling diodes and the series connection point of the first and second unit voltage sources are conductive conductors connecting the third and fourth semiconductor switching elements and the second coupling diode. And a conductor in the power converter according to claim 11, wherein the conductor is formed so as to be close to a conductive portion of a conductor connecting the second unit voltage source and the fourth semiconductor switching element. Placement method.
A conductor connecting the third semiconductor switching element and the AC terminal, a conductive portion of a conductor connecting the third and fourth semiconductor switching elements and the second coupling diode, and the second unit voltage source and the second The conductor arranging method in the power conversion device according to claim 12, wherein the conductor is formed so as to be close to the conductive portion of the conductor connecting the four semiconductor switching elements.