JP2023128422A - Electric power convertor - Google Patents

Abstract

To provide an electric power convertor making it possible to suppress an increase in size and a rise in cost.SOLUTION: An electric power convertor is connected in parallel with a load connected onto each of power lines of a three-phase ac power supply, and includes plural semiconductor switch elements which are connected to the respective power lines, whose resistible voltage is lower than a line voltage of the three-phase ac power supply, and which are directly attached to a mounting surface of a circuit board, and a convertor that suppresses a harmonic component of a current flowing into the load.SELECTED DRAWING: Figure 1

Description

Embodiments of the present invention relate to a power conversion device that is connected in parallel to each power line of a three-phase AC power source to which the load is connected.

Power conversion devices such as active filters are known, which are connected in parallel to each power line of a three-phase AC power supply to which loads such as electrical equipment are connected, and which suppress harmonic components contained in the current flowing through the loads. There is.

This power conversion device includes a switch element, and supplies a compensation current (a compensation current to be added to the load current) to suppress harmonic components generated from the load to each power supply line by switching the switch element.

International Publication No. 2021/016960 Patent No. 6648159 Patent No. 6902399

When the line voltage of the three-phase AC power supply is 200V, a semiconductor switch element with a withstand voltage of, for example, 600V is used as each switch element of the power conversion device.
Such high-voltage semiconductor switch elements generate a large amount of heat, and it is necessary to provide large heat dissipation fins and cooling fans to ventilate these fins, making the device larger and more complex. , which will lead to an increase in costs.

An object of the embodiments of the present invention is to provide a power conversion device that can suppress increase in size and cost.

The power conversion device of the embodiment is connected to each power line of a three-phase AC power supply to which a load is connected in a parallel relationship with the load; The converter includes a plurality of semiconductor switch elements having a withstand voltage lower than the line voltage of the AC power supply and is directly attached to the mounting surface of the circuit board, and includes a converter that suppresses harmonic components of the current flowing through the load.

FIG. 1 is a block diagram showing the configuration of an embodiment. FIG. 2 is a block diagram showing the configuration of each unit converter in one embodiment. FIG. 3 is a diagram showing switching of each semiconductor switch element in one embodiment. FIG. 3 is a diagram showing gain characteristics of a resonant circuit in one embodiment. FIG. 3 is a diagram showing a circuit board of each multilevel converter and the arrangement of components on the circuit board in one embodiment. FIG. 6 is a cross-sectional view taken along line XX in FIG. 5, viewed in the direction of the arrow. FIG. 1 is a block diagram showing the configuration of a general diode clamp type multilevel converter. FIG. 1 is a block diagram showing the configuration of a general flying capacitor type multilevel converter.

An embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, a load such as an air conditioner 2 is connected to the U-phase, V-phase, and W-phase power lines (first, second, and third power lines) Lu, Lv, and Lw of the three-phase AC power supply 1. It is connected. The air conditioner 2 includes a rectifier circuit 3 that rectifies the power supply voltages Eu, Ev, Ew of the power lines Lu, Lv, Lw using a plurality of bridge-connected diodes, and the output voltage of the rectifier circuit 3 is applied via a DC reactor 4. It includes a capacitor 5 , an inverter 6 connected between both ends of the capacitor 5 that converts the DC voltage into an AC voltage of a predetermined frequency, and a compressor motor 7 operated by the output of the inverter 6 .

The power conversion device 10 of this embodiment is connected in parallel with the air conditioner 2 to the power lines Lu, Lv, and Lw to which the air conditioner 2 is connected.

Here, the power converter 10 is an active filter (hereinafter also referred to as active filter 10), and includes a passive filter 11, reactors 14u, 14v, and 14w, and a power supply line that connects the passive filter 11 and the reactors 14u, 14v, and 14w. The multilevel converter 20 connected to the power lines Lu, Lv, and Lw is located at a position closer to the air conditioner 2 than the connection position of the passive filter 11 on the power lines Lu, Lv, and Lw, and the current flowing through the air conditioner 2 (load current a detection unit 15 that detects Iu, Iv, and Iw; a detection unit 16 that detects currents Icu, Icv, and Icw flowing in the current path between the reactors 14u, 14v, and the multilevel converter 20; and a three-phase AC It includes a detection section 17 that detects the phases of the power supply voltages Eu, Ev, and Ew of the power supply 1, and a control section 18 that controls the multilevel converter 20 according to the detection results of these detection sections 15, 16, and 17.

The passive filter 11 includes an LC circuit including a reactor 12u and a capacitor 13u, an LC circuit including a reactor 12v and a capacitor 13v, and an LC circuit including a reactor 12w and a capacitor 13w. Note that if the harmonics to be suppressed are small, the reactance generated in the power wiring can be used instead of the reactor, so the passive filter 11 and the reactors 14u, 14v, and 14w do not need to be provided.

The multilevel converter 20 includes first, second, and third clusters 21u, 21v, and 21w that selectively generate and output DC voltages of three or more levels for each phase of the power lines Lu, Lv, and Lw. .

The active filter 10 is required to have high-speed current controllability in order to cope with the steep current at the time of commutation of the diode rectifier rectifier circuit 3 to be compensated. However, the active filter 10 is equipped with reactors 14u, 14v, and 14w as interconnection reactors for smoothing rectangular wave components accompanying PWM control switching, which will be described later, and the inductance of the reactors 14u, 14v, and 14w is large. The more the current change rate worsens.

Therefore, by adopting clusters 21u, 21v, and 21w that selectively generate and output DC voltages of three or more levels for each phase of power lines Lu, Lv, and Lw, the voltage applied to reactors 14u, 14v, and 14w can be reduced. This makes it possible to reduce the width of change in voltage, and as a result, it becomes possible to use reactors 14u, 14v, and 14w with small inductance. This also contributes to reducing EMI noise.

The cluster 21u has a plurality of (three) unit converters (cells) 31u, 32u, and 33u connected in series (cascaded), each of which selectively generates and outputs a multilevel DC voltage by switching. It is a so-called multi-serial converter cluster consisting of unit converters 31u to 33u, which generates an AC voltage with a waveform close to a sine wave to reduce harmonics by adding up the output voltages (cell output voltages) Vcu1, Vcu2, and Vcu3 of the unit converters 31u to 33u. Generate and output Vcu0 (=Vcu1+Vcu2+Vcu3).

The cluster 21v is a so-called multi-series converter cluster formed by connecting a plurality (three) unit converters 31v, 32v, and 33v in series, each of which selectively generates and outputs multiple levels of DC voltage by switching. By adding the output voltages Vcv1, Vcv2, and Vcv3 of the unit converters 31v to 33v, an AC voltage Vcv0 (=Vcv1+Vcv2+Vcv3) with a waveform close to a sine wave for reducing harmonics is generated and output.

The cluster 21w is a so-called multi-series converter cluster formed by connecting a plurality (three) unit converters 31w, 32w, 33w in series, each of which selectively generates and outputs multiple levels of DC voltage by switching. By adding together the output voltages Vcw1, Vcw2, and Vcw3 of the unit converters 31w to 33w, an AC voltage Vcw0 (=Vcw1+Vcw2+Vcw3) with a waveform close to a sine wave for reducing harmonics is generated and output.

Unit converters 31u, 32u, 33u of cluster 21u are mounted on one circuit board 40u. Similarly, the unit converters 31v, 32v, 33v of the cluster 21v and the unit converters 31w, 32w, 33w of the cluster 21w are each mounted on one circuit board 40v, 40w. The control unit 18, which is composed of a microcomputer and its peripheral circuits, is provided on a control circuit board 60 that is separate from the circuit boards 40u, 40y, and 40w on which the clusters 21u, 21v, and 21w are mounted. .

Since the clusters 21u, 21v, and 21w have the same configuration, the cluster 21u will be explained as an example. One end of the series circuit of the unit converters 31u, 32u, 33u is connected to the power line Lu via the passive filter 11 and the reactor 14u, and one end of the series circuit of the unit converters 31v, 32v, 33v is connected to the power line Lv. , one end of a series circuit of unit converters 31w, 32w, and 33w is connected to a power supply line Lw. The other end of the series circuit of unit converters 31u, 32u, 33u, the other end of the series circuit of unit converters 31v, 32v, 33v, and the other end of the series circuit of unit converters 31w, 32w, 33w are interconnected ( N terminal: star connection).

A specific configuration of the unit converters 31u, 32u, and 33u is shown in FIG.
The unit converter 31u includes a pair of output terminals, semiconductor switching elements Q1a, Q1b, Q1c, and Q1d each having a freewheeling diode D, and a capacitor (DC capacitor) connected to the output terminal via these semiconductor switching elements Q1a to Q1d. C1, a gate drive circuit 31a that drives the semiconductor switching elements Q1a to Q1d in accordance with a control signal from the control unit 18, a power supply circuit 31b that obtains the operating voltage of the gate drive circuit 31a from the voltage of the capacitor C1 (capacitor voltage); It includes a voltage detection circuit 31c that detects the voltage of the capacitor C1 and reports it to the control unit 18, and generates multiple levels of DC voltage by selectively forming a plurality of conductive paths by switching (ON, OFF) the semiconductor switching elements Q1 to Q1d. Generate and output. Note that when a MOSFET is used as the semiconductor switching element Q1, the free-wheeling diode D can also be used as a parasitic diode.

The unit converter 31v includes a pair of output terminals, semiconductor switching elements Q2a, Q2b, Q2c, and Q2d each having a freewheeling diode D, and a capacitor (DC capacitor) connected to the output terminal via these semiconductor switching elements Q2a to Q2d. C2, a gate drive circuit 32a that drives the semiconductor switching elements Q2a to Q2d in accordance with a control signal from the control unit 18, a power supply circuit 32b that obtains the operating voltage of the gate drive circuit 32a from the voltage of the capacitor C2 (capacitor voltage); It includes a voltage detection circuit 32c that detects the voltage of the capacitor C2 and notifies the control unit 18, and generates multiple levels of DC voltage by selectively forming a plurality of conductive paths by switching (ON, OFF) the semiconductor switching elements Q2a to Q2d. Generate and output.

The unit converter 31w includes a pair of output terminals, semiconductor switching elements Q3a, Q3b, Q3c, and Q3d each having a free wheel diode D, and a capacitor (DC capacitor) connected to the output terminal via these semiconductor switching elements Q3a to Q3d. C3, a gate drive circuit 33a that drives the semiconductor switching elements Q3a to Q3d in accordance with a control signal from the control unit 18, a power supply circuit 33b that obtains the operating voltage of the gate drive circuit 33a from the voltage of the capacitor C3 (capacitor voltage); It includes a voltage detection circuit 33c that detects the voltage of the capacitor C3 and notifies the control unit 18, and generates multiple levels of DC voltage by selectively forming a plurality of conductive paths by switching (ON, OFF) the semiconductor switching elements Q3a to Q3d. Generate and output.

FIG. 3 shows pulse width modulation control (PMW control) by the control unit 18 when performing switching by two-level modulation, for example, on the semiconductor switching elements Q1a to Q3d.
The control unit 18 sets an AC voltage command value Vcu sinθ for causing the cluster 12u to generate an AC voltage with almost the same waveform as the AC voltage Eu of the three-phase AC power supply 1, and sets the AC voltage command value Vcu sinθ and the number of unit converters 31u, 32u, 33u. The semiconductors of unit converters 31u, 32u, 33u are A switching control signal (also referred to as a gate signal) for the switch elements Q1a to Q3d is generated.

When generating this control signal, the control unit 18 controls the switching elements Q1a, Q1b arranged in series in the unit converter 31u between on and off, and the switching elements Q1c, Q1d arranged in series in the unit converter 31u. A dead time is ensured between on and off to prevent short circuits. Similarly, in the unit converter 31v, short-circuit prevention is applied between the ON and OFF of the switching elements Q2a and Q2b arranged mutually, and between the ON and OFF of the switching elements Q2c and Q2d arranged in series with each other. Securing a dead time in which the device is turned off. In the unit converter 31w, between the on and off of the switching elements Q3a and Q3b arranged in series with each other, and between the on and off of the switching elements Q3c and Q3d arranged in series with each other, to prevent short circuits. Securing a dead time in which the device is turned off.

In the case of switching by two-level modulation, the unit converters 31u, 32u, and 33u selectively generate and output two-level DC voltages of "positive level" and "negative level," respectively. In the case of switching by three-level modulation, the unit converters 31u, 32u, and 33u selectively generate and output three-level DC voltages of "positive level," "zero level," and "negative level," respectively.

The configuration and switching of the unit converters 31u, 32u, 33u of the cluster 21u described above are the same for the configuration and switching of the unit converters 31v, 32v, 33v of the cluster 21v, and the unit converters 31w, 32w of the cluster 21w. The same applies to the configuration and switching of , 33w.

The control unit 18 sets an AC voltage command value Vcv sinθ for causing the cluster 12v to generate an AC voltage with a waveform that is approximately the same as the AC voltage Ev of the three-phase AC power supply 1, and sets an AC voltage command value Vcv sinθ that is approximately equal to the AC voltage Ew of the three-phase AC power supply 1. An AC voltage command value Vcw sinθ is set to cause the cluster converter 12w to generate an AC voltage with the same waveform. The AC voltage command values Vcu sinθ, Vcv sinθ, and Vcw sinθ are out of phase with each other by 120°.

[Withstand voltage of semiconductor switch element]
All the semiconductor switching elements Q1a to Q3d in the clusters 21u, 21v, and 21w are silicon semiconductor switching elements such as MOSFETs and IGBTs, and have a withstand voltage lower than the line voltages Eu, Ev, and Ew of the three-phase AC power supply 1. is used. For example, when the line voltages Eu, Ev, and Ew of the three-phase AC power supply 1 are 200V, so-called low-voltage semiconductor switching elements Q1a to Q3d with a withstand voltage of less than 200V are used. These low-voltage semiconductor switch elements Q1a to Q3d are directly attached and wired to the respective mounting surfaces of the circuit boards 40u, 40v, and 40w. The conductive patterns on the circuit boards 40u, 40v, and 40w function as heat dissipating members for the directly attached semiconductor switch elements Q1a to Q3d.

The low-voltage semiconductor switching elements Q1a to Q3d have lower on-resistance and faster switching speed than so-called high-voltage semiconductor switching elements with a breakdown voltage of, for example, 600V, and therefore have higher power conversion efficiency. Therefore, the low-voltage semiconductor switch elements Q1a to Q3d generate less heat than the high-voltage semiconductor switch elements, and can be mounted directly on the respective mounting surfaces of the circuit boards 40u, 40v, and 40w as described above. , a conductive pattern made of copper foil or the like on the mounting surface of the element can sufficiently dissipate heat. Therefore, heat dissipation fins and cooling fans, which are essential when employing a high-voltage semiconductor switch element, are not required, and it is possible to suppress the increase in size and cost of the device. Since there is no need to attach heat dissipation fins to each semiconductor switch element, work efficiency during device manufacturing is improved.

If necessary, a small heat dissipation fin may be soldered to the conductive pattern portions of the circuit boards 40u, 40v, and 40w to which the semiconductor switch elements Q1a to Q3d are connected as board mounting. In this case, automatic soldering is possible in the same way as the semiconductor switch elements Q1a to Q3d, so work efficiency is significantly improved compared to the case where an operator manually screws the heat sink to each semiconductor switch element.

[Switching frequency]
A passive filter 11 consisting of reactors 12u, 12v, 12w and capacitors 13u, 13v, 13w, and reactors 14u, 14v, 14w form an LCL resonant circuit for removing rectangular wave components accompanying PWM control switching. Ru. The gain characteristics of this resonant circuit are shown in FIG.
When the inductance of the reactors 12u, 12v, 12w is Lf, the capacitance of the capacitors 13u, 13v, 13w is Cf, and the inductance of the reactors 14u, 14v, 14w is Lb, the resonant frequency fc of this resonant circuit is expressed by the following formula.

Generally, in a resonant circuit for removing rectangular wave components associated with PWM control switching, a cutoff frequency, that is, a resonant frequency fc, which is lower than the switching frequency of the active filter 10 is set in design. In other words, a conventional active filter requires its switching frequency to be higher than the resonant frequency fc. For this reason, the switching frequency of the semiconductor switching element in the active filter must be increased, resulting in increased loss.

On the other hand, the active filter 10 of this embodiment multi-levels the output voltage for each phase by employing the clusters 21u, 21v, and 21w. Even if the switching frequency of the semiconductor switching element Q1 is lower than the resonant frequency fc, the equivalent switching frequency is higher than the resonant frequency fc by "N x fs" (here, N is the number of unit converters in one cluster). In the cluster shown in FIGS. 1 and 3, there are three stages). For example, if the resonant frequency fc is 8 kHz, even if the switching frequency fs is 5 kHz, which is lower than the resonant frequency fc, the equivalent switching frequency "N x fs" is 3 x 5 = 15 kHz, so the actual active Resonance can be avoided by making the switching frequency of the filter 10 higher than the resonant frequency fc.

By making the actual switching frequency fs of the active filter 10 lower than the resonant frequency fc in this way, the switching loss of the semiconductor switching elements Q1a to Q3d in the clusters 21u, 21v, and 21w of the multilevel converter 20 can be reduced. . This makes it possible to suppress the temperature rise of the semiconductor switching elements Q1a to Q3d. Since the temperature rise of the semiconductor switch elements Q1a to Q3d can be suppressed, even if the circuit boards 40u, 40v, and 40w are used as heat dissipation members for the semiconductor switch elements Q1a to Q3d as in this embodiment, that is, A sufficient heat dissipation effect for the semiconductor switch elements Q1a to Q3d can be obtained without providing heat dissipation fins or cooling fans.

[Circuit board]
The clusters 21u, 21v, and 21w in the multilevel converter 20 are each constructed on one and the same substrate. Since the configuration of each board is common, the circuit board of the cluster converter 21u will be explained here using FIG. 5 as an example. An elongated connector (first connector) 50 that relays signals between the control unit 18 and the unit converters 31u, 32u, and 33u of the cluster 21u is arranged on the upper surface, which is the mounting surface of the circuit board 40u. An external connection terminal (referred to as L terminal) 51a and an external connection terminal (referred to as N terminal) 51b of cluster 21u are arranged.

The L terminal 51a is connected to one phase of the AC power supply line, here the U phase, and the N terminal 51b is a wiring connection part connected to the interconnection point of the cluster converters 21u, 21v, and 21w. The switching elements of each unit converter 31u, 32u, 33u are turned on and off based on a signal sent from the control section 18 via the connector 50. Further, the outputs of the voltage detection circuits 31c, 32c, 33c of the unit converters 31u, 32u, 33u are sent to the control section 18 via the connector 50. On the upper surface, which is the mounting surface, of the circuit board 40u, unit converters 31u, 32u, 33u and external connection terminals 51a, 51b are arranged at positions surrounding the connector 50 and facing the connector 50, respectively. .

Specifically, the first unit converter 31u is arranged at a position facing one side 50a along the longitudinal direction of the connector 50, and the second unit converter 31u is arranged at a position facing one end 50b along the longitudinal direction of the connector 50. The unit converter 32u of the first stage is disposed, and the final stage (third stage) unit converter 33u is disposed at a position facing the other side 50c along the longitudinal direction of the connector 50. An L terminal 51a and an N terminal 51b are arranged at positions facing the other end 50d along the line.

In this way, by arranging the unit converters 31u, 32u, 33u and the L terminals 51a, N terminals 51b in a state surrounding the connector 50, the area of the circuit board 40u can be reduced as much as possible, and the connector 50 and the unit Each signal line between the converter 31u, between the connector 50 and the unit converter 32u, and between the connector 50 and the unit converter 33u can be shortened.

Since the first-stage unit converter 31u and the L terminal 51a are close to each other, it is possible to shorten the length of the external connection conductive path (conductive pattern 41a to be described later) between the unit converter 31u and the L terminal 51a as much as possible. can. Since the final stage unit converter 33u and the N terminal 51b are close to each other, it is possible to shorten the length of the external connection conductive path (conductive pattern 41b described later) between the unit converter 33u and the N terminal 51b as much as possible. can.

By shortening these signal lines and current-carrying paths, the influence of external noise can be eliminated as much as possible, and work efficiency during device manufacturing can be improved. Since the L terminal 51a and the N terminal 51b are adjacent to each other, when a common mode noise filter is provided, the work of connecting the noise filter becomes easy.

In the area where the unit converter 31u is arranged on the circuit board 40u and its surroundings, there are conductive patterns 41a, which serve as conductive paths for external connection between the semiconductor switch elements Q1a, Q1b and the L terminal 51a, and the semiconductor switch elements Q1a, Q1c. A positive conductive pattern 42 serves as a positive conductive path (+) between the positive electrode of the capacitor C1 and the positive electrode of the capacitor C1, and a negative conductive pattern 42 serves as a negative conductive path (-) between the negative electrode of the capacitor C1 and the semiconductor switch elements Q1b and Q1d. A conductive pattern 44 that serves as a conductive path for external connection between the conductive pattern 43, the semiconductor switch elements Q1c and Q1d, and the subsequent unit converter 32u is arranged.

These conductive patterns 41a, 42, 43, and 44 are copper wiring patterns formed by etching or the like on the insulating substrate of the circuit board, and their existence on the circuit board 40u is schematically shown. As shown in FIG. 6, which is a cross section taken along the line XX of FIG. That is, the conductive pattern 41a, which is a conductive path for external connection, is arranged on the upper surface A. The positive conductive pattern 42 that is electrically connected to the positive electrode of the capacitor C1 has only a portion connected to the semiconductor switching element Q1a disposed on the upper surface A, and almost the entire remaining portion thereof is disposed on the lower surface B. The entire negative conductive pattern 43 that is electrically connected to the negative electrode of the capacitor C1 is arranged on the upper surface A.

When using low-voltage semiconductor switching elements Q1a to Q1d, there is less margin for surge voltage, so it is necessary to reduce stray inductance on the circuit, which is the main cause of surge voltage. To reduce stray inductance, it is effective to shorten the conductive pattern between the semiconductor switch elements Q1a to Q1d and the capacitor C1. Therefore, first, connect the semiconductor switch elements Q1a to Q1d and the capacitor C1 in the same circuit. It is mounted on the board 40u. Further, almost the entire area of the positive conductive pattern 42 that is electrically connected to the positive electrode of the capacitor C1 and the negative conductive pattern 43 that is electrically conductive to the negative electrode of the capacitor C1 are placed on the laminate with the circuit board 40u in between. The resulting mutual inductance further reduces the stray inductance.

In the area where the unit converter 32u is arranged on the circuit board 40u and its surrounding area, the conductive pattern 44, which serves as a conduction path for external connection between the previous unit converter 31u and the semiconductor switch elements Q2a, Q2b, and the semiconductor switch are arranged. A positive conductive pattern 45 serving as a positive conduction path (+) between the elements Q2a, Q2c and the positive electrode of the capacitor C2, and a negative conduction path (-) between the negative electrode of the capacitor C2 and the semiconductor switch elements Q2b, Q2d. A negative-side conductive pattern 46 is arranged, and a conductive pattern 47 is arranged as a conductive path for external connection between the semiconductor switch elements Q2c, Q2d and the subsequent unit converter 33u.

These conductive patterns 44, 45, 46, 47 are also copper wiring, indicating their existence on the circuit board 40u, and are actually the same as 41a, 42, 43, 44 of the unit converter 31u. It is arranged separately on an upper surface A and a lower surface B.
With regard to the arrangement of this unit converter 32u, stray inductance can also be reduced, similar to the effect described for the unit converter 31u.

In the area where the unit converter 33u is arranged on the circuit board 40u and its surroundings, the conductive pattern 47, which serves as a conduction path for external connection between the previous unit converter 32u and the semiconductor switch elements Q3a, Q3b, and the semiconductor switch are arranged. A positive conductive pattern 48 serving as a positive conduction path (+) between the elements Q3a, Q3c and the positive electrode of the capacitor C3, and a negative conduction path (-) between the negative electrode of the capacitor C3 and the semiconductor switch elements Q3b, Q3d. A negative-side conductive pattern 49 is arranged, and a conductive pattern 41b is arranged as a conductive path for external connection between the semiconductor switch elements Q3c, Q3d and the N terminal 51b.

These conductive patterns 47, 48, 49, 41b are also copper wiring, indicating their existence on the circuit board 40u, and are actually the same as 41a, 42, 43, 44 of the unit converter 31u, on the circuit board 40u. It is arranged separately on an upper surface A and a lower surface B.
With regard to the arrangement of the unit converter 33u, stray inductance can also be reduced, similar to the effect described for the unit converter 31u.

The configuration of the circuit board 40u described above is the same for the configuration of the circuit board 40v on which the unit converters 31v, 32v, and 33v of the cluster 21v are mounted, and the configuration of the circuit board 40v on which the unit converters 31w, 32w, and 33w of the cluster 21w are mounted. The same applies to the configuration of the circuit board 40w. That is, an elongated connector (second connector) 50 that relays signals between the control unit 18 and the unit converters 31v, 32v, and 33v is arranged on the circuit board 40v, and conductive patterns 41a, 42 to 49 and 41b are arranged. An elongated connector (third connector) 50 that relays signals between the control unit 18 and the unit converters 31w, 32w, 33w is arranged on the circuit board 40w, and conductive patterns 41a, 42 to 49, 41b is placed.

[About multilevel converter]
Since the star-connected clusters 21u, 21v, and 21w are used as the multilevel converter 20, the voltage applied to each unit converter of the clusters 21u, 21v, and 21w can be reduced as much as possible. As a result, it becomes possible to use semiconductor switch elements with low breakdown voltages.

As the multilevel converter 20, as shown in FIG. 7, a diode clamp type multilevel converter including a large number of semiconductor switching elements S, a large number of diodes D, and a large number of capacitors C for each phase may be adopted. Alternatively, as shown in FIG. 8, it is conceivable to adopt a flying capacitor type multilevel converter consisting of a large number of semiconductor switching elements S and a large number of capacitors C for each phase. However, these devices have complicated configurations and a large number of parts, and are not suitable for power conversion devices whose purpose is to suppress increase in size and cost, as in this embodiment.

[Modified example]
In the above embodiment, a case has been described in which the number of unit converters in the clusters 21u, 21v, and 21w is three for each phase, but the number can be set as appropriate. This number is desirably an odd number in view of the drive signals for the switching elements in each unit converter. For example, when increasing the number of unit converters in each cluster to 5 or 7, the circuit board configuration is such that the number of terminals of the connector 50 shown in FIG. 5 increases and the shape of the connector 50 extends in the longitudinal direction. An increasing number of unit converters 31 may be additionally arranged along the longitudinal direction of the connector. That is, in FIG. 5, the upper part of the drawing of each of the unit converter 31u and the unit converter 33u, that is, between the unit converter 31u and the unit converter 32u, and between the unit converter 33u and the unit converter 32u. In addition, an additional symmetrical unit converter may be provided with the same circuit element arrangement as that of the unit converters 31u to 33u.

The embodiments and modifications described above are presented as examples and are not intended to limit the scope of the invention. These embodiments and modifications can be implemented in various other forms, and various omissions, rewrites, and changes can be made without departing from the gist of the invention. The scope of these embodiments and modifications is included in the gist of the invention, and is also included in the scope of the invention described in the claims and its equivalents.

1... Three-phase AC power supply, Lu, Lv, Lw... Power line, 3... Air conditioner (load), 10... Power converter (active filter), 11... Passive filter, 14u, 14v, 14w... Reactor, 18... Control unit, 20... Multilevel converter, 21u... First cluster, 21v... Second cluster, 21w... Third cluster, 31u to 31w... Unit converter, Q1a to Q3d... Semiconductor switch element, C1 to C3... Capacitor

Claims (8)

A power conversion device that is connected in parallel to each power line of a three-phase AC power source to which the load is connected,
The harmonic component of the current flowing through the load includes a plurality of semiconductor switching elements connected to each of the power supply lines and having a withstand voltage lower than the line voltage of the three-phase AC power supply and directly attached to the mounting surface of the circuit board. a converter for suppressing
A power conversion device comprising: The converter selectively generates and outputs DC voltages of three or more levels for each phase of each power supply line by switching each of the semiconductor switch elements.
The power conversion device according to claim 1. A passive filter and a reactor are inserted between the converter and each of the power lines,
The switching frequency of each of the semiconductor switching elements is lower than the resonant frequency of a resonant circuit formed by the passive filter and the reactor.
The power conversion device according to claim 2. The converter is
A plurality of first unit converters each consisting of a plurality of first semiconductor switching elements having a withstand voltage lower than the line voltage of the three-phase AC power supply and one first capacitor, each of which selectively outputs a plurality of levels of DC voltage; , a first cluster in which these first unit converters are connected in series and attached directly to the mounting surface of one first circuit board;
A plurality of second unit converters each consisting of a plurality of second semiconductor switching elements having a withstand voltage lower than the line voltage of the three-phase AC power supply and one second capacitor, each selectively outputting a plurality of levels of DC voltage; , a second cluster in which these second unit converters are connected in series and attached directly to the mounting surface of one second circuit board;
A plurality of third unit converters each consisting of a plurality of third semiconductor switching elements having a withstand voltage lower than the line voltage of the three-phase AC power supply and one third capacitor, each of which selectively outputs a plurality of levels of DC voltage; , a third cluster in which these third unit converters are connected in series and attached directly to the mounting surface of one third circuit board;
It is a multi-level converter including
One end of the series circuit of each of the first unit converters is connected to the first power supply line of each of the power supply lines via the passive filter and the reactor, and one end of the series circuit of each of the second unit converters is connected to the first power supply line of each of the power supply lines through the passive filter and the reactor. It is connected to the second power supply line of each of the power supply lines through the filter and the reactor, and one end of the series circuit of each of the third unit converters is connected to the third power supply line of each of the power supply lines through the passive filter and the reactor. connected to the line,
The other end of the series circuit of each of the first unit converters, the other end of the series circuit of each of the second unit converters, and the other end of the series circuit of each of the third unit converters are interconnected;
The power conversion device according to any one of claims 1 to 3. The first circuit board has an upper surface that is a mounting surface of the first circuit board and a lower surface opposite to the upper surface, and has a positive side communication between each of the first semiconductor switch elements and the first capacitor. A positive conductive pattern serving as an electric path and a negative conductive pattern serving as a negative conductive path are arranged separately on the upper surface and the lower surface,
The second circuit board has an upper surface that is a mounting surface of the second circuit board and a lower surface opposite to the upper surface, and has a positive side communication between each of the second semiconductor switch elements and the second capacitor. A positive conductive pattern serving as an electric path and a negative conductive pattern serving as a negative conductive path are arranged separately on the upper surface and the lower surface,
The third circuit board has an upper surface that is a mounting surface of the third circuit board and a lower surface opposite to the upper surface, and has a positive side communication between each of the third semiconductor switch elements and the third capacitor. A positive conductive pattern serving as an electric path and a negative conductive pattern serving as a negative conductive path are arranged separately on the upper surface and the lower surface,
The power conversion device according to claim 4. a control unit that is provided on one control circuit board and controls each of the first semiconductor switch elements, the second semiconductor switch elements, and the third semiconductor switch elements;
a first connector provided on a mounting surface of the first circuit board and relaying signals between the control section and each of the first unit converters;
a second connector provided on the mounting surface of the second circuit board and relaying signals between the control section and each of the second unit converters;
a third connector provided on the mounting surface of the third circuit board and relaying signals between the control section and each of the third unit converters;
Furthermore,
Each of the first unit converters is arranged to surround the first connector on the mounting surface of the first circuit board,
Each of the second unit converters is arranged to surround the second connector on the mounting surface of the second circuit board,
Each of the third unit converters is arranged to surround the third connector on the mounting surface of the third circuit board.
The power conversion device according to claim 4 or claim 5. The converter is
It includes a plurality of unit converters each consisting of a plurality of semiconductor switching elements and one capacitor each having a withstand voltage lower than the line voltage of the three-phase AC power supply and selectively outputs a plurality of levels of DC voltage. A series-connected cluster is provided for each phase,
The power conversion device according to claim 2. each semiconductor switch element of the at least one cluster is directly attached to a mounting surface of one circuit board;
The circuit board has a top surface that is a mounting surface of the circuit board and a bottom surface opposite to the top surface, and includes a positive conductive pattern that serves as a positive conduction path between each of the semiconductor switch elements and the capacitor; A negative conductive pattern serving as a negative conduction path is arranged separately on the upper surface and the lower surface,
Further, a control unit that controls each of the semiconductor switch elements provided outside the circuit board;
a connector provided on the mounting surface of the circuit board and relaying signals between the control unit and each unit converter;
Equipped with
Each of the unit converters is arranged to surround the connector on the mounting surface of the circuit board,
The power conversion device according to claim 7.

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