WO2013026527A1 - Substrat de montage d'éléments électroniques - Google Patents

Substrat de montage d'éléments électroniques Download PDF

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Publication number
WO2013026527A1
WO2013026527A1 PCT/EP2012/003315 EP2012003315W WO2013026527A1 WO 2013026527 A1 WO2013026527 A1 WO 2013026527A1 EP 2012003315 W EP2012003315 W EP 2012003315W WO 2013026527 A1 WO2013026527 A1 WO 2013026527A1
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WO
WIPO (PCT)
Prior art keywords
units
electrodes
electrode
electrically conductive
substrate
Prior art date
Application number
PCT/EP2012/003315
Other languages
German (de)
English (en)
Inventor
Michael Benedikt
Andreas Hinrich
Thomas Stenger
Eckhard Ditzel
Original Assignee
Heraeus Materials Technology Gmbh & Co. Kg
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Heraeus Materials Technology Gmbh & Co. Kg filed Critical Heraeus Materials Technology Gmbh & Co. Kg
Publication of WO2013026527A1 publication Critical patent/WO2013026527A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H05K1/029—Programmable, customizable or modifiable circuits having a programmable lay-out, i.e. adapted for choosing between a few possibilities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H05K1/0203—Cooling of mounted components
    • H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/0929—Conductive planes
    • H05K2201/09363—Conductive planes wherein only contours around conductors are removed for insulation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10106—Light emitting diode [LED]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10969—Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/0169—Using a temporary frame during processing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0221—Perforating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/17—Post-manufacturing processes
    • H05K2203/175—Configurations of connections suitable for easy deletion, e.g. modifiable circuits or temporary conductors for electroplating; Processes for deleting connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4084—Through-connections; Vertical interconnect access [VIA] connections by deforming at least one of the conductive layers

Definitions

  • the invention relates to a laminated substrate for mounting and contacting two or more electronic elements comprising a structured first electrically conductive layer which is laminated with a structured insulating layer.
  • the invention also relates to an electronic circuit comprising such
  • Substrate a laminate for producing such a substrate and a method for producing such a substrate, from such a laminate.
  • the laminated substrates contact the electronic components, but also provide a stable base.
  • LED light-emitting diodes
  • the laminated substrates comprise at least one electrically conductive layer and at least one electrically insulating layer.
  • a flexible laminated substrate which is formed by a metal foil and a plastic film.
  • the metal foil is separated into first and second regions that form the electrical connections.
  • Recesses are provided in the plastic film over the two areas for inserting an electronic component into the first area and for contacting the component with the second area.
  • the substrate is made by punching and gluing.
  • DE 10 2008 044 847 A1 relates to an optoelectronic component with an electrically conductive, two-part frame on which an organic layer is arranged.
  • the electrically conductive frame forms a substrate with the organic layer into which the optoelectronic component can be inserted.
  • strip-shaped laminate wherein in each case a structured metal foil and a
  • CONFIRMATION COPY textured plastic film with repetitive contours are laminated together.
  • the band-shaped laminates are then separated into individual substrates or modules.
  • the object of the invention is therefore to overcome the disadvantages of the prior art.
  • a possibility should be found to interconnect a variety of electronic elements together and at the same time to use a substrate without a complicated and susceptible wiring with
  • Bonding wires and / or soldered or mated wire connections is required.
  • the interconnections should be as simple and flexible as possible for the user and the manufacturing process should be as simple as possible. It should also be possible to save several electronic power components in a space-saving
  • Both suitable substrates are to be provided, as well as a laminate with which such substrates can be produced as simply and inexpensively as possible according to individual requirements and, if possible, the type, size and size
  • the laminated substrate comprises at least two units, each unit having at least one electrode for providing electrical energy and a receiving surface for mounting electronic
  • each receiving surface at least one adjacent electrode is arranged, which together form a unit, and each receiving surface of the at least one adjacent electrode is electrically insulated from each other and wherein the receiving surfaces and / or the electrodes of at least two adjacent units via a connection or two connections are electrically connected to each other such that the electronic elements through the connection or
  • Connections electronically Switchable in parallel and / or in series when mounted on the receiving surfaces and contacted with one or two electrodes of the same unit.
  • This measure ensures that the substrate can already prescribe the interconnection of electronic elements and the electronic elements only have to be fastened in a simple manner on the substrate and contacted with the electrodes of the substrate.
  • the receiving surface and the electrode or electrodes of the units according to the invention can be electrically insulated from each other by a gap.
  • the gap generated by the gap is fixed by the insulating layer when the receiving surface and the electrode or the electrodes are part of the first electrically conductive layer.
  • the gap is in this case only in the first electric formed conductive layer.
  • the gap is the simplest and least expensive
  • the receiving surface is part of a second electrically conductive layer separated from the first electrically conductive layer by the insulating layer, the gap is formed by the electrically insulating layer, and therefore the receiving surfaces are separated from the electrodes by the electrically insulating layer.
  • the first electrically conductive layer may be through the electrically conductive
  • Recording surfaces, electrodes and compounds may be formed, or the receiving surfaces, electrodes and compounds may be formed from the first electrically conductive layer.
  • the receiving surfaces of such substrates can accommodate ten, twenty, thirty, or even more electronic elements.
  • Receiving surface only one electrode is arranged, which together form the unit and which are preferably both part of the first electrically conductive layer, so that mounted electronic elements are contacted by the electrode and the receiving surface, wherein to provide for a parallel connection of two
  • the receiving surfaces of two adjacent units are electrically connected to each other by a first connection and the electrodes of these adjacent units by a second connection to each other electrically
  • a receiving surface of a unit with an electrode of an adjacent unit is electrically connected by a connection.
  • a first and a second electrode are arranged, which together form the unit, so that mounted electronic elements of both electrodes are electrically contacted, wherein for providing a parallel connection of two electronic elements, the first electrodes of two neighboring units through a first connection
  • a first electrode of a unit is electrically connected to a second electrode of an adjacent unit by a connection.
  • the first concept (the first substrate) requires only two electrically separate regions and requires vertical interconnections of the electronic elements
  • the second concept (the second mentioned substrate) comprises an electrically neutral region comprising a Efficient cooling of the electronic components allows and requires a horizontal interconnection of the electronic elements.
  • the electrodes of one unit may comprise at least three electrode segments, each unit not being surrounded on all sides by adjacent units having edge connections between the two on the sides which do not have adjacent units
  • Electrode segments, the edge connections are electrically connected to each other and for the realization of a first and a second electrode by two
  • the edge connection are electrically separated from each other.
  • the production of such a substrate can be simplified by this structure and be particularly variable. Namely, the electrode segments can be easily pronounced, so that already the. Laminate for the preparation of the substrates with the Electrode segments can be prestructured. As a result, variable structures of the substrates can be achieved with very simple measures. Particularly preferred are four electrode segments having a rectangular structure of the laminate
  • substrates with two electrodes per unit can also be provided that the receiving surfaces of a unit is surrounded by the two electrodes of the same unit, preferably substantially completely surrounded, particularly preferably is completely surrounded.
  • Laminate from which the substrates can be made, can be variably converted into various substrates according to the invention in a simple manner.
  • such a structure may facilitate the contacting of electronic elements on the substrate.
  • the laminated substrate comprises a structured second electrically conductive layer, wherein the structured insulating layer is arranged between the first and second electrically conductive layer, wherein preferably the first and the second
  • electrically conductive layer in each unit are electrically connected to each other, in particular in the region of at least one recess in the insulating layer.
  • the second electrically conductive layer can be used for stabilization, contacting, as an electrically neutral region, as a receiving surface and / or for improving the heat dissipation.
  • the second electrically conductive layer is structured such that each unit comprises one or two or three electrically isolated surfaces of the second electrically conductive layer, wherein the surfaces preferably one or two electrical contacts for the electrical connection of the substrate and or form an electrically neutral area for heat dissipation.
  • the separation of the regions of the second electrically conductive layer is particularly suitable for contacting the substrate from below.
  • the second electrically conductive layers of the units are electrically insulated from one another.
  • the second electrically conductive layer forms a continuous area across all units.
  • the second alternative reduces the flexibility of the substrate, but simplifies the structure and leads to a particularly good heat dissipation.
  • the second electrically conductive layer is in contact with the first electrically conductive layer through a spot weld and / or embossing of the first or the second electrically conductive layer.
  • the receiving surfaces are part of the second electrically conductive layer.
  • the receiving surfaces are formed by the second electrically conductive layer, a particularly efficient heat dissipation and cooling of electronic elements is possible, which are mounted on these receiving surfaces. That applies
  • the receiving surfaces formed by the second electrically conductive layer are formed as electrically neutral regions.
  • the substrate is elastically deformable.
  • the elastic deformability leads to a variety of applicability of the substrate and electrical circuits made therefrom. Namely, the substrate can be adapted to any surface.
  • the insulating layer is thinner than 0.6 mm, preferably 0.01 to 0.2 mm thick, particularly preferably 0.03 to 0.1 mm thick, very particularly preferably 0.05 mm thick in particular including an adhesive for lamination, and the electrically conductive layer or layers are 0.05 mm to 2 mm thick, preferably 0.1 mm to 0.5 mm thick, more preferably 0.15 mm thick ,
  • the thickness of the first electrically conductive layer deviates from the thickness of the second electrically conductive layer.
  • the electrically conductive layer or the electrically conductive layers are made of metal, preferably made of copper or a copper alloy, particularly preferably of a copper-tin alloy, and / or the insulating layer of plastic, preferably from a PET, PI, epoxide and / or bismalein triazine.
  • an electronic circuit comprising such a substrate in which on each receiving surface at least one arranged electronic element, preferably at least one LED is arranged, which is connected to a bonding wire with an electrode of the same unit or which is connected to two bonding wires with two different electrodes of the same unit, so that the electronic elements through the compounds in parallel and / or in Series are switched.
  • connections of the substrate thus cause the electronic elements to be connected in series or in parallel. If more than two electrodes are present, or more than two connection options (the receiving surface is also a connection option), even more complex structures such as transistors or integrated circuits can be interconnected.
  • the object underlying the invention is further achieved by a laminate for producing such a substrate, wherein the laminate comprises a structured first electrically conductive layer which is laminated with a structured insulating layer, wherein at least two units are pre-structured, the pre-structured units a receiving surface and at least one electrode and wherein at least one electrode and / or the receiving surface at least one
  • pre-structured unit in the range of connections of adjacent prestructured units are electrically connected to each other.
  • the laminate can therefore also the type, size and
  • the interconnection is then made in a downstream process by simply disconnecting connections at the designated locations.
  • the laminate is formed as a band, in particular as a wound continuous web, wherein two or more pre-structured units are arranged side by side and a plurality of prestructured units one behind the other, wherein in particular the pre-structured elements are connected in succession by connections with each other electrically.
  • An endless track is of course not really endless but only very long compared to your width.
  • Such rolled-up webs are easy to unwind in the production of the substrates and easy to transport.
  • preferably on two opposite sides comprises one or more strips for handling the laminate, preferably in the strip
  • Recesses for holding and / or positioning of the laminate are arranged.
  • connections are formed by the first electrically conductive layer and by the insulating layer and / or a second electrically conductive layer is arranged such that the electrically insulating layer is arranged between the first and the second conductive layer
  • the second electrically conductive layer between the prestructured units does not provide an electrically conductive connection and is divided into two or three electrically isolated parts per prestructured unit.
  • the structure serves the already described advantages by the constructed of such a laminate substrates.
  • a development of the invention can provide that all prestructured units are identical and at least the connections between the prestructured
  • Units along a line are identical, so that by stamping in the region of these compounds, the prestructured units connected via these compounds to units of the substrate for series connections or for
  • edge connections are arranged on the edge of the laminate, which connect the electrodes of a prestructured unit together.
  • the object of the invention is also achieved by a method for producing such a substrate from such a laminate, in which the prestructured laminate is formed in the region of the joints, wherein the electrode and the
  • Receiving surface or the electrodes and the receiving surface or the electrodes of the same pre-structured unit are thereby separated and electrodes of adjacent prestructured units or receiving surfaces and / or electrodes of adjacent prestructured units remain electrically connected such that a substrate is constructed with units on the electronic elements in parallel and / or in series when contacting the electronic elements on the receiving surfaces with one electrode or with two electrodes of the same unit.
  • the laminate is formed by punching with a punching tool.
  • the exact shape of the punching tool is not critical, although certain, in particular compact forms are preferred.
  • Important here is the principle that the laminate preferably in one step in the
  • Substrates of the invention can be converted and that other substrates according to the invention can be produced by a simple exchange or variations of the dies from the same laminate.
  • the molding can be performed according to the invention by cutting also with lasers. However, according to the invention, it is preferred that the shaping be achieved by
  • the pre-structured laminate is formed in a range of 5 mm around the compound or compounds, preferably in a range of 2 mm around the compound, more preferably in a range of 1 mm around the compound.
  • Punching tools sufficient to implement the method according to the invention. It may even be provided according to the invention that the laminate is formed only in the region of the joints of the laminate.
  • a further embodiment of a method according to the invention can provide that an embossing stamp having a first shape is used to provide a parallel connection, and an embossing stamp having a second shape is used to provide a series connection.
  • each unit of the produced substrate comprises two electrodes.
  • the invention is based on the surprising finding that a substrate of similar units, which comprise at least one electrode and a receiving surface, by connections of the electrodes and / or receiving surfaces
  • neighboring units can be constructed so that parallel and / or
  • Series circuits of electronic elements can be realized when These are arranged on the receiving surfaces and are contacted electrically conductive.
  • a laminate according to the invention represents an almost finished, pre-structured semi-finished product which can be shaped into a substrate according to the invention by simple blanking, cutting or other molding techniques in the region of the connecting webs between the prestructured units of the laminate. It can be determined for example by the use of two punching tools and their arrangement during punching, whether two adjacent units provide a series connection or a parallel connection.
  • Such a laminate is therefore designed to produce substrates according to the invention by a simple production process and by shaping in a narrowly limited area at the compounds of the prestructured units.
  • the substrates can both be shaped differently, that is, the
  • Units of the substrates can be shaped differently and also relative
  • a particularly preferred effect is obtained when the substrate is flexible at the same time, that is, is elastically or plastically deformable, since the substrate with the electronic elements can then be adapted well to different installation situations.
  • a typical substrate for a mixture of series and parallel connection consists of a tiling with rectangular units.
  • the units can equally well be formed by triangles or hexagons.
  • the units can also be shaped differently and still be interconnected. For example, a tiling of narrow and wide diamonds can be put together to a Penrose tiling. It is also possible to use pentagons and hexagons as units that can then be folded into a football with icosahedral or ball symmetry.
  • the units according to the invention can also simply be connected to one another only in one line. Likewise, the units can also be connected via each edge. If, for example, each central rectangular unit is connected to adjacent units via each edge, a particularly diverse range results
  • Figure 1 a schematic plan view of a substrate according to the invention with two
  • FIG. 2 shows a schematic plan view of a substrate according to the invention with two
  • FIG. 3 shows a schematic plan view of a substrate according to the invention with a
  • FIG. 4 shows a schematic plan view of a substrate according to the invention with a
  • Figure 5 a schematic plan view of a laminate according to the invention for
  • FIG. 6 shows a schematic perspective view of a unit of a
  • substrate according to the invention are arranged on the electrical elements
  • Figure 7 is a schematic plan view of an alternative inventive substrate with electrically neutral range for a mixture of series and
  • FIG. 8 shows a schematic plan view of a further laminate according to the invention with an electrically neutral region
  • FIG. 9 shows a schematic plan view of the underside of the laminate according to FIG. 8;
  • Figure 10 a schematic plan view of a substrate according to the invention for a
  • FIG. 11 shows a schematic plan view of a substrate according to the invention for a
  • FIG. 12 shows a schematic plan view of a substrate according to the invention for a
  • FIG. 13 shows a schematic plan view of a linear substrate according to the invention for a series connection with one-sided connection, which has been produced, for example, from a laminate according to FIGS. 8 and 9;
  • FIG. 14 shows a schematic plan view of a linear substrate according to the invention for a two-sided connection in series, which has been produced, for example, from a laminate according to FIGS. 8 and 9;
  • FIG. 15 shows a schematic plan view of a linear substrate according to the invention for a parallel connection, which has been produced, for example, from a laminate according to FIGS. 8 and 9.
  • FIG. 1 shows a schematic plan view of a substrate 1 according to the invention.
  • the substrate 1 comprises three similar units 2.
  • the left-hand unit 2 is identified in FIG. 1 by a rectangular frame.
  • Each of the units 2 comprises an upper, 0.15 mm thick, first metal layer, 3, 4, 5, which comprises a receiving surface 3 and two electrodes 4, 5.
  • the electrodes 4, 5 are electrically isolated from the receiving surface 3 by column 6 in the first metal layer 3, 4, 5 from each other.
  • the structure of the first metal layer 3, 4, 5 is adhered to a thin plastic film which stabilizes the structure and which functions as an insulating layer.
  • On the underside of the substrate 1, a three-part lower, 0.15 mm thick, second metal layer is glued in each unit 2.
  • the separation gaps 7 of the lower metal layer are indicated by the respective double dashed lines in FIG.
  • the plastic film together with the adhesive is 0.05 mm thick.
  • the first metal layer 3, 4, 5 is connected to the second metal layer by embossments 8 which extend through gaps in the plastic film.
  • the electrodes 4, 5 and the receiving surface 3 are connected as an electrically neutral region with separated regions of the three-part second metal layer, so that the electrodes 4, 5 remain electrically separated from one another and from the receiving surface 3.
  • the units 2 are interconnected by webs 9, through the first
  • the webs 9 are realized by connections 9 of the electrodes 4, 5 with each other.
  • the plastic film also extends down to the webs 9.
  • the connection 9 is realized in such a way that the first electrodes 4 of adjacent units 2 are connected to one another and the second electrodes 5 of adjacent units 2 are connected to one another.
  • the first and second electrodes 4, 5 of adjacent units 2 remain electrically insulated from each other by a gap 10 in the connection 9.
  • the connections 9 thus produce double connections between the electrodes 4, 5 of the units 2.
  • the gap 10 in the web 9 also engages the gaps 6 in the first metal layer 3, 4, 5, so that the receiving surface 3 is electrically separated from the electrodes 4, 5 and the first and second electrodes 4, 5 are electrically insulated from each other.
  • each unit 2 is an electronic element (not shown), such as
  • an LED mounted on the receiving surface 3 and connected with bonding wires with the two electrodes 4, 5, the electronic elements are connected in parallel through the substrate 1.
  • the substrate 1 with the electronic elements can be contacted from below through the second metal layer.
  • the upper and lower surfaces of the second metal layer may then be used as terminals.
  • the middle part of the second metal layer and the receiving surface 3 are electrically neutral and are used to dissipate heat from the electronic element.
  • Figure 2 shows a schematic plan view of another, externally similar inventive substrate 11, comprising three units. Also, the substrate 11 shown here comprises two electrically conductive layers, between which a
  • the first electrically conductive layer 3, 4, 5 comprises a receiving surface 3, which is framed by two electrodes 4, 5 and is electrically separated from the electrodes 4, 5 by gaps 6.
  • the second electrically conductive layer is also divided by column 7 into three parts (faces), each part passing through
  • Embossments 8 each having an electrode 4, 5 or the receiving surface 3 is connected.
  • the embossings 8 can be produced for example by embossing and laser welding. Likewise, they can also be soldered.
  • connection 19 is here formed by a single web 19 of the upper electrically conductive layer 3, 4, 5, which connects the first electrode 4 to a second electrode 5 of an adjacent unit.
  • Column 20 in the connections 19 ensure that the receiving surfaces 3 and the electrodes 4, 5 remain electrically isolated from each other.
  • Transistors ICs, chips, LEDs or diodes are applied and these with
  • Bonding wires (not shown) are contacted on both sides with the two electrodes 4, 5, the result for the electronic elements with the substrate 11 of Figure 2 is a series circuit, while the substrate 1 of Figure 1 results in a parallel connection of the electronic elements with the same shading ,
  • the two substrates 1, 11 differ only slightly from each other. Only the range of connections 9, 19 between The units 2, the two substrates 1, 11 from each other. It is precisely here that one of the strengths of the present invention is to be seen that even slight changes in the substrates 1, 11 in the region of the connections 9, 19 between the units 2 make up the difference between a parallel connection and a series connection.
  • the electronic elements are connected horizontally by the two electrodes 4, 5.
  • FIG. 3 shows a schematic plan view of a further substrate 21 according to the invention comprising three units 2.
  • Each of the units 2 comprises a receiving surface 3 and only one electrode 4.
  • the receiving surface 3 and the electrode 4 form a first conductive layer 3, 4, wherein the receiving surface 3 and the electrode 4 are electrically isolated from each other by a gap 6.
  • an electrically insulating layer is arranged and below the electrically insulating layer, a second electrically conductive layer is arranged, which is divided into three electrically isolated from each other parts (areas), as indicated by the horizontal dashed line pairs, which represent the column 7 in the second electrically conductive layer.
  • the receiving surface 3 acts as a counterelectrode for subsequent interconnection, so that a further electrode is not necessary.
  • the electronic elements (not shown) which are contacted on such a substrate 21 are thus connected vertically, that is, the electronic element / component by a
  • Bonding wire (not shown), which is connected to the electrode 4, and is connected through the bottom of the electronic element to the receiving surface 3, that is, the current can flow vertically through the electronic element.
  • the receiving surface 3 can then no longer function as an electrically neutral zone and is therefore unsuitable for dissipating heat without electrical insulation.
  • Through-contacts 8 which are produced by embossing and / or welding, extend through the electrically insulating layer and thus connect the two outer parts (top and bottom in FIG. 3) of the second electrically conductive layer to the receiving surface 3 and the electrode 4, which but through the column 6, 7 still always are electrically isolated from each other.
  • the middle region of the second electrically conductive layer does not comprise any plated-through holes and is therefore electrically neutral. This central region is then adapted to dissipate heat from electrical elements mounted on the receiving surfaces 3.
  • the thin electrically insulating layer provides only a low thermal resistance, so that the heat can be dissipated well.
  • the middle region of the second electrically conductive layer is made thicker (for example 1 to 5 mm) and consists of a good thermally conductive material, such as copper, to efficiently cool the electrical element on the receiving surface 3.
  • the remaining second electrically conductive layer can also be made of a different material, such as
  • CuSn exist and be made much thinner.
  • the electrically conductive layers consist of a material.
  • the electrically conductive layers can be produced from a homogeneous film, therefore this embodiment is preferred.
  • the units 2 are 9 with connections in the form of two webs. 9
  • the webs 9 are part of the first electrically conductive layer 3, 4 and the underlying electrically insulating layer.
  • Connections 9 have the same shape as the connections 9 of Figure 1 and also here a substrate 21 is provided for a parallel connection of electronic elements. This requires the electronic elements with a conductive
  • connection are applied to the receiving surfaces 3 and the second contact of the electronic elements is produced by means of a bonding wire, which with the
  • Electrode 4 is connected.
  • Figure 4 shows a schematic plan view of a substrate 31 according to the invention with a receiving surface 3 and only one electrode 4 and without electrically neutral
  • the structure with respect to the units 2 is therefore analogous to that of FIG. 3, the connections 19 of the units 2 being designed differently.
  • the connections 19 always connect a receiving surface 3 with an electrode 4 of an adjacent unit 2.
  • electronic elements (not shown) are switched on the receiving surfaces 3, the bottom side with the receiving surfaces 3 and laterally or on the top via a bonding wire or other contact (not shown) are connected to the electrodes 4, the three electronic elements are connected in series.
  • Recording surfaces 3 and the electrode 4 may be connected.
  • Figure 5 shows a schematic plan view of a section of a
  • Inventive laminate 41 for the preparation of inventive substrates.
  • nine pre-structured units 42 are shown, from which units 2 as shown in FIGS. 1 or 2 can be produced.
  • the laminate 41 continues to the right and left as a band.
  • the pre-structured units 42 include receiving surfaces 43 and two electrodes 44, 45 partially separated by gaps 46.
  • the laminate 41 comprises a first conductive layer (on top) and an electrically insulating layer of PET (PI, epoxy, bismaline triazine or other materials) (below) which are laminated together.
  • PI electrically insulating layer
  • a second electrically conductive layer bottom is arranged. This second electrically conductive layer is connected to the electrodes 44, 45 by welding points 48.
  • the pre-structured units 42 of the laminate 41 are connected to one another via webs 49, 50 of the first electrically conductive layer and the insulating layer.
  • the horizontal webs 49 connect the pre-structured units 42 in the longitudinal direction of the laminate 41 and the vertical webs 50 connect the pre-structured units 42 in the transverse direction (in Figure 5 from top to bottom).
  • the horizontal webs 49 can be formed with a simple punching tool to a compound 9 of Figure 1 or a compound 19 of Figure 2.
  • the laminate 41 can thus be formed by punching in the region of the webs 49 to form substrates for series and / or parallel circuits.
  • other units may be provided perpendicular to these connections for series connections or the vertical bars 50 are simply separated.
  • the laminate 41 includes two at the edge
  • the holding strip 51 can be processed.
  • recesses 52 are provided, which are suitable for holding and transporting the laminate 41 with suitable machines.
  • the retaining strips 51 include position marks 53, which are provided for automated processing of the laminate 41.
  • FIG. 6 shows a schematic perspective view of a unit 62 of a substrate according to the invention.
  • the unit 62 comprises a receiving surface 63, a first electrode 64 and a second electrode 65, which are formed from a first electrically conductive layer 70, for example made of a metal or a
  • the electrodes 64, 65 and the receiving surface 63 are spaced apart by gaps 66 and thereby electrically isolated from each other.
  • the first electrically conductive layer 70 is disposed on a thin electrically insulating layer 71. Below the electrically insulating layer 71, a second electrically conductive layer 72 is arranged. The layers 70, 71, 72 are interconnected laminated. The second electrically conductive layer 72 is in three parts, the parts being separated from one another by gaps 67. The first and the second electrically conductive
  • Layer 70, 72 are partially welded together.
  • the first metallic layer 70 has embossings 68, which pass through recesses in the electrically insulating layer 71 except for the second electrically conductive layer 72
  • the embossings 68 are welded to the second electrically conductive layer 72.
  • the unit 62 comprises at the upper and lower edge in each case two webs 69 which are formed by the first electrically conductive layer 70 and the insulating layer 71. These webs 69 connect two such units 62 to allow a parallel connection of the LEDs 75 on the receiving surfaces 63 of two units 62. On the receiving surface 63 twelve LEDs 75 are arranged. The LEDs 75 are connected via bonding wires (not shown) to the electrodes 64, 65 and may also be interconnected with bonding wires. Basically, the LEDs 75 on the
  • Receiving surface 63 are interconnected differently, that is, in series and / or parallel, with the resulting complicated networking with bonding wires again the risk of short circuits and faulty circuits and the production is more expensive.
  • FIG. 7 shows a schematic plan view of a substrate 81 according to the invention with units 82 with triangular geometry.
  • the units 82 are indicated by a triangular frame with dashed edge.
  • Each unit 82 includes a first electrically conductive layer each including three electrode segments 84.
  • a second electrically conductive layer 88 includes receiving surfaces 83 substantially framed by the electrodes 84.
  • Either two of the electrode segments 84 of a unit 82 are electrically connected to one another to an electrode 84 or one of the electrode segments 84 remains electrically neutral or as a ground conductor while the other two electrode segments 84 form the electrodes of the unit 82.
  • the third electrode 84 may also be available as a third contact, for example for transistors.
  • All the electrodes 84 are connected at the tips of the triangles of the units 82 to the electrodes 84 of adjacent units 82 via electrical connections 89 which are part of the first electrically conductive layer.
  • the electrodes 84 of a unit 82 were initially connected as prestructured units of a laminate to produce the substrate 81 shown. However, the compounds of the pre-structured units were punched free to obtain the present substrate 81.
  • an electrically insulating layer 87 can also be seen in the plan view of FIG. 7, which is arranged below the first electrically conductive layer and which electrically separates the receiving surfaces 83 from the electrodes 84 by gaps 86.
  • the insulating layer 87 can basically also be seen in the gaps 86.
  • recesses 90 are arranged, which are completely free.
  • the second electrically conductive layer 88 may also be continuous, so that then no recesses exist, but at these positions, the second electrically conductive layer 88 would be seen from above.
  • the substrate 81 shown may be, for example, a mixture of series and
  • Parallel circuits of electronic elements when the electronic elements are mounted on the receiving surfaces 83, are contacted with at least two electrodes 84 with bonding wires (not shown) and a voltage is applied to two of the electrodes 84.
  • the electrodes 84 which are connected via an edge and connections 89 to an adjacent unit 82 are contacted and connected to bonding wires.
  • the two central units 82 may also include three bonding wires to the electronic elements so that the two diagonal electrodes 84 are shorted.
  • the diagonal electrodes 84 of these units 82 could also be electrically connected to each other through the electrically conductive layer via interconnects (not shown) to form a common electrode.
  • FIGS. 8 and 9 show in plan view (FIG. 8) and in a view from below (FIG. 9) a laminate 91 according to the invention for the production of substrates according to the invention.
  • the laminate 91 comprises circular prestructured units 92 connected at right angles to four sides each.
  • the pre-structured units 92 are illustrated in Figures 8 and 9 by rectangular boxes with dashed edge.
  • Each pre-structured unit 92 comprises a circular receiving surface 93 and four electrode segments 94, wherein the electrode segments 94 are all initially connected to each other and form a ring around the receiving surface 93.
  • Receiving surfaces 93 and the electrodes 94 are separated by gaps 96 and are not in one plane.
  • the pre-structured units 92 are electrically conductively connected to one another by webs 99, which are formed with the electrodes 94. Therefore, not only are the electrodes 94 of a pre-structured unit 92 of the laminate 91 together
  • the electrodes 94 and the connections / webs 99 together form the first electrically conductive layer 94, 99 of the laminate 91.
  • the webs 99 are H-shaped thus each have two parallel parts and a transverse web which connects the parallel parts together.
  • the structure of the laminate 91 is supported by a thin electrically insulating layer 97 which is disposed below the entire structure of the first electrically conductive layer 94, 99 and which bridges the gaps 96.
  • the laminate 91 may
  • the prestructured electrically insulating layer 97 is bonded to the prestructured first electrically conductive layer 94, 99.
  • the electrically insulating layer 97 can be passed through these gaps 100 detect.
  • Seen from the bottom ( Figure 9) is the electrically insulating
  • edge connections 101 are arranged at the edges of the pre-structured units 92, which do not have any adjacent units 92
  • the illustrated laminate 91 may continue in any direction and also form a tape or surface comprising a wide variety of pre-structured units 92.
  • FIGS. 8 and 9 show a laminate 91 with nine
  • Pre-structured units 92 From such a laminate 91 can also form several substrates of the invention by the laminate 91 along the compounds 99 is partially or completely separated.
  • Holding strips (not shown), which are connected to the units 92 via the edge connections 101, can be arranged on two edges of the band.
  • the retention tabs may include recesses for securely processing the laminate 91.
  • the retaining strips are preferably arranged analogously to the laminate 41 according to FIG.
  • only one electrically conductive layer could be provided, which is formed by the electrodes 94 and the receiving surface 93, wherein the gaps 96 are then formed in this one electrically conductive layer and the electrodes 94 and the receiving surfaces 93 through the electrically insulating layer in Position are held, wherein the electrically insulating layer then below the
  • Receiving surfaces 93 extends. A second electrically conductive layer is then superfluous.
  • the pre-structured units 92 can be transformed by a method according to the invention into the units of a substrate according to the invention.
  • a simple punching process can be used, in the area of the webs 99 or the Webs 99 and the edge connections 101 engages while some of the electrodes 94 separated from each other and leaves others connected.
  • FIGS. 10 to 15 show, in a schematic view, various substrates 111, 131 which have been produced from such a laminate 91 by a method according to the invention.
  • Stamped punching tools Individual units 112, 132 are indicated in FIGS. 10 to 15 for identification by a rectangle with a dashed edge.
  • the substrate 111 according to FIG. 10 comprises nine units 112, which are connected to each other at right angles.
  • Each unit 112 includes a receiving surface 113 for receiving an electrical element (not shown) and a first electrode 114 and a second electrode 115.
  • the electrodes 114, 15 and the receiving surface 113 of a unit 112 are electrically separated from each other by an insulating layer or gaps 116 separately.
  • the electrodes 114, 115 are divided into four electrode segments per unit 112.
  • the substrate 1 11 shown could be produced in the simplest way from the laminate 91 shown in FIGS. 8 and 9, by using only some of the transverse webs of FIG
  • the shown substrate 111 is suitable for realizing a parallel connection.
  • electronic elements such as LEDs on the substrate 111 must be contacted.
  • Two ends of two electrically insulated electrodes 114, 115 of a unit 112 serve as terminals 120 for the circuit of the electronic element.
  • Connections 99 have been converted into connections 119 without a crosspiece, while the other connections 119 'have not been changed, that is, they have not been punched out. Likewise, some of the edge bonds 101 have been separated so that the substrate 111 has separate edge bonds 121 and unseparated ones
  • Edge joints 122 includes.
  • the separate edge connections 121 and Unseparated edge bonds 122 are distributed among the units 112 such that each unit 112 includes two electrodes 114, 115 and the desired interconnection of the electrodes 114, 115 of adjacent units 112 is achieved.
  • connections 119 without transverse webs comprise two electrically conductive
  • connections 119 ' only one connection of a first electrode 114 of a first unit 112 to a first electrode 114 of an adjacent unit 112, or a connection from a second electrode 115 to a second electrode 115 of an adjacent Unit 112 forms, so bridging 119 'form.
  • Bridging 119 are not necessary for the realization of the contacts of the electrodes 114, 115, but stabilize the substrate 111, improve the
  • connection 119 thus provides a
  • Double connection 119 which consists of a first connection of a first electrode 114 of a first unit 112 with a first electrode 114 of an adjacent unit 112 and a second connection of a second electrode 115 of the first unit 112 with a second electrode 115 of the same adjacent unit 112.
  • the insulating layer may preferably be arranged underneath the connection 119, as well as the bridging 119 'and the edge connections 121, 122.
  • the substrate 111 of Figure 10 thus provides a substrate 111 for a parallel connection of electronic elements (not shown) mounted thereto on the receiving surfaces 113 and electrically connected to the electrodes 114, 115 via bonding wires (not shown).
  • the receiving surfaces 113 are electrically neutral regions by which heat can be dissipated directly via the second electrically conductive layer located below and on the opposite side of the insulating layer (only visible through the receiving surfaces 113 in FIG. 10). This is of particular advantage when power components are to be installed as electronic elements.
  • the laminate 91 of FIGS. 8 and 9 includes one or more retention tabs, the retention tabs may be severed from the remaining laminate 91 by a stamping operation to create the substrate 111 of FIG.
  • the edge connections 121, 122 which previously formed webs to the holding strips, can be embossed into the desired shapes, so that the separation from the holding strip and the stamping of the substrate 111 in a common
  • Embodiments transfer with retaining strips and edge joints and provide for these methods according to the invention, laminates and substrates accordingly
  • the substrate 111 of Figure 11 also includes nine units 112 connected at right angles. Each unit 112 includes a receiving surface
  • the electrodes 114, 115 and the receiving surface 113 of a unit 112 are electrically separated from each other by an electrically insulating layer, which can be seen in principle by column 116.
  • the electrodes 114, 115 are divided into four electrode segments per unit 112.
  • the electrodes 114, 115 form the first electrically conductive layer, while the receiving surfaces 113 form the second electrically conductive layer.
  • the basic structure is therefore similar to the substrate 111 of FIG. 10.
  • the substrate 111 according to FIG. 11 has partial separation regions 122 instead of connections 119, 119 'in which adjacent units 112 are completely electrically separated from one another. If a punching operation is used, the units 112 at these locations 122 are also materially separated from each other, which
  • the substrate 111 according to FIG. 11 is therefore actually a linear substrate 111.
  • the completely separate separation regions 122 are equivalent to the separate edge connections 121.
  • connections 99 of the laminate 91 have been converted into simple connections 124 in which a first electrode 114 with a second electrode 115 an adjacent unit 112 is connected.
  • the unchanged remaining horizontal connections 125 each connect a first electrode 114 to a second electrode 115 of an adjacent unit 112.
  • Two ends of the electrically isolated and provided for series connection electrodes 114, 115 of a unit 112 serve as terminals 120 for the circuit to which in a finished electronic circuit with electronic elements, an electrical voltage can be applied.
  • only one electrically conductive layer could be provided, which is formed by the electrodes 114, 115 and the receiving surface 113, wherein the gaps 116 are then formed in this one electrically conductive layer and the
  • Electrodes 114, 115 and the receiving surfaces are held in position by the electrically insulating layer, wherein the electrically insulating layer then extends below the receiving surfaces 113.
  • a second electrically conductive layer is then superfluous, but can still be arranged below the insulating layer. Then, the receiving surfaces 113 of the first electrically conductive layer may be connected to the second electrically conductive layer by embossing and / or welding points.
  • edge connections 121, 122 between the electrode segments are distributed as separate edge connections 121 and as electrically connected edge connections 122 in such a way that a series connection is realized by two electrodes 114, 115 per unit 112 over all units 112.
  • the substrate 111 of Figure 11 thus provides a substrate 111 for a series connection of electronic elements (not shown) mounted on the receiving surfaces 113 and electrically connected to the electrodes 114, 115 via bonding wires (not shown).
  • the receiving surfaces 113 are electrically neutral regions, by means of which heat can be dissipated via the second electrically conductive layer located below and on the opposite side of the insulating layer (only recognizable as receiving surfaces 113 in FIG. 11). This is of particular advantage when power components are to be installed as electronic elements. While the substrate 111 according to FIG. 10 enables a parallel connection of all nine units 112 and the substrate 111 according to FIG. 11 enables a series connection of all nine units 112, a mixture of series and binary units can also be used
  • Parallel circuits are produced by punching out of the same laminate 91 of Figures 8 and 9, as shown in Figure 12 as a schematic plan view.
  • the substrate 111 according to FIG. 12 comprises nine units 112, which are connected to one another at right angles.
  • Each unit 112 includes a receiving surface 113 for receiving an electrical element (not shown) and a first electrode 114 and a second electrode 115.
  • the electrodes 114, 115 and the receiving surface 113 of a unit 112 are electrically separated from each other by an insulating layer.
  • the electrodes 114, 115 are divided into four electrode segments per unit 112.
  • the rows of units 112 of the substrate 111 are connected in parallel by double connections 119.
  • the columns of the units 112 of the substrate 111 are connected in series by simple connections 125.
  • a double connection 119 always connects a first electrode 114 of a first unit 112 to a first electrode 114 of an adjacent second unit 112 and a second electrode 115 of the first unit 112 to a second electrode 115 of the second unit 112.
  • a simple connection 125 always connects a first one Electrode 114 of a first unit 112 with a second electrode 115 of an adjacent second unit 112th
  • the substrate 111 comprises at all peripheral units 12
  • Edge joints 121, 122 disposed between the electrode segments.
  • the separate edge connections 121 are arranged on the right and left sides of the substrate 111, while the electrically conductive, not separated
  • Edge connections 122 at the upper and lower edges (with respect to Figure 12) of the substrate 111 are arranged.
  • FIGS. 13, 14 and 15 show diagrammatic plan view of substrates 131, each comprising three units 132.
  • Such substrates 131 may be made of a laminate 91 of FIGS. 8 and 9. Strictly speaking, three such substrates 131 may be made of a laminate 91 having nine pre-structured units 92.
  • Each unit 132 includes a receiving area 133 as an electrically neutral area and two electrodes 134, 135 electrically separated from each other. Between the receiving surfaces 133 and the electrodes 134, 135, the insulating layer is arranged for isolation, the column 136 is provided. Each substrate 131 also includes two terminals 140 that are adapted to apply a voltage to
  • the units 132 of the substrate 131 of FIG. 13 are interconnected by simple connections 144. This seems at first startling, since the simple connections 144 precede the double connections 119, 139
  • Embodiments seem to be the same.
  • Electrode segments of the laminate 91 of Figure 8 is formed.
  • This lead 146 is not used to connect electronic elements (not shown). It serves exclusively to realize a substrate 131 for a series connection with one-sided connection 140. This requires an electrically conductive
  • Electrode segments are used to construct the electrodes 134, 135. Only to these electrodes 134, 135, the electronic elements are connected. In the case of the right-hand unit 132, the electronic elements can also be connected to the upper two electrode segments, since these form the first electrode 134 of this unit 132.
  • the upper webs 146 in the region of the connection 144 are here part of the feed line 146 and not part of a double connection.
  • the electrodes 134, 135 of the left two units 132 frame the receiving surfaces 133 of these units 132 so only half.
  • the electrodes 134, 135 of a unit 132 are always electrically isolated from each other by separate edge connections 141. While electrically conductive edge connections 142 connect the electrode segments of the feed line 146 and the first electrode 134 of the right-hand unit 132 to one another.
  • the substrate 131 according to FIG. 13 is thus suitable for constructing a series connection which can be connected on one side.
  • the substrate 131 of FIG. 14 implements a substrate 131 for a two-sided connection series circuit.
  • the upper and lower edge joints 141 are electrically isolated, or electrically isolated from each other.
  • the left and right edge connections 142 are electrically connected.
  • the electrical connections 140 are on opposite sides left and right at the electrical
  • the units 132 are characterized by simple
  • Connections 145 each connecting a first electrode 134 of a unit 132 with a second electrode 135 of an adjacent unit 132.
  • the substrate 131 shown in Fig. 15 may be used to construct a parallel circuit and has one-sided terminals 140.
  • the upper and lower edge connections 142 are closed so that the adjacent electrode segments are electrically contacted with each other.
  • Edge joints 141 separate the adjacent electrode segments.
  • Connections 139 of the units 132 are realized here by a double connection 139.
  • all the first electrodes 134 of all three units 132 and all the second electrodes 135 of all three units 132 are electrically connected to one another.
  • Each electrode 134, 135 in this case comprises two of the four electrode segments, which the
  • Embodiments disclosed features of the invention may be essential both individually and in any combination for the realization of the invention in its various embodiments. LIST OF REFERENCE NUMBERS

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Abstract

L'invention concerne un substrat stratifié destiné au montage et à la connexion de deux ou plusieurs éléments électroniques (75), comprenant une première couche électriquement conductrice structurée (70) stratifiée avec une couche électriquement isolante structurée (71, 87). Le substrat stratifié (1, 11, 21, 31, 81, 111, 131) comprend au moins deux unités (2, 62, 82, 112, 132) présentant chacune au moins une électrode (4, 5, 64, 65, 84, 114, 115, 134, 135) pour l'alimentation en énergie électrique et une surface support (3, 63, 83, 113, 133) pour le montage d'éléments électroniques (75). Au moins une électrode voisine (4, 5, 64, 65, 84, 114, 115, 134, 135) est disposée à côté de chaque surface support (3, 63, 83, 113, 133) et forme avec elle une unité (2, 62, 82, 112, 132). Chaque surface support (3, 63, 83, 113, 133) est électriquement isolée de la ou des électrodes voisines (4, 5, 64, 65, 84, 114, 115, 134, 135), et les surfaces supports (3, 63, 83, 113, 133) et/ou les électrodes (4, 5, 64, 65, 84, 114, 115, 134, 135) d'au moins deux unités voisines (2, 62, 82, 112, 132) sont reliées électriquement par une connexion (19, 89, 124, 125, 144, 145) ou par deux connexions (9, 69, 119, 139) de façon à pouvoir connecter les éléments électroniques (75) électroniquement en parallèle et/ou en série au moyen de la connexion (19, 89, 124, 125, 144, 145) ou des connexions (9, 69, 119, 139) lorsqu'ils sont montés sur les surfaces supports (3, 63, 83, 113, 133) et sont connectés à une électrode (4, 5, 64, 65, 84, 114, 115, 134, 135) ou à deux électrodes (4, 5, 64, 65, 84, 114, 115, 134, 135) de la même unité (2, 62, 82, 112, 132). L'invention concerne également un circuit électronique comprenant un tel substrat avec des éléments électroniques, un stratifié permettant de produire un tel substrat, ainsi qu'un procédé de production d'un tel substrat à partir d'un tel stratifié. Dans ce procédé, le stratifié préalablement structuré est façonné dans la zone des connexions. Lors de cette opération, l'électrode et la surface support ou les électrodes et les surfaces supports, ou les électrodes de la même unité préalablement structurée sont séparées et les électrodes et les surfaces supports d'unités préalablement structurées voisines restent électriquement connectées de façon à former un substrat avec des unités sur lequel des éléments électroniques sont connectés en parallèle et/ou en série, lorsque les éléments électroniques montés sur les surfaces supports sont connectés à une électrode ou à deux électrodes de la même unité.
PCT/EP2012/003315 2011-08-22 2012-08-03 Substrat de montage d'éléments électroniques WO2013026527A1 (fr)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104006316A (zh) * 2014-04-30 2014-08-27 东莞长发光电科技有限公司 一种拼装式led面板灯
CN114997096A (zh) * 2022-04-28 2022-09-02 本源科仪(成都)科技有限公司 半导体量子比特版图的布图构建方法、系统、介质及设备

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102016107736A1 (de) * 2016-04-26 2017-10-26 Osram Opto Semiconductors Gmbh Verfahren zum Herstellen eines optoelektronischen Bauelements und optoelektronisches Bauelement

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE635957A (fr) *
US3033914A (en) * 1960-04-20 1962-05-08 Gen Electric Printed circuit boards
US3042740A (en) * 1960-11-30 1962-07-03 Bell Telephone Labor Inc Mounting board for electric circuit elements
US3148438A (en) * 1959-05-25 1964-09-15 Vero Prec Engineering Ltd Method of making wiring boards
US20050239342A1 (en) * 2002-10-25 2005-10-27 Hideo Moriyama Light emitting module
US20060221608A1 (en) * 2005-02-10 2006-10-05 Nec Corporation Flat light source apparatus with separable unit boards
EP1516372B1 (fr) 2002-06-26 2007-01-03 Osram Opto Semiconductors GmbH Diode luminescente et/ou photodiode montee en surface et procede de fabrication associe
DE102005044001B3 (de) 2005-09-14 2007-04-12 W.C. Heraeus Gmbh Laminiertes Substrat für die Montage von elektronischen Bauteilen
US20100027291A1 (en) * 2007-02-16 2010-02-04 Tetsuya Hamada Backlight device and planar display device using the same
DE102008044847A1 (de) 2008-08-28 2010-03-04 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1098215A (ja) * 1996-09-24 1998-04-14 Toyoda Gosei Co Ltd 発光ダイオード装置
KR101017921B1 (ko) * 2005-06-13 2011-03-08 가부시키가이샤후지쿠라 발광 소자 실장용 기판, 발광 모듈 및 조명 장치

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE635957A (fr) *
US3148438A (en) * 1959-05-25 1964-09-15 Vero Prec Engineering Ltd Method of making wiring boards
US3033914A (en) * 1960-04-20 1962-05-08 Gen Electric Printed circuit boards
US3042740A (en) * 1960-11-30 1962-07-03 Bell Telephone Labor Inc Mounting board for electric circuit elements
EP1516372B1 (fr) 2002-06-26 2007-01-03 Osram Opto Semiconductors GmbH Diode luminescente et/ou photodiode montee en surface et procede de fabrication associe
US20050239342A1 (en) * 2002-10-25 2005-10-27 Hideo Moriyama Light emitting module
US20060221608A1 (en) * 2005-02-10 2006-10-05 Nec Corporation Flat light source apparatus with separable unit boards
DE102005044001B3 (de) 2005-09-14 2007-04-12 W.C. Heraeus Gmbh Laminiertes Substrat für die Montage von elektronischen Bauteilen
US20100027291A1 (en) * 2007-02-16 2010-02-04 Tetsuya Hamada Backlight device and planar display device using the same
DE102008044847A1 (de) 2008-08-28 2010-03-04 Osram Opto Semiconductors Gmbh Optoelektronisches Bauelement

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"LASER SCRIBED LABYRINTH TYPE CIRCUIT FOR CIRCUIT BOARD", IBM TECHNICAL DISCLOSURE BULLETIN, INTERNATIONAL BUSINESS MACHINES CORP. (THORNWOOD), US, vol. 32, no. 6B, 1 November 1989 (1989-11-01), pages 359 - 361, XP000073766, ISSN: 0018-8689 *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104006316A (zh) * 2014-04-30 2014-08-27 东莞长发光电科技有限公司 一种拼装式led面板灯
CN114997096A (zh) * 2022-04-28 2022-09-02 本源科仪(成都)科技有限公司 半导体量子比特版图的布图构建方法、系统、介质及设备
CN114997096B (zh) * 2022-04-28 2024-06-04 本源科仪(成都)科技有限公司 半导体量子比特版图的布图构建方法、系统、介质及设备

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