WO2012176248A1 - Circuit de détection de tension d'une alimentation électrique - Google Patents

Circuit de détection de tension d'une alimentation électrique Download PDF

Info

Publication number
WO2012176248A1
WO2012176248A1 PCT/JP2011/005604 JP2011005604W WO2012176248A1 WO 2012176248 A1 WO2012176248 A1 WO 2012176248A1 JP 2011005604 W JP2011005604 W JP 2011005604W WO 2012176248 A1 WO2012176248 A1 WO 2012176248A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
power supply
switching element
circuit
supply voltage
Prior art date
Application number
PCT/JP2011/005604
Other languages
English (en)
Japanese (ja)
Inventor
善之 鶴崎
香 西川
昌美 三好
Original Assignee
パナソニック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パナソニック株式会社 filed Critical パナソニック株式会社
Publication of WO2012176248A1 publication Critical patent/WO2012176248A1/fr

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/165—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values
    • G01R19/16533—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application
    • G01R19/16538—Indicating that current or voltage is either above or below a predetermined value or within or outside a predetermined range of values characterised by the application in AC or DC supplies

Definitions

  • the present invention relates to a power supply voltage detection circuit for detecting a power supply voltage supplied from a DC power supply.
  • the power supply voltage is within the guaranteed operation range of the electronic circuit, and the reference voltage source is
  • a power supply voltage detection circuit that detects whether a constant reference voltage is output is connected to an electronic circuit, and the electronic circuit is operated or stopped based on a detection result of the power supply voltage detection circuit.
  • the power supply voltage detection circuit used in this technique is controlled on and off according to the reference voltage source 402 that outputs the reference voltage VREF based on the power supply voltage VCC and the magnitude of the reference voltage VREF.
  • a power supply voltage circuit that includes a comparator 404 that compares the voltage VS and can use the output of the comparator 404 as an enable signal that is input to an electronic circuit (see Patent Document 1).
  • the switching element 407 is composed of an N-channel MOSFET
  • the switching element 409 is composed of a P-channel MOSFET.
  • the voltage VS output from the voltage divider 403 increases as the power supply voltage VCC increases, and when the power supply voltage VCC reaches the voltage VOL, the magnitude relationship between the voltage VREF input to the comparator 404 and the voltage VS. Is reversed, and the output voltage VOUT of the comparator 404 is switched from the high level to the low level (0 V).
  • the voltage VOL is set so as to be within an operation guarantee range of the electronic circuit by appropriately setting a ratio of the magnitudes of the resistors 410 and 411 constituting the voltage divider 403. Since the electronic circuit operates at the timing (detection timing) at which the output voltage VOUT is detected from the high level to the low level, malfunction can be prevented.
  • a reference voltage source 500 that outputs a reference voltage VREF based on a power supply voltage VDD, a switching element 501 that is on / off controlled by the magnitude of the reference voltage VREF,
  • a voltage output circuit 502 that outputs a voltage VG obtained by dividing the voltage VDD, and a switching element 507 connected in series to the resistor 508, can be used as an enable signal for the electronic circuit.
  • a power supply voltage detection circuit has been proposed (see Patent Document 2).
  • the voltage output circuit 502 is formed by connecting a resistor 503 and two diodes 505 and 506 in series, and outputs a voltage VG generated at a connection point between the resistor 503 and the diode 504.
  • the switching element 501 is composed of an N channel MOSFET
  • the switching element 507 is composed of a P channel MOSFET.
  • the operation of the reference voltage source 500 is stabilized and the output voltage becomes the reference voltage VREF.
  • the switching element 501 is turned on, and a current flows through the resistor 503 and the diodes 505 and 506.
  • the voltage drop V2 at the diodes 505 and 506 is substantially constant regardless of the power supply voltage VDD.
  • the switching element 507 is in the off state and the voltage VOUT is at the low level (0 V).
  • the switching element 507 is turned on. VOUT becomes a high level.
  • the voltage VOL is set by the resistor 503 and the diodes 505 and 506 so as to be within the operation guarantee range of the electronic circuit. Since the electronic circuit operates at the timing (detection timing) at which the output voltage VOUT is detected from the low level to the high level, malfunction can be prevented.
  • MOS transistors are employed as the switching elements 501 and 507. Accordingly, parasitic capacitances C51 and C52 exist between the source and gate of the switching elements 501 and 507, respectively.
  • this type of power supply voltage detection circuit is generally designed so that only a few nA current flows through the switching elements 501 and 507 in consideration of low power consumption.
  • a resistance component (not shown) connected in series to the output terminal of the voltage VREF in the reference voltage source 500 becomes a current limiting element in the switching element 501. Yes.
  • the switching element 507, the resistor 503 and the switching element 501 are current limiting elements.
  • the reference voltage VREF output from the reference voltage source 500 is applied to the switching element 501, the parasitic capacitance C51 is charged and the switching element 501 is turned on.
  • the charging of C52 is started and the parasitic capacitance C52 is charged, the switching element 507 is turned on. Therefore, the detection timing is delayed by the charging period of the parasitic capacitance C51 and the parasitic capacitance C52.
  • the switching element 407 and 409 also employs MOS transistors as the switching elements 407 and 409, parasitic capacitances C41 and C42 exist between the source and gate of each of the switching elements 407 and 409, and the switching element 407 , 409 is designed so that only a current of several nA flows. Then, the reference voltage VREF output from the reference voltage source 402 is applied to the switching element 407, the parasitic capacitor C41 is charged to turn on the switching element 407, and then the charging of the parasitic capacitor C42 is started. Is charged, the switching element 409 is turned on, and thus has the same problem as the power supply voltage detection circuit shown in FIG.
  • the present invention has been made in view of the above reasons, and provides a power supply voltage detection circuit capable of suppressing a delay in detection timing.
  • a power supply voltage detection circuit is connected to a power supply line supplied with power from an external power supply, and outputs a voltage based on the voltage of the power supply line.
  • a second switching element that switches between on and off states, and a load resistor connected in series to a switch circuit formed by connecting the second switching element to the first switching element in series, the switch circuit and the load resistance, One end of the series circuit is connected to the power line and the other end is connected to the ground line, and the voltage generated at the connection point between the load resistor and the switch circuit is output. That.
  • the first switching element is switched on and off based on the voltage output from the voltage output circuit, whereas the second switching element outputs a reference voltage circuit different from the voltage output circuit. Since the ON / OFF state is switched based on the reference voltage, the charging period of the parasitic capacitance of the first switching element and the charging period of the parasitic capacitance of the second switching element when the ON / OFF state is switched can be detected. Timing delay can be suppressed.
  • the first switching element switches from the off state to the on state when the voltage output from the voltage output circuit is equal to or higher than a predetermined threshold voltage
  • the second switching element may be switched from the off state to the on state when the reference voltage is output.
  • the voltage output circuit includes the unidirectional element connected to the power supply line, one end connected to the unidirectional element, and the other end grounded.
  • a pull-down resistor that pulls down a voltage generated at the point, and outputs a voltage generated at a connection point between the unidirectional element and the pull-down resistor
  • the first switching element has a drain connected to the power supply line side
  • the N switching MOS transistor has a gate connected to the voltage output circuit
  • the second switching element has a drain connected to the source of the first switching element and a gate connected to the reference voltage circuit side.
  • the unidirectional element includes a P-channel MOS transistor in which a source is connected to the power supply line side and a gate and a drain are commonly connected to the pull-down resistor side. It may be a thing.
  • the detection voltage can depend on the threshold voltage Vth of the transistor.
  • an electronic circuit is often composed of transistors, and the guaranteed operation range depends on the threshold value Vth of the transistor. Therefore, the electronic circuit can be stably operated by making the detection voltage dependent on the threshold value Vth of the transistor. it can.
  • the first switching element may have a back gate grounded.
  • the voltage output circuit is connected to the power supply line at one end, and pulls up a voltage generated at the connection point.
  • the control voltage that is the output of the power supply voltage detection circuit can be inverted.
  • the unidirectional element includes an N-channel MOS transistor in which a drain and a gate are commonly connected to the other end of the pull-up resistor and a source is grounded. It may be.
  • the detection voltage can depend on the threshold voltage Vth of the transistor.
  • an electronic circuit is often composed of transistors, and the guaranteed operation range depends on the threshold value Vth of the transistor. Therefore, the electronic circuit can be stably operated by making the detection voltage dependent on the threshold value Vth of the transistor. it can.
  • the back gate of the first switching element may be connected to the power supply line.
  • the present invention may be an electronic circuit that determines the activation state of the reference voltage circuit based on the magnitude of the voltage output from the power supply voltage detection circuit.
  • FIG. 3 is a circuit diagram of a power supply voltage detection circuit according to the first embodiment.
  • FIG. FIG. 3 is an operation explanatory diagram of the power supply voltage detection circuit according to the first embodiment.
  • 3 is a time chart for explaining the operation of the power supply voltage detection circuit according to the first embodiment. It is a time chart for demonstrating operation
  • FIG. 6 is a circuit diagram of a power supply voltage detection circuit according to a second embodiment. 6 is an operation explanatory diagram of a power supply voltage detection circuit according to a second embodiment.
  • FIG. 6 is a time chart for explaining the operation of the power supply voltage detection circuit according to the second embodiment. It is a circuit diagram of the power supply voltage detection circuit which concerns on a prior art example.
  • the power supply voltage detection circuit includes a voltage output circuit 151, a reference voltage circuit 100, a voltage dividing circuit 154, and an enable signal output circuit 152, as shown in FIG.
  • the voltage output circuit 151 is connected to the power supply line L to which power is supplied from the external power supply, and outputs the voltage VGVDD1 based on the power supply voltage VDD of the power supply line L.
  • the voltage output circuit 151 includes a P-channel MOS transistor 104 and a pull-down resistor 105.
  • the source of the P-channel MOS transistor 104 is connected to the power supply line L, the drain is connected to the ground line GND through the resistor 105, and the gate is connected to the drain.
  • a voltage generated at the connection point between the drain of P-channel MOS transistor 104 and resistor 105 is output as voltage VGVDD1.
  • the P-channel MOS transistor 104 has a gate and a drain connected in common, and is in a so-called diode-connected state.
  • the reference voltage circuit 100 is connected to the power line L and outputs the reference voltage VREF.
  • the reference voltage circuit 100 includes a band gap reference or the like.
  • the voltage dividing circuit 154 outputs a voltage VGVREF1 obtained by dividing the reference voltage VREF.
  • the voltage dividing circuit 154 includes a series circuit including two resistors 1541 and 1542 connected between the output terminal of the reference voltage circuit 100 and the ground line GND.
  • the enable signal output circuit 152 outputs an enable signal to the electronic circuit 153.
  • the enable signal output circuit 152 includes a switch circuit in which the second switching element 103 is connected in series to the first switching element 102, and a pull-up resistor (load) connected to the switch circuit. Resistance) 101.
  • the series circuit including the switch circuit and the resistor 101 has one end connected to the power supply line L and the other end connected to the ground line GND.
  • a voltage VOUT generated at a connection point between the switch circuit and the resistor 101 is output as an enable signal for driving the electronic circuit 153.
  • This enable signal is at a low level (0 V) when the power supply voltage VDD is within the guaranteed operation range of the electronic circuit 153 and the reference voltage circuit 100 outputs the reference voltage VREF, and is at a high level otherwise. (Power supply voltage VDD).
  • the first switching element 102 is composed of an N channel MOS transistor.
  • the drain is connected to the power supply line L side, the gate is connected to the voltage output circuit 151, and the drain is connected to the drain of the second switching element 103.
  • the first switching element 102 monitors the voltage VGVDD1 output from the voltage output circuit 151. If the power supply voltage VDD is within the operation guarantee range of the electronic circuit 153, the first switching element 102 is turned on. When it is not, it is turned off.
  • the second switching element 103 is composed of an N channel MOS transistor.
  • the drain is connected to the source of the first switching element 102, the gate is connected to the reference voltage circuit 100 side, and the source is connected to the ground line GND.
  • the second switching element 103 monitors the reference voltage VREF output from the reference voltage circuit 100. When the reference voltage circuit 100 outputs the reference voltage VREF, the second switching element 103 is turned on, and the reference voltage VREF is supplied. When not outputting, it is turned off.
  • the power supply voltage VDD is within the operation guarantee range based on the configuration in which the pull-up resistor 101 is connected to the switch circuit including the second switching element 103 connected in series to the first switching element 102.
  • the reference voltage VREF is output, both the first switching element 102 and the second switching element 103 are turned on, and the potential at the connection point between the switch circuit and the resistor 101 is substantially grounded.
  • the potential becomes the same as that of the line GND, and the enable signal (output voltage VOUT) becomes the Low level.
  • the power supply voltage detection circuit inputs an enable signal to the electronic circuit 153.
  • the electronic circuit 153 is connected to the power supply line L and the ground line GND, receives the power supply voltage VDD from the power supply line L, and receives the voltage VREF from the reference voltage circuit 100.
  • the electronic circuit 153 is normally driven when the power supply voltage VDD is within the guaranteed operating range and the reference voltage circuit 100 outputs the reference voltage VREF.
  • the electronic circuit 153 monitors the input enable signal (the output voltage VOUT of the power supply voltage detection circuit) and drives when it detects that the enable signal has changed from the High level to the Low level.
  • the voltage VGVREF1 output from the voltage dividing circuit 154 is approximately 0V. Since P channel MOS transistor 104 is in an off state and no current flows through resistor 105, voltage VGVDD1 is also approximately 0V. As a result, the first switching element 102 and the second switching element 103 are both in the off state, and the power supply voltage VDD of the power supply line L is output as it is to the output terminal VOUT of the power supply voltage detection circuit.
  • the first switching element 102 Since the gate-source voltage VGS is still lower than the gate threshold voltage Vth of the first switching element 102, the first switching element 102 maintains the off state.
  • the voltage drop between the source and drain of the P-channel MOS transistor 104 is equal to the gate threshold voltage Vth, so that the voltage VGVDD1 is equal to the gate threshold voltage Vth. Then, the first switching element 102 is turned on. At this time, since both the first switching element 102 and the second switching element 103 are in the on state, the output voltage VOUT is substantially 0V.
  • the output voltage VOUT is maintained at 0V.
  • FIG. 3 shows the time series operation of the power supply voltage detection circuit according to this embodiment, and the time series operation of the power supply voltage detection circuit according to the conventional example shown in FIG. As shown in FIG. 3 and 4, the case where the power supply voltage VDD monotonously increases with time, such as immediately after power-on (see FIGS. 3A and 4A), will be described as an example.
  • the reference voltage source 500 When the power supply voltage VDD reaches the voltage V1 at time T (V1), the reference voltage source 500 is activated (see FIG. 4B). At this time, the voltage V1 is applied between the source and gate of the switching element 501, and the switching element 501 is turned on (see FIG. 4C).
  • the source-gate voltage VSG (507) of the switching element 507 also increases (FIG. 4 (f)).
  • the source-gate voltage VSG (507) reaches the gate threshold voltage Vth of the switching element 507, the switching element 507 is turned on, and the voltage VOUT (enable signal) changes from 0 V to a voltage greater than or equal to the voltage VOL. It changes (FIG. 4 (g)).
  • the gate-source voltage VGS (501) of the switching element 501 is The time when the reference voltage VREF is actually reached is delayed from the time T (V1) by the charging period T02 of the parasitic capacitance C51 (see FIG. 4H).
  • the gate-source voltage VGS (501) of the switching element 501 reaches the gate threshold voltage Vth, and the switching element 501 is turned on to start discharging the parasitic capacitance C52.
  • the voltage VDD-VG between both ends of the resistor 503 gradually increases from time T (CS) and reaches the time when the voltage VOL is reached at time T (VOL) (T (VOL) ⁇ T ( CS)) by discharging the parasitic capacitance C52, the period T01 until the source-gate voltage VSG (507) of the switching element 507 actually reaches the voltage VOL becomes longer (FIG. 4 ( h)).
  • the switching element 501 since it is assumed that the switching element 501 is in an ON state in order to apply a voltage between the source and gate of the switching element 507, the switching element 501 The charging period T02 of the parasitic capacitance C51 and the discharging period T01 of the parasitic capacitance C52 of the switching element 507 do not overlap.
  • the time from when the power is turned on until the voltage VOUT is output (hereinafter referred to as “detection time”) Td0 is the time when the power supply voltage VDD is 0.
  • detection time the time from when the power is turned on until the voltage VOUT is output
  • actual arrival time the time when the power supply voltage VDD is 0.
  • actual arrival time the period T02 of charging the parasitic capacitance C51 of the switching element 501 and the discharge of the parasitic capacitance C52 are caused. It becomes longer corresponding to both the delay time and the detection timing of the voltage VOL is delayed by that amount.
  • the P-channel MOS transistor 104 When the power supply voltage VDD reaches the gate threshold voltage Vth at time T (Vth), the P-channel MOS transistor 104 is turned on. Thereafter, the power supply voltage VDD rises and the current flowing through the resistor 105 increases, and the voltage VGVDD1 rises accordingly (see FIG. 3E). On the other hand, the magnitude of the voltage across the resistor 109 (VDD ⁇ VGVDD2) is kept substantially constant even when the power supply voltage VDD rises (see FIG. 3D).
  • the reference voltage source 100 When the power supply voltage VDD reaches the voltage V1 at time T (V1), the reference voltage source 100 is activated and the voltage dividing circuit 154 outputs the positive voltage VGVREF1 (see FIG. 3B). At this time, the second switching element 103 is turned on when the source-gate voltage VGS (103) exceeds the gate threshold voltage (see FIG. 3C). Thereafter, when the power supply voltage VDD reaches the voltage 2Vth that is within the operation guarantee range of the electronic circuit 153 at time T (2Vth), the first switching element 102 is turned on, and the voltage VOUT (enable signal) is as large as the voltage 2Vth. This voltage changes to 0 V (see FIG. 3G).
  • the source-gate of the second switching element 103 with respect to the step-like input from the voltage dividing circuit 154 to the gate of the second switching element 103 The inter-voltage VGS (103) is delayed by the period T11. This is because it takes only the period T12 to charge the parasitic capacitance C12 between the source and gate of the second switching element 103.
  • the voltage VGVDD1 across the resistor 105 reaches the voltage 2Vth earlier than the time T (2Vth), but the source of the first switching element 102 -Delay due to the need to charge the parasitic capacitance C11 between the gates.
  • the time during which the parasitic capacitance C11 is charged is a period T11 during which the source-gate voltage VGS (102) of the first switching element 102 reaches 0 to the gate threshold voltage Vth (FIG. 3 (h)).
  • the parasitic capacitance C11 of the first switching element 102 is reduced.
  • the charging period T11 overlaps the charging period T12 of the parasitic capacitance C12 of the second switching element 103. If the charging time T11 is longer than T12, the detection time Td corresponds to a delay time due to charging of the parasitic capacitance C11 of the first switching element 102, compared to the actual arrival time T1 until the voltage 2Vth is reached. However, it is not affected by the charging period T12 of the parasitic capacitance C12 of the second switching element 103.
  • the charging period T12 is included in the charging period T12, so that the detection error due to the detection timing delay can be reduced.
  • the power supply voltage detection circuit according to the present embodiment is configured not to use a comparator such as an operational amplifier, the circuit scale is reduced as compared with a power supply voltage detection circuit using a comparator as shown in FIG. Therefore, low power consumption can be achieved.
  • the power supply voltage detection circuit according to the present embodiment is the same as the power supply voltage detection circuit according to the first embodiment except that the P-channel MOS transistor 104 of the voltage output circuit 151 is changed to an N-channel MOS transistor, and an enable signal output is performed. In this configuration, the two N-channel MOS transistors 102 and 103 of the circuit 152 are changed to P-channel MOS transistors.
  • the power supply voltage detection circuit includes a voltage output circuit 251, a reference voltage circuit 100, a voltage dividing circuit 254, and an enable signal output circuit 252 as shown in FIG.
  • the voltage output circuit 251 is connected to the power supply line L to which power is supplied from the external power supply, and outputs the voltage VGVDD2 based on the power supply voltage VDD of the power supply line L.
  • the voltage output circuit 251 includes an N-channel MOS transistor 104 and a pull-up resistor 110.
  • the source of the N-channel MOS transistor 110 is connected to the ground line GND, the drain is connected to the power supply line L via the resistor 109, and the gate is connected to the drain.
  • a voltage generated at the connection point between the drain of N-channel MOS transistor 110 and resistor 109 is output as voltage VGVDD2.
  • N channel MOS transistor 110 has a gate and a drain connected in common, and is in a so-called diode connection state.
  • the reference voltage circuit 100 is the same as that of the first embodiment, and is connected to the power supply line L and outputs the reference voltage VREF.
  • the voltage dividing circuit 254 outputs a voltage VGVREF2 obtained by dividing the reference voltage VREF.
  • the voltage dividing circuit 254 includes a series circuit including two resistors 2541 and 2542 connected between the output terminal of the reference voltage circuit 100 and the ground line GND.
  • the enable signal output circuit 252 outputs an enable signal to the electronic circuit 253.
  • the enable signal output circuit 252 includes a switch circuit in which the second switching element 106 is connected in series to the first switching element 107, and a resistor (load resistance) 108 connected to the switch circuit. Is provided.
  • the series circuit including the switch circuit and the resistor 108 has one end connected to the power supply line L and the other end connected to the ground line GND.
  • an inverter 255 is connected between a connection point between the two resistors 2541 and 2542 and the gate of the second switching element 106.
  • a voltage VOUT generated at a connection point between the switch circuit and the resistor 108 is output as an enable signal for driving the electronic circuit 253.
  • This enable signal is at a high level (power supply voltage VDD) when the power supply voltage VDD is within the operation guarantee range of the electronic circuit 153 and the reference voltage circuit 100 outputs the reference voltage VREF, and otherwise. It becomes Low level (0V).
  • the first switching element 107 is composed of a P-channel MOS transistor.
  • the drain is connected to the ground line L via the resistor 108, the gate is connected to the voltage output circuit 251, and the source is connected to the drain of the second switching element 106. ing.
  • the first switching element 107 monitors the voltage VGVDD2 output from the voltage output circuit 251, and is turned on when the power supply voltage VDD is within the operation guarantee range of the electronic circuit 253, and is within the operation guarantee range. When it is not, it is turned off.
  • the second switching element 106 is composed of a P-channel MOS transistor.
  • the drain is connected to the source of the first switching element 102, the gate is connected to the reference voltage circuit 100, and the source is connected to the power supply line L.
  • the second switching element 106 monitors the reference voltage VREF output from the reference voltage circuit 100. If the reference voltage circuit 100 outputs the reference voltage VREF, the second switching element 106 is turned on, and the reference voltage VREF is reduced. When not outputting, it is turned off.
  • the power supply voltage VDD is within the guaranteed operating range based on the configuration in which the pull-down resistor 108 is connected to the switch circuit including the second switching element 106 connected in series to the first switching element 107.
  • both the first switching element 107 and the second switching element 106 are turned on, and the potential at the connection point between the switch circuit and the resistor 108 is substantially the power line. It becomes the same potential as GND, and the enable signal (output voltage VOUT) becomes High level.
  • the power supply voltage detection circuit inputs an enable signal to the electronic circuit 253.
  • the electronic circuit 253 is connected to the power supply line L and the ground line GND, receives the power supply voltage VDD from the power supply line L, and receives the voltage VREF from the reference voltage circuit 100.
  • the electronic circuit 253 is driven normally when the power supply voltage VDD is within the guaranteed operating range and the reference voltage circuit 100 outputs the reference voltage VREF.
  • the electronic circuit 253 monitors the input enable signal (the output voltage VOUT of the power supply voltage detection circuit), and drives when detecting that the enable signal has changed from the Low level to the High level.
  • the voltage VGVREF2 output from the voltage dividing circuit 254 is substantially equal to the voltage VDD. Since N channel MOS transistor 110 is in an off state and no current flows through resistor 109, voltage VGVDD2 is substantially equal to voltage VDD. As a result, both the first switching element 107 and the second switching element 106 are in the OFF state, and the output terminal VOUT of the power supply voltage detection circuit outputs 0 V, which is the voltage level of the ground line GND, as it is. become.
  • the voltage VGVREF2 having a magnitude equal to or higher than the gate threshold voltage Vth of the second switching element 103 is input from the voltage dividing circuit 254 to the gate of the second switching element 106.
  • the switching element 106 is turned on.
  • This voltage VGVREF2 is approximately 0V.
  • the voltage (source-gate voltage VGS) between the gate voltage VGVDD2 of the first switching element 107 and the source side power supply voltage VDD of the first switching element 102 is the first switching element 107. Since the gate threshold voltage Vth is still lower, the first switching element 107 maintains the off state.
  • the voltage drop between the source and drain of the N-channel MOS transistor 110 is equal to the gate threshold voltage Vth, so that the voltage VGVDD2 is equal to the gate threshold voltage Vth.
  • the first switching element 107 is turned on.
  • the output voltage VOUT is a voltage across the resistor 108.
  • the size of the resistor 108 is sufficiently larger than the on-resistance of the first switching element 107 and the second switching element 106, the output voltage VOUT becomes substantially equal to the power supply voltage VDD.
  • the output voltage VOUT becomes the voltage VDD.
  • the electronic circuit 253 since the output voltage VOUT is output after the reference voltage circuit 100 is in a state in which the constant reference voltage VREF is output, the electronic circuit 253 has the power supply voltage VDD within the guaranteed operation range of the electronic circuit 153. Regardless of this, it is possible to prevent malfunctions when the reference voltage VREF is not input.
  • FIG. 7 a case where the power supply voltage VDD monotonously increases with time, such as immediately after power-on (see FIG. 7A) will be described as an example.
  • the N-channel MOS transistor 110 When the power supply voltage VDD becomes equal to the gate threshold voltage Vth at time T (Vth), the N-channel MOS transistor 110 is turned on. Thereafter, even when the power supply voltage VDD rises, the voltage VGVDD2 is maintained substantially constant (see FIG. 7E). On the other hand, the voltage across the resistor 109 (VDD ⁇ VGVDD2) increases with the power supply voltage VDD (see FIG. 7D).
  • the reference voltage source 100 When the power supply voltage VDD reaches the voltage V1 at time T (V1), the reference voltage source 100 is activated and the voltage dividing circuit 254 outputs 0 V (see FIG. 7B), and the second switching element 106 is activated. Is turned on when the source-gate voltage VSG (106) exceeds the gate threshold voltage (see FIG. 7C).
  • the source-gate of the second switching element 106 with respect to the step-like input from the voltage dividing circuit 254 to the gate of the second switching element 106.
  • the inter-voltage VSG (106) is delayed by the period T21. This is because it takes only the period T21 to discharge the parasitic capacitance C22 between the source and gate of the second switching element 106.
  • the voltage across the resistor 109 (VDD ⁇ VGVDD2) reaches the voltage 2Vth earlier than the time Tth, but the parasitic capacitance C21 between the source and gate of the first switching element 107 needs to be discharged. It will be delayed by minutes.
  • the discharge period T21 of the parasitic capacitance C21 of the first switching element 107 as shown in FIG.
  • the discharge period T22 of the parasitic capacitance C22 of the switching element 106 is overlapped. If the discharge time T21 is longer than T22, the detection time Td is longer than the actual arrival time T2 until the voltage 2Vth is reached, corresponding to the delay time caused by the discharge of the parasitic capacitance C21 of the switching element 107. Thus, the second switching element 106 is not affected by the discharge period T22 of the parasitic capacitance C22.
  • the detection time Td can be freely set by changing the number of P-channel MOS transistors, so that the range of application of the power supply voltage detection circuit according to the guaranteed operation range of the electronic circuit 153 Can be spread.
  • the voltage output circuit 251 outputs a voltage generated at a connection point between a resistor 109 and a series circuit in which two or more N-channel MOS transistors are connected in series. Also good.
  • the present invention can be used for electronic devices that require low power consumption, for example, electronic devices such as home appliances, alarm devices, watches, power meters, and extra-small radio devices.

Abstract

Le présent circuit de détection de tension d'une alimentation électrique comporte : un circuit de sortie de tension (151) permettant de produire une tension (VGVDD1), un circuit de tension de référence (100) permettant de produire une tension de référence (VREF), un circuit diviseur de tension (154) permettant de produire une tension (VGVREF1) obtenue en divisant la tension référence (VREF), un premier élément de commutation (102) qui est activé quand la tension (VGVDD1) est supérieure ou égale à une tension de seuil de grille (Vth), un second élément de commutation (103) qui est activé quand la tension (VGVREF1) est supérieure ou égale à une tension de seuil de grille (Vth), et une résistance (101) connectée à un circuit de commutation formé en connectant en série le second élément de commutation (103) au premier élément de commutation (102). Le circuit de détection de tension d'une alimentation électrique produit une tension (VOUT) générée en un point de connexion entre la résistance (101) et le circuit en série.
PCT/JP2011/005604 2011-06-20 2011-10-04 Circuit de détection de tension d'une alimentation électrique WO2012176248A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-136619 2011-06-20
JP2011136619 2011-06-20

Publications (1)

Publication Number Publication Date
WO2012176248A1 true WO2012176248A1 (fr) 2012-12-27

Family

ID=47422130

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2011/005604 WO2012176248A1 (fr) 2011-06-20 2011-10-04 Circuit de détection de tension d'une alimentation électrique

Country Status (1)

Country Link
WO (1) WO2012176248A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104360229A (zh) * 2014-11-13 2015-02-18 国网河南省电力公司南阳供电公司 一种长待机型反窃电稽查仪
CN115183822A (zh) * 2022-09-13 2022-10-14 深圳市瑞芬科技有限公司 用于监测地质沉降与振动特性的物联网传感器及控制方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002228690A (ja) * 2001-02-01 2002-08-14 Matsushita Electric Ind Co Ltd 電源検出回路
JP2003338555A (ja) * 1997-03-31 2003-11-28 Matsushita Electric Ind Co Ltd 電子スイッチ装置及びその製造方法
JP2010223796A (ja) * 2009-03-24 2010-10-07 Renesas Electronics Corp 電源電圧検出回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003338555A (ja) * 1997-03-31 2003-11-28 Matsushita Electric Ind Co Ltd 電子スイッチ装置及びその製造方法
JP2002228690A (ja) * 2001-02-01 2002-08-14 Matsushita Electric Ind Co Ltd 電源検出回路
JP2010223796A (ja) * 2009-03-24 2010-10-07 Renesas Electronics Corp 電源電圧検出回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104360229A (zh) * 2014-11-13 2015-02-18 国网河南省电力公司南阳供电公司 一种长待机型反窃电稽查仪
CN115183822A (zh) * 2022-09-13 2022-10-14 深圳市瑞芬科技有限公司 用于监测地质沉降与振动特性的物联网传感器及控制方法

Similar Documents

Publication Publication Date Title
US8242817B2 (en) Power-on reset circuit with suppressed current
JP5225876B2 (ja) パワーオンリセット回路
US7274226B2 (en) Power source voltage monitoring circuit for self-monitoring its power source voltage
KR101489032B1 (ko) 기준 전압 회로
US20100321121A1 (en) Flexible low current oscillator for multiphase operations
JP2004280923A (ja) 内部電源回路
US20190074820A1 (en) Gate control circuit
US11784636B2 (en) Comparator circuit and semiconductor device
US9628061B2 (en) Power drop detector circuit and operating method of same
US9660651B2 (en) Level shift circuit
WO2012176248A1 (fr) Circuit de détection de tension d'une alimentation électrique
JP2012222715A (ja) ドライバ回路
US20100295530A1 (en) Power supply voltage control circuit
JP2007151322A (ja) 電源回路およびｄｃ−ｄｃコンバータ
US9991888B2 (en) Driving circuit
JP6232968B2 (ja) 電源切替制御回路および電源切替回路
US10008923B2 (en) Soft start circuit and power supply device equipped therewith
US20130300465A1 (en) Systems and methods of signal synchronization for driving light emitting diodes
US9065437B2 (en) Circuit for driving high-side transistor utilizing voltage boost circuits
JP5971604B2 (ja) 電圧検出回路
JP5687091B2 (ja) 電源電圧検出回路
JP2012130136A (ja) 集積回路
US10547299B1 (en) Fast transient and low power thin-gate based high-voltage switch
US7733154B2 (en) Semiconductor device
US20140132322A1 (en) Input circuit

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 11868135

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 11868135

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP