WO2012157530A1

WO2012157530A1 - Display device

Info

Publication number: WO2012157530A1
Application number: PCT/JP2012/062070
Authority: WO
Inventors: 淳中田; 齊藤　浩二; 正実尾崎
Original assignee: シャープ株式会社
Priority date: 2011-05-13
Filing date: 2012-05-10
Publication date: 2012-11-22

Abstract

A display device (1) including: a display panel (2) that has a plurality of gate signal lines (G) and a plurality of source signal lines (S); a gate driver (4) that sequentially selects and scans the plurality of gate signal lines (G); a source driver (30) that supplies source signals from the plurality of source signal lines (S) to respective pixels on the selected gate signal line (G); and a precharge and predischarge control means (20) for performing precharge and predischarge for other source signal lines (S) during a period during in which the source driver (30) writes a source signal to a certain source signal line (S).

Description

Display device

The present invention relates to a display device.

In recent years, thin, lightweight, and low power consumption display devices typified by liquid crystal display devices have been actively used. Such a display device is remarkably mounted on, for example, a mobile phone, a smartphone, a PDA (portable information terminal), an electronic book, a laptop personal computer, and the like. In the future, electronic paper, which is a thinner display device, is expected to develop and spread rapidly. Under such circumstances, it is currently a common problem to reduce power consumption in various display devices.

Therefore, various technologies have been devised for the purpose of reducing the power consumption of the display device and its driving method. For example, in Patent Document 1, a period in which a source signal is not written to a source signal line is used as a preliminary charging period, and the source signal lines are short-circuited to each other, thereby performing preliminary charging / discharging between the source signal lines. A technique for performing (charge sharing) is disclosed.

Japanese Patent Publication “JP 2005-208551 A (publication date: August 4, 2005)”

However, in recent years, display devices have been improved in definition and resolution, and accordingly, display devices are not only required to shorten one horizontal period, but also within one horizontal period. Therefore, there is a demand for writing source signals to more source signal lines. As a result, it has become impossible to provide a sufficient non-writing period in the display device. For example, in the technique described in Patent Document 1, the period during which preliminary charge / discharge is performed is limited to the non-writing period. Therefore, the technique disclosed in Patent Document 1 cannot sufficiently perform preliminary charging / discharging, and thus cannot sufficiently reduce power consumption.

The present invention has been made in view of the above problems, and an object thereof is to provide a display device that can further reduce power consumption.

In order to solve the above-described problems, a display device according to the present invention includes a display panel having a plurality of gate signal lines and a plurality of source signal lines, a gate driver that sequentially selects and scans the plurality of gate signal lines, A source driver that supplies a source signal from the plurality of source signal lines to each of a plurality of pixels on the selected gate signal line, and the source signal is supplied to a certain source signal line by the source driver. And a preliminary charge / discharge control means for performing preliminary charge / discharge on the other source signal lines.

According to this configuration, since it is possible to perform preliminary charge / discharge with respect to the source signal line capable of preliminary charge / discharge even during the period during which the source signal is written, preliminary charge / discharge is performed during the period during which the source signal is written. Compared with a conventional display device that cannot perform the precharging / discharging for a longer time, the source signal potential of the source signal line can be made closer to the reference potential. Accordingly, the writing time of the source signal can be shortened as compared with a conventional display device, so that power consumption can be further reduced.

According to the display device according to the present invention, it is possible to perform pre-charging / discharging for a longer time, and thus it is possible to reduce the power consumption.

1 is a diagram illustrating an overall configuration of a display device according to Embodiment 1. FIG. It is a figure which shows the structural example of the source driver which concerns on Embodiment 1, and a preliminary | backup charge / discharge control means. FIG. 3 is a diagram illustrating an operation for each period of the display device according to the first embodiment. It is a figure which shows the state in the preliminary charging period of the display apparatus which concerns on Embodiment 1. FIG. 6 is a diagram illustrating a state in a third writing period of the display device according to the first embodiment. FIG. A change in potential of a certain pair of source signal lines S is shown. It is a figure which shows the structural example of the source driver which concerns on Embodiment 2, and a preliminary | backup charge / discharge control means. FIG. 10 is a diagram illustrating an operation for each period of the display device according to the second embodiment. It is a figure which shows the state in the preliminary charging period of the display apparatus which concerns on Embodiment 2. FIG. FIG. 10 is a diagram illustrating a state in a third writing period of the display device according to the second embodiment. It is a figure which shows the structural example of the source driver which concerns on Embodiment 3, and a preliminary | backup charge / discharge control means. It is a figure which shows the operation | movement for every period of the display apparatus which concerns on Embodiment 3. FIG. It is a figure which shows the state in the precharge period of the display apparatus which concerns on Embodiment 3. FIG. FIG. 10 is a diagram illustrating a state in a second writing period of the display device according to the third embodiment. It is a figure which shows the structural example of the source driver which concerns on Embodiment 4, and a preliminary | backup charge / discharge control means. FIG. 10 is a diagram illustrating an operation for each period of a display device according to a fourth embodiment. It is a figure which shows the state in the preliminary charging period of the display apparatus which concerns on Embodiment 4. FIG. FIG. 10 is a diagram illustrating a state in a third writing period of the display device according to the fourth embodiment. It is a figure which shows the display panel in the state in which the source signal was written by the 2nd display drive system. It is a figure which shows the display panel in the state in which the source signal was written by the 3rd display drive system. It is a figure which shows the display panel in the state in which the source signal was written by the 4th display drive system.

Embodiments according to the present invention will be described below with reference to the drawings.

(Embodiment 1)
First, Embodiment 1 of the present invention will be described. The configuration of the display device 1 according to the first embodiment will be described with reference to FIG. FIG. 1 is a diagram illustrating an overall configuration of a display device 1 according to the first embodiment. As shown in this figure, a display device 1 includes a display panel 2, a gate driver (scanning line driving circuit) 4, a source driver (signal line driving circuit) 30, a common electrode driving circuit 8, a timing controller 10, and a power generation circuit. 13 is provided.

In the first embodiment, an active matrix type liquid crystal display device is employed as the display device 1. Therefore, the display panel 2 of the first embodiment is an active matrix type liquid crystal display panel, and the other components described above are for driving the liquid crystal display panel.

The display panel 2 includes a screen composed of a plurality of pixels arranged in a grid, M gate signal lines (scanning signal lines) G for selecting and scanning the screen in a line-sequential manner, and a selected gate. N source signal lines (data signal lines) S for supplying source signals (data signals) to the pixels of one row included in the signal line are provided. The gate signal line G and the source signal line S are orthogonal to each other.

In the following description, the gate signal line G connecting the pixels in the m-th row (m is an arbitrary integer) is denoted as G (m). For example, when G (m) is a gate signal line G connecting pixels in the 10th row, G (m + 1), G (m + 2), and G (m + 3) are in the 11th, 12th, and 13th rows, respectively. A gate signal line G connecting the eye pixels is shown.

In the following description, the source signal line S that connects the pixels in the n-th column (n is an arbitrary integer) is denoted as S (n). For example, when S (n) is a source signal line S connecting pixels in the tenth column, S (n + 1), S (n + 2), S (n + 3), S (n + 4), and S (n + 5) are respectively The source signal lines S connecting the pixels in the 11th, 12th, 13th, 14th, and 15th columns are shown.

The gate driver 4 scans each gate signal line G line-sequentially from the top to the bottom of the screen. The gate driver 4 sequentially outputs to each gate signal line G a voltage for turning on a switching element (TFT) provided in each pixel on the gate signal line G. Accordingly, the gate driver 4 sequentially selects and scans each gate signal line G.

The source driver 30 supplies a source signal from each source signal line S to each pixel on the selected gate signal line G. Specifically, the source driver 30 calculates the value of the voltage to be output to each pixel on the selected gate signal line G based on the input video signal (arrow A), and the voltage of that value Are output from the source output amplifier toward each source signal line S. As a result, a source signal is supplied to each pixel on the selected gate signal line G, and the source signal is written.

The display device 1 includes a common electrode (not shown) provided for each pixel in the screen. The common electrode driving circuit 8 outputs a predetermined common voltage for driving the common electrode to the common electrode based on a signal (arrow B) input from the timing controller 10.

Timing controller 10 outputs a reference signal for each circuit to operate in synchronization with each circuit. Specifically, the timing controller 10 supplies the gate driver 4 with a gate start pulse signal, a gate clock signal GCK, and a gate output control signal GOE (arrow E). The timing controller 10 outputs a source start pulse signal, a source latch strobe signal, and a source clock signal to the source driver 30 (arrow F).

The gate driver 4 starts scanning the display panel 2 with the gate start pulse signal received from the timing controller 10 as a cue, and applies to each gate signal line G according to the gate clock signal GCK and the gate output control signal GOE received from the timing controller 10. On the other hand, the selection voltage is sequentially applied. Specifically, the gate driver 4 sequentially selects each gate signal line G according to the received gate clock GCK signal. The gate driver 4 applies a selection voltage to the selected gate signal line G at the timing when the falling edge of the received gate output control signal GOE is detected. As a result, the gate driver 4 scans the selected gate signal line G.

Based on the source start pulse signal received from the timing controller 10, the source driver 30 stores the input image data of each pixel in a register according to the source clock signal, and each source signal of the display panel 2 according to the next source latch strobe signal. Image data is written in line S.

The power supply generation circuit 13 generates Vdd, Vdd2, Vcc, Vgh, and Vgl, which are voltages necessary for each circuit in the display device 1 to operate. Then, Vcc, Vgh, and Vgl are output to the gate driver 4, Vdd and Vcc are output to the source driver 30, Vcc is output to the timing controller 10, and Vdd 2 is output to the common electrode drive circuit 8.

(Configuration of source driver 30 and preliminary charge / discharge control means 20)
Here, configuration examples of the source driver 30 and the preliminary charge / discharge control means 20 will be described. FIG. 2 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the first embodiment.

Here, the display panel 2 includes a plurality of blocks (hereinafter referred to as “pixel blocks”) each including a predetermined number of pixel columns and a predetermined number of pixel rows.

As an example, the display panel 2 of the present embodiment includes a plurality of pixel blocks including six pixel columns and four pixel rows.

For example, in FIG. 2, pixel blocks 2A and 2B among a plurality of pixel blocks included in the display panel 2 are shown. Each pixel block includes six source signal lines S (n) to (n + 5) corresponding to six pixel columns and four pixel rows L (m) to (m + 3).

As shown in FIG. 2, the configuration of each pixel block is the same, and the operation is also the same. Therefore, hereinafter, in order to make the description easy to understand, a configuration example of the source driver 30 will be described using one of a plurality of pixel blocks included in the display panel 2.

However, here, illustration and description of other components such as a DA converter generally provided in the source driver 30 are omitted.

In the following description, the operation and state of the display device 1 in a certain frame period among a plurality of frame periods will be described. In the following description, a pixel in which “+” is shown is a source signal whose source signal potential is positive in this frame period (first source signal; hereinafter, referred to as “source signal (+)”). Indicates the pixel to be written. In addition, a source signal (second source signal; hereinafter referred to as “source signal (−)”) in which the source signal potential is negative is written in the pixel indicated by “−” in this frame period. Indicates a power pixel.

Therefore, when adopting a configuration in which the positive and negative of the source signal to be written to each pixel is inverted every frame period as in the source inversion driving described later, the frame period having the operation and state described below, This frame period alternately includes a frame period in which the sign of the source signal to be written in each pixel is inverted.

(Configuration example of source driver 30)
First, a configuration example of the source driver 30 will be described. As shown in FIG. 2, the source driver 30 according to the first exemplary embodiment includes the number of source output amplifiers 36 that is not the same as the number of source signal lines S as in the conventional display device, but smaller than the number of source signal lines S. ing. In particular, the source driver 30 of the first embodiment includes one source output amplifier 36.

That is, the source driver 30 of the first embodiment is configured to supply source signals to the plurality of source signal lines S by this one source output amplifier 36.

In order to realize this, on the output side of the source output amplifier 36, switching means 32 for switching the source signal line S to which the source signal output from the source output amplifier 36 is supplied is provided.

In the example shown in FIG. 2, the switching means 32 includes a plurality of switches 34a to 34f for each source signal line S. One end of each switch 34 is connected to the corresponding source signal line S. The other end of each switch 34 is connected to the output end of the source output amplifier 36. The operation (ie, on / off) of each switch 34 is controlled by a controller 33 provided in the switching unit 32.

(Display drive method adopted by the source driver 30)
Here, the source driver 30 employs the first display driving method. According to the first display driving method, each time the gate signal line G (pixel row) is selected, the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row). The source signal is written while inverting the positive / negative of the voltage supplied from the signal (from the reference voltage) for each pixel.

As a result, in each pixel row on the display panel 2, as shown in FIG. 2 and the like, pixels to which the source signal (+) is written and pixels to which the source signal (−) is written alternately exist. .

On the other hand, when attention is paid to each source signal line S (pixel column), the source driver 30 supplies a voltage supplied as a source signal (from the reference voltage) to a plurality of pixels on each source signal line S (pixel column). The source signal is written without inverting the sign of each pixel.

As a result, each of the plurality of source signal lines S (pixel columns) has only one of the pixel to which the source signal (+) is written and the pixel to which the source signal (−) is written as shown in FIG. It will not exist.

As a result, as shown in FIG. 2 and the like, the source signal line S in which only the pixel to which the source signal (+) is written exists (hereinafter, referred to as “source signal line S (+)”) on the display panel 2. And source signal lines S (hereinafter referred to as “source signal lines S (−)”) in which only pixels to which the source signal (−) is written exist alternately.

As described above, the display driving method in which the positive / negative of the source signal is inverted for each source signal line S (pixel column) is referred to as “source inversion driving”.

In addition, in the source inversion driving, in addition to the above, the polarity of the source signal supplied to each source signal line S is inverted every time the frame period is switched. For example, when a source signal (+) is written to all the pixels in the even-numbered pixel column and a source signal (−) is written to all the pixels in the odd-numbered pixel column in a certain frame period, the next frame period The source signal (−) is written to all the pixels in the even-numbered pixel column, and the source signal (+) is written to all the pixels in the odd-numbered pixel column.

(Write operation by the source driver 30)
The write operation by the source driver 30 will be specifically described. When a source signal is supplied to a certain source signal line S, the controller 33 turns on the switch 34 corresponding to the source signal line S. At this time, the other switches 34 remain OFF. Thereby, the source output amplifier 36 and the source signal line S are electrically connected, and the source signal output from the source output amplifier 36 is supplied to the target source signal line S.

Each time the source signal is output from the source output amplifier 36, the controller 33 selects the switch to be turned on according to the source signal line S to which the source signal is supplied. As a result, a source signal is supplied to each of the plurality of source signal lines S.

For example, as will be described with reference to FIG. 3 and subsequent drawings, one horizontal period in the display device 1 of the first embodiment includes, in order, a precharge period, a first writing period, a second writing period, a third writing period, A fourth writing period, a fifth writing period, and a sixth writing period are included. The first to sixth writing periods are writing periods for the source signal lines S (n) to (n + 5).

Each time the writing period is switched, the controller 33 switches the corresponding switch 34 to ON and switches the other switches 34 to OFF. Of course, the switch 34 that is already OFF is left OFF. Thus, in each writing period, the corresponding source signal line S is connected to the source output amplifier 36, and the source signal output from the source output amplifier 36 is supplied to the source signal line S. .

As already described, the source driver 30 of this embodiment employs source inversion driving. In response to this, the source output amplifier 36 supplies the source signal of the source signal to be supplied every time the target source signal line S is switched (that is, every time the writing period is switched) in the first to sixth writing periods. Switches between positive and negative potentials.

Thereby, in the display panel 2, as shown in FIG. 2 and the like, only the pixel to which the source signal (+) is written and the source signal line S (+) in which only the pixel to which the source signal (+) is written exist. The existing source signal lines S (−) exist alternately.

(Outline of preliminary charge / discharge control means 20)
Next, an outline of the preliminary charge / discharge control means 20 will be described. The display device 1 further includes preliminary charge / discharge control means 20. The preliminary charge / discharge control means 20 controls preliminary charge / discharge with respect to the plurality of source signal lines S.

Pre-charging / discharging refers to charging / discharging the source signal line S in advance so that the potential of the source signal line S approaches the target source signal potential for the next writing.

Thereby, at the time of the next writing to the source signal line S, it is possible to shorten the arrival time to the target source signal potential (that is, the writing time).

Specifically, parasitic capacitance is generated in the source signal line S in addition to the pixel capacitance. For this reason, when a source signal is written to a certain pixel capacitance of the source signal line S, positive or negative charges of the source signal are stored in the source signal line S.

As described above, the source driver 30 of this embodiment employs source inversion driving. Therefore, focusing on the same source signal line S, the source signal supplied to the source signal line S is switched between the source signal (+) and the source signal (−) within the same frame period. However, every time the frame period is switched, the source signal supplied to the source signal line S is switched between the source signal (+) and the source signal (−).

Therefore, when a source signal is written to a source signal line S for the first time after the frame period has been switched, the source signal line S stores charges whose source signal potential is different from that of the source signal. It has been.

For this reason, in the first writing after the frame period is switched, a considerable writing time is required until the potential of the source signal line S becomes the target source signal potential.

Therefore, by keeping the potential of the source signal line S close to the next source signal potential before the first writing after the frame period is switched, the first writing after the frame period is switched is performed. Such writing time can be shortened.

The preliminary charge / discharge control means 20 of the first embodiment performs preliminary charge / discharge (charge sharing) between the source signal lines S by short-circuiting the source signal lines S having different positive and negative source signal potentials. .

Specifically, as described above, since the source driver 30 of the first embodiment performs source inversion driving, focusing on the same frame period, the source signal line S (+) and the source signal line S ( -) Exist alternately.

Therefore, by short-circuiting adjacent source signal lines S, charges move between the adjacent source signal lines S, and the potentials of both source lines S are approximately intermediate between the potentials of both source lines S. , Averaged to near the reference potential. That is, the potentials of both source lines S approach the source signal potential for the next writing.

(Configuration Example of Preliminary Charge / Discharge Control Unit 20)
Next, a configuration example of the preliminary charge / discharge control means 20 will be described. As shown in FIG. 2, the preliminary charge / discharge control means 20 includes a plurality of switches 22a to 22c. One end of each switch 22 is connected to one source signal line S. The other end of each switch 22 is connected to another source signal line S adjacent to the one source signal line S.

For example, one end of the switch 22a is connected to the source signal line S (n), and the other end of the switch 22a is connected to the source signal line S (n + 1). That is, the switch 22a has a configuration in which the source signal line S (n) and the source signal line S (n + 1) can be short-circuited, and the source signal lines S can be precharged and discharged. .

Further, one end of the switch 22b is connected to the source signal line S (n + 2), and the other end of the switch 22b is connected to the source signal line S (n + 3). That is, the switch 22b has a configuration in which the source signal line S (n + 2) and the source signal line S (n + 3) can be short-circuited and the source signal lines S can be precharged and discharged. .

One end of the switch 22c is connected to the source signal line S (n + 4), and the other end of the switch 22a is connected to the source signal line S (n + 5). That is, the switch 22c has a configuration in which the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, and the source signal lines S can be preliminarily charged / discharged. .

The operation timing of each of the switches 22a to 22c is controlled by the controller 21 provided in the preliminary charge / discharge control means 20 (that is, the on / off timing). The controller 21 controls the precharging for each of the source signal lines S (n) to (n + 5) by controlling the operation timing of each of the switches 22a to 22c.

(Operation example of display device 1)
Next, the pre-charge / discharge operation and the write operation by the display device 1 according to the first embodiment will be described with reference to FIGS. FIG. 3 is a diagram illustrating an operation for each period of the display device 1 according to the first embodiment. FIG. 4 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the first embodiment. FIG. 5 is a diagram illustrating a state in the third writing period of the display device 1 according to the first embodiment.

As shown in FIG. 3, in one horizontal period in the display device 1, a preliminary charging period, a first writing period, a second writing period, a third writing period, a fourth writing period, A writing period and a sixth writing period are included. The precharge period is a period during which precharge / discharge is performed for each of the source signal lines S (n) to (n + 5). The first to sixth writing periods are writing periods for the source signal lines S (n) to (n + 5).

FIG. 3 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period. In FIG. 3, “W” indicates that the source signal is written to the source signal line S. In FIG. 3, “◯” means a terminal of the source signal line S. That is, the solid line connecting the terminals is short-circuited between the source lines S. Indicates that pre-charging / discharging is performed.

(Preliminary charging period)
Here, the operation of the display device 1 during the preliminary charging period will be described. In this preliminary charging period, the display device 1 performs preliminary charging / discharging on each of the source signal lines S (n) to (n + 5) as shown in FIG.

Specifically, the display device 1 turns on all the switches 22a to 22c provided between adjacent source signal lines S as shown in FIG.

When the switch 22a is turned ON, the source signal line S (n) and the source signal line S (n + 1) are short-circuited, and preliminary charge / discharge is performed between these source signal lines S.

Further, when the switch 22b is turned on, the source signal line S (n + 2) and the source signal line S (n + 3) are short-circuited, and preliminary charge / discharge is performed between these source signal lines S.

Similarly, when the switch 22c is turned ON, the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, and preliminary charge / discharge is performed between these source signal lines S.

On the other hand, in this preliminary charging period, the display device 1 does not write the source signal to any of the source signal lines S (n) to (n + 5) as shown in FIG. Therefore, during this preliminary charging period, the display device 1 keeps all the switches 34a to 34f OFF as shown in FIG.

(First to sixth writing periods)
Next, the operation of the display device 1 in the first to sixth writing periods will be described. In the first to sixth writing periods, the display device 1 sequentially writes source signals to the source signal lines S (n) to (n + 5) as shown in FIG. Specifically, the display device 1 sequentially turns on the switches 34a to 34f each time the source output amplifier 36 outputs a source signal, so that the source signal lines S (n) to (n + 5) are Write source signals sequentially.

The display device 1 performs the above writing and performs preliminary charging / discharging by turning on the corresponding switch 22 for the source signal line S capable of preliminary charging / discharging.

The source signal line S that can be precharged / discharged here is a source signal line S other than the source signal line S to which the source signal is written, and the source signal line S for which the source signal has already been written, and the source This is a source signal line S excluding the source signal line S that forms a pair with the source signal line S to which a signal is to be written.

The source signal line S to be precharged / discharged in each writing period is as shown in FIG. 3, but as an example, referring to FIG. 5, the display device 1 in the third writing period. Will be described. In the third writing period, the display device 1 writes a source signal to the source signal line S (n + 2), and simultaneously reserves the source signal lines S (n + 4) and (n + 5). Discharge.

For the above writing, the controller 33 of the switching means 32 turns on the switch 34c corresponding to the source signal line S (n + 2) as shown in FIG. Thus, the source output amplifier 36 and the source signal line S (n + 2) are electrically connected, and the source signal output from the source output amplifier 36 is supplied to the source signal line S (n + 2).

At this time, for the source signal lines S (n + 4) and (n + 5) that can be precharged / discharged, the display device 1 turns on the switches 22c corresponding to these source signal lines S as shown in FIG. . As a result, the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, charges are averaged between these source signal lines S, and preliminary charge / discharge is performed.

(effect)
Here, the effect which the display apparatus 1 of this Embodiment 1 show | plays is demonstrated. FIG. 6 shows a change in potential of a certain pair of source signal lines S. Among these, FIG. 6A shows a change in potential of a pair of source signal lines S in a conventional display device. FIG. 6B shows a change in potential of a certain pair of source signal lines S in the display device 1 according to the first embodiment.

In this example, the source lines S (n + 2) and (n + 3) shown in FIG. 2 will be described as an example. Here, it is assumed that positive charges have already been stored in the source line S (n + 2) by the previous writing. Further, it is assumed that negative charges have already been stored in the source line S (n + 3) by the previous writing. In this example, the next writing is performed in the third writing period for each of the source lines S (n + 2) and (n + 3).

As shown in FIG. 6A, the conventional display device performs preliminary charge / discharge only during the preliminary charge period. Therefore, in the conventional display device, the potentials of the source lines S (n + 2) and (n + 3) can be brought close to the reference potential by the third writing period in which the next writing is performed. Is insufficient, the potentials of the source lines S (n + 2) and (n + 3) cannot reach the reference potential. For this reason, at the time of the next writing, it is necessary to write the shortage to the reference potential + the shortage from the reference potential to the target potential for each of the source lines S (n + 2) and (n + 3).

On the other hand, as shown in FIG. 6B, the display device 1 according to the first embodiment performs pre-charge / discharge not only during the pre-charge period but also during the source signal writing period. For this reason, in the display device 1 of the first embodiment, the potentials of the source lines S (n + 2) and (n + 3) are made to reach the reference potential by the third writing period in which the next writing is performed. Can do. For this reason, at the time of the next writing, only writing of the shortage (V ₁ and V _{2 in the} figure) from the reference potential to the target potential may be performed on each of the source lines S (n + 2) and (n + 3). Therefore, the writing period at the next writing can be shortened.

As described above, the display device 1 according to the first embodiment performs preliminary charge / discharge on the source signal line S that can be precharged / discharged not only during the period in which the source signal is not written but also in the period in which the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 according to the first embodiment can shorten the writing time of the source signal as compared with the conventional display device, and thus can further reduce power consumption.

In particular, the display device 1 of the first embodiment employs a configuration in which only one source output amplifier is provided and a source signal is supplied from the source output amplifier to each of a plurality of source signal lines. As a result, the number of source output amplifiers for supplying source signals can be greatly reduced, and the cost associated with the source driver can be reduced.

In addition, the display device 1 of Embodiment 1 can reduce the total amount of steady current required by the source output amplifier by reducing the number of source output amplifiers. Therefore, the display device 1 of the first embodiment can further reduce power consumption.

(Embodiment 2)
Next, Embodiment 2 of the present invention will be described. In the first embodiment, the source signal line S (+) and the source signal line S (−) are short-circuited to perform preliminary charging / discharging between the source signal lines S.

In the second embodiment, an example in which the source signal line S is preliminarily charged / discharged by grounding the source signal line S to the ground will be described. In the display device 1 according to the second embodiment, points other than those described below are the same as the configuration of the display device 1 according to the first embodiment, and thus the description thereof is omitted.

(Configuration example of the preliminary charge / discharge control means 20)
First, a configuration example of the preliminary charge / discharge control unit 20 will be described. FIG. 7 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the second embodiment. The preliminary charge / discharge control means 20 of the second embodiment may cause each of the plurality of source signal lines S to perform preliminary charge / discharge (discharge) by grounding each of the plurality of source signal lines S to the ground. It can be configured.

As shown in FIG. 7, the preliminary charge / discharge control means 20 includes a plurality of switches 23a to 23f for each source signal line S. One end of each switch 23 is connected to the corresponding source signal line S. The other end of each switch 23 is grounded, and is configured to be able to discharge the charge stored in the corresponding source signal line S to the ground potential.

The operation timing of each of the switches 23a to 23f is controlled by the controller 21 provided in the preliminary charge / discharge control means 20 (that is, the on / off timing). The controller 21 controls preliminary charge / discharge for each of the source signal lines S (n) to (n + 5) by controlling the operation timing of each of the switches 23a to 23f.

(Operation example of display device 1)
Next, the pre-charge / discharge operation and the write operation by the display device 1 according to the second embodiment will be described with reference to FIGS. FIG. 8 is a diagram illustrating an operation for each period of the display device 1 according to the second embodiment. FIG. 9 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the second embodiment. FIG. 10 is a diagram illustrating a state in the third writing period of the display device 1 according to the second embodiment.

As shown in FIG. 8, in one horizontal period in the display device 1 according to the second embodiment, as in the display device 1 according to the first embodiment, a precharge period, a first writing period, and a second writing are sequentially performed. A period, a third writing period, a fourth writing period, a fifth writing period, and a sixth writing period.

FIG. 8 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period. In FIG. 8, “W” indicates that a source signal is written to the source signal line S. In FIG. 8, “G” indicates that the source signal line S is grounded to perform the pre-charge / discharge.

(Preliminary charging period)
Here, the operation of the display device 1 during the preliminary charging period will be described. In the preliminary charging period, the display device 1 performs preliminary charging / discharging on each of the source signal lines S (n) to (n + 5) as shown in FIG.

Specifically, as shown in FIG. 9, the display device 1 turns on all the switches 23a to 23f to ground all the source signal lines S to the ground. As a result, each of the source signal lines S (n) to (n + 5) performs preliminary charge / discharge.

On the other hand, in this preliminary charging period, the display device 1 does not write the source signal to any of the source signal lines S (n) to (n + 5) as shown in FIG.

Therefore, during this preliminary charging period, the display device 1 keeps all the switches 34a to 34f OFF.

The display device 1 performs the above writing and performs preliminary charging / discharging by turning on the corresponding switch 23 for the source signal line S capable of preliminary charging / discharging.

The source signal lines S that can be precharged and discharged in the first to sixth writing periods are source signal lines excluding the source signal line S for which the source signal has already been written and the source signal line S to which the source signal is to be written. S.

The source signal line S to be precharged / discharged in each writing period is as shown in FIG. 8. As an example, referring to FIG. 10, the display device 1 in the third writing period. Will be described. In the third writing period, the display device 1 writes the source signal to the source signal line S (n + 2), and simultaneously reserves the source signal lines S (n + 3) to (n + 5). Discharge.

At this time, as shown in FIG. 10, each of the switches 23d to 23f corresponding to the source signal lines S corresponds to the source signal lines S (n + 3) to (n + 5) that can be precharged / discharged. Set to ON. As a result, each of the source signal lines S (n + 3) to (n + 5) is grounded to the ground, and the source signal line S (n + 3) until each potential of the source signal lines S (n + 3) to (n + 5) becomes the ground potential. ) To (n + 5) are discharged.

(effect)
As described above, the display device 1 according to the second embodiment performs the preliminary charge / discharge for the source signal line S that can be precharged / discharged not only during the period in which the source signal is not written but also in the period in which the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 of Embodiment 2 can shorten the writing time of the source signal as compared with the conventional display device, and thus can further reduce power consumption.

In particular, the display device 1 according to the second embodiment discharges the electric charge stored in the source signal line S by grounding the source signal line S to the ground. For this reason, even when it is difficult to short-circuit the source signal lines S, such as when the source signal lines S having different positive and negative source signal potentials are not adjacent to each other, preliminary charge / discharge is performed on the source signal line S. Can be done. In addition, since the source signal line S that is a short circuit partner is not required, more precharge periods can be provided for each source signal line S.

Note that discharging the charge stored in the source signal line S means that the potential of the source signal line S is brought close to the ground potential. Therefore, the display device 1 according to the second embodiment uses the reference potential as the reference potential. This is effective when the ground potential is used.

(Embodiment 3)
Next, a third embodiment of the present invention will be described. In the first and second embodiments, the source signal is written by one source output amplifier 36. In the third embodiment, an example in which source signal writing is performed in parallel by two

source output amplifiers

37 and 38 will be described. In the display device 1 according to the third embodiment, points other than those described below are the same as the configuration of the display device 1 according to the first embodiment, and thus description thereof is omitted.

(Configuration example of source driver 30)
First, a configuration example of the source driver 30 will be described. FIG. 11 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the third embodiment. As shown in FIG. 11, the source driver 30 of the third embodiment includes a number of source output amplifiers that are smaller than the number of source signal lines S. In particular, the source driver 30 of the third embodiment includes two

source output amplifiers

37 and 38.

The source output amplifier 37 (second source output amplifier) is for supplying a source signal (−) having a negative source signal potential. On the other hand, the source output amplifier 38 (first source output amplifier) is for supplying a source signal (+) having a positive source signal potential.

That is, the source output amplifier 36 of the first embodiment supplies both the source signal (+) and the source signal (−), whereas the

source output amplifiers

37 and 38 of the third embodiment Only one of (+) and source signal (-) is supplied.

Thereby, the source driver 30 of the third embodiment supplies the source signal (+) from the source output amplifier 37 when supplying the source signal (−) to each of the plurality of source signal lines S. In this case, the source signal is supplied from the source output amplifier 38.

Accordingly, switching means 32 for switching the source signal line S to which the source signals output from the

source output amplifiers

37 and 38 are supplied is provided on the output side of each of the

source output amplifiers

37 and 38. Yes.

For example, in the example shown in FIG. 11, the switching means 32 includes a plurality of switches 34a to 34f for each source signal line S. Further, the switching unit 32 includes a plurality of switches 35a to 35f for each source signal line S.

One end of each switch 34 is connected to the corresponding source signal line S, and the other end of each switch 34 is connected to the output terminal of the source output amplifier 37. That is, the switches 34a to 34f are for switching the source signal line S to which the source signal output from the source output amplifier 37 is supplied.

On the other hand, one end of each switch 35 is connected to the corresponding source signal line S, and the other end of each switch 35 is connected to the output terminal of the source output amplifier 38. That is, the switches 35a to 35f are for switching the source signal line S to which the source signal output from the source output amplifier 38 is supplied.

The operation (ie, on / off) of each switch 34, 35 is controlled by the controller 33 provided in the switching means 32.

(Write operation by the source driver 30)
When the source signal (−) is supplied to a certain source signal line S, the controller 33 turns on the switch 34 corresponding to the source signal line S. At this time, the other switches 34 remain OFF. As a result, the source output amplifier 37 and the source signal line S are electrically connected, and the source signal (−) output from the source output amplifier 37 is supplied to the target source signal line S.

On the other hand, when the source signal (+) is supplied to a certain source signal line S, the controller 33 turns on the switch 35 corresponding to the source signal line S. At this time, the other switches 35 remain OFF. Thereby, the source output amplifier 38 and the source signal line S are electrically connected, and the source signal (+) output from the source output amplifier 38 is supplied to the target source signal line S.

Each time the source signal is output from the

source output amplifiers

37 and 38, the controller 33 switches the switch to be turned on according to the source signal line S that is the output destination of the source signal. As a result, a source signal is supplied to each of the plurality of source signal lines S.

For example, as will be described with reference to FIG. 12 and subsequent figures, one horizontal period in the display device 1 of the third embodiment includes a preliminary charging period, a first writing period, a second writing period, and a third writing period in order. include.

Here, the source driver 30 of the third embodiment simultaneously supplies the source signal (−) by the source output amplifier 37 and the source signal (+) by the source output amplifier 38 in each writing period. As a result, writing to each of the six source signal lines S (source signal lines S (n) to (n + 5)) in three writing periods (first to third writing periods) is realized.

Each time the writing period is switched, the controller 33 switches the corresponding switches 34 and 35 to ON and switches the other switches 34 and 35 to OFF. Accordingly, in each writing period, the corresponding second source signal line S is connected to the source output amplifier 37, and the source signal (−) output from the source output amplifier 37 is connected to the source signal line S. Will be supplied. At the same time, the corresponding first source signal line S is connected to the source output amplifier 38, and the source signal (+) output from the source output amplifier 38 is supplied to the source signal line S.

(Operation example of display device 1)
Next, the pre-charge / discharge operation and the write operation by the display device 1 according to the third embodiment will be described with reference to FIGS. FIG. 12 is a diagram illustrating an operation for each period of the display device 1 according to the third embodiment. FIG. 13 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the third embodiment. FIG. 14 is a diagram illustrating a state in the second writing period of the display device 1 according to the third embodiment.

As shown in FIG. 12, one horizontal period in the display device 1 according to the third embodiment includes a preliminary charging period, a first writing period, a second writing period, and a third writing period in this order. . The precharge period is a precharge period for each of the source signal lines S (n) to (n + 5). The first to third writing periods are writing periods for the source signal lines S (n) to (n + 5).

FIG. 12 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period. In FIG. 12, “W” indicates that the source signal is written to the source signal line S. In FIG. 12, “◯” means a terminal of the source signal line S, that is, the solid line connecting the terminals is short-circuited between the source lines S. Indicates that pre-charging / discharging is performed.

Specifically, the display device 1 turns on all the switches 22a to 22c provided between adjacent source signal lines S as shown in FIG. As a result, all adjacent source signal lines S are short-circuited to perform preliminary charging / discharging. This is the same as the display device 1 of the first embodiment.

(First writing period)
In the first writing period, the source driver 30 writes a source signal to the source signal lines S (n) and (n + 1).

For example, when the pixel row L (m) is selected, the source signal (−) is written to the source signal line S (n), and at the same time, the source signal ( Write (+).

Therefore, the controller 33 turns on the switch 34a corresponding to the source signal line S (n), turns on the switch 35b corresponding to the source signal line S (n + 1), and turns off the other switches. .

(Second writing period)
In the second writing period, the source driver 30 writes a source signal to the source signal lines S (n + 2) and (n + 3).

For example, when the pixel row L (m) is selected, the source signal (−) is written to the source signal line S (n + 2), and at the same time, the source signal ( Write (+).

For this reason, the controller 33 turns on the switch 34c corresponding to the source signal line S (n + 2), turns on the switch 35d corresponding to the source signal line S (n + 3), and turns off the other switches. .

(Third writing period)
In the third writing period, the source driver 30 writes a source signal to the source signal lines S (n + 4) and (n + 5).

For example, when the pixel row L (m) is selected, the source signal (−) is written to the source signal line S (n + 4) and at the same time the source signal (−) is applied to the source signal line S (n + 5). Write (+).

Therefore, the controller 33 turns on the switch 34e corresponding to the source signal line S (n + 4), turns on the switch 35f corresponding to the source signal line S (n + 5), and turns off the other switches. .

(Preliminary charge / discharge during the first to third writing periods)
In the first to third writing periods, the display device 1 performs preliminary charging / discharging by turning on the corresponding switch 23 for the source signal line S capable of preliminary charging / discharging. The source signal line S that can be precharged / discharged here is a source signal line S excluding the source signal line S for which the source signal has already been written and the source signal line S to which the source signal is to be written.

In FIG. 12, which source signal line S is precharged / discharged in each period is as shown in FIG. 12, but as an example, referring to FIG. The operation will be described. In the second writing period, the display device 1 writes the source signal to the source signal lines S (n + 2) and (n + 3), and at the same time writes the source signal to the source signal lines S (n + 4) and (n + 5). Perform pre-charging and discharging.

For the above writing, the controller 33 of the switching means 32 turns on the switch 34c corresponding to the source signal line S (n + 2) as shown in FIG. As a result, the source output amplifier 37 and the source signal line S (n + 2) are electrically connected, and the source signal (−) output from the source output amplifier 37 is written to the source signal line S (n + 2).

At the same time, the controller 33 of the switching means 32 turns on the switch 35d corresponding to the source signal line S (n + 3) as shown in FIG. Thereby, the source output amplifier 38 and the source signal line S (n + 3) are electrically connected, and the source signal (+) output from the source output amplifier 38 is written to the source signal line S (n + 3).

12 to 14 show the state of each switch in a certain frame period. When the frame period is switched, the controller 33 is arranged so that the positive / negative of the source signal supplied to each source signal line S is inverted. In the above description, the part in which the switch 34 is turned on is controlled to turn on the corresponding switch 35, and the part in which the switch 35 is turned on corresponds. The switch 34 is controlled to be turned on.

As a result, the sign of each pixel of the display device 1 is inverted with respect to FIGS. 13 and 14, but the source signal (+) is written in each pixel row of the display device 1 as in FIGS. The pixels in which the source signal (−) is written alternately exist. Each of the pixel columns of the display device 1 includes only one of the pixel to which the source signal (+) is written and the pixel to which the source signal (−) is written, as in FIGS. It will be.

(effect)
As described above, the display device 1 according to the third embodiment performs the preliminary charging / discharging on the source signal line S that can be pre-charged / discharged not only during the period when the source signal is not written but also during the period when the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 of Embodiment 3 can shorten the writing time of the source signal as compared with the conventional display device, and thus can further reduce power consumption.

In particular, the display device 1 according to the third embodiment has a configuration in which only two source output amplifiers are provided and a source signal is supplied from the source output amplifier to each of a plurality of source signal lines. As a result, the number of source output amplifiers for supplying source signals can be greatly reduced, and the cost associated with the source driver can be reduced.

Further, the display device 1 according to the third embodiment can reduce the total amount of steady current required by the source output amplifier by reducing the number of source output amplifiers. Therefore, the display device 1 of the third embodiment can further reduce the power consumption.

Further, the display device 1 of the third embodiment uses the

source output amplifiers

37 and 38 that supply only one of the source signal (+) and the source signal (−). As a result, compared to a configuration using a source output amplifier that supplies both the source signal (+) and the source signal (−), the withstand voltage design range of each source output amplifier is kept on one of the positive side and the negative side. Since it can be narrowed, the power consumption of each source output amplifier can be reduced. Therefore, the display device 1 of the third embodiment can further reduce the power consumption.

Furthermore, the display device 1 of Embodiment 3 writes the source signal (+) and the source signal (−) in parallel. Thus, the source signal writing period can be shortened. For example, in the first embodiment, when the source signals for the six source signal lines S are performed, six write periods are required, whereas in the third embodiment, the source signals for the six source signal lines S are performed. Only three writing periods are required. The fact that the source signal writing period can be shortened means that the horizontal scanning period can be shortened. Therefore, the display device 1 according to the third embodiment can display more images within a predetermined unit time, and as a result, display image quality can be improved.

(Embodiment 4)
Next, a fourth embodiment of the present invention will be described. In the first to third embodiments, the source signals are written in the arrangement order of the source signal lines S (n) to (n + 5). That is, after writing a source signal to a certain source signal line S, writing of the source signal to an adjacent source signal line S is continued.

In the fourth embodiment, an example will be described in which source signals are written to the source signal lines S (n) to (n + 5) in an order not to continue writing to the adjacent source signal lines S. In the display device 1 according to the fourth embodiment, points other than those described below are the same as the configuration of the display device 1 according to the first embodiment, and thus description thereof is omitted.

(Configuration Example of Preliminary Charge / Discharge Control Unit 20)
First, a configuration example of the preliminary charge / discharge control unit 20 will be described. FIG. 15 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the fourth embodiment.

As shown in FIG. 15, in addition to the configuration of the precharge / discharge control unit 20 of the first embodiment, the precharge / discharge control unit 20 of the fourth embodiment further includes a plurality of switches 23a to 23f for each source signal line S. And switches 22d and e.

One end of each switch 23 is connected to the corresponding source signal line S. The other end of each switch 23 is grounded, and is configured to be able to discharge charges stored in the corresponding source signal line S.

That is, the preliminary charge / discharge control means 20 of the fourth embodiment has both a configuration in which the source signal lines are short-circuited to perform preliminary charge / discharge and a configuration in which the source signal lines are grounded to the ground to perform preliminary charge / discharge. It has.

In response to this, the controller 21 provided in the preliminary charge / discharge control means 20 operates each switch 23a to 23f (ie, on / off timing) and each switch 22a to 22e (ie, on / off). Are configured to control each of them.

The controller 21 controls the operation timing of each of the switches 22a to 22e and the operation timing of each of the switches 23a to 23f, so that the precharge period for each of the source signal lines S (n) to (n + 5) is controlled. To control.

(Example of operation of preliminary charge / discharge control means 20)
Next, the pre-charge / discharge operation and the write operation by the display device 1 according to the fourth embodiment will be described with reference to FIGS. FIG. 16 is a diagram illustrating an operation for each period of the display device 1 according to the fourth embodiment. FIG. 17 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the fourth embodiment. FIG. 18 is a diagram illustrating a state in the third writing period of the display device 1 according to the fourth embodiment.

As shown in FIG. 16, in one horizontal period in the display device 1 according to the fourth embodiment, as in the display device 1 according to the first embodiment, a preliminary charging period, a first writing period, and a second writing are sequentially performed. A period, a third writing period, a fourth writing period, a fifth writing period, and a sixth writing period.

FIG. 16 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period. In FIG. 16, “W” indicates that the source signal line is written to the source signal line S. In FIG. 16, “G” indicates that the source signal line S is grounded to perform the pre-charge / discharge. In FIG. 16, “◯” means a terminal of the source signal line S, that is, the solid line connecting the terminals is short-circuited between the source lines S. Indicates that pre-charging / discharging is performed.

(Preliminary charging period)
First, the operation of the display device 1 during the preliminary charging period will be described. In the preliminary charging period, the display device 1 performs preliminary charging / discharging on each of the source signal lines S (n) to (n + 5) as shown in FIG.

Specifically, as shown in FIG. 17, the display device 1 turns on all the adjacent source signal lines S by turning on all the switches 22a to 22c provided between the adjacent source signal lines S. Short circuit. This is the same as the display device 1 of the first embodiment.

(First to sixth writing periods)
Next, the operation of the display device 1 in the first to sixth writing periods will be described. In the first to sixth writing periods, the display device 1 sequentially writes source signals to the source signal lines S (n) to (n + 5) as shown in FIG.

At this time, the display device 1 writes source signals to the source signal lines S (n) to (n + 5) in an order that does not continue writing to the adjacent source signal lines S.

For example, in the example shown in FIG. 16, the display device 1 writes the source signals in the order of the source signal lines S (n), (n + 3), (n + 5), (n + 2), (n + 4), and (n + 1). .

The display device 1 performs the above writing and performs preliminary charging / discharging by turning on the corresponding switch 22 or 23 for the source signal line S capable of preliminary charging / discharging. That is, the display device 1 performs preliminary charge / discharge by short-circuiting the adjacent source signal line S or grounding the source signal line S that can be pre-charged / discharged.

Here, the source signal lines S that can be precharged / discharged are the source signal lines S excluding the source signal line S for which the source signal has already been written and the source signal line S to which the source signal is to be written.

In the fourth embodiment, as a pre-charge / discharge method for each source signal line S, both a method of short-circuiting the adjacent source signal line S and a method of grounding to the ground are provided. Any method may be used for the preliminary charging / discharging, but in the example shown in FIG. 16, the method of short-circuiting with the adjacent source signal line S is preferentially adopted. If pre-charging / discharging by this method cannot be performed, a method of grounding to ground is adopted. As a result, the ground potential is less likely to be disturbed than when the grounding to the ground is preferentially used, and display noise and display disorder due to this are less likely to occur.

In FIG. 16, which source signal line S is precharged / discharged in each period is as shown in FIG. 16. As an example, referring to FIG. The operation will be described. In the third writing period, the display device 1 writes the source signal to the source signal line S (n + 5), and at the same time, the source signal line S (n + 1), (n + 2), (n + 4). Perform pre-charging and discharging.

For the above writing, the controller 33 of the switching means 32 turns on the switch 34f corresponding to the source signal line S (n + 5) as shown in FIG. Thus, the source output amplifier 36 and the source signal line S (n + 5) are electrically connected, and the source signal output from the source output amplifier 36 is written to the source signal line S (n + 5).

At this time, the display device 1 performs preliminary charge / discharge on the source signal lines S (n + 1), (n + 2), and (n + 4) that can be precharged / discharged. The source signal lines S (n + 1) and (n + 2) are adjacent to each other. For this reason, the display device 1 short-circuits the source signal lines S (n + 1) and (n + 2) by turning on the switch 22d provided therebetween, and precharges the source signal lines S with each other. Let the discharge occur.

On the other hand, since the source signal line S (n + 4) does not have the adjacent prechargeable / dischargeable source signal line S, the display device 1 turns on the switch 23e to turn the source signal line S (n + 4) to the ground. And the charge stored in the source signal line S (n + 4) is discharged.

(effect)
As described above, the display device 1 according to the fourth embodiment performs preliminary charge / discharge on the source signal line S that can be precharged / discharged not only during a period during which the source signal is not written but also during a period during which the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 of Embodiment 4 can shorten the writing time of the source signal as compared with the conventional display device.

In particular, in the fourth embodiment, source signals are written to a plurality of source signal lines S in an order not to continue writing to adjacent source signal lines S.

This can suppress the generation of parasitic capacitance between adjacent source signal lines. The parasitic capacitance leads to fluctuations in the voltage level of the image data written in the pixels and causes display blurring. Therefore, the display device 1 according to the fourth embodiment can suppress the generation of the parasitic capacitance, and as a result, display image quality can be improved.

(Embodiment 5)
Next, a fifth embodiment of the present invention will be described. In the display device 1 according to the fifth embodiment, points other than those described below are the same as the configuration of the display device 1 according to the fifth embodiment, and thus description thereof is omitted.

The display device of the present invention does not write pixel rows in the arrangement order for all pixel rows, but does not write pixel rows in the arrangement order for at least some of the pixel rows. This can also be applied to a display device adopting as a display driving method.

As an example, the display device 1 of Embodiment 5 writes the source signal only to the pixels in the even-numbered pixel rows and the source signal only to the pixels in the odd-numbered pixel rows every time the frame period is switched. An interlaced drive system that switches between writing and supply is adopted.

That is, a source signal is written only to even-numbered pixel rows in a certain frame period, and a source signal is written only to odd-numbered pixel rows in the next frame period.

Hereinafter, an operation example of the display device 1 according to the fifth embodiment will be described. The display device 1 alternately performs the operation in the first frame period and the operation in the second frame period shown below. Note that the first frame period and the second frame period respectively include first and second horizontal periods according to the number of pixel rows being four.

Since each horizontal period includes the preliminary charging period and the first to sixth writing periods, and the writing operation and the preliminary charging / discharging operation in each period are the same as in the first embodiment, description thereof is omitted.

(First frame period)
In the first frame period, only the odd-numbered pixel rows are selected, and the source signal is written only to the odd-numbered pixels.

(First frame period: first horizontal period)
In this period, the pixel row L (m) illustrated in FIG. 2 and the like is selected, and the source signal is written only to the pixels in the pixel row L (m).

(First frame period: second horizontal period)
In this period, the pixel row L (m + 2) shown in FIG. 2 or the like is selected, and the source signal is written only to the pixels in the pixel row L (m + 2).

(Second frame period)
In the second frame period, only even-numbered pixel rows are selected, and source signals are written only to even-numbered pixels.

(Second frame period: first horizontal period)
In this period, the pixel row L (m + 1) shown in FIG. 2 or the like is selected, and the source signal is written only to the pixels in the pixel row L (m + 1).

(Second frame period: second horizontal period)
In this period, the pixel row L (m + 3) shown in FIG. 2 and the like is selected, and the source signal is written only to the pixels in the pixel row L (m + 3).

(effect)
As described above, in the display device 1 according to the fifth embodiment, pixel rows to be written in each frame period are limited to even rows or odd rows. Accordingly, the number of times of writing source signals can be reduced, so that power consumption can be further reduced.

Also in this case, since the source signal potential is inverted in each source signal line S, the same effect as in the first embodiment can be obtained by performing the pre-charge / discharge similarly to the first embodiment.

Note that the present invention can be applied not only to a display device that employs interlaced driving in the writing order but also to a display device that employs interlaced driving in a writing order other than the above.

For example, in the above writing order, every time one line is written, one line is skipped and the next line is written. However, every time one line is written, a plurality of lines are skipped and the next line is written. May be written. Further, every time a plurality of lines are written, one line or a plurality of lines may be skipped and the next line may be written.

That is, the writing unit of the pixel row may be one row or a plurality of rows, and the number of pixel rows to be skipped after writing may be one row or a plurality of rows.

In the above writing order, a part of pixel rows (for example, even-numbered pixel rows) is written in a certain frame period, and the remaining pixel rows (for example, odd-numbered pixel rows) in the next frame period. It was decided to write. That is, in the above writing order, writing to all pixel rows is performed in two frame periods. However, writing to all pixel rows may be performed in one frame period, and the writing is performed over three or more frame periods. Thus, writing may be performed for all the pixel rows.

For example, some pixel rows (for example, even-numbered pixel rows) are written in the first half of a frame period, and the remaining pixel rows (for example, odd-numbered pixel rows) are written in the second half of the frame period. (That is, writing to all pixel rows may be performed in one frame).

At this time, the source signal (+) is written to all the pixels in the partial pixel row in the first half of the frame period, and the source signal is applied to all the pixels in the remaining pixel row in the second half of the frame period. (-) May be written.

That is, it is preferable to perform writing of the source signal (+) and writing of the source signal (−) in a certain unit while adopting interlace driving. As a result, the number of switching of the source signal output (switching from the source signal (+) to the source signal (−) and switching from the source signal (−) to the source signal (+)) can be reduced. Low power can be realized.

(Modification)
Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims. That is, embodiments obtained by combining technical means appropriately modified within the scope of the claims are also included in the technical scope of the present invention.

(Modification of display drive system)
Here, with reference to FIGS. 19 to 21, a modified example of the display driving method adopted by the source driver 30 will be described. In the description so far, the case where the source driver 30 adopts the source inversion driving (first display driving method) has been described.

The source driver 30 can employ a display driving method other than the first display driving method.

Therefore, here, the second to fourth display driving methods that can be adopted by the source driver 30 will be described.

(Second display drive method)
First, the second display driving method that can be adopted by the source driver 30 will be described with reference to FIG. FIG. 19 is a diagram showing the display panel 2 in a state where a source signal is written by the second display driving method.

As already described, the display panel 2 is composed of a plurality of pixel blocks. Here, one of the pixel blocks will be described.

According to the second display driving method, the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row) every time the gate signal line G (pixel row) is selected. The source signal is written while inverting the positive / negative of the voltage supplied from the signal (from the reference voltage) for each pixel.

Thereby, in each pixel row on the display panel 2, as shown in FIG. 19, a pixel to which the source signal (+) is written and a pixel to which the source signal (−) is written alternately exist. This is the same as the first display driving method.

On the other hand, when attention is paid to each source signal line S (pixel column), the source driver 30 supplies a voltage supplied as a source signal (from the reference voltage) to a plurality of pixels on each source signal line S (pixel column). The source signal is written by inverting the positive / negative of each pixel.

As a result, on the display panel 2, as shown in FIG. 19, the pixel to which the source signal (+) is written and the pixel to which the source signal (−) is written in any of the plurality of pixel columns and the plurality of pixel rows. Are alternately present. Such a second display driving method can be referred to as “dot inversion driving”.

Further, when the configuration in which the polarity of each pixel is inverted in the frame period is also adopted, the display panel 2 changes between the state shown in FIG. 19 and the state in which the sign of each pixel is inverted from FIG. 19 for each frame period. Can be alternated.

(Third display driving method)
Next, a third display driving method that can be adopted by the source driver 30 will be described with reference to FIG. FIG. 20 is a diagram showing the display panel 2 in a state where a source signal is written by the third display driving method.

According to the third display driving method, each time the gate signal line G (pixel row) is selected, the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row). The source signal is written without inverting the sign (from the reference voltage) of the voltage supplied as the signal for each pixel.

As a result, each pixel row on the display panel 2 has only one of the pixel to which the source signal (+) is written and the pixel to which the source signal (−) is written, as shown in FIG. .

As a result, as shown in FIG. 20, on the display panel 2, the gate signal line G in which only the pixel to which the source signal (+) is written exists and the gate signal in which only the pixel to which the source signal (−) is written exist. Lines G are alternately present.

Furthermore, when the configuration in which the polarity of each pixel is inverted in the frame period is also adopted, the display panel 2 has the state shown in FIG. 20 and the state in which the sign of each pixel is inverted from FIG. Can be alternated.

(Fourth display drive method)
Next, a fourth display driving method that can be adopted by the source driver 30 will be described with reference to FIG. FIG. 21 is a diagram showing the display panel 2 in a state where a source signal is written by the fourth display driving method.

According to the fourth display driving method, the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row) every time the gate signal line G (pixel row) is selected. The source signal is written without inverting the sign (from the reference voltage) of the voltage supplied as the signal for each pixel.

Further, even if attention is paid to each source signal line S (pixel column), the source driver 30 supplies a reference voltage (reference) to the plurality of pixels on each source signal line S (pixel column). Write the source signal without inverting the sign (from voltage) pixel by pixel.

That is, only within the same frame period, the source driver 30 does not invert the positive / negative (from the reference voltage) of the voltage supplied as the source signal for each pixel, without reversing the positive / negative for each pixel. Write signal.

As a result, as shown in FIG. 21, only one of the pixel to which the source signal (+) is written or the pixel to which the source signal (−) is written exists on the display panel 2.

However, the source driver 30 inverts the sign (from the reference voltage) of the voltage supplied as the source signal in the relationship between adjacent pixel blocks.

For example, as shown in FIG. 21, for the pixel block 2A, the source signal (−) is written to all the pixels by the source output amplifier corresponding to this pixel block.

On the other hand, for the pixel block 2B adjacent to the pixel block 2A, the source signal (+) is written to all the pixels by the source output amplifier corresponding to this pixel block.

Further, when the configuration in which the polarity of each pixel is inverted in the frame period is also adopted, the display panel 2 changes between the state shown in FIG. 21 and the state in which the polarity of each pixel is inverted from FIG. Can be alternated.

In the first to fifth embodiments, the case where the first display driving method is employed has been described as an example. However, the display device 1 is not limited to the first embodiment even when any of the display driving methods described above is employed. Preliminary charging / discharging can be performed with a configuration similar to that described in the fifth to fifth embodiments, and effects similar to those described in the first to fifth embodiments can be achieved.

That is, the display device of the present invention can be applied to a display device that employs a display driving method other than the first display driving method.

(Summary)
As described above, the display device according to the present embodiment is selected by a display panel having a plurality of gate signal lines and a plurality of source signal lines, a gate driver that sequentially selects and scans the plurality of gate signal lines. A source driver that supplies a source signal from the plurality of source signal lines to each of a plurality of pixels on the gate signal line, and a source signal is supplied to a certain source signal line by the source driver. And a pre-charging / discharging control means for performing pre-charging / discharging with respect to another source signal line.

In the display device, the preliminary charging / discharging control unit short-circuits the other source signal line having a positive source signal potential and the other source signal line having a negative source signal potential. It is preferable to perform preliminary charging / discharging for other signal lines.

According to this configuration, by simply short-circuiting both the source signal line whose source signal potential is positive and the other source signal line whose source signal potential is negative, the source signal potential of these source signal lines is It can be brought close to the reference potential in advance. Thereby, when writing to these source signal lines, the writing time of the source signal can be shortened.

In the display device, it is preferable that the preliminary charge / discharge control unit performs preliminary charge / discharge on the other source signal line by grounding the other source signal line to the ground.

According to this configuration, even when it is difficult to short-circuit the source signal lines, it is possible to perform preliminary charge / discharge on the source signal lines. In addition, since the source signal line of the short-circuit partner is not required, the opportunity for pre-charging / discharging increases, so that more pre-charging periods can be provided for each source signal line.

Further, in the display device, the source driver outputs one source output amplifier, and each time the one source output amplifier outputs a source signal, the supply destination of the source signal is selected from among the plurality of source signal lines. Switching means for switching to the source signal line to be supplied with the source signal.

In particular, the switching means has a switch for connecting and disconnecting the source signal line and the one source output amplifier for each of the plurality of source signal lines, and the one source output amplifier receives the source signal. It is preferable to turn on the switch of the source signal line to which the source signal is to be supplied every time it is output.

According to this configuration, since the number of source output amplifiers can be significantly reduced, the cost associated with the source driver can be further reduced. In addition, the total amount of steady current required by the source output amplifier can be further reduced. Therefore, power consumption can be further reduced.

In the display device, the source driver outputs a first source output amplifier that outputs a first source signal having a positive source signal potential and a second source signal having a negative source signal potential. A second source output amplifier; and a switching unit that switches a supply destination of each of the first source signal and the second source signal, and the switching unit includes the first source output amplifier and the first source output amplifier. Each time a source signal is output, the supply source of the first source signal is switched to the source signal line to which the first source signal of the plurality of source signal lines is to be supplied, and the second source Each time the output amplifier outputs the second source signal, the supply source of the second source signal is changed to the second source signal of the plurality of source signal lines. It is preferable to switch to the source signal line to be fed.

In particular, the switching means includes, for each of the plurality of source signal lines, a first switch for connecting and disconnecting the source signal line and the first source output amplifier, the source signal line, and the second source signal line. A second switch for connecting and disconnecting the first source output amplifier, and each time the first source output amplifier outputs the first source signal, the first source signal is supplied. Each time the first switch of the source signal line to be turned on is turned on and the second source output amplifier outputs the second source signal, the source signal line to which the second source signal is to be supplied It is preferable to turn on the second switch.

According to this configuration, compared to a configuration using a source output amplifier that supplies both a source signal having a positive source signal potential and a source signal having a negative source signal potential, the withstand voltage design range of each source output amplifier is Since it can be narrowed by being accommodated in one of the positive side and the negative side, the power consumption of each source output amplifier can be reduced.

In the display device, the output of the first source signal by the first source output amplifier and the output of the second source signal by the second source output amplifier are performed in parallel. Accordingly, it is preferable that the supply of the first source signal to the source signal line and the supply of the second source signal to the source signal line are performed in parallel.

According to this configuration, the source signal writing period can be shortened. That is, since the horizontal scanning period can be shortened, more images can be displayed within a predetermined unit time, and as a result, the display image quality can be improved. That is, an image can be displayed more efficiently.

In the display device, it is preferable that the source driver supplies source signals to a plurality of source signal lines in an order in which source signals are not continuously supplied to adjacent source signal lines.

According to this configuration, generation of parasitic capacitance between adjacent source signal lines can be suppressed. This parasitic capacitance leads to fluctuations in the voltage level of the image data written in the pixels, and causes display blurring.

In the display device, the source driver writes a source signal to pixels in a part of the plurality of pixel rows and outputs source signals to pixels in the remaining pixel rows of the plurality of pixel rows. It is preferable to perform writing by alternately switching.

According to this configuration, for example, by performing the switching in the frame period, the number of times of writing the source signal in each frame period can be reduced. Therefore, power consumption can be further reduced.

In the display device, the source driver includes, for each pixel row, a pixel in which a source signal having a positive source signal potential is written and a pixel in which a source signal having a negative source signal potential is written. Source signals are written so that they exist alternately, and for each pixel column, a pixel to which a source signal having a positive source signal potential is written or a source signal having a negative source signal potential is written. It is preferable to employ the first display driving method for writing the source signal so that only one of the pixels is present.

According to this configuration, even when the first display driving method is adopted, the same effect as that of the display device can be obtained.

In the display device, the source driver includes, for each pixel row, a pixel to which a source signal having a positive source signal potential is written and a pixel to which a source signal having a negative source signal potential is written. The source signal is written so as to be alternately present, and for each pixel column, the pixel to which the source signal having the positive source signal potential is written and the source signal having the negative source signal potential are written. It is preferable to adopt the second display driving method for writing the source signal so that the pixels are alternately present.

According to this configuration, even when the second display driving method is adopted, the same effect as that of the display device can be obtained.

In the above display device, the source driver may be either a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written. A source signal is written so that only one of them exists, and for each pixel column, a pixel to which a source signal having a positive source signal potential is written and a source signal having a negative source signal potential are written. It is preferable to employ the third display driving method for writing the source signal so that the pixels in which the signal is written alternately exist.

According to this configuration, even when the third display driving method is adopted, the same effect as that of the display device can be obtained.

In the above display device, the source driver may be either a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written. A source signal is written so that only one of them exists, and for each pixel column, a pixel to which a source signal having a positive source signal potential is written or a source signal having a negative source signal potential is written It is preferable that the fourth display driving method for writing the source signal is adopted so that only one of the pixels in which is written exists.

According to this configuration, even when the fourth display driving method is adopted, the same effect as that of the display device can be obtained.

The display device according to the present invention can be used in various display devices employing an active matrix method, such as a liquid crystal display device, an organic EL display device, and electronic paper.

DESCRIPTION OF SYMBOLS 1 Display apparatus 2 Display panel 4 Gate driver 8 Common electrode drive circuit 10 Timing controller 13 Power supply generation circuit 20 Preliminary charge / discharge control means 21 Controller 22 Switch 23 Switch 30 Source driver 32 Switching means 33 Controller 34 Switch 35 Switch 36 Source output amplifier 37 Source output amplifier 38 Source output amplifier

Claims

A display panel having a plurality of gate signal lines and a plurality of source signal lines;
A gate driver that sequentially selects and scans the plurality of gate signal lines;
A source driver for supplying a source signal from the plurality of source signal lines to each of the plurality of pixels on the selected gate signal line;
A display device comprising: preliminary charge / discharge control means for performing preliminary charge / discharge on another source signal line while a source signal is being supplied to a certain source signal line by the source driver.
The preliminary charge / discharge control means includes:
The other source signal line having a positive source signal potential and the other source signal line having a negative source signal potential are short-circuited to each other to perform preliminary charge / discharge on the other signal lines. The display device according to claim 1.
The preliminary charge / discharge control means includes:
The display device according to claim 1, wherein precharging / discharging is performed on the other source signal line by grounding the other source signal line to the ground.
The source driver is
One source output amplifier,
Switching means for switching the source signal supply destination to the source signal line to which the source signal is to be supplied among the plurality of source signal lines each time the one source output amplifier outputs the source signal. The display device according to claim 1, wherein the display device is a display device.
The switching means is
A switch for connecting and disconnecting the source signal line and the one source output amplifier for each of the plurality of source signal lines;
5. The display device according to claim 4, wherein each time the one source output amplifier outputs a source signal, the switch of the source signal line to which the source signal is to be supplied is turned on.
The source driver is
A first source output amplifier that outputs a first source signal having a positive source signal potential;
A second source output amplifier that outputs a second source signal having a negative source signal potential;
Switching means for switching the supply source of the first source signal and the second source signal, respectively.
The switching means is
Each time the first source output amplifier outputs the first source signal, the supply source of the first source signal is supplied with the first source signal of the plurality of source signal lines. Switch to the source signal line
Each time the second source output amplifier outputs the second source signal, the second source signal of the plurality of source signal lines is supplied to the destination of the second source signal. The display device according to claim 1, wherein the display device is switched to a power source signal line.
The switching means is
For each of the plurality of source signal lines, a first switch for connecting and disconnecting the source signal line and the first source output amplifier is connected, and the source signal line and the second source output amplifier are connected. And a second switch to disconnect, respectively
Each time the first source output amplifier outputs the first source signal, the first switch of the source signal line to which the first source signal is to be supplied is turned on.
Each time the second source output amplifier outputs the second source signal, the second switch of the source signal line to which the second source signal is to be supplied is turned on. Item 7. The display device according to Item 6.
The output of the first source signal by the first source output amplifier and the output of the second source signal by the second source output amplifier are performed in parallel.
The display according to claim 6 or 7, wherein the supply of the first source signal to the source signal line and the supply of the second source signal to the source signal line are performed in parallel. apparatus.
The source driver is
9. The source signal is supplied to a plurality of source signal lines in an order in which source signals are not continuously supplied to adjacent source signal lines. Display device.
The source driver is
The source signal writing to the pixels of some pixel rows of the plurality of pixel rows and the source signal writing to the pixels of the remaining pixel rows of the plurality of pixel rows are alternately switched. The display device according to any one of claims 1 to 9.
The source driver is
For each pixel row, the source signal is such that the pixel to which the source signal having a positive source signal potential is written and the pixel to which a source signal having a negative source signal potential is written alternately exist. Write
For each pixel column, only one of a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written exists. 11. The display device according to claim 1, wherein a first display driving method for writing a source signal is adopted.
The source driver is
For each pixel row, the source signal is such that the pixel to which the source signal having a positive source signal potential is written and the pixel to which a source signal having a negative source signal potential is written alternately exist. Write
For each pixel column, a pixel to which a source signal having a positive source signal potential is written and a pixel to which a source signal having a negative source signal potential is written alternately exist. The display device according to any one of claims 1 to 10, wherein a second display driving method for writing a source signal is adopted.
The source driver is
For each pixel row, only one of a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written exists. Write source signal,
For each pixel column, a pixel to which a source signal having a positive source signal potential is written and a pixel to which a source signal having a negative source signal potential is written alternately exist. The display device according to any one of claims 1 to 10, wherein a third display driving method for writing a source signal is adopted.
The source driver is
For each pixel row, only one of a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written exists. Write source signal,
For each pixel column, only one of a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written exists. 11. The display device according to claim 1, wherein a fourth display driving method for writing a source signal is adopted.