WO2012157530A1 - Dispositif d'affichage - Google Patents

Dispositif d'affichage Download PDF

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Publication number
WO2012157530A1
WO2012157530A1 PCT/JP2012/062070 JP2012062070W WO2012157530A1 WO 2012157530 A1 WO2012157530 A1 WO 2012157530A1 JP 2012062070 W JP2012062070 W JP 2012062070W WO 2012157530 A1 WO2012157530 A1 WO 2012157530A1
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WIPO (PCT)
Prior art keywords
source signal
source
pixel
display device
signal line
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Application number
PCT/JP2012/062070
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English (en)
Japanese (ja)
Inventor
淳 中田
齊藤　浩二
正実 尾崎
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シャープ株式会社
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Publication of WO2012157530A1 publication Critical patent/WO2012157530A1/fr

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0248—Precharge or discharge of column electrodes before or after applying exact column voltages
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving

Definitions

  • the present invention relates to a display device.
  • Patent Document 1 a period in which a source signal is not written to a source signal line is used as a preliminary charging period, and the source signal lines are short-circuited to each other, thereby performing preliminary charging / discharging between the source signal lines.
  • a technique for performing (charge sharing) is disclosed.
  • JP 2005-208551 A publication date: August 4, 2005
  • the present invention has been made in view of the above problems, and an object thereof is to provide a display device that can further reduce power consumption.
  • a display device includes a display panel having a plurality of gate signal lines and a plurality of source signal lines, a gate driver that sequentially selects and scans the plurality of gate signal lines, A source driver that supplies a source signal from the plurality of source signal lines to each of a plurality of pixels on the selected gate signal line, and the source signal is supplied to a certain source signal line by the source driver. And a preliminary charge / discharge control means for performing preliminary charge / discharge on the other source signal lines.
  • the source signal potential of the source signal line can be made closer to the reference potential. Accordingly, the writing time of the source signal can be shortened as compared with a conventional display device, so that power consumption can be further reduced.
  • the display device According to the display device according to the present invention, it is possible to perform pre-charging / discharging for a longer time, and thus it is possible to reduce the power consumption.
  • FIG. 1 is a diagram illustrating an overall configuration of a display device according to Embodiment 1.
  • FIG. It is a figure which shows the structural example of the source driver which concerns on Embodiment 1, and a preliminary
  • FIG. 3 is a diagram illustrating an operation for each period of the display device according to the first embodiment. It is a figure which shows the state in the preliminary charging period of the display apparatus which concerns on Embodiment 1.
  • FIG. 6 is a diagram illustrating a state in a third writing period of the display device according to the first embodiment.
  • FIG. A change in potential of a certain pair of source signal lines S is shown. It is a figure which shows the structural example of the source driver which concerns on Embodiment 2, and a preliminary
  • FIG. 10 is a diagram illustrating an operation for each period of the display device according to the second embodiment. It is a figure which shows the state in the preliminary charging period of the display apparatus which concerns on Embodiment 2.
  • FIG. 10 is a diagram illustrating a state in a third writing period of the display device according to the second embodiment. It is a figure which shows the structural example of the source driver which concerns on Embodiment 3, and a preliminary
  • FIG. It is a figure which shows the state in the precharge period of the display apparatus which concerns on Embodiment 3.
  • FIG. 10 is a diagram illustrating a state in a second writing period of the display device according to the third embodiment. It is a figure which shows the structural example of the source driver which concerns on Embodiment 4, and a preliminary
  • FIG. 10 is a diagram illustrating an operation for each period of a display device according to a fourth embodiment. It is a figure which shows the state in the preliminary charging period of the display apparatus which concerns on Embodiment 4.
  • FIG. FIG. 10 is a diagram illustrating a state in a third writing period of the display device according to the fourth embodiment. It is a figure which shows the display panel in the state in which the source signal was written by the 2nd display drive system. It is a figure which shows the display panel in the state in which the source signal was written by the 3rd display drive system. It is a figure which shows the display panel in the state in which the source signal was written by the 4th display drive system.
  • FIG. 1 is a diagram illustrating an overall configuration of a display device 1 according to the first embodiment.
  • a display device 1 includes a display panel 2, a gate driver (scanning line driving circuit) 4, a source driver (signal line driving circuit) 30, a common electrode driving circuit 8, a timing controller 10, and a power generation circuit. 13 is provided.
  • an active matrix type liquid crystal display device is employed as the display device 1. Therefore, the display panel 2 of the first embodiment is an active matrix type liquid crystal display panel, and the other components described above are for driving the liquid crystal display panel.
  • the display panel 2 includes a screen composed of a plurality of pixels arranged in a grid, M gate signal lines (scanning signal lines) G for selecting and scanning the screen in a line-sequential manner, and a selected gate.
  • M gate signal lines (scanning signal lines) G for selecting and scanning the screen in a line-sequential manner
  • a selected gate for selecting and scanning the screen in a line-sequential manner
  • N source signal lines (data signal lines) S for supplying source signals (data signals) to the pixels of one row included in the signal line are provided.
  • the gate signal line G and the source signal line S are orthogonal to each other.
  • the gate signal line G connecting the pixels in the m-th row (m is an arbitrary integer) is denoted as G (m).
  • G (m) is a gate signal line G connecting pixels in the 10th row
  • G (m + 1), G (m + 2), and G (m + 3) are in the 11th, 12th, and 13th rows, respectively.
  • a gate signal line G connecting the eye pixels is shown.
  • the source signal line S that connects the pixels in the n-th column (n is an arbitrary integer) is denoted as S (n).
  • S (n) is a source signal line S connecting pixels in the tenth column
  • S (n + 1), S (n + 2), S (n + 3), S (n + 4), and S (n + 5) are respectively
  • S (n + 5) is a source signal line S connecting pixels in the 11th, 12th, 13th, 14th, and 15th columns.
  • the gate driver 4 scans each gate signal line G line-sequentially from the top to the bottom of the screen.
  • the gate driver 4 sequentially outputs to each gate signal line G a voltage for turning on a switching element (TFT) provided in each pixel on the gate signal line G. Accordingly, the gate driver 4 sequentially selects and scans each gate signal line G.
  • TFT switching element
  • the source driver 30 supplies a source signal from each source signal line S to each pixel on the selected gate signal line G. Specifically, the source driver 30 calculates the value of the voltage to be output to each pixel on the selected gate signal line G based on the input video signal (arrow A), and the voltage of that value Are output from the source output amplifier toward each source signal line S. As a result, a source signal is supplied to each pixel on the selected gate signal line G, and the source signal is written.
  • the display device 1 includes a common electrode (not shown) provided for each pixel in the screen.
  • the common electrode driving circuit 8 outputs a predetermined common voltage for driving the common electrode to the common electrode based on a signal (arrow B) input from the timing controller 10.
  • Timing controller 10 outputs a reference signal for each circuit to operate in synchronization with each circuit. Specifically, the timing controller 10 supplies the gate driver 4 with a gate start pulse signal, a gate clock signal GCK, and a gate output control signal GOE (arrow E). The timing controller 10 outputs a source start pulse signal, a source latch strobe signal, and a source clock signal to the source driver 30 (arrow F).
  • the gate driver 4 starts scanning the display panel 2 with the gate start pulse signal received from the timing controller 10 as a cue, and applies to each gate signal line G according to the gate clock signal GCK and the gate output control signal GOE received from the timing controller 10.
  • the selection voltage is sequentially applied. Specifically, the gate driver 4 sequentially selects each gate signal line G according to the received gate clock GCK signal.
  • the gate driver 4 applies a selection voltage to the selected gate signal line G at the timing when the falling edge of the received gate output control signal GOE is detected. As a result, the gate driver 4 scans the selected gate signal line G.
  • the source driver 30 Based on the source start pulse signal received from the timing controller 10, the source driver 30 stores the input image data of each pixel in a register according to the source clock signal, and each source signal of the display panel 2 according to the next source latch strobe signal. Image data is written in line S.
  • the power supply generation circuit 13 generates Vdd, Vdd2, Vcc, Vgh, and Vgl, which are voltages necessary for each circuit in the display device 1 to operate. Then, Vcc, Vgh, and Vgl are output to the gate driver 4, Vdd and Vcc are output to the source driver 30, Vcc is output to the timing controller 10, and Vdd 2 is output to the common electrode drive circuit 8.
  • FIG. 2 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the first embodiment.
  • the display panel 2 includes a plurality of blocks (hereinafter referred to as “pixel blocks”) each including a predetermined number of pixel columns and a predetermined number of pixel rows.
  • pixel blocks each including a predetermined number of pixel columns and a predetermined number of pixel rows.
  • the display panel 2 of the present embodiment includes a plurality of pixel blocks including six pixel columns and four pixel rows.
  • Each pixel block includes six source signal lines S (n) to (n + 5) corresponding to six pixel columns and four pixel rows L (m) to (m + 3).
  • each pixel block As shown in FIG. 2, the configuration of each pixel block is the same, and the operation is also the same. Therefore, hereinafter, in order to make the description easy to understand, a configuration example of the source driver 30 will be described using one of a plurality of pixel blocks included in the display panel 2.
  • a pixel in which “+” is shown is a source signal whose source signal potential is positive in this frame period (first source signal; hereinafter, referred to as “source signal (+)”). Indicates the pixel to be written.
  • a source signal (second source signal; hereinafter referred to as “source signal ( ⁇ )”) in which the source signal potential is negative is written in the pixel indicated by “ ⁇ ” in this frame period. Indicates a power pixel.
  • This frame period alternately includes a frame period in which the sign of the source signal to be written in each pixel is inverted.
  • the source driver 30 includes the number of source output amplifiers 36 that is not the same as the number of source signal lines S as in the conventional display device, but smaller than the number of source signal lines S. ing.
  • the source driver 30 of the first embodiment includes one source output amplifier 36.
  • the source driver 30 of the first embodiment is configured to supply source signals to the plurality of source signal lines S by this one source output amplifier 36.
  • switching means 32 for switching the source signal line S to which the source signal output from the source output amplifier 36 is supplied is provided.
  • the switching means 32 includes a plurality of switches 34a to 34f for each source signal line S. One end of each switch 34 is connected to the corresponding source signal line S. The other end of each switch 34 is connected to the output end of the source output amplifier 36. The operation (ie, on / off) of each switch 34 is controlled by a controller 33 provided in the switching unit 32.
  • the source driver 30 employs the first display driving method. According to the first display driving method, each time the gate signal line G (pixel row) is selected, the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row). The source signal is written while inverting the positive / negative of the voltage supplied from the signal (from the reference voltage) for each pixel.
  • the source driver 30 supplies a voltage supplied as a source signal (from the reference voltage) to a plurality of pixels on each source signal line S (pixel column).
  • the source signal is written without inverting the sign of each pixel.
  • each of the plurality of source signal lines S (pixel columns) has only one of the pixel to which the source signal (+) is written and the pixel to which the source signal ( ⁇ ) is written as shown in FIG. It will not exist.
  • source signal line S (+) the source signal line S in which only the pixel to which the source signal (+) is written exists (hereinafter, referred to as “source signal line S (+)”) on the display panel 2.
  • source inversion driving the display driving method in which the positive / negative of the source signal is inverted for each source signal line S (pixel column) is referred to as “source inversion driving”.
  • the polarity of the source signal supplied to each source signal line S is inverted every time the frame period is switched. For example, when a source signal (+) is written to all the pixels in the even-numbered pixel column and a source signal ( ⁇ ) is written to all the pixels in the odd-numbered pixel column in a certain frame period, the next frame period The source signal ( ⁇ ) is written to all the pixels in the even-numbered pixel column, and the source signal (+) is written to all the pixels in the odd-numbered pixel column.
  • the write operation by the source driver 30 will be specifically described.
  • the controller 33 turns on the switch 34 corresponding to the source signal line S.
  • the other switches 34 remain OFF.
  • the source output amplifier 36 and the source signal line S are electrically connected, and the source signal output from the source output amplifier 36 is supplied to the target source signal line S.
  • the controller 33 selects the switch to be turned on according to the source signal line S to which the source signal is supplied. As a result, a source signal is supplied to each of the plurality of source signal lines S.
  • one horizontal period in the display device 1 of the first embodiment includes, in order, a precharge period, a first writing period, a second writing period, a third writing period, A fourth writing period, a fifth writing period, and a sixth writing period are included.
  • the first to sixth writing periods are writing periods for the source signal lines S (n) to (n + 5).
  • the controller 33 switches the corresponding switch 34 to ON and switches the other switches 34 to OFF.
  • the switch 34 that is already OFF is left OFF.
  • the corresponding source signal line S is connected to the source output amplifier 36, and the source signal output from the source output amplifier 36 is supplied to the source signal line S. .
  • the source driver 30 of this embodiment employs source inversion driving.
  • the source output amplifier 36 supplies the source signal of the source signal to be supplied every time the target source signal line S is switched (that is, every time the writing period is switched) in the first to sixth writing periods. Switches between positive and negative potentials.
  • the display device 1 further includes preliminary charge / discharge control means 20.
  • the preliminary charge / discharge control means 20 controls preliminary charge / discharge with respect to the plurality of source signal lines S.
  • Pre-charging / discharging refers to charging / discharging the source signal line S in advance so that the potential of the source signal line S approaches the target source signal potential for the next writing.
  • parasitic capacitance is generated in the source signal line S in addition to the pixel capacitance. For this reason, when a source signal is written to a certain pixel capacitance of the source signal line S, positive or negative charges of the source signal are stored in the source signal line S.
  • the source driver 30 of this embodiment employs source inversion driving. Therefore, focusing on the same source signal line S, the source signal supplied to the source signal line S is switched between the source signal (+) and the source signal ( ⁇ ) within the same frame period. However, every time the frame period is switched, the source signal supplied to the source signal line S is switched between the source signal (+) and the source signal ( ⁇ ).
  • the source signal line S stores charges whose source signal potential is different from that of the source signal. It has been.
  • the preliminary charge / discharge control means 20 of the first embodiment performs preliminary charge / discharge (charge sharing) between the source signal lines S by short-circuiting the source signal lines S having different positive and negative source signal potentials. .
  • the source driver 30 of the first embodiment performs source inversion driving, focusing on the same frame period, the source signal line S (+) and the source signal line S ( -) Exist alternately.
  • the preliminary charge / discharge control means 20 includes a plurality of switches 22a to 22c. One end of each switch 22 is connected to one source signal line S. The other end of each switch 22 is connected to another source signal line S adjacent to the one source signal line S.
  • the switch 22a has a configuration in which the source signal line S (n) and the source signal line S (n + 1) can be short-circuited, and the source signal lines S can be precharged and discharged. .
  • the switch 22b has a configuration in which the source signal line S (n + 2) and the source signal line S (n + 3) can be short-circuited and the source signal lines S can be precharged and discharged. .
  • the switch 22c has a configuration in which the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, and the source signal lines S can be preliminarily charged / discharged. .
  • the operation timing of each of the switches 22a to 22c is controlled by the controller 21 provided in the preliminary charge / discharge control means 20 (that is, the on / off timing).
  • the controller 21 controls the precharging for each of the source signal lines S (n) to (n + 5) by controlling the operation timing of each of the switches 22a to 22c.
  • FIG. 3 is a diagram illustrating an operation for each period of the display device 1 according to the first embodiment.
  • FIG. 4 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the first embodiment.
  • FIG. 5 is a diagram illustrating a state in the third writing period of the display device 1 according to the first embodiment.
  • a preliminary charging period is a period during which precharge / discharge is performed for each of the source signal lines S (n) to (n + 5).
  • the first to sixth writing periods are writing periods for the source signal lines S (n) to (n + 5).
  • FIG. 3 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period.
  • W indicates that the source signal is written to the source signal line S.
  • ⁇ means a terminal of the source signal line S. That is, the solid line connecting the terminals is short-circuited between the source lines S. Indicates that pre-charging / discharging is performed.
  • Preliminary charging period the operation of the display device 1 during the preliminary charging period will be described.
  • the display device 1 performs preliminary charging / discharging on each of the source signal lines S (n) to (n + 5) as shown in FIG.
  • the display device 1 turns on all the switches 22a to 22c provided between adjacent source signal lines S as shown in FIG.
  • the switch 22a When the switch 22a is turned ON, the source signal line S (n) and the source signal line S (n + 1) are short-circuited, and preliminary charge / discharge is performed between these source signal lines S.
  • the switch 22b when the switch 22b is turned on, the source signal line S (n + 2) and the source signal line S (n + 3) are short-circuited, and preliminary charge / discharge is performed between these source signal lines S.
  • the switch 22c when the switch 22c is turned ON, the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, and preliminary charge / discharge is performed between these source signal lines S.
  • the display device 1 does not write the source signal to any of the source signal lines S (n) to (n + 5) as shown in FIG. Therefore, during this preliminary charging period, the display device 1 keeps all the switches 34a to 34f OFF as shown in FIG.
  • the display device 1 sequentially writes source signals to the source signal lines S (n) to (n + 5) as shown in FIG. Specifically, the display device 1 sequentially turns on the switches 34a to 34f each time the source output amplifier 36 outputs a source signal, so that the source signal lines S (n) to (n + 5) are Write source signals sequentially.
  • the display device 1 performs the above writing and performs preliminary charging / discharging by turning on the corresponding switch 22 for the source signal line S capable of preliminary charging / discharging.
  • the source signal line S that can be precharged / discharged here is a source signal line S other than the source signal line S to which the source signal is written, and the source signal line S for which the source signal has already been written, and the source This is a source signal line S excluding the source signal line S that forms a pair with the source signal line S to which a signal is to be written.
  • the source signal line S to be precharged / discharged in each writing period is as shown in FIG. 3, but as an example, referring to FIG. 5, the display device 1 in the third writing period. Will be described.
  • the display device 1 writes a source signal to the source signal line S (n + 2), and simultaneously reserves the source signal lines S (n + 4) and (n + 5). Discharge.
  • the controller 33 of the switching means 32 turns on the switch 34c corresponding to the source signal line S (n + 2) as shown in FIG.
  • the source output amplifier 36 and the source signal line S (n + 2) are electrically connected, and the source signal output from the source output amplifier 36 is supplied to the source signal line S (n + 2).
  • the display device 1 turns on the switches 22c corresponding to these source signal lines S as shown in FIG. .
  • the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, charges are averaged between these source signal lines S, and preliminary charge / discharge is performed.
  • FIG. 6 shows a change in potential of a certain pair of source signal lines S.
  • FIG. 6A shows a change in potential of a pair of source signal lines S in a conventional display device.
  • FIG. 6B shows a change in potential of a certain pair of source signal lines S in the display device 1 according to the first embodiment.
  • the source lines S (n + 2) and (n + 3) shown in FIG. 2 will be described as an example.
  • positive charges have already been stored in the source line S (n + 2) by the previous writing.
  • negative charges have already been stored in the source line S (n + 3) by the previous writing.
  • the next writing is performed in the third writing period for each of the source lines S (n + 2) and (n + 3).
  • the conventional display device performs preliminary charge / discharge only during the preliminary charge period. Therefore, in the conventional display device, the potentials of the source lines S (n + 2) and (n + 3) can be brought close to the reference potential by the third writing period in which the next writing is performed. Is insufficient, the potentials of the source lines S (n + 2) and (n + 3) cannot reach the reference potential. For this reason, at the time of the next writing, it is necessary to write the shortage to the reference potential + the shortage from the reference potential to the target potential for each of the source lines S (n + 2) and (n + 3).
  • the display device 1 performs pre-charge / discharge not only during the pre-charge period but also during the source signal writing period. For this reason, in the display device 1 of the first embodiment, the potentials of the source lines S (n + 2) and (n + 3) are made to reach the reference potential by the third writing period in which the next writing is performed. Can do. For this reason, at the time of the next writing, only writing of the shortage (V 1 and V 2 in the figure) from the reference potential to the target potential may be performed on each of the source lines S (n + 2) and (n + 3). Therefore, the writing period at the next writing can be shortened.
  • the display device 1 according to the first embodiment performs preliminary charge / discharge on the source signal line S that can be precharged / discharged not only during the period in which the source signal is not written but also in the period in which the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 according to the first embodiment can shorten the writing time of the source signal as compared with the conventional display device, and thus can further reduce power consumption.
  • the display device 1 of the first embodiment employs a configuration in which only one source output amplifier is provided and a source signal is supplied from the source output amplifier to each of a plurality of source signal lines.
  • the number of source output amplifiers for supplying source signals can be greatly reduced, and the cost associated with the source driver can be reduced.
  • the display device 1 of Embodiment 1 can reduce the total amount of steady current required by the source output amplifier by reducing the number of source output amplifiers. Therefore, the display device 1 of the first embodiment can further reduce power consumption.
  • Embodiment 2 Next, Embodiment 2 of the present invention will be described.
  • the source signal line S (+) and the source signal line S ( ⁇ ) are short-circuited to perform preliminary charging / discharging between the source signal lines S.
  • the source signal line S is preliminarily charged / discharged by grounding the source signal line S to the ground.
  • points other than those described below are the same as the configuration of the display device 1 according to the first embodiment, and thus the description thereof is omitted.
  • FIG. 7 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the second embodiment.
  • the preliminary charge / discharge control means 20 of the second embodiment may cause each of the plurality of source signal lines S to perform preliminary charge / discharge (discharge) by grounding each of the plurality of source signal lines S to the ground. It can be configured.
  • the preliminary charge / discharge control means 20 includes a plurality of switches 23a to 23f for each source signal line S. One end of each switch 23 is connected to the corresponding source signal line S. The other end of each switch 23 is grounded, and is configured to be able to discharge the charge stored in the corresponding source signal line S to the ground potential.
  • the operation timing of each of the switches 23a to 23f is controlled by the controller 21 provided in the preliminary charge / discharge control means 20 (that is, the on / off timing).
  • the controller 21 controls preliminary charge / discharge for each of the source signal lines S (n) to (n + 5) by controlling the operation timing of each of the switches 23a to 23f.
  • FIG. 8 is a diagram illustrating an operation for each period of the display device 1 according to the second embodiment.
  • FIG. 9 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the second embodiment.
  • FIG. 10 is a diagram illustrating a state in the third writing period of the display device 1 according to the second embodiment.
  • a precharge period, a first writing period, and a second writing are sequentially performed.
  • FIG. 8 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period.
  • W indicates that a source signal is written to the source signal line S.
  • G indicates that the source signal line S is grounded to perform the pre-charge / discharge.
  • Preliminary charging period the operation of the display device 1 during the preliminary charging period will be described.
  • the display device 1 performs preliminary charging / discharging on each of the source signal lines S (n) to (n + 5) as shown in FIG.
  • the display device 1 turns on all the switches 23a to 23f to ground all the source signal lines S to the ground. As a result, each of the source signal lines S (n) to (n + 5) performs preliminary charge / discharge.
  • the display device 1 does not write the source signal to any of the source signal lines S (n) to (n + 5) as shown in FIG.
  • the display device 1 keeps all the switches 34a to 34f OFF.
  • the display device 1 sequentially writes source signals to the source signal lines S (n) to (n + 5) as shown in FIG. Specifically, the display device 1 sequentially turns on the switches 34a to 34f each time the source output amplifier 36 outputs a source signal, so that the source signal lines S (n) to (n + 5) are Write source signals sequentially.
  • the display device 1 performs the above writing and performs preliminary charging / discharging by turning on the corresponding switch 23 for the source signal line S capable of preliminary charging / discharging.
  • the source signal lines S that can be precharged and discharged in the first to sixth writing periods are source signal lines excluding the source signal line S for which the source signal has already been written and the source signal line S to which the source signal is to be written. S.
  • the source signal line S to be precharged / discharged in each writing period is as shown in FIG. 8.
  • the display device 1 in the third writing period Will be described.
  • the display device 1 writes the source signal to the source signal line S (n + 2), and simultaneously reserves the source signal lines S (n + 3) to (n + 5). Discharge.
  • the controller 33 of the switching means 32 turns on the switch 34c corresponding to the source signal line S (n + 2) as shown in FIG.
  • the source output amplifier 36 and the source signal line S (n + 2) are electrically connected, and the source signal output from the source output amplifier 36 is supplied to the source signal line S (n + 2).
  • each of the switches 23d to 23f corresponding to the source signal lines S corresponds to the source signal lines S (n + 3) to (n + 5) that can be precharged / discharged.
  • each of the source signal lines S (n + 3) to (n + 5) is grounded to the ground, and the source signal line S (n + 3) until each potential of the source signal lines S (n + 3) to (n + 5) becomes the ground potential.
  • To (n + 5) are discharged.
  • the display device 1 performs the preliminary charge / discharge for the source signal line S that can be precharged / discharged not only during the period in which the source signal is not written but also in the period in which the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 of Embodiment 2 can shorten the writing time of the source signal as compared with the conventional display device, and thus can further reduce power consumption.
  • the display device 1 discharges the electric charge stored in the source signal line S by grounding the source signal line S to the ground. For this reason, even when it is difficult to short-circuit the source signal lines S, such as when the source signal lines S having different positive and negative source signal potentials are not adjacent to each other, preliminary charge / discharge is performed on the source signal line S. Can be done. In addition, since the source signal line S that is a short circuit partner is not required, more precharge periods can be provided for each source signal line S.
  • the display device 1 uses the reference potential as the reference potential. This is effective when the ground potential is used.
  • the source signal is written by one source output amplifier 36.
  • the third embodiment an example in which source signal writing is performed in parallel by two source output amplifiers 37 and 38 will be described.
  • points other than those described below are the same as the configuration of the display device 1 according to the first embodiment, and thus description thereof is omitted.
  • FIG. 11 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the third embodiment.
  • the source driver 30 of the third embodiment includes a number of source output amplifiers that are smaller than the number of source signal lines S.
  • the source driver 30 of the third embodiment includes two source output amplifiers 37 and 38.
  • the source output amplifier 37 (second source output amplifier) is for supplying a source signal ( ⁇ ) having a negative source signal potential.
  • the source output amplifier 38 (first source output amplifier) is for supplying a source signal (+) having a positive source signal potential.
  • the source output amplifier 36 of the first embodiment supplies both the source signal (+) and the source signal ( ⁇ ), whereas the source output amplifiers 37 and 38 of the third embodiment Only one of (+) and source signal (-) is supplied.
  • the source driver 30 of the third embodiment supplies the source signal (+) from the source output amplifier 37 when supplying the source signal ( ⁇ ) to each of the plurality of source signal lines S.
  • the source signal is supplied from the source output amplifier 38.
  • switching means 32 for switching the source signal line S to which the source signals output from the source output amplifiers 37 and 38 are supplied is provided on the output side of each of the source output amplifiers 37 and 38. Yes.
  • the switching means 32 includes a plurality of switches 34a to 34f for each source signal line S. Further, the switching unit 32 includes a plurality of switches 35a to 35f for each source signal line S.
  • each switch 34 One end of each switch 34 is connected to the corresponding source signal line S, and the other end of each switch 34 is connected to the output terminal of the source output amplifier 37. That is, the switches 34a to 34f are for switching the source signal line S to which the source signal output from the source output amplifier 37 is supplied.
  • each switch 35 is connected to the corresponding source signal line S, and the other end of each switch 35 is connected to the output terminal of the source output amplifier 38. That is, the switches 35a to 35f are for switching the source signal line S to which the source signal output from the source output amplifier 38 is supplied.
  • each switch 34, 35 is controlled by the controller 33 provided in the switching means 32.
  • the controller 33 turns on the switch 35 corresponding to the source signal line S. At this time, the other switches 35 remain OFF. Thereby, the source output amplifier 38 and the source signal line S are electrically connected, and the source signal (+) output from the source output amplifier 38 is supplied to the target source signal line S.
  • the controller 33 switches the switch to be turned on according to the source signal line S that is the output destination of the source signal. As a result, a source signal is supplied to each of the plurality of source signal lines S.
  • one horizontal period in the display device 1 of the third embodiment includes a preliminary charging period, a first writing period, a second writing period, and a third writing period in order. include.
  • the source driver 30 of the third embodiment simultaneously supplies the source signal ( ⁇ ) by the source output amplifier 37 and the source signal (+) by the source output amplifier 38 in each writing period.
  • writing to each of the six source signal lines S (source signal lines S (n) to (n + 5)) in three writing periods (first to third writing periods) is realized.
  • the controller 33 switches the corresponding switches 34 and 35 to ON and switches the other switches 34 and 35 to OFF. Accordingly, in each writing period, the corresponding second source signal line S is connected to the source output amplifier 37, and the source signal ( ⁇ ) output from the source output amplifier 37 is connected to the source signal line S. Will be supplied. At the same time, the corresponding first source signal line S is connected to the source output amplifier 38, and the source signal (+) output from the source output amplifier 38 is supplied to the source signal line S.
  • FIG. 12 is a diagram illustrating an operation for each period of the display device 1 according to the third embodiment.
  • FIG. 13 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the third embodiment.
  • FIG. 14 is a diagram illustrating a state in the second writing period of the display device 1 according to the third embodiment.
  • one horizontal period in the display device 1 according to the third embodiment includes a preliminary charging period, a first writing period, a second writing period, and a third writing period in this order.
  • the precharge period is a precharge period for each of the source signal lines S (n) to (n + 5).
  • the first to third writing periods are writing periods for the source signal lines S (n) to (n + 5).
  • FIG. 12 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period.
  • W indicates that the source signal is written to the source signal line S.
  • ⁇ means a terminal of the source signal line S, that is, the solid line connecting the terminals is short-circuited between the source lines S. Indicates that pre-charging / discharging is performed.
  • Preliminary charging period the operation of the display device 1 during the preliminary charging period will be described.
  • the display device 1 performs preliminary charging / discharging on each of the source signal lines S (n) to (n + 5) as shown in FIG.
  • the display device 1 turns on all the switches 22a to 22c provided between adjacent source signal lines S as shown in FIG. As a result, all adjacent source signal lines S are short-circuited to perform preliminary charging / discharging. This is the same as the display device 1 of the first embodiment.
  • the source driver 30 writes a source signal to the source signal lines S (n) and (n + 1).
  • the source signal ( ⁇ ) is written to the source signal line S (n), and at the same time, the source signal ( Write (+).
  • the controller 33 turns on the switch 34a corresponding to the source signal line S (n), turns on the switch 35b corresponding to the source signal line S (n + 1), and turns off the other switches. .
  • the source driver 30 writes a source signal to the source signal lines S (n + 2) and (n + 3).
  • the source signal ( ⁇ ) is written to the source signal line S (n + 2), and at the same time, the source signal ( Write (+).
  • the controller 33 turns on the switch 34c corresponding to the source signal line S (n + 2), turns on the switch 35d corresponding to the source signal line S (n + 3), and turns off the other switches. .
  • the source driver 30 writes a source signal to the source signal lines S (n + 4) and (n + 5).
  • the source signal ( ⁇ ) is written to the source signal line S (n + 4) and at the same time the source signal ( ⁇ ) is applied to the source signal line S (n + 5). Write (+).
  • the controller 33 turns on the switch 34e corresponding to the source signal line S (n + 4), turns on the switch 35f corresponding to the source signal line S (n + 5), and turns off the other switches. .
  • the display device 1 performs preliminary charging / discharging by turning on the corresponding switch 23 for the source signal line S capable of preliminary charging / discharging.
  • the source signal line S that can be precharged / discharged here is a source signal line S excluding the source signal line S for which the source signal has already been written and the source signal line S to which the source signal is to be written.
  • FIG. 12 which source signal line S is precharged / discharged in each period is as shown in FIG. 12, but as an example, referring to FIG. The operation will be described.
  • the display device 1 writes the source signal to the source signal lines S (n + 2) and (n + 3), and at the same time writes the source signal to the source signal lines S (n + 4) and (n + 5). Perform pre-charging and discharging.
  • the controller 33 of the switching means 32 turns on the switch 34c corresponding to the source signal line S (n + 2) as shown in FIG.
  • the source output amplifier 37 and the source signal line S (n + 2) are electrically connected, and the source signal ( ⁇ ) output from the source output amplifier 37 is written to the source signal line S (n + 2).
  • the controller 33 of the switching means 32 turns on the switch 35d corresponding to the source signal line S (n + 3) as shown in FIG. Thereby, the source output amplifier 38 and the source signal line S (n + 3) are electrically connected, and the source signal (+) output from the source output amplifier 38 is written to the source signal line S (n + 3).
  • the display device 1 turns on the switches 22c corresponding to these source signal lines S as shown in FIG. .
  • the source signal line S (n + 4) and the source signal line S (n + 5) are short-circuited, charges are averaged between these source signal lines S, and preliminary charge / discharge is performed.
  • each pixel of the display device 1 is inverted with respect to FIGS. 13 and 14, but the source signal (+) is written in each pixel row of the display device 1 as in FIGS.
  • Each of the pixel columns of the display device 1 includes only one of the pixel to which the source signal (+) is written and the pixel to which the source signal ( ⁇ ) is written, as in FIGS. It will be.
  • the display device 1 performs the preliminary charging / discharging on the source signal line S that can be pre-charged / discharged not only during the period when the source signal is not written but also during the period when the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 of Embodiment 3 can shorten the writing time of the source signal as compared with the conventional display device, and thus can further reduce power consumption.
  • the display device 1 has a configuration in which only two source output amplifiers are provided and a source signal is supplied from the source output amplifier to each of a plurality of source signal lines.
  • the number of source output amplifiers for supplying source signals can be greatly reduced, and the cost associated with the source driver can be reduced.
  • the display device 1 according to the third embodiment can reduce the total amount of steady current required by the source output amplifier by reducing the number of source output amplifiers. Therefore, the display device 1 of the third embodiment can further reduce the power consumption.
  • the display device 1 of the third embodiment uses the source output amplifiers 37 and 38 that supply only one of the source signal (+) and the source signal ( ⁇ ).
  • the withstand voltage design range of each source output amplifier is kept on one of the positive side and the negative side. Since it can be narrowed, the power consumption of each source output amplifier can be reduced. Therefore, the display device 1 of the third embodiment can further reduce the power consumption.
  • the display device 1 of Embodiment 3 writes the source signal (+) and the source signal ( ⁇ ) in parallel.
  • the source signal writing period can be shortened.
  • the source signals for the six source signal lines S are performed. Only three writing periods are required.
  • the fact that the source signal writing period can be shortened means that the horizontal scanning period can be shortened. Therefore, the display device 1 according to the third embodiment can display more images within a predetermined unit time, and as a result, display image quality can be improved.
  • the source signals are written in the arrangement order of the source signal lines S (n) to (n + 5). That is, after writing a source signal to a certain source signal line S, writing of the source signal to an adjacent source signal line S is continued.
  • FIG. 15 is a diagram illustrating a configuration example of the source driver 30 and the preliminary charge / discharge control unit 20 according to the fourth embodiment.
  • the precharge / discharge control unit 20 of the fourth embodiment further includes a plurality of switches 23a to 23f for each source signal line S. And switches 22d and e.
  • each switch 23 One end of each switch 23 is connected to the corresponding source signal line S.
  • the other end of each switch 23 is grounded, and is configured to be able to discharge charges stored in the corresponding source signal line S.
  • the preliminary charge / discharge control means 20 of the fourth embodiment has both a configuration in which the source signal lines are short-circuited to perform preliminary charge / discharge and a configuration in which the source signal lines are grounded to the ground to perform preliminary charge / discharge. It has.
  • the controller 21 provided in the preliminary charge / discharge control means 20 operates each switch 23a to 23f (ie, on / off timing) and each switch 22a to 22e (ie, on / off). Are configured to control each of them.
  • the controller 21 controls the operation timing of each of the switches 22a to 22e and the operation timing of each of the switches 23a to 23f, so that the precharge period for each of the source signal lines S (n) to (n + 5) is controlled. To control.
  • FIG. 16 is a diagram illustrating an operation for each period of the display device 1 according to the fourth embodiment.
  • FIG. 17 is a diagram illustrating a state in the preliminary charging period of the display device 1 according to the fourth embodiment.
  • FIG. 18 is a diagram illustrating a state in the third writing period of the display device 1 according to the fourth embodiment.
  • a preliminary charging period, a first writing period, and a second writing are sequentially performed.
  • FIG. 16 shows the operation performed by the display device 1 for each of the source signal lines S (n) to (n + 5) for each period.
  • W indicates that the source signal line is written to the source signal line S.
  • G indicates that the source signal line S is grounded to perform the pre-charge / discharge.
  • ⁇ means a terminal of the source signal line S, that is, the solid line connecting the terminals is short-circuited between the source lines S. Indicates that pre-charging / discharging is performed.
  • the display device 1 turns on all the adjacent source signal lines S by turning on all the switches 22a to 22c provided between the adjacent source signal lines S. Short circuit. This is the same as the display device 1 of the first embodiment.
  • the display device 1 writes source signals to the source signal lines S (n) to (n + 5) in an order that does not continue writing to the adjacent source signal lines S.
  • the display device 1 writes the source signals in the order of the source signal lines S (n), (n + 3), (n + 5), (n + 2), (n + 4), and (n + 1). .
  • the display device 1 performs the above writing and performs preliminary charging / discharging by turning on the corresponding switch 22 or 23 for the source signal line S capable of preliminary charging / discharging. That is, the display device 1 performs preliminary charge / discharge by short-circuiting the adjacent source signal line S or grounding the source signal line S that can be pre-charged / discharged.
  • the source signal lines S that can be precharged / discharged are the source signal lines S excluding the source signal line S for which the source signal has already been written and the source signal line S to which the source signal is to be written.
  • both a method of short-circuiting the adjacent source signal line S and a method of grounding to the ground are provided. Any method may be used for the preliminary charging / discharging, but in the example shown in FIG. 16, the method of short-circuiting with the adjacent source signal line S is preferentially adopted. If pre-charging / discharging by this method cannot be performed, a method of grounding to ground is adopted. As a result, the ground potential is less likely to be disturbed than when the grounding to the ground is preferentially used, and display noise and display disorder due to this are less likely to occur.
  • FIG. 16 which source signal line S is precharged / discharged in each period is as shown in FIG. 16.
  • the display device 1 writes the source signal to the source signal line S (n + 5), and at the same time, the source signal line S (n + 1), (n + 2), (n + 4). Perform pre-charging and discharging.
  • the controller 33 of the switching means 32 turns on the switch 34f corresponding to the source signal line S (n + 5) as shown in FIG.
  • the source output amplifier 36 and the source signal line S (n + 5) are electrically connected, and the source signal output from the source output amplifier 36 is written to the source signal line S (n + 5).
  • the display device 1 performs preliminary charge / discharge on the source signal lines S (n + 1), (n + 2), and (n + 4) that can be precharged / discharged.
  • the source signal lines S (n + 1) and (n + 2) are adjacent to each other. For this reason, the display device 1 short-circuits the source signal lines S (n + 1) and (n + 2) by turning on the switch 22d provided therebetween, and precharges the source signal lines S with each other. Let the discharge occur.
  • the display device 1 since the source signal line S (n + 4) does not have the adjacent prechargeable / dischargeable source signal line S, the display device 1 turns on the switch 23e to turn the source signal line S (n + 4) to the ground. And the charge stored in the source signal line S (n + 4) is discharged.
  • the display device 1 according to the fourth embodiment performs preliminary charge / discharge on the source signal line S that can be precharged / discharged not only during a period during which the source signal is not written but also during a period during which the source signal is written. Therefore, precharge / discharge for a longer time can be performed as compared with a conventional display device in which precharge / discharge is performed only during a period in which no source signal is written. Therefore, the display device 1 of Embodiment 4 can shorten the writing time of the source signal as compared with the conventional display device.
  • source signals are written to a plurality of source signal lines S in an order not to continue writing to adjacent source signal lines S.
  • the display device 1 according to the fourth embodiment can suppress the generation of the parasitic capacitance, and as a result, display image quality can be improved.
  • the display device of the present invention does not write pixel rows in the arrangement order for all pixel rows, but does not write pixel rows in the arrangement order for at least some of the pixel rows. This can also be applied to a display device adopting as a display driving method.
  • the display device 1 of Embodiment 5 writes the source signal only to the pixels in the even-numbered pixel rows and the source signal only to the pixels in the odd-numbered pixel rows every time the frame period is switched.
  • An interlaced drive system that switches between writing and supply is adopted.
  • a source signal is written only to even-numbered pixel rows in a certain frame period, and a source signal is written only to odd-numbered pixel rows in the next frame period.
  • the display device 1 alternately performs the operation in the first frame period and the operation in the second frame period shown below.
  • the first frame period and the second frame period respectively include first and second horizontal periods according to the number of pixel rows being four.
  • each horizontal period includes the preliminary charging period and the first to sixth writing periods, and the writing operation and the preliminary charging / discharging operation in each period are the same as in the first embodiment, description thereof is omitted.
  • First frame period first horizontal period
  • the pixel row L (m) illustrated in FIG. 2 and the like is selected, and the source signal is written only to the pixels in the pixel row L (m).
  • pixel rows to be written in each frame period are limited to even rows or odd rows. Accordingly, the number of times of writing source signals can be reduced, so that power consumption can be further reduced.
  • the same effect as in the first embodiment can be obtained by performing the pre-charge / discharge similarly to the first embodiment.
  • the present invention can be applied not only to a display device that employs interlaced driving in the writing order but also to a display device that employs interlaced driving in a writing order other than the above.
  • every time one line is written one line is skipped and the next line is written.
  • a plurality of lines are skipped and the next line is written. May be written.
  • every time a plurality of lines are written one line or a plurality of lines may be skipped and the next line may be written.
  • the writing unit of the pixel row may be one row or a plurality of rows, and the number of pixel rows to be skipped after writing may be one row or a plurality of rows.
  • a part of pixel rows (for example, even-numbered pixel rows) is written in a certain frame period, and the remaining pixel rows (for example, odd-numbered pixel rows) in the next frame period. It was decided to write. That is, in the above writing order, writing to all pixel rows is performed in two frame periods. However, writing to all pixel rows may be performed in one frame period, and the writing is performed over three or more frame periods. Thus, writing may be performed for all the pixel rows.
  • some pixel rows are written in the first half of a frame period, and the remaining pixel rows (for example, odd-numbered pixel rows) are written in the second half of the frame period. (That is, writing to all pixel rows may be performed in one frame).
  • the source signal (+) is written to all the pixels in the partial pixel row in the first half of the frame period, and the source signal is applied to all the pixels in the remaining pixel row in the second half of the frame period. (-) May be written.
  • the source driver 30 can employ a display driving method other than the first display driving method.
  • FIG. 19 is a diagram showing the display panel 2 in a state where a source signal is written by the second display driving method.
  • the display panel 2 is composed of a plurality of pixel blocks. Here, one of the pixel blocks will be described.
  • the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row) every time the gate signal line G (pixel row) is selected.
  • the source signal is written while inverting the positive / negative of the voltage supplied from the signal (from the reference voltage) for each pixel.
  • the source driver 30 supplies a voltage supplied as a source signal (from the reference voltage) to a plurality of pixels on each source signal line S (pixel column).
  • the source signal is written by inverting the positive / negative of each pixel.
  • the pixel to which the source signal (+) is written and the pixel to which the source signal ( ⁇ ) is written in any of the plurality of pixel columns and the plurality of pixel rows. are alternately present.
  • Such a second display driving method can be referred to as “dot inversion driving”.
  • the display panel 2 changes between the state shown in FIG. 19 and the state in which the sign of each pixel is inverted from FIG. 19 for each frame period. Can be alternated.
  • FIG. 20 is a diagram showing the display panel 2 in a state where a source signal is written by the third display driving method.
  • the display panel 2 is composed of a plurality of pixel blocks. Here, one of the pixel blocks will be described.
  • the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row).
  • the source signal is written without inverting the sign (from the reference voltage) of the voltage supplied as the signal for each pixel.
  • each pixel row on the display panel 2 has only one of the pixel to which the source signal (+) is written and the pixel to which the source signal ( ⁇ ) is written, as shown in FIG. .
  • the source driver 30 supplies a voltage supplied as a source signal (from the reference voltage) to a plurality of pixels on each source signal line S (pixel column).
  • the source signal is written by inverting the positive / negative of each pixel.
  • the display panel 2 has the state shown in FIG. 20 and the state in which the sign of each pixel is inverted from FIG. Can be alternated.
  • FIG. 21 is a diagram showing the display panel 2 in a state where a source signal is written by the fourth display driving method.
  • the display panel 2 is composed of a plurality of pixel blocks. Here, one of the pixel blocks will be described.
  • the source driver 30 applies source to a plurality of pixels on the gate signal line G (pixel row) every time the gate signal line G (pixel row) is selected.
  • the source signal is written without inverting the sign (from the reference voltage) of the voltage supplied as the signal for each pixel.
  • the source driver 30 supplies a reference voltage (reference) to the plurality of pixels on each source signal line S (pixel column). Write the source signal without inverting the sign (from voltage) pixel by pixel.
  • the source driver 30 does not invert the positive / negative (from the reference voltage) of the voltage supplied as the source signal for each pixel, without reversing the positive / negative for each pixel. Write signal.
  • the source driver 30 inverts the sign (from the reference voltage) of the voltage supplied as the source signal in the relationship between adjacent pixel blocks.
  • the source signal ( ⁇ ) is written to all the pixels by the source output amplifier corresponding to this pixel block.
  • the source signal (+) is written to all the pixels by the source output amplifier corresponding to this pixel block.
  • the display panel 2 changes between the state shown in FIG. 21 and the state in which the polarity of each pixel is inverted from FIG. Can be alternated.
  • the display device 1 is not limited to the first embodiment even when any of the display driving methods described above is employed. Preliminary charging / discharging can be performed with a configuration similar to that described in the fifth to fifth embodiments, and effects similar to those described in the first to fifth embodiments can be achieved.
  • the display device of the present invention can be applied to a display device that employs a display driving method other than the first display driving method.
  • the display device is selected by a display panel having a plurality of gate signal lines and a plurality of source signal lines, a gate driver that sequentially selects and scans the plurality of gate signal lines.
  • a source driver that supplies a source signal from the plurality of source signal lines to each of a plurality of pixels on the gate signal line, and a source signal is supplied to a certain source signal line by the source driver.
  • a pre-charging / discharging control means for performing pre-charging / discharging with respect to another source signal line.
  • the source signal potential of the source signal line can be made closer to the reference potential. Accordingly, the writing time of the source signal can be shortened as compared with a conventional display device, so that power consumption can be further reduced.
  • the preliminary charging / discharging control unit short-circuits the other source signal line having a positive source signal potential and the other source signal line having a negative source signal potential. It is preferable to perform preliminary charging / discharging for other signal lines.
  • the source signal potential of these source signal lines is It can be brought close to the reference potential in advance. Thereby, when writing to these source signal lines, the writing time of the source signal can be shortened.
  • the preliminary charge / discharge control unit performs preliminary charge / discharge on the other source signal line by grounding the other source signal line to the ground.
  • the source driver outputs one source output amplifier, and each time the one source output amplifier outputs a source signal, the supply destination of the source signal is selected from among the plurality of source signal lines.
  • the switching means has a switch for connecting and disconnecting the source signal line and the one source output amplifier for each of the plurality of source signal lines, and the one source output amplifier receives the source signal. It is preferable to turn on the switch of the source signal line to which the source signal is to be supplied every time it is output.
  • the source driver outputs a first source output amplifier that outputs a first source signal having a positive source signal potential and a second source signal having a negative source signal potential.
  • the switching means includes, for each of the plurality of source signal lines, a first switch for connecting and disconnecting the source signal line and the first source output amplifier, the source signal line, and the second source signal line.
  • a second switch for connecting and disconnecting the first source output amplifier, and each time the first source output amplifier outputs the first source signal, the first source signal is supplied.
  • the first switch of the source signal line to be turned on is turned on and the second source output amplifier outputs the second source signal, the source signal line to which the second source signal is to be supplied It is preferable to turn on the second switch.
  • the withstand voltage design range of each source output amplifier is Since it can be narrowed by being accommodated in one of the positive side and the negative side, the power consumption of each source output amplifier can be reduced.
  • the output of the first source signal by the first source output amplifier and the output of the second source signal by the second source output amplifier are performed in parallel. Accordingly, it is preferable that the supply of the first source signal to the source signal line and the supply of the second source signal to the source signal line are performed in parallel.
  • the source signal writing period can be shortened. That is, since the horizontal scanning period can be shortened, more images can be displayed within a predetermined unit time, and as a result, the display image quality can be improved. That is, an image can be displayed more efficiently.
  • the source driver supplies source signals to a plurality of source signal lines in an order in which source signals are not continuously supplied to adjacent source signal lines.
  • the source driver writes a source signal to pixels in a part of the plurality of pixel rows and outputs source signals to pixels in the remaining pixel rows of the plurality of pixel rows. It is preferable to perform writing by alternately switching.
  • the source driver includes, for each pixel row, a pixel in which a source signal having a positive source signal potential is written and a pixel in which a source signal having a negative source signal potential is written.
  • Source signals are written so that they exist alternately, and for each pixel column, a pixel to which a source signal having a positive source signal potential is written or a source signal having a negative source signal potential is written. It is preferable to employ the first display driving method for writing the source signal so that only one of the pixels is present.
  • the source driver includes, for each pixel row, a pixel to which a source signal having a positive source signal potential is written and a pixel to which a source signal having a negative source signal potential is written.
  • the source signal is written so as to be alternately present, and for each pixel column, the pixel to which the source signal having the positive source signal potential is written and the source signal having the negative source signal potential are written. It is preferable to adopt the second display driving method for writing the source signal so that the pixels are alternately present.
  • the source driver may be either a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written.
  • a source signal is written so that only one of them exists, and for each pixel column, a pixel to which a source signal having a positive source signal potential is written and a source signal having a negative source signal potential are written. It is preferable to employ the third display driving method for writing the source signal so that the pixels in which the signal is written alternately exist.
  • the source driver may be either a pixel to which a source signal having a positive source signal potential is written or a pixel to which a source signal having a negative source signal potential is written.
  • a source signal is written so that only one of them exists, and for each pixel column, a pixel to which a source signal having a positive source signal potential is written or a source signal having a negative source signal potential is written. It is preferable that the fourth display driving method for writing the source signal is adopted so that only one of the pixels in which is written exists.
  • the display device according to the present invention can be used in various display devices employing an active matrix method, such as a liquid crystal display device, an organic EL display device, and electronic paper.

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  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

Un dispositif d'affichage (1) comprend : un écran (2) qui possède une pluralité de lignes de signaux de grille (G) et une pluralité de lignes de signaux de source (S) ; un pilote de grille (4) qui sélectionne et balaie de manière séquentielle la pluralité de lignes de signaux de grille (G) ; un pilote de source (30) qui envoie des signaux de source provenant de la pluralité de lignes de signaux de source (S) à des pixels respectifs sur la ligne de signaux de grille (G) sélectionnée ; et un moyen de commande de précharge et prédécharge (20) servant à réaliser la précharge et la prédécharge pour d'autres lignes de signaux de source (S) au cours d'une période où le pilote de source (30) écrit un signal de source sur une certaine ligne de signaux de source (S).
PCT/JP2012/062070 2011-05-13 2012-05-10 Dispositif d'affichage WO2012157530A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-108790 2011-05-13
JP2011108790 2011-05-13

Publications (1)

Publication Number Publication Date
WO2012157530A1 true WO2012157530A1 (fr) 2012-11-22

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Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2012/062070 WO2012157530A1 (fr) 2011-05-13 2012-05-10 Dispositif d'affichage

Country Status (1)

Country Link
WO (1) WO2012157530A1 (fr)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000221932A (ja) * 1999-02-02 2000-08-11 Matsushita Electric Ind Co Ltd 液晶表示装置およびその駆動方法
JP2002196732A (ja) * 2000-04-27 2002-07-12 Toshiba Corp 表示装置、画像制御半導体装置、および表示装置の駆動方法
JP2003022054A (ja) * 2001-07-06 2003-01-24 Sharp Corp 画像表示装置
JP2006072391A (ja) * 1997-05-13 2006-03-16 Oki Electric Ind Co Ltd ソースライン駆動回路

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006072391A (ja) * 1997-05-13 2006-03-16 Oki Electric Ind Co Ltd ソースライン駆動回路
JP2000221932A (ja) * 1999-02-02 2000-08-11 Matsushita Electric Ind Co Ltd 液晶表示装置およびその駆動方法
JP2002196732A (ja) * 2000-04-27 2002-07-12 Toshiba Corp 表示装置、画像制御半導体装置、および表示装置の駆動方法
JP2003022054A (ja) * 2001-07-06 2003-01-24 Sharp Corp 画像表示装置

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