WO2012129818A1 - 半导体制造方法 - Google Patents
半导体制造方法 Download PDFInfo
- Publication number
- WO2012129818A1 WO2012129818A1 PCT/CN2011/072584 CN2011072584W WO2012129818A1 WO 2012129818 A1 WO2012129818 A1 WO 2012129818A1 CN 2011072584 W CN2011072584 W CN 2011072584W WO 2012129818 A1 WO2012129818 A1 WO 2012129818A1
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- WO
- WIPO (PCT)
- Prior art keywords
- wafer
- thermal oxidation
- protective film
- oxidized
- dummy wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6302—Non-deposition formation processes
- H10P14/6304—Formation by oxidation, e.g. oxidation of the substrate
- H10P14/6306—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials
- H10P14/6308—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors
- H10P14/6309—Formation by oxidation, e.g. oxidation of the substrate of the semiconductor materials of Group IV semiconductors of silicon in uncombined form, i.e. pure silicon
Definitions
- the present invention relates to a method of fabricating a semiconductor, and more particularly to a method of fabricating a semiconductor by thermal oxidation using a dummy wafer.
- Thermal oxidation is one of the most common process steps in semiconductor manufacturing processes. Thermal oxidation is usually carried out in a thermal oxidizer, and due to the loading effect, the need to introduce a dummy wafer in the thermal oxidation process allows for better uniformity of the thermal oxidation process.
- this is an oxidized wafer 12 for manufacturing a semiconductor device in the same thermal oxidizing furnace, a dummy wafer 10, a monitor wafer 11, because the wafer 12 to be oxidized is not completely occupied.
- a number of dummy wafers 10 are introduced, so that the oxidation effect is uniform throughout the oxidation furnace and in each batch.
- the dummy wafer 10 is a bare wafer.
- a wafer of a certain thickness A is oxidized to form silicon oxide 14, and a thermal oxidation reaction interface B is also directed.
- the internal movement of the dummy wafer 10 after several thermal oxidation processes, for example, 20 times, it is necessary to remove the silicon oxide on the outer surface of the dummy wafer 10 by a wet process.
- the dummy wafer 10 becomes thinner and thinner until it is lost, requiring replacement of new dummy wafers. In actual production, a large number of dummy wafers are consumed, which increases the production cost.
- the oxidation of the dummy wafers may introduce particulate matter, thereby adversely affecting the wafer 12 to be oxidized. Therefore, there is a need to develop a new thermal oxidation process that reduces the consumption of dummy wafers and avoids the introduction of particulate matter that may cause contamination.
- the present invention provides a semiconductor manufacturing method using a silicon nitride-coated dummy wafer, which reduces the consumption of dummy wafers and avoids the generation of oxidized particles.
- the invention provides a semiconductor manufacturing method, comprising:
- the oxidized wafer and the dummy wafer are placed in a thermal oxidation device for thermal oxidation treatment;
- a protective film is deposited on the outer surface of the dummy wafer, and the protective film completely covers the dummy wafer.
- the thermal oxidation device is a thermal oxidation furnace
- the protective film is a silicon nitride film; the silicon nitride film is formed by chemical vapor deposition, physical vapor deposition or atomic layer deposition; preferably, the silicon nitride film is formed by a LPCVD process.
- the film formation temperature was 760 °C.
- the protective film has a thickness of 500 to 1000 angstroms.
- the invention has the advantages that: in the thermal oxidation process, a protective film is deposited on the dummy wafer, so that the protective film completely covers the dummy wafer, so that in the thermal oxidation process, the dummy wafer is not oxidized, thereby The cost of the dummy wafer is reduced, the production cost is reduced, and the particles generated by the oxidation of the dummy wafer are avoided, and the wafer to be oxidized is prevented from being contaminated.
- Figure 1 shows the thermal oxidation process of a dummy wafer
- Figure 3 A dummy wafer covered with a protective film.
- the wafer 12 to be oxidized, the dummy wafer 10, and the wafer 11 are monitored.
- a certain number of dummy wafers 10 need to be placed in the thermal oxidizing device, so that the total wafer is filled as much as possible with the thermal oxidizing device to eliminate the load effect.
- the oxidation effect can be made throughout the oxidation furnace and in batches, see Figure 1.
- a protective film 13 is deposited on the outer surface of the dummy wafer 10, so that the protective film 13 completely covers the dummy wafer 10, see FIG.
- the protective film 13 is preferably a silicon nitride film.
- the deposition process is a conventional silicon nitride film forming process, such as chemical vapor deposition, physical vapor deposition or atomic layer deposition, etc., preferably, LPCVD process, typical process temperature At 760 °C, LPCVD can achieve comprehensive coating and can form a dense silicon nitride film, which can better protect the dummy wafer 10; and, because the film is dense, it will not bring Impurity particles ensure the quality of the wafer 12 to be oxidized.
- the protective film 13 should have a certain thickness, for example, 500 to 1000 angstroms.
- the thermal oxidation apparatus is a thermal oxidation furnace.
- a monitoring wafer 11 is arranged in the upper, middle and lower portions of the thermal oxidation furnace to monitor the process of each zone of the thermal oxidation furnace.
- each wafer is taken out from the thermal oxidation apparatus, wherein the wafer 12 is to be oxidized to continue the subsequent process flow to form a desired semiconductor device; and the dummy wafer 10 is protected by the protective film 13, and It is not oxidized and can be used continuously.
- a protective film 13 is deposited on the dummy wafer 10 so that the protective film 13 completely covers the dummy wafer, so that in the thermal oxidation process, the dummy wafer 10 is protected by the protective film 13. It is not oxidized, and the step of removing the silicon oxide by the wet process in the conventional process is not required, thereby reducing the consumption of the dummy wafer 10, reducing the production cost, and avoiding the generation of the dummy wafer 10 due to oxidation.
- the particles are such that the wafer 12 to be oxidized is protected from contamination.
Landscapes
- Formation Of Insulating Films (AREA)
Description
半导体制造方法
本申请要求于 2011 年 3 月 29 日提交中国专利局、 申请号为 201110077477.6、 发明名称为"半导体制造方法"的中国专利申请的优先权, 其 全部内容通过引用结合在本申请中。
技术领域
本发明涉及一种半导体制造方法,特别地, 涉及一种采用虚设晶圆进行热 氧化的半导体制造方法。
背景技术
在半导体制造工艺中, 热氧化是最常用工艺步骤之一。 热氧化通常在热氧 化炉中进行, 由于负载效应(loading effect ), 在热氧化工艺中的需要引入虚设 晶圆 (dummy wafer ), 这可使热氧化工艺的均匀性更佳。 参见附图 1 , 这是在 同一个热氧化炉中的用于制造半导体器件的欲氧化晶圆 12, 虚设晶圆 10, 监 控晶圆 11 ( monitor wafer ), 由于欲氧化晶圆 12未完全占满热氧化炉, 为了避 免负载效应对氧化均匀性的影响, 引入了若干虚设晶圆 10, 使得氧化炉各处 以及各批次的氧化效果一致。 通常, 虚设晶圆 10为棵晶圆 (bare wafer ), 参 见附图 2, 经过热氧化处理, 一定厚度 A的晶圆被氧化而形成氧化硅 14, 同 时, 热氧化的反应界面 B也在向虚设晶圆 10的内部移动; 在进行若干次热氧 化工艺后, 例如 20次, 需要采用湿法处理将虚设晶圆 10外表面上的氧化硅去 除。 经过连续的热氧化以及湿法处理, 虚设晶圆 10会变得越来越薄, 直至失 去作用,需要更换新的虚设晶圆。在实际生产中,大量的虚设晶圆会被消耗掉, 增加了生产成本; 同时, 虚设晶圆的氧化还有可能引入颗粒物, 从而对欲氧化 晶圆 12产生不良影响。 因此, 需要开发出一种新的热氧化工艺, 能够减少对 虚设晶圆的消耗, 并避免有可能造成污染的颗粒物的引入。
发明内容
本发明提供了一种半导体制造方法, 采用了氮化硅包覆的虚设晶圆, 减 少了虚设晶圆的消耗, 并避免了氧化颗粒物的产生。
本发明提供一种半导体制造方法, 包括:
提供欲氧化晶圆;
提供虚设晶圆;
将所述欲氧化晶圆和所述虚设晶圆置于热氧化设备中, 进行热氧化处理; 其中:
在进行所述热氧化处理之前, 在所述虚设晶圆外表面沉积一层保护膜, 所述保护膜完全包覆所述虚设晶圆。
在本发明的方法中, 所述热氧化设备为热氧化炉;
在本发明的方法中, 所述保护膜为氮化硅膜; 采用化学气相沉积、 物理气 相沉积或原子层沉积形成所述氮化硅膜; 优选地, 采用 LPCVD工艺形成所述 氮化硅膜,成膜温度为 760 °C。
在本发明的方法中, 所述保护膜的厚度为 500 ~ 1000埃。
本发明的优点在于: 在热氧化工艺中, 在虚设晶圆上沉积一层保护膜, 使保护膜完全包覆虚设晶圆, 这样, 在热氧化工艺中, 虚设晶圆不会被氧化, 从而减少了虚设晶圆的消耗, 降低了生产成本, 并且避免了由于虚设晶圆被氧 化而产生的颗粒物, 使欲氧化晶圆免于沾染。
附图说明
图 1 引入了虚设晶圆的热氧化工艺;
图 2棵的虚设晶圆及其被氧化的过程;
图 3 被保护膜包覆的虚设晶圆。
具体实施方式
以下参照附图并结合示意性的实施例来详细说明本发明技术方案的特征 及其技术效果。
首先, 提供欲氧化晶圆 12, 虚设晶圆 10, 以及监控晶圆 11。 在欲氧化晶圆 12未完全占满热氧化设备的情况下,需要在热氧化设备中置入一定数量的虚设 晶圆 10, 使总的晶圆尽量填满热氧化设备, 以消除负载效应, 可以使氧化炉各 处以及各批次的氧化效果一致, 参见附图 1。
在将各个晶圆投入热氧化设备进行热氧化工艺之前, 在虚设晶圆 10外表 面沉积一层保护膜 13 , 使保护膜 13完全包覆虚设晶圆 10, 参见附图 3。 保护膜 13优选为氮化硅膜。若采用氮化硅膜作为保护膜 13, 则沉积工艺是常规的氮化 硅成膜工艺,例如采用化学气相沉积、物理气相沉积或原子层沉积等,优选地, 采用 LPCVD工艺, 典型的制程温度为 760 °C ,由于 LPCVD可以实现全面的包覆 性,并能形成致密性良好的氮化硅薄膜,这样可更好地保护虚设晶圆 10;并且, 由于成膜致密, 也不会带来杂质颗粒, 保证了欲氧化晶圆 12的质量。 同时, 为
了起到对虚设晶圆 10的保护效果, 保护膜 13应具备一定的厚度, 例如是 500 ~ 1000埃。
接着, 将欲氧化晶圆 12、 虚设晶圆 10以及监控晶圆 11置于热氧化设备中, 进行热氧化处理; 热氧化设备为热氧化炉。 在热氧化炉的上、 中、 下部分分别 布置一片监控晶圆 11 , 用以监控热氧化炉各个区域的工艺情况。
氧化工艺结束之后, 从热氧化设备中取出各个晶圆, 其中, 欲氧化晶圆 12继续进行随后的工艺流程,从而形成所需的半导体器件; 而虚设晶圆 10由于 保护膜 13的保护, 并未被氧化, 可继续使用。
因此, 本发明中, 在虚设晶圆 10上沉积一层保护膜 13 , 使保护膜 13完全 包覆虚设晶圆, 这样, 在热氧化工艺中, 由于受到保护膜 13的保护, 虚设晶圆 10不会被氧化,也就不需要传统工艺中采用湿法处理去除氧化硅的步骤,从而 减少了虚设晶圆 10的消耗, 降低了生产成本, 并且避免了由于虚设晶圆 10被氧 化而产生的颗粒物, 使欲氧化晶圆 12免于沾染。
尽管已参照上述示例性实施例说明本发明, 本领域技术人员可以知晓无 需脱离本发明范围而对本发明技术方案做出各种合适的改变和等价方式。 此 外,由所公开的教导可做出许多可能适于特定情形或材料的修改而不脱离本发 式而公开的特定实施例,而所公开的器件结构及其制造方法将包括落入本发明 范围内的所有实施例。
Claims
1. 一种半导体制造方法, 包括:
提供欲氧化晶圆;
提供虚设晶圆;
将所述欲氧化晶圆和所述虚设晶圆置于热氧化设备中, 进行热氧化处理; 其特征在于:
在进行所述热氧化处理之前, 在所述虚设晶圆外表面沉积一层保护膜, 所述保护膜完全包覆所述虚设晶圆。
2.根据权利要求 1所述的半导体制造方法, 其特征在于, 所述热氧化设备 为热氧化炉。
3.根据权利要求 1所述的半导体制造方法, 其特征在于, 所述保护膜为氮 化硅膜。
4. 根据权利要求 3所述的半导体制造方法, 其特征在于, 采用化学气相 沉积、 物理气相沉积或原子层沉积形成所述保护膜。
5.根据权利要求 3所述的半导体制造方法, 其特征在于, 采用 LPCVD工艺 形成所述氮化硅膜,成膜温度为 760 °C。
6.根据权利要求 1所述的半导体制造方法, 其特征在于, 所述保护膜的厚 度为 500 ~ 1000埃。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/140,549 US20120252225A1 (en) | 2011-03-29 | 2011-04-11 | Semiconductor fabrication method |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110077477.6 | 2011-03-29 | ||
| CN201110077477.6A CN102723272B (zh) | 2011-03-29 | 2011-03-29 | 半导体制造方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2012129818A1 true WO2012129818A1 (zh) | 2012-10-04 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/CN2011/072584 Ceased WO2012129818A1 (zh) | 2011-03-29 | 2011-04-11 | 半导体制造方法 |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN102723272B (zh) |
| WO (1) | WO2012129818A1 (zh) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5955246B2 (ja) * | 2013-02-26 | 2016-07-20 | 三菱電機株式会社 | 半導体装置の製造方法 |
| CN111613518A (zh) * | 2019-02-26 | 2020-09-01 | 东莞新科技术研究开发有限公司 | 在虚设半导体元件外表面形成保护膜的方法 |
| CN113659435B (zh) * | 2021-06-24 | 2023-06-09 | 威科赛乐微电子股份有限公司 | 一种vcsel芯片的氧化工艺 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03224228A (ja) * | 1990-01-30 | 1991-10-03 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH08279472A (ja) * | 1995-04-07 | 1996-10-22 | Sumitomo Chem Co Ltd | 処理された半導体基板の製造方法 |
| KR20080100719A (ko) * | 2007-05-14 | 2008-11-19 | 주식회사 실트론 | 구리 데코레이션 장치를 이용한 웨이퍼 결함 유무 판단시스템의 오류 검사 방법 |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1269196C (zh) * | 1994-06-15 | 2006-08-09 | 精工爱普生株式会社 | 薄膜半导体器件的制造方法 |
-
2011
- 2011-03-29 CN CN201110077477.6A patent/CN102723272B/zh active Active
- 2011-04-11 WO PCT/CN2011/072584 patent/WO2012129818A1/zh not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03224228A (ja) * | 1990-01-30 | 1991-10-03 | Fujitsu Ltd | 半導体装置の製造方法 |
| JPH08279472A (ja) * | 1995-04-07 | 1996-10-22 | Sumitomo Chem Co Ltd | 処理された半導体基板の製造方法 |
| KR20080100719A (ko) * | 2007-05-14 | 2008-11-19 | 주식회사 실트론 | 구리 데코레이션 장치를 이용한 웨이퍼 결함 유무 판단시스템의 오류 검사 방법 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102723272A (zh) | 2012-10-10 |
| CN102723272B (zh) | 2015-02-25 |
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