WO2012117701A1 - データ制御システム、データ制御方法およびデータ制御用プログラム - Google Patents
データ制御システム、データ制御方法およびデータ制御用プログラム Download PDFInfo
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- WO2012117701A1 WO2012117701A1 PCT/JP2012/001229 JP2012001229W WO2012117701A1 WO 2012117701 A1 WO2012117701 A1 WO 2012117701A1 JP 2012001229 W JP2012001229 W JP 2012001229W WO 2012117701 A1 WO2012117701 A1 WO 2012117701A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/102—Program control for peripheral devices where the programme performs an interfacing function, e.g. device driver
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
Definitions
- the present invention relates to a data control system, a data control method, and a data control program for performing control to move data between two I / O (Input / Output) devices at high speed.
- I / O Input / Output
- Patent Document 1 describes a computer system that can transfer moving image data directly from a DVD (Digital Versatile Disc) -ROM (Read Only Memory) interface to a DVD decoder without going through the main memory.
- a master transaction control unit capable of starting an I / O read transaction is provided in a DVD decoder, and both the DVD decoder and the DVD interface are controlled by a DVD control driver. With such a configuration, the moving image data is directly transferred from the DVD interface to the DVD decoder without going through the main memory.
- Patent Document 2 describes a computer system capable of executing a plurality of input / output commands for a plurality of devices with a single input / output command.
- the input / output adapter starts an input / output operation when receiving an input / output command from the CPU.
- the I / O adapter transfers the data specified from the storage unit to the corresponding I / O controller, and in the case of data reception, transfers the data from the I / O controller to the specified area of the storage unit.
- the input / output control device includes a buffer for storing data.
- Patent Document 3 describes a storage subsystem that performs firmware replacement without stopping operations.
- a CPU secures a data cache area in a memory area, and reads data from a logical disk by controlling a disk control unit. Then, the CPU stores the read data in the data cache area of the memory area.
- FIG. 15 is an explanatory diagram showing an example of a general data transfer system using a computer system described in Patent Document 1.
- the system illustrated in FIG. 15 includes a CPU 1, a main memory 3, a DVD decoder 406, a DVD interface 407, and a bridge 2 that connects the devices.
- the DVD decoder 406 and the DVD interface 407 are connected to the bridge 2 by a PCI (Peripheral Component Interconnect) express bus 501 and a PCI express bus 502, respectively.
- PCI Peripheral Component Interconnect
- the main memory 3 stores a program 305.
- the program 305 is read by the CPU 1 and operates as the application operation unit 111, the operating system operation unit 112, and the DVD control driver operation unit 113.
- the application 111 operation unit operates in accordance with a program for reproducing moving image data.
- the DVD control driver operation unit 113 controls the DVD decoder 406 and the DVD interface 407.
- a general system having such a configuration operates as follows.
- the DVD control driver operation unit 113 instructs the DVD interface 407 to prepare for data transfer. Subsequently, the DVD control driver operation unit 113 instructs the DVD decoder 406 to start an I / O transaction for reading moving image data from the DVD interface 407. As a result, the moving image data is directly transferred from the DVD interface 407 to the DVD decoder 406.
- bus traffic can be reduced by directly transferring data from the DVD interface 407 to the DVD decoder 406 without passing through the main memory 3. Further, in this general system, since data transfer that mediates software is not performed, high-speed data transfer is realized.
- the present invention provides a data control system, a data control method, and a data control program that can perform high-speed data transfer between two I / O devices that do not support direct data transfer operation. For the purpose.
- a data control system includes a CPU that performs data transfer control from a first device to a second device in a kernel mode, and a main memory that stores data transferred from the first device to the second device.
- a first device control means for controlling the first device, a second device control means for controlling the second device, and an instruction for storing the data read from the first device in the main memory.
- Data transfer control means for giving a read instruction to the first device control means and for giving a write instruction to the second device control means to write data stored in the main memory to the second device. It is characterized by that.
- the CPU that performs data transfer control from the first device to the second device in the kernel mode instructs the CPU to store the data read from the first device in the main memory.
- the first device control means for controlling the first device provided to the CPU, and the CPU is instructed to write the data stored in the main memory to the second device, the second device provided to the own CPU. It is characterized by being performed on second device control means for controlling the device.
- a data control program includes a CPU that performs data transfer control from a first device to a second device in a kernel mode, and a main memory that stores data transferred from the first device to the second device.
- the first device control process executes a read instruction that is an instruction to store data read from the main memory in the first memory, and a second device control process issues a write instruction that is an instruction to write the data stored in the main memory to the second device.
- the data transfer control process to be executed in step 1 is executed.
- data can be transferred at high speed between two I / O devices that do not support direct data transfer.
- FIG. FIG. 1 is a block diagram showing an example of a data control system in the first embodiment of the present invention.
- the data control system according to this embodiment includes a CPU 1, a main memory 3, an I / O device 401 that is a first I / O device, and an I / O device 402 that is a second I / O device. And a bridge 2 for connecting the I / O devices.
- a bridge 2 for connecting the I / O devices.
- the I / O device 401 and the I / O device 402 are, for example, a storage device or a network interface that conforms to a standard represented by SCSI (Small Computer Computer System Interface) or SATA (Serial Advanced Technology Attachment), and conforms to PCI Express. It is an I / O device that holds the interface to be used.
- the I / O device 401 is connected to the bridge 2 via the PCI express bus 501, and the I / O device 402 is connected to the bridge 2 via the PCI express bus 502.
- the main memory 3 includes an I / O data transfer memory 301.
- the I / O data transfer memory 301 is used for data transfer between the I / O device 401 and the I / O device 402.
- the I / O data transfer memory 301 includes an I / O command memory 3011, a DMA list memory 3012, and a data memory 3013.
- the I / O command memory 3011 is an area for storing I / O commands issued to the I / O device 401 and the I / O device 402.
- the data memory 3013 is a buffer area for data transferred between the I / O device 401 and the I / O device 402.
- the DMA list memory 3012 stores information that lists the addresses in the data memory 3013 so that the I / O device 401 and the I / O device 402 perform data communication with the data memory 3013 by DMA (Direct Memory Access). It is an area to do.
- DMA Direct Memory Access
- the main memory 3 stores a program 302.
- the program 302 is read by the CPU 1, and an I / O data transfer application operation unit 101, an operating system operation unit 102, an I / O data transfer driver operation unit 103, and an I / O device 401 that controls the I / O device 401 described later.
- the O device driver operation unit 104 and the I / O device driver operation unit 105 that controls the I / O device 402 operate.
- the CPU 1 includes an I / O data transfer application operation unit 101, an operating system operation unit 102, an I / O data transfer driver operation unit 103, an I / O device driver operation unit 104, and an I / O device driver operation unit 105. And an I / O device table storage unit 114.
- the I / O device table storage unit 114 stores information on the I / O device 401 and the I / O device 402 that are targets of data transfer. Specifically, the I / O device table storage unit 114 stores the names of the I / O device 401 and the I / O device 402 of the I / O device 401 and the I / O device 2 held by the operating system operation unit 102. The information is stored in association with an address indicating the position where the management information is stored (hereinafter referred to as a management information address).
- the device management information includes, for example, device attributes and access modes.
- the I / O data transfer application operation unit 101 makes a data transfer request between the I / O device 401 and the I / O device 402 to the I / O data transfer driver operation unit 103.
- the data transfer request is instructed by, for example, a user or another device.
- the operating system operation unit 102 causes the I / O data transfer driver operation unit 103, the I / O device driver operation unit 104, and the I / O device driver operation unit 105 to operate as driver software.
- the operating system operation unit 102 creates information in which the device name is associated with the management information address in the I / O device table storage unit 114. For example, when an I / O device is connected, the operating system operation unit 102 associates the device name of the connected I / O device with the address storing the management information of the I / O device. The information may be stored in the device table storage unit 114.
- the I / O data transfer driver operation unit 103 performs data transfer control from the I / O device 401 to the I / O device 402.
- FIG. 2 is a block diagram illustrating an example of the I / O data transfer driver operation unit 103.
- the I / O data transfer driver operation unit 103 in this embodiment includes a transfer control program operation unit 1031, a memory allocation program operation unit 1032, a memory release program operation unit 1033, and an I / O data processing program operation unit 1034. Including.
- the case where the operating system operation unit 102 and the I / O data transfer driver operation unit 103 are separately mounted is illustrated.
- An example of this mounting is a method of mounting the I / O data transfer driver operation unit 103 as a device driver. With this implementation, it is possible to suppress changes accompanying the addition of functions to the operating system operation unit 102 on a small scale. Further, the I / O data transfer driver operation unit 103 and the operating system operation unit 102 may be integrally mounted. In this case, since it can manage as one software, development and management become easy.
- the transfer control program operation unit 1031 performs data transfer between the I / O devices by issuing an I / O command to the I / O device 401 and the I / O device 402.
- the transfer control program operation unit 1031 operates when the CPU 1 reads a transfer control program.
- the memory securing program operation unit 1032 is called from the transfer control program operation unit 1031 and secures the I / O data transfer memory 301 in the main memory 3.
- the memory securing program operation unit 1032 operates when the CPU 1 reads a memory securing program.
- the memory release program operation unit 1033 is called from the transfer control program operation unit 1031 and releases the I / O data transfer memory 301.
- the memory release program operation unit 1033 operates when the CPU 1 reads a memory release program.
- the I / O data processing program operation unit 1034 is called from the transfer control program operation unit 1031 and performs processing on data transferred between the I / O device 401 and the I / O device 402.
- the I / O data processing program operation unit 1034 operates when the CPU 1 reads an I / O data processing program.
- the I / O data transfer driver operation unit 103 reads the transfer control program, the memory allocation program, the memory release program, and the I / O data processing program, and operates according to these programs. At that time, the I / O data transfer driver operation unit 103 operates in the kernel mode of the CPU 1.
- a program including a transfer control program, a memory reservation program, a memory release program, and an I / O data processing program may be referred to as a data control program.
- the transfer control program operation unit 1031 receives a request from the I / O data transfer application operation unit 101 and performs data transfer between the I / O device 401 and the I / O device 402.
- the transfer control program operation unit 1031 calls the memory reservation program operation unit 1032 to reserve the I / O data transfer memory 301 in the main memory 3. Also, the transfer control program operation unit 1031 refers to the I / O device table storage unit 114, and the operating system operation unit 102 holds these devices based on the names of the I / O device 401 and the I / O device 402. Search for the address of the management information to be used.
- the transfer control program operation unit 1031 creates a data read command for the I / O device 401 in the I / O command memory 3011. Further, the transfer control program operation unit 1031 creates an address list of the data memory 3013 to which data is read from the I / O device 401 (hereinafter referred to as “read”) in the DMA list memory 3012. Then, the transfer control program operation unit 1031 makes an I / O read request by passing these data (specifically, a data read command and a DMA list) to the I / O device driver operation unit 104. Note that the transfer control program operation unit 1031 creates a data read command using the address of the management information held by the operating system operation unit 102.
- the transfer control program operation unit 1031 instructs the I / O device driver operation unit 104 to store the data read from the I / O device 401 in the data memory 3013.
- the transfer control program operation unit 1031 performs predetermined data processing such as format conversion and compression on the data read from the I / O device 401 and stored in the data memory 3013 as necessary.
- the data processing program operation unit 1034 may be requested.
- format conversion, compression, and the like are examples of predetermined data processing, and the data processing requested by the transfer control program operation unit 1031 may be data processing other than format conversion and compression.
- the transfer control program operation unit 1031 creates a data write command for the I / O device 402 in the I / O command memory 3011. Further, the transfer control program operation unit 1031 creates an address list of the data memory 3013 to which data is written in the I / O device 402 (hereinafter referred to as “write”) in the DMA list memory 3012. Then, the transfer control program operation unit 1031 makes an I / O write request by passing those data (specifically, a data write command and a DMA list) to the I / O device driver operation unit 105. Note that the transfer control program operation unit 1031 creates a data write command using the address of the management information held by the operating system operation unit 102.
- the transfer control program operation unit 1031 instructs the I / O device driver operation unit 105 to write the data stored in the data memory 3013 to the I / O device 402.
- the transfer control program operation unit 1031 is requested by the I / O data transfer application operation unit 101 to perform a series of processing of data read processing from the I / O device 401 and data write processing to the I / O device 402. Repeat until the amount of data transfer is complete.
- the I / O data processing program operation unit 1034 may perform data processing on data read from the I / O device 401 between data read processing and data write processing. As described above, by performing data processing such as format conversion and compression between data read processing and data write processing (that is, before data write is performed), it is possible to shorten the entire processing time.
- FIG. 3 is an explanatory diagram illustrating an example of the data memory 3013.
- the transfer control program operation unit 1031 indicates that a plurality of buffers 30131 are secured in the data memory 3013.
- the transfer control program operation unit 1031 uses each buffer 30131 to perform data read processing from the I / O device 401 and data write processing to the I / O device 402 in parallel. At this time, the I / O data processing program operation unit 1034 may perform data processing on the data read from the I / O device 401 in parallel. Also in this case, the transfer control program operation unit 1031 may repeat the data read process and the data write process until the sum of the data transfer amounts reaches the data transfer amount requested from the I / O data transfer application operation unit 101.
- FIG. 4 is a flowchart showing an operation example of the data control system in the present embodiment.
- the I / O data transfer application operation unit 101 requests the I / O data transfer driver operation unit 103 to transfer data between I / O devices (step A1).
- the transfer control program operation unit 1031 of the I / O data transfer driver operation unit 103 receives a request for data transfer, calls the memory reservation program operation unit 1302, and the memory reservation program operation unit 1302 transfers I / O data to the main memory 3.
- the memory 301 is secured (step A2).
- the transfer control program operation unit 1031 creates an I / O command in the I / O command memory 3011 and a DMA list in the DMA list memory 3012. Then, the transfer control program operation unit 1031 makes an I / O read request by passing the data (that is, the I / O read command and the DMA list) to the I / O device driver operation unit 104, and the I / O device The I / O data is read from 401 and the read data is stored in the data memory 3013 (step A3).
- the transfer control program operation unit 1031 calls the I / O data processing program operation unit 1034 to perform data processing such as format conversion and compression on the data stored in the data memory 3013 ( Step A4).
- the transfer control program operation unit 1031 creates an I / O command in the I / O command memory 3011 and a DMA list in the DMA list memory 3012. Then, the transfer control program operation unit 1031 makes an I / O write request by passing the data to the I / O device driver operation unit 105, and writes the data stored in the data memory 3013 to the I / O device 402. (Step A5).
- the transfer control program operation unit 1031 determines whether or not the requested data amount has been transferred (step A6).
- the I / O data transfer driver operation unit 103 repeats the processes in steps A3 to A5.
- the transfer control program operation unit 1031 calls the memory release program operation unit 1033, and the memory release program operation unit 1033 performs the I / O data transfer memory. 301 is released (step A7).
- the I / O data transfer driver operation unit 103 repeats the processing of steps A3 to A5 until the transfer processing of the data amount requested from the I / O data transfer application operation unit 101 is completed.
- step A1 to step A2 is the same as the processing illustrated in FIG.
- the transfer control program operation unit 1031 creates in the I / O command memory 3011 a plurality of I / O read commands for writing data to the plurality of buffers 30131 in the data memory 3013. In addition, the transfer control program operation unit 1031 creates a DMA list corresponding to each I / O read command in the DMA list memory 3012. Then, the transfer control program operation unit 1031 makes a read request for a plurality of I / O data to the I / O device driver operation unit 104 (that is, an I / O read command and a DMA list) (see FIG. Step A8) in step 5.
- the transfer control program operation unit 1031 waits until the request to the issued I / O device is completed. After completion of one I / O request (step A9), the transfer control program operation unit 1031 determines whether the completed I / O request is a read request (step A10). When the completed I / O request is a read request (Yes in step A10), the transfer control program operation unit 1031 performs I / O on the data read from the I / O device 401 and stored in the buffer on the data memory 301. Similar to the operation when the / O request is not multiplexed, the processing of step A4 to step A5 is performed. Thereafter, the transfer control program operation unit 1031 waits until the I / O request is completed again.
- step A10 when the completed I / O request is not a read request (that is, a write request) in step A10, the transfer control program operation unit 1031 has the amount of data read by the read request that has been made to the I / O device 401 so far. Then, it is determined whether or not the data amount requested from the I / O data transfer application operation unit 101 has been reached (step A11).
- the transfer control program operation unit 1031 makes an I / O read request to the I / O device driver operation unit 104, and the read data is read into the data memory 3013. The same processing as in step A3 is performed. Thereafter, the transfer control program operation unit 1031 waits until the I / O request is completed again.
- step A11 determines whether the requested data amount has been reached in step A11 (Yes in step A11). If the requested data amount has been reached in step A11 (Yes in step A11), the transfer control program operation unit 1031 determines whether all the write requests issued to the I / O device driver operation unit 105 have been completed. Is determined (step A12). If all the write requests have not been completed (No in step A12), the transfer control program operation unit 1031 waits again until the I / O request is completed. On the other hand, when all the write requests are completed (Yes in Step A12), the memory release program operation unit 1033 releases the I / O data transfer memory 301 (Step A7).
- the PCI express bus is exemplified as a bus that connects the bridge 2 and the I / O device 401 and the bridge 2 and the I / O device 402.
- the bridge 2 and the I / O devices 401 and 402 may be connected using other buses such as a PCI bus and a PCI-X bus.
- the bus standard to which the I / O device 401 and the I / O device 402 comply may be PCI or PCI-X.
- the I / O device 401 that reads data and the I / O device 402 that writes data are different I / O devices have been described as examples.
- the I / O device 401 and the I / O device 402 may be the same I / O device.
- data transfer between the two devices may be performed between different modules on the same I / O device, or may be performed between different addresses of the same module in the same I / O device.
- the I / O data transfer driver operation unit 103 (more specifically, the transfer control program) performs data transfer control from the I / O device 401 to the I / O device 402 in the kernel mode.
- the operation unit 1031 instructs the I / O device driver operation unit 104 to store the data read from the I / O device 401 in the data memory 3013.
- the I / O data transfer driver operation unit 103 (more specifically, the transfer control program operation unit 1031) instructs the I / O device 402 to write the data stored in the data memory 3013 to the I / O device 402. This is performed for the unit 105.
- the I / O data transfer driver operation unit 103 operates in the kernel mode of the CPU, and the first I / O device 401 intervenes through the I / O device driver operation unit 104.
- the read data is written to the second I / O device 402 via the I / O device driver operation unit 105. Therefore, data can be transferred at high speed between two I / O devices that do not support the operation of directly transferring data between the I / O devices.
- the data control system performs predetermined data processing such as format conversion and compression on the data read from the I / O device 401 and then sends the data to the second I / O device 402. Write. For this reason, since the data transfer is performed while performing various processes on the data to be transferred between the two I / O devices that do not have a processing function for the transfer data, the entire processing time can be shortened.
- a read request for the first I / O device 401 and a write request for the second I / O device 402 may be multiplexed.
- data transfer is performed at a higher speed between two I / O devices that do not support the operation of directly transferring data, compared to the case where I / O requests are not multiplexed. be able to.
- FIG. FIG. 7 is a block diagram illustrating an example of a data control system according to the second embodiment of the present invention.
- the data control system in this embodiment includes a CPU 1, a main memory 3, an I / O device 401 that is a first I / O device, an I / O device 402 that is a second I / O device, and an I / O device 402. / O device 403 and bridge 2 connecting the respective I / O devices. That is, the data control system according to the second embodiment is different from the data control system according to the first embodiment in that the I / O device 403 is provided.
- the main memory 3 includes an I / O data transfer memory 301.
- the I / O data transfer memory 301 includes an I / O command memory 3011 and a DMA list memory 3012.
- the I / O device 403 includes a data memory 4031.
- the data memory 4031 is mapped to the physical address of the computer, and is used as a data buffer for reading and writing data from the CPU 1. That is, the data memory 4031 corresponds to the data memory 3013 in the first embodiment.
- the CPU 1 includes an I / O data transfer application operation unit 101, an operating system operation unit 102, an I / O data transfer driver operation unit 106, an I / O device driver operation unit 104, and an I / O device driver operation unit 105. And an I / O device table storage unit 114.
- the main memory 3 stores a program 303.
- the program 303 is read by the CPU 1 and an I / O device that controls the I / O data transfer application operation unit 101, the operating system operation unit 102, the I / O data transfer driver operation unit 106, and the I / O device 401. It operates as a driver operation unit 104 and an I / O device driver operation unit 105 that controls the I / O device 402.
- the I / O transfer driver 106 operation unit performs the same operation as the I / O transfer driver 103 operation unit in the first embodiment. However, the I / O transfer driver operation unit 106 differs from the I / O transfer driver 103 operation unit in the first embodiment in that the data memory 4031 is used as a data buffer for I / O data transfer.
- FIG. 8 is a block diagram illustrating an example of the I / O data transfer driver operation unit 106.
- the I / O data transfer driver operation unit 106 in this embodiment includes a transfer control program operation unit 1031, a memory allocation program operation unit 1061, a memory release program operation unit 1062, and an I / O data processing program operation unit 1034. Including.
- the memory reservation program operation unit 1061 is called from the transfer control program operation unit 1031 and secures a transfer memory area in the data memory 4031.
- the memory release program operation unit 1062 is called from the transfer control program operation unit 1031 and releases the transfer memory area in the data memory 4031.
- the memory securing program operation unit 1061 operates when the CPU 1 reads a memory securing program.
- the memory release program operation unit 1062 operates when the CPU 1 reads a memory release program.
- the I / O transfer driver 106 operation unit holds the memory area (that is, the memory area held by the third I / O device as a data buffer that mediates I / O data transfer (that is, Data memory 4031) is used.
- the I / O device that performs data transfer in the first embodiment is a storage device.
- the storage device is a data storage device that conforms to storage standards such as SCSI, SAS (Serial Attached SCSI), SATA, and the like.
- SCSI Serial Attached SCSI
- SAS Serial Attached SCSI
- SATA Serial Advanced Technology Attached SCSI
- data transfer performed during storage copy will be described in detail.
- FIG. 9 is a block diagram showing an example of the data control system in the third embodiment of the present invention.
- the data control system according to this embodiment includes a CPU 1, a main memory 3, a storage device 404 that is a first storage device, a storage device 405 that is a second storage device, and a bridge 2 that connects the storage devices. Including.
- the CPU 1 includes a storage copy application operation unit 107, an operating system operation unit 102, a storage copy driver operation unit 108, a storage device driver operation unit 109, a storage device driver operation unit 110, and an I / O device table storage unit 114. Including.
- the storage copy application operation unit 107, the storage copy driver operation unit 108, the storage device driver operation unit 109, the storage device driver operation unit 110, the storage device 404, and the storage device 405 in the third embodiment are I / O data transfer application operation unit 101, I / O data transfer driver operation unit 103, I / O device driver operation unit 104, I / O device driver operation unit 105, I / O device 401 and I / O in the embodiment It corresponds to the device 402.
- the main memory 3 includes an I / O data transfer memory 301.
- the contents of the I / O data transfer memory 301 are the same as those in the first embodiment.
- the main memory 3 stores a program 304.
- the program 304 corresponds to the program 302 in the first embodiment.
- the program 304 is read by the CPU 1 and operates as the storage copy application operation unit 107, the operating system operation unit 102, the storage copy driver operation unit 108, the storage device driver operation unit 109, and the storage device driver operation unit 110.
- the storage copy driver operation unit 108 performs copy control from the storage device 404 to the storage device 405.
- FIG. 10 is a block diagram illustrating an example of the storage copy driver operation unit 108.
- the storage copy driver operation unit 108 in this embodiment includes a storage copy control program operation unit 1081, a memory allocation program operation unit 1032 and a memory release program operation unit 1033.
- the storage copy control program operation unit 1081 performs data copying between storage devices by issuing I / O commands to the storage devices 404 and 405.
- the storage copy control program operation unit 1081 operates when the CPU 1 reads a storage copy control program.
- memory allocation program operation unit 1032 and the memory release program operation unit 1033 are the same as those in the first embodiment.
- the storage copy driver operation unit 108 reads the storage copy control program, the memory allocation program, and the memory release program, and operates according to these programs. At that time, the storage copy driver operation unit 108 operates in the kernel mode of the CPU 1.
- the storage copy control program operation unit 1081 receives a request from the storage copy application operation unit 107 and performs data copy between the storage device 404 and the storage device 405.
- the storage copy control program operation unit 1081 calls the memory reservation program operation unit 1032 to reserve the I / O data transfer memory 301 in the main memory 3. Further, the storage copy control program operation unit 1081 refers to the I / O device table storage unit 114, and from the names of the storage device 404 and the storage device 405, management information held by the operating system operation unit 102 for these devices. Search for the address.
- the storage copy control program operation unit 1081 creates a data read command for the storage device 404 in the I / O command memory 3011.
- the storage copy control program operation unit 1081 creates an address list of the data memory 3013 to which the data read from the storage device 404 is written in the DMA list memory 3012. Then, the storage copy control program operation unit 1081 makes an I / O read request by passing those data (specifically, a data read command and a DMA list) to the storage device driver operation unit 109.
- the storage copy control program operation unit 1081 creates a data read command using the address of the management information held by the operating system operation unit 102.
- the storage copy control program operation unit 1081 creates a data write command for the storage device 405 in the I / O command memory 3011. Further, the storage copy control program operation unit 1081 creates an address list of the data memory 3013 to which data to be written to the storage device 405 is written in the DMA list memory 3012. Then, the storage copy control program operation unit 1081 sends the data (specifically, a data write command and a DMA list) to the storage device driver operation unit 110 to make an I / O write request. Note that the storage copy control program operation unit 1081 creates a data write command using the address of the management information held by the operating system operation unit 102.
- the storage copy control program operation unit 1081 completes the data transfer of the amount requested by the storage copy application operation unit 107 for a series of processing of data read processing from the storage device 404 and data write processing to the storage device 405. Repeat until
- the storage copy control program operation unit 1081 may multiplex read requests for the storage device 404 and write requests for the storage device 405.
- the data memory 3013 may secure a plurality of buffers 30131 as illustrated in FIG.
- the storage copy control program operation unit 1081 uses each buffer 30131 to perform data read processing from the storage device 404 and data write processing to the storage device 405 in parallel. Then, the storage copy control program operation unit 1081 repeats the data read process and the data write process until the total data transfer amount reaches the data transfer amount requested by the storage copy application operation unit 107.
- FIG. 11 is a flowchart showing an operation example of the data control system in the present embodiment.
- the storage copy application operation unit 107 requests the storage copy driver operation unit 108 to copy data between storage devices (step B1).
- the storage copy control program operation unit 1081 of the storage copy driver operation unit 108 receives a data copy request, calls the memory reservation program operation unit 1302, and the memory reservation program operation unit 1302 transfers the I / O data transfer memory 301 to the main memory 3. Is secured (step B2).
- the storage copy control program operation unit 1081 creates an I / O command in the I / O command memory 3011 and a DMA list in the DMA list memory 3012. Then, the storage copy control program operation unit 1081 makes an I / O read request by passing the data (that is, the I / O read command and the DMA list) to the storage device driver operation unit 109, and the storage device 404 receives the I / O read request. / O data is read and the read data is stored in the data memory 3013 (step B3).
- the storage copy control program operation unit 1081 creates an I / O command in the I / O command memory 3011 and a DMA list in the DMA list memory 3012. Then, the storage copy control program operation unit 1081 makes an I / O write request by passing the data to the storage device driver operation unit 110, and writes the data stored in the data memory 3013 to the storage device 405 (step S1). B4).
- the storage copy control program operation unit 1081 determines whether or not the requested data amount copy processing has been completed (step B5). If the copy processing for the requested data amount has not been completed (No in step B5), the storage copy control program operation unit 1081 repeats the processing in steps B3 to B4. On the other hand, when the copy processing of the requested data amount is completed (Yes in step B5), the storage copy control program operation unit 1081 calls the memory release program operation unit 1033, and the memory release program operation unit 1033 performs I / O data. The transfer memory 301 is released (step B6). As described above, the storage copy control program operation unit 1081 repeats the processing of steps B3 to B4 until the copy processing of the data amount requested from the storage copy application operation unit 107 is completed.
- the storage copy application operation unit 107 requests the storage copy driver operation unit 108 to copy data between the storage devices, and the memory reservation program operation unit 1302 acquires the I / O data transfer memory 301 from Step B1 to Step B2.
- the processing is the same as the processing illustrated in FIG.
- the storage copy control program operation unit 1081 creates a plurality of I / O read commands for writing data in a plurality of buffers 30131 in the data memory 3013 in the I / O command memory 3011. In addition, the storage copy control program operation unit 1081 creates a DMA list corresponding to each I / O read command in the DMA list memory 3012. Then, the storage copy control program operation unit 1081 makes a read request for a plurality of I / O data to the storage device driver operation unit 109 (that is, I / O read command and DMA list) (step B7). ).
- the storage copy control program operation unit 1081 waits until the request to the issued storage device is completed. After completion of one I / O request (step B8), the storage copy control program operation unit 1081 determines whether or not the completed I / O request is a read request (step B9). If the completed I / O request is a read request (Yes in step B9), the storage copy control program operation unit 1081 performs I / O on the data read from the storage device 404 and stored in the buffer on the data memory 301. Similar to the operation in the case where the O request is not multiplexed, the processing of step B4 (that is, data writing to the storage device 405) is performed. Thereafter, the storage copy control program operation unit 1081 waits again until the I / O request is completed.
- step B9 when the completed I / O request is not a read request (that is, a write request) in step B9 will be described.
- the storage copy control program operation unit 1081 determines that the amount of data read by the read request made so far with respect to the storage device 404 is It is determined whether or not the amount of data requested by the storage copy application operation unit 107 has been reached (step B10).
- the storage copy control program operation unit 1081 makes an I / O read request to the storage device driver operation unit 109 and stores the read data in the data memory 3013. The same processing as in step B3 is performed. Thereafter, the storage copy control program operation unit 1081 waits again until the I / O request is completed.
- step B10 determines whether the requested data amount has been reached in step B10 (Yes in step B10). If the requested data amount has been reached in step B10 (Yes in step B10), the storage copy control program operation unit 1081 determines whether all the write requests issued to the storage device driver operation unit 110 have been completed. Is determined (step B11). If all the write requests have not been completed (No in step B11), the storage copy control program operation unit 1081 waits again until the I / O request is completed. On the other hand, when all the write requests are completed (Yes in Step B11), the memory release program operation unit 1033 releases the I / O data transfer memory 301 (Step B6).
- the storage copy control program operation unit 1081 may perform predetermined data processing such as format conversion and compression in the middle of data copying.
- the storage copy driver operation unit 108 (more specifically, the storage copy control program operation unit 1081) that performs data copy from the storage device 404 to the storage device 405 in the kernel mode
- the storage device driver operation unit 109 is instructed to store data read from the storage device 404 in the data memory 3013.
- the storage copy driver operation unit 108 (more specifically, the storage copy control program operation unit 1081) instructs the storage device driver operation unit 110 to write the data stored in the data memory 3013 to the storage device 405. . Therefore, data can be copied at high speed between two storage devices that do not support direct data copying.
- FIG. 14 is a block diagram showing an example of the minimum configuration of the data control system according to the present invention.
- the data control system according to the present invention includes a CPU 80 (for example, CPU1) that performs data transfer control from a first device (for example, I / O device 401) to a second device (for example, I / O device 402) in the kernel mode. ) And a main memory 90 (for example, main memory 3) that stores data transferred from the first device to the second device.
- a CPU 80 for example, CPU1
- main memory 90 for example, main memory 3
- the CPU 80 includes first device control means 81 (for example, I / O device driver operation unit 104) that controls the first device and second device control means (for example, I / O device driver) that controls the second device.
- the operation unit 105) and a reading instruction which is an instruction to store the data read from the first device in the main memory 3 are given to the first device control means 81, and the data stored in the main memory 3 is transferred to the second memory
- a data transfer control unit 83 for example, an I / O data transfer driver operation unit 103 that performs a write instruction, which is an instruction to write to the device, to the second device control unit 82.
- Such a configuration enables high-speed data transfer between two I / O devices that do not support direct data transfer operations.
- a CPU that performs data transfer control from the first device to the second device in a kernel mode, and a main memory that stores data transferred from the first device to the second device,
- the CPU stores first device control means for controlling the first device, second device control means for controlling the second device, and data read from the first device in the main memory.
- a data control system comprising transfer control means.
- Additional remark 4 Any one of Additional remark 1 to Additional remark 3 provided with the area reservation means to ensure the area which memorize
- the main memory has an instruction command storage means for storing a read instruction command indicating a read instruction and a write instruction command indicating a write instruction, and a storage destination list which is a list indicating a storage destination of transfer data in the main memory.
- Storage destination list storage means for storing, wherein the data transfer control means creates the read instruction command and the write instruction command and stores them in the instruction command storage means, creates the storage destination list and stores the storage destination.
- the first device control unit stores the data read from the first device based on the read instruction command and the storage destination list stored in the instruction command storage unit and stored in the list storage unit.
- the second device control means stores the instruction command The data read from the storage destination indicated by the storage destination list based on the write instruction command and the storage destination list stored in the stage, and written to the second device according to any one of the supplementary notes 1 to 4 Data control system.
- Management which stores the management information address which is an address which shows the position where the management information of the 1st device and the 2nd device was memorized in association with the name of the 1st device and the 2nd device concerned
- the data control system according to appendix 5, further comprising an information address storage unit, wherein the data transfer control unit creates a read instruction command and a write instruction command based on the management information stored at the position indicated by the management information address.
- the main memory includes a plurality of buffers for storing transfer data, and the data transfer control means performs a read instruction to the first device control means in parallel for each of the buffers, and performs a second device control for each of the buffers.
- the data control system according to any one of supplementary notes 1 to 6, wherein write instructions to the means are performed in parallel.
- the CPU performs data copy control from the first storage device to the second storage device in the kernel mode, and the main memory stores data to be copied from the first storage device to the second storage device.
- the first device control means controls the first storage device, and the second device control means controls the second storage device according to any one of appendix 1 to appendix 7. The data control system described.
- a third device for storing data transferred from the first device to the second device is provided, and the data transfer control means stores the data read from the first device in the third device.
- the read instruction to perform is given to the first device control means, and the write instruction to write the data stored in the third device to the second device is given to the second device control means.
- the CPU that performs the data transfer control from the first device to the second device in the kernel mode has the instruction to store the data read from the first device in the main memory.
- the second device provided to the CPU with an instruction to write data stored in the main memory to the second device, which is performed on the first device control means for controlling the first device.
- a data control method characterized in that the data control method is performed on second device control means for controlling
- the CPU creates a read instruction command indicating a read instruction and a write instruction command indicating a write instruction, and stores the command in an instruction command storage unit included in the main memory.
- the CPU stores the transfer data in the main memory.
- a storage destination list that is a list indicating the destination is created and stored in the storage destination list storage unit included in the main memory, and the CPU is based on the read instruction command and the storage destination list stored in the instruction command storage unit, Data read from the first device is stored in the storage destination indicated by the storage destination list, and the CPU indicates the storage destination list based on the write instruction command and the storage destination list stored in the instruction command storage means. From appendix 10 to write the data read from the storage destination to the second device Data control method according to any one of serial 13.
- the CPU associates the management information address, which is an address indicating the location where the management information of the first device and the second device is stored, with the names of the first device and the second device. 15.
- Supplementary Note 16 The Supplementary Note 10 to Supplementary Note 15 in which the CPU issues a read instruction to the first device control unit in parallel for each of the plurality of buffers included in the main memory and performs a write instruction to the second device control unit for each of the buffers.
- the data control method as described in any one of these.
- the CPU that performs data transfer control from the first storage device to the second storage device in the kernel mode instructs the first device to store the data read from the first storage device in the main memory. Any one of Supplementary Note 10 to Supplementary Note 16, wherein the CPU instructs the second device control means to write data stored in the main memory to the second storage device.
- the data control method according to one.
- a read instruction for storing data read from the first device in a third device that stores data transferred from the first device to the second device is given to the first device control means.
- the data control system according to any one of supplementary note 10 to supplementary note 17, wherein a write instruction to write data stored in the third device to the second device is given to the second device control means.
- a computer having a CPU for controlling data transfer from a first device to a second device in a kernel mode and a main memory for storing data transferred from the first device to the second device
- a data control program to be applied to the computer a first device control process for controlling the first device, a second device control process for controlling the second device, and the first device
- a read instruction that is an instruction to store data read from the main memory is executed in the first device control process
- a write instruction that is an instruction to write the data stored in the main memory to the second device is Data control program for executing the data transfer control process executed in the second device control process Grams.
- Supplementary note 22 Any one of Supplementary note 19 to Supplementary note 21, which causes the computer to execute an area securing process for securing an area for storing transferred data in the main memory and an area releasing process for releasing the area.
- the computer In the data transfer control process, the computer generates a read instruction command indicating a read instruction and a write instruction command indicating a write instruction, and stores the command in an instruction command storage unit included in the main memory for transfer in the main memory.
- a storage destination list that is a list indicating the storage destination of data is created and stored in a storage destination list storage unit included in the main memory.
- a read instruction command stored in the instruction command storage unit and Based on the storage destination list the data read from the first device is stored in the storage destination indicated by the storage destination list
- the write instruction command and the storage destination stored in the instruction command storage unit Based on the list, read from the storage location indicated by the storage location list.
- Data control program according to the Tsu data any one of Appendices 22 from the second appendix 19 for writing to the device.
- the management information address which is an address indicating the location where the management information of the first device and the second device is stored in the computer is assigned to the first device and the second device.
- Item 23 For data control according to appendix 23, which creates a read instruction command and a write instruction command based on the management information stored at the position indicated by the management information address stored in the management information address storage means stored in association with the name of program.
- a computer causes a read instruction in the first device control process to be executed in parallel for each of a plurality of buffers included in the main memory, and a write instruction in the second device control process is executed in parallel for each of the buffers.
- the data control program according to any one of supplementary note 19 to supplementary note 24 to be executed.
- a CPU that performs data transfer control from the first storage device to the second storage device in a kernel mode, and a main memory that stores data transferred from the first storage device to the second storage device
- a data control program applied to a computer provided with the computer, wherein the computer controls the first storage device by a first device control process, and the second device control process controls the second storage device.
- the data control program according to any one of supplementary notes 19 to 25 to be controlled.
- Supplementary Note 27 A read instruction for causing a computer to store data read from the first device in the data transfer control process in a third device that stores data transferred from the first device to the second device. Any one of Supplementary Note 19 to Supplementary Note 26 that causes the second device control process to execute a write instruction to execute the first device control process and write the data stored in the third device to the second device.
- the present invention is preferably applied to a computer system that performs control to move data at high speed between two I / O devices.
- the present invention is also preferably applied to a computer system that performs high-speed data transfer while processing data transferred between two I / O devices.
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Abstract
Description
図1は、本発明の第1の実施形態におけるデータ制御システムの例を示すブロック図である。本実施形態におけるデータ制御システムは、CPU1と、メインメモリ3と、第1のI/OデバイスであるI/Oデバイス401と、第2のI/OデバイスであるI/Oデバイス402と、それぞれのI/Oデバイスを接続するブリッジ2とを含む。なお、本実施形態では、I/Oデバイス401からI/Oデバイス402へデータ転送が行われるものとする。
図7は、本発明の第2の実施形態におけるデータ制御システムの例を示すブロック図である。なお、第1の実施形態と同様の構成については、図1と同一の符号を付し、説明を省略する。本実施形態におけるデータ制御システムは、CPU1と、メインメモリ3と、第1のI/OデバイスであるI/Oデバイス401と、第2のI/OデバイスであるI/Oデバイス402と、I/Oデバイス403と、それぞれのI/Oデバイスを接続するブリッジ2とを含む。すなわち、第2の実施形態におけるデータ制御システムは、I/Oデバイス403を備える点において、第1の実施形態におけるデータ制御システムと異なる。
次に、第3の実施形態について説明する。第3の実施形態におけるデータ制御システムは、第1の実施形態においてデータ転送を行うI/Oデバイスがストレージデバイスになったものである。ここで、ストレージデバイスとは、SCSIやSAS(Serial Attached SCSI)、SATAなどを始めとする、ストレージの規格に準拠するデータ記憶デバイスである。本実施形態では、ストレージコピーの際に行われるデータ転送について詳しく説明する。
付記10から付記17のうちのいずれか1項に記載のデータ制御システム。
2 ブリッジ
3 メインメモリ
101 I/Oデータ転送アプリケーション動作部
102 オペレーティングシステム動作部
103 I/Oデータ転送ドライバ動作部
104,105 I/Oデバイスドライバ動作部
106 I/Oデータ転送ドライバ動作部
107 ストレージコピーアプリケーション動作部
108 ストレージコピードライバ動作部
109,110 ストレージデバイスドライバ動作部
301 I/Oデータ転送メモリ
302,303,304 プログラム
401,402,403 I/Oデバイス
404,405 ストレージデバイス
501,502 PCIエクスプレスバス
Claims (10)
- 第一のデバイスから第二のデバイスへのデータ転送制御をカーネルモードで行うCPUと、
前記第一のデバイスから第二のデバイスへ転送されるデータを記憶するメインメモリとを備え、
前記CPUは、
前記第一のデバイスを制御する第一デバイス制御手段と、
前記第二のデバイスを制御する第二デバイス制御手段と、
前記第一のデバイスから読み取ったデータを前記メインメモリに記憶させる指示である読み取り指示を前記第一デバイス制御手段に対して行い、前記メインメモリに記憶されたデータを前記第二のデバイスに書き込む指示である書き込み指示を前記第二デバイス制御手段に対して行うデータ転送制御手段とを含む
ことを特徴とするデータ制御システム。 - データ転送制御手段は、第二のデバイスに書き込む指示を行う前に、メインメモリに記憶されたデータに対して予め定められた処理を行う
請求項1記載のデータ制御システム。 - データ転送制御手段は、第一のデバイスから第二のデバイスへのデータ転送要求が行われたときに、要求されたデータ量の転送が完了するまで、第一デバイス制御手段に対する読み取り指示および第二のデバイスに対する書き込み指示を繰り返す
請求項1または請求項2記載のデータ制御システム。 - メインメモリに、転送されるデータを記憶する領域を確保する領域確保手段と、
前記領域を解放する領域解放手段とを備えた
請求項1から請求項3のうちのいずれか1項に記載のデータ制御システム。 - メインメモリは、
読み取り指示を示す読み取り指示コマンドおよび書き込み指示を示す書き込み指示コマンドを記憶する指示コマンド記憶手段と、
メインメモリ内における転送データの記憶先を示すリストである記憶先リストを記憶する記憶先リスト記憶手段とを含み、
データ転送制御手段は、前記読み取り指示コマンドおよび前記書き込み指示コマンドを作成して前記指示コマンド記憶手段に記憶させ、前記記憶先リストを作成して前記記憶先リスト記憶手段に記憶させ、
第一デバイス制御手段は、前記指示コマンド記憶手段に記憶された読み取り指示コマンドおよび記憶先リストに基づいて、第一のデバイスから読み取ったデータを当該記憶先リストが示す記憶先に記憶させ、
第二デバイス制御手段は、前記指示コマンド記憶手段に記憶された書き込み指示コマンドおよび記憶先リストに基づいて、当該記憶先リストが示す記憶先から読み取ったデータを第二のデバイスに書き込む
請求項1から請求項4のうちのいずれか1項に記載のデータ制御システム。 - 第一のデバイスおよび第二のデバイスの管理情報が記憶された位置を示すアドレスである管理情報アドレスを、当該第一のデバイスおよび第二のデバイスの名前と対応付けて記憶する管理情報アドレス記憶手段を備え、
データ転送制御手段は、前記管理情報アドレスが示す位置に記憶された管理情報に基づいて、読み取り指示コマンドおよび書き込み指示コマンドを作成する
請求項5記載のデータ制御システム。 - メインメモリは、転送データを記憶する複数のバッファを含み、
データ転送制御手段は、前記バッファごとに第一デバイス制御手段に対する読み取り指示を並列に行い、前記バッファごとに第二デバイス制御手段に対する書き込み指示を並列に行う
請求項1から請求項6のうちのいずれか1項に記載のデータ制御システム。 - CPUは、第一のストレージデバイスから第二のストレージデバイスへのデータコピー制御をカーネルモードで行い、
メインメモリは、前記第一のストレージデバイスから第二のストレージデバイスへコピーされるデータを記憶し、
第一デバイス制御手段は、前記第一のストレージデバイスを制御し、
第二デバイス制御手段は、前記第二のストレージデバイスを制御する
請求項1から請求項7のうちのいずれか1項に記載のデータ制御システム。 - 第一のデバイスから第二のデバイスへのデータ転送制御をカーネルモードで行うCPUが、当該第一のデバイスから読み取ったデータをメインメモリに記憶させる指示を、自CPUに備えた当該第一のデバイスを制御する第一デバイス制御手段に対して行い、
前記CPUが、前記メインメモリに記憶されたデータを前記第二のデバイスに書き込む指示を、自CPUに備えた当該第二のデバイスを制御する第二デバイス制御手段に対して行う
ことを特徴とするデータ制御方法。 - 第一のデバイスから第二のデバイスへのデータ転送制御をカーネルモードで行うCPUおよび前記第一のデバイスから第二のデバイスへ転送されるデータを記憶するメインメモリを備えたコンピュータに適用されるデータ制御用プログラムであって、
前記コンピュータに、
前記第一のデバイスを制御する第一デバイス制御処理、
前記第二のデバイスを制御する第二デバイス制御処理、および、
前記第一のデバイスから読み取ったデータを前記メインメモリに記憶させる指示である読み取り指示を前記第一デバイス制御処理で実行させ、前記メインメモリに記憶されたデータを前記第二のデバイスに書き込む指示である書き込み指示を前記第二デバイス制御処理で実行させるデータ転送制御処理
を実行させるためのデータ制御用プログラム。
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- 2012-02-23 WO PCT/JP2012/001229 patent/WO2012117701A1/ja active Application Filing
- 2012-02-23 JP JP2013502184A patent/JP6395203B2/ja not_active Expired - Fee Related
- 2012-02-23 BR BR112013020341-2A patent/BR112013020341B1/pt not_active IP Right Cessation
- 2012-02-23 CN CN201280008715.0A patent/CN103370697B/zh not_active Expired - Fee Related
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Also Published As
Publication number | Publication date |
---|---|
JP6395203B2 (ja) | 2018-09-26 |
JPWO2012117701A1 (ja) | 2014-07-07 |
EP2682870B1 (en) | 2016-11-02 |
US20130346643A1 (en) | 2013-12-26 |
BR112013020341B1 (pt) | 2021-06-08 |
EP2682870A4 (en) | 2015-02-25 |
CN103370697A (zh) | 2013-10-23 |
BR112013020341A2 (pt) | 2017-11-14 |
EP2682870A1 (en) | 2014-01-08 |
US9280498B2 (en) | 2016-03-08 |
CN103370697B (zh) | 2016-09-07 |
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