WO2012111401A1 - 撮像装置、撮像素子、および撮像制御方法、並びにプログラム - Google Patents
撮像装置、撮像素子、および撮像制御方法、並びにプログラム Download PDFInfo
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- WO2012111401A1 WO2012111401A1 PCT/JP2012/051600 JP2012051600W WO2012111401A1 WO 2012111401 A1 WO2012111401 A1 WO 2012111401A1 JP 2012051600 W JP2012051600 W JP 2012051600W WO 2012111401 A1 WO2012111401 A1 WO 2012111401A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/71—Circuitry for evaluating the brightness variation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/70—Circuitry for compensating brightness variation in the scene
- H04N23/73—Circuitry for compensating brightness variation in the scene by influencing the exposure time
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/53—Control of the integration time
- H04N25/531—Control of the integration time by controlling rolling shutters in CMOS SSIS
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/53—Control of the integration time
- H04N25/533—Control of the integration time by using differing integration times for different sensor regions
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/50—Control of the SSIS exposure
- H04N25/57—Control of the dynamic range
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
- H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
Definitions
- the present invention relates to an imaging device, an imaging device, an imaging control method, and a program. More specifically, the present invention relates to an imaging apparatus, an imaging element, an imaging control method, and a program that perform exposure control in units of areas.
- CMOS Complementary Metal Oxide Semiconductor
- the dynamic range is one of the performance axes of the image sensor (image sensor).
- the dynamic range is the brightness width of incident light that can be converted as an effective image signal.
- the large dynamic range means that it can be converted into an image signal from dark light to bright light, and means that the image sensor has good performance.
- Many ideas for expanding the dynamic range of the image sensor (image sensor) have been proposed so far. Among them, there is a technique of performing different exposure control for each pixel.
- Each pixel of a normal image sensor is provided with a photodiode (PD: Photo Diode), and incident light to the photodiode (PD) corresponding to each pixel is converted into electric charge by photoelectric conversion. Since the amount of charge that can be accumulated in the PD of each pixel is determined, a charge overflow occurs for incident light that is too strong, resulting in a saturation state in which no more signals are accumulated, and as a result, signals above the saturation level can be extracted. Can not. Also, due to noise generated in the pixel and readout circuit, the generated charge is buried in the noise for the too weak incident light, and the signal cannot be extracted.
- PD Photo Diode
- Patent Document 1 Japanese Patent Publication No. 2003-527775. This is because one exposure period is divided into a plurality of sub-periods, and a binary signal indicating whether or not to integrate the exposure signal in each sub-period is used as a program (Prg) signal line in the row (Row) direction and the column (Column) direction. With this configuration, each pixel is distributed. With this configuration, exposure control for each pixel is realized.
- Non-Patent Document 1 (Takayuki Hamamoto, Kiyoharu Aizawa, “Design and Prototyping of Adaptive Storage Time Image Sensor (Image Sensor)”, Journal of the Institute of Image Information and Television Engineers: 55 (2), 271-278, February, 2001) is a configuration that realizes exposure control for each pixel by verifying the accumulated charge during the exposure for each pixel as a non-destructive state for each pixel and resetting the immediate charge for the pixel determined to be saturated. Is disclosed.
- Patent Document 2 Japanese Patent Laid-Open No. 2010-136205 discloses a means for determining, for each pixel, one of two types of exposure times, ie, an ultra-long time or a short time, based on an output of an image sensor (image sensor).
- a configuration is disclosed in which exposure control for each pixel is realized by a pixel circuit in which reset and charge transfer timing can be controlled for each pixel.
- the above-described conventional technology has a common problem of difficulty in wiring as described below.
- In order to perform different exposure control for each pixel it is necessary to transmit information related to exposure control separately for each pixel, which increases the number of wiring lines for signal transmission.
- Such a configuration in which pixel-corresponding wiring is added is possible with a conventional imaging device with a small number of pixels, but it is extremely difficult to cope with a recent imaging device with a dramatic increase in the number of pixels. That is the current situation.
- Patent Document 1 it is possible in principle to perform exposure control in multiple stages.
- the same bit map as the number of pixels of the sensor that encodes the exposure control is applied to the row (Row).
- a configuration in which a time-series encoded signal (Prg) in the direction and column direction is generated in the sensor for each frame, or a simultaneous sequence is supplied from outside the sensor for each frame is required. It is almost impossible for a sensor with a high number of pixels to execute such signal generation or supply in a short time.
- Non-Patent Document 1 discloses a wiring reduction configuration by performing saturation determination and reset control for each pixel in parallel in each column (Column). However, if the number of pixels increases, it is expected that control will not be in time even if a plurality of columns are controlled in parallel.
- Patent Document 2 can realize exposure control for each pixel with a simpler pixel control structure because the degree of freedom is lower than that of the technique of Patent Document 1. Therefore, it is possible to relatively easily control whether each pixel has two stages (long / short exposure two stages) on the entire imaging surface.
- the conventional technique for performing different exposure control for each pixel in order to improve the dynamic range of the image sensor (image sensor) has difficulty in wiring and control configuration for reliably transmitting the control signal to each pixel. Therefore, it is considered that it is not suitable for application to an imaging element (image sensor) having a high pixel count.
- the present invention has been made in view of such a situation, and an imaging apparatus, an imaging element, an imaging control method, and an imaging control method that realize exposure control in units of regions that can be applied to an imaging element having a high pixel count, and
- the purpose is to provide a program.
- the first aspect of the present invention is: A luminance evaluation unit that performs luminance evaluation in units of pixel groups composed of a plurality of pixels; An exposure control value calculation unit that calculates an exposure control value for each pixel group according to an evaluation result of the luminance evaluation unit;
- the image pickup apparatus includes an image pickup device that outputs a control signal corresponding to an exposure control value in units of pixel groups calculated by the exposure control value calculation unit to constituent pixels of each pixel group to perform exposure control in units of pixel groups.
- the imaging device sequentially outputs, as the control signal, an exposure control signal having the same pattern in time series for a plurality of pixels in the pixel group.
- the exposure control is performed so that the exposure times of a plurality of pixels belonging to one pixel group are the same.
- the imaging device controls the control signal by combining a control signal in a row unit and a control signal in a column unit. A control process specifying the target pixel is executed.
- the imaging device sets an exposure start control signal indicating the start timing of the exposure process and a read start control signal indicating the start timing of the read process for each pixel group. Then, exposure control is performed in units of pixel groups.
- the imaging element includes a plurality of row line selectors that output an exposure control signal for a pixel group set in a row direction, and the plurality of row line selectors. It has a hierarchical structure with a Row group selector that outputs a control signal that indicates control signal output timing.
- the Row line selector outputs a control signal in units of pixel groups to be controlled in accordance with a control signal instructing a control signal output timing from the Row group selector. To do.
- the Row line selector includes a shutter control signal generation unit that outputs an exposure pattern signal for executing an exposure process for each pixel, and a read pattern for executing a read process for each pixel.
- a read control signal generation unit that outputs a signal, and the shutter control signal generation unit or the read control signal generation unit generates according to the type of the control signal that instructs the control signal output timing from the row group selector Perform selective output processing of control signals.
- the imaging device includes a column ADC that performs AD conversion in parallel with respect to pixel signals of one row of the imaging device, It has a hierarchical structure of a column (Column) group selector that generates a control signal for each pixel group, and a plurality of column (Column) line selectors that receive the control signal for each pixel group and generate a control signal in the pixel group. It has a column selector.
- the pixel group is a pixel group composed of a set of adjacent pixels.
- the pixel group is a pixel group including a set of pixels in a plurality of separated regions.
- the image pickup device performs exposure control in units of pixel groups by outputting a control signal corresponding to an exposure control value set in units of pixel groups obtained by dividing a plurality of pixels on the imaging surface to constituent pixels of the pixel groups.
- control signal is subjected to a process of sequentially outputting an exposure control signal having the same pattern in time series to a plurality of pixels in the pixel group. Exposure control is performed with the same exposure time for a plurality of pixels belonging to the pixel group.
- control signal is specified by combining a control signal in row units and a control signal in column units as the control signal.
- the control processing performed is executed.
- an exposure start control signal indicating the start timing of the exposure process and a read start control signal indicating the start timing of the read process are set for each pixel group, Perform exposure control.
- the third aspect of the present invention provides An imaging control method executed in the imaging device, A luminance evaluation step in which the luminance evaluation unit performs luminance evaluation in units of pixel groups composed of a plurality of pixels; An exposure control value calculating unit that calculates an exposure control value for each pixel group according to an evaluation result in the luminance evaluation step; Imaging having an imaging step in which an imaging element outputs a control signal corresponding to the exposure control value for each pixel group calculated in the exposure control value calculation step to the constituent pixels of each pixel group to execute exposure control for each pixel group It is in the control method.
- the fourth aspect of the present invention provides A program for executing an imaging control process in an imaging apparatus; A luminance evaluation step for causing the luminance evaluation unit to perform luminance evaluation in units of pixel groups composed of a plurality of pixels; An exposure control value calculation step for causing an exposure control value calculation unit to calculate an exposure control value for each pixel group according to the evaluation result in the luminance evaluation step; Causing the imaging device to execute an imaging step of outputting a control signal corresponding to the exposure control value of each pixel group calculated in the exposure control value calculating step to the constituent pixels of each pixel group and executing exposure control of each pixel group In the program.
- the program of the present invention is a program that can be provided by, for example, a storage medium or a communication medium provided in a computer-readable format to an image processing apparatus or a computer system that can execute various program codes.
- a program in a computer-readable format, processing corresponding to the program is realized on the information processing apparatus or the computer system.
- system is a logical set configuration of a plurality of devices, and is not limited to one in which the devices of each configuration are in the same casing.
- a configuration is realized in which different exposure control is executed in units of pixel groups obtained by dividing a plurality of pixels on the imaging surface of the imaging device.
- Luminance evaluation is performed in units of pixel groups composed of a plurality of pixels, and exposure control values in units of pixel groups are calculated according to the evaluation results.
- the image sensor outputs a control signal corresponding to the calculated exposure control value for each pixel group to the constituent pixels of each pixel group to execute exposure control for each pixel group.
- an exposure control signal having the same pattern is sequentially output to a plurality of pixels in a pixel group in time series, and exposure control in units of groups in which the exposure times of a plurality of pixels belonging to one pixel group are made the same. Is realized.
- FIG. 3 is a diagram illustrating an example of a correspondence relationship between an internal configuration of a Row selector and a block (pixel group) set in an image sensor 103.
- FIG. 3 is a diagram illustrating an example of a correspondence relationship between an internal configuration of a Row selector and a block (pixel group) set in an image sensor 103.
- FIG. 7 is a block diagram illustrating an internal configuration of one Row line selector shown in FIG. 6.
- FIG. 10 is a timing chart for explaining the operation of the row line selector when a control signal SHy indicating SHUTTER (shutter) control start for instructing start of exposure processing is input. It is a figure explaining operation
- FIG. 6 is a timing diagram for explaining control of a row group selector when imaging is performed by exposure control (shutter control) with a normal overall exposure time.
- FIG. 13 is a timing chart for explaining the operation of the row line selector when a control signal SHy indicating SHUTTER (shutter) control start to instruct the start of exposure processing is input to one row line selector in the row selector 132 of FIG. It is.
- FIG. 13 is a timing chart for explaining the operation of the row line selector when the control signal RDy indicating the start of reading (reading) control for instructing the start of reading processing is input to one row line selector in the row selector 132 of FIG. It is. It is a figure explaining the hierarchical structure of the Row selector which forms the pixel group from which an area
- the imaging apparatus includes a lens 101, a diaphragm 102, an imaging element (image sensor) 103, a DSP block 104, an LCD driver 105, an LCD 106, a CODEC 107, a memory 108, a CPU 109, and an input device 110.
- the input device 110 includes operation buttons such as a shutter button on the camera body.
- the DSP block 104 is a block having a signal processing processor and an image RAM for temporarily storing a captured image output from the image sensor 103.
- a signal processor performs pre-programmed image processing on the image data stored in the image RAM.
- the DSP block is simply referred to as a DSP.
- Incident light passing through the optical system and reaching the image sensor (image sensor) 103 is converted into image data by the image sensor (image sensor) 103 and temporarily stored in an image memory in the DSP 104.
- the image sensor (image sensor) 103 is controlled to output image data at a constant frame rate.
- Image data is sent to the DSP 104 at a constant rate, and after appropriate image processing is performed there, the image data is sent to the LCD driver 105 and / or the CODEC 107.
- the LCD driver 105 converts the image data sent from the DSP 104 into an analog signal, and outputs it to the LCD 106 for display.
- the LCD 106 serves as a camera finder in this embodiment.
- the CODEC 107 encodes image data sent from the DSP 104, and the encoded image data is recorded in the memory 108.
- the memory 108 is, for example, a recording device using a semiconductor, a magnetic recording medium, a magneto-optical recording medium, an optical recording medium, or the like.
- the CPU 109 and the DSP 140 can execute various processes according to a program recorded in advance in the memory 108, for example, and the processes described below can also be executed according to the program.
- the image sensor (image sensor) 103 can capture one image by setting different exposures for different pixel regions provided in the image sensor, that is, different exposure times for each region. For example, an area where a dark subject exists in one scene to be photographed is a bright exposure, that is, a long exposure area, while an area where a bright subject exists is photographed as a dark exposure, that is, a short exposure area, and one image data. Is output. In this way, image data with less noise and saturation can be generated by performing shooting with optimum exposure corresponding to the brightness of the subject in each area unit.
- FIG. 2 is a block diagram illustrating a processing configuration for exposure evaluation and exposure control value calculation according to this embodiment.
- a figure indicated by two parallel horizontal lines such as the block average luminance 114, the exposure control value 116, and the exposure control value 117 represents data or a memory that stores the data.
- a figure such as the image sensor 103 indicated by a rectangle represents a process execution unit or process.
- the exposure evaluation process and the exposure control value calculation process performed by the configuration shown in FIG. 2 are processes executed in the DSP 104 shown in FIG. 1, and the configuration shown in FIG. 2 is a configuration set in the DSP 104. .
- the image data output from the image sensor (image sensor) 103 is photographed with different exposure for each region. Accordingly, since the image data output from the image sensor (image sensor) 103 shown in FIG. 1 is used as it is, a signal output based on different exposure time settings is made for each region. It is necessary to set the final output value.
- the exposure control value at the time when the image data output from the image sensor (image sensor) 103 is captured is stored in the memory in the DSP 104 as the exposure control value 117.
- Image data output from the image sensor (image sensor) 103 is compensation processing for calculating an output value as a final pixel value for each pixel by the exposure compensation multiplier 111 based on the exposure control value 117 stored in the memory. Execute. Thereafter, the image data is sent to the signal processing unit 112, and the signal processing unit 112 performs camera signal processing such as white balance adjustment, demosaic, linear matrix, gamma correction, aperture correction, and the like, and can be output as a camera photographed image. It becomes.
- image data output from the image sensor (image sensor) 103 is also input to the block luminance evaluation unit 113.
- the block luminance evaluation unit 113 evaluates the average luminance value for each block area obtained by dividing the image into rectangles.
- the evaluated luminance average value for each block is stored in the memory as the block average luminance 114.
- a block (pixel group) defined as an exposure control unit is a rectangular area.
- the block is not limited to a rectangular area.
- the exposure control value calculation unit 115 calculates an exposure control value input to the image sensor (image sensor) 103 based on the block average luminance 114.
- the exposure control value is calculated from the average luminance of each block and a preset target luminance value.
- the target luminance value is an output luminance value expected from the image sensor (image sensor) 103 by exposure control, and is usually set to a luminance level of about 18% to 20% of the white level.
- the image sensor (image sensor) 103 performs exposure control for each block which is an area obtained by dividing the imaging surface by a rectangle.
- the exposure control value calculation unit 115 calculates the exposure control value so as to correspond to the block region one by one, and stores the calculated exposure control value in the memory as the exposure control value 116.
- the image sensor (image sensor) 103 captures the image data of the next frame based on the exposure control value 116 corresponding to the block stored in the memory. Note that another exposure control value 117 shown in FIG. 2 is copy data of the exposure control value 116, and information for performing exposure compensation on the image data output from the image sensor (image sensor) 103 next time. Used as
- the output luminance value from each component pixel of the image sensor (image sensor) 103 is defined as I.
- Output luminance value: I is Incident light quantity: L Square of aperture diameter: A 2 , Shutter time: T and Sensor sensitivity: S, It is proportional to these.
- the output luminance value I from each component pixel of the image sensor (image sensor) 103 can be calculated by the following calculation formula (Formula 1).
- I k ⁇ L ⁇ A 2 ⁇ T ⁇ S (Formula 1)
- k is a proportionality coefficient.
- the output luminance value I is proportional to the shutter time T.
- the shutter time corresponds to the exposure time. Therefore, the shutter time Tt for obtaining the predetermined target luminance value It can be calculated according to the following (Equation 2) using the current output luminance value I and the shutter time T.
- Tt T (It / I) (Equation 2)
- the average luminance of the current block (pixel group) is I, T, the current shutter time of each block (pixel group)
- Tt shutter time Tt for obtaining a predetermined target luminance value It
- the exposure control in units of blocks is executed based on the average luminance in units of blocks (pixel groups) made up of a plurality of pixels, not the exposure control in units of pixels based on the luminance in units of pixels.
- FIG. 3 is a diagram illustrating the configuration of the image sensor (image sensor) of the present embodiment.
- Each small square in the figure represents a pixel arranged in a two-dimensional grid on the imaging surface. That is, it represents a pixel having a photoelectric conversion element.
- Each pixel receives control signals RSr, TRr, and SLr via three types of control lines extending in the horizontal direction, and further receives a control signal RSTRc via one type of control line extending in the vertical direction.
- the pixel signal SIGc that is, the charge accumulated in each pixel in accordance with the incident light is output via a signal line extending in the vertical direction.
- All the control lines that transmit the three types of control signals (RSr, TRr, SLr) in the horizontal direction are all connected to a Row selector (row selector) 119, and the control signal is transmitted from the Row selector 119 toward each pixel.
- All the vertical control lines are connected to a column selector (column selector) 120, and a control signal is transmitted from the column selector 120 to each pixel.
- the row selector 119 and the column selector 120 are connected to a timing generator (TG) 118, and the timing generator (TG) 118 accepts an input of an exposure control signal from the outside to the image sensor (image sensor) 103. Yes.
- the exposure control signal input from the outside is the exposure control value 116 described with reference to FIG. 2, that is, the exposure control value in block units.
- the timing generator (TG) 118 converts the exposure control value for each block into shutter control timing information for each block, and transmits it to the row selector 119 and the column selector 120.
- the row selector 119 and the column selector 120 generate control signals for each row and each column, and transmit the control signals RSr, TRr, SLr, and RSTRc to each pixel.
- the output pixel signal SIGc output from each pixel passes through a switch for selecting in column units.
- the switch is opened and closed by a column selection signal SLc from the column selector 120.
- a pixel signal SIGc from each pixel of the Column selected by the Column selection signal SLc is input to a CDS (Correlated Double Sampling circuit) 121, where reset noise is suppressed, and then input to an ADC (Analog-Digital Converter circuit). Then, after being converted from an analog signal to a digital signal, it is output from an image sensor (image sensor) as an image output.
- CDS Correlated Double Sampling circuit
- FIG. 4 is an equivalent circuit for explaining a configuration example of one pixel in the image sensor (image sensor) of this embodiment.
- a portion surrounded by a broken-line rectangle in FIG. 4 corresponds to one pixel.
- Each pixel receives control signals RSr, TRr, and SLr from three types of control lines extending horizontally.
- control signals RSr, TRr, and SLr all pixels belonging to the same row (row) are input from the same control line.
- One pixel inputs a control signal RSTRc via a control line extending vertically.
- This control signal RSTRc is inputted from the same control line to all pixels belonging to the same column (column).
- a charge corresponding to the amount of light is generated by photoelectric conversion in the photodiode PD.
- the charge accumulated in the photodiode PD is transferred to the floating diffusion FD via the transistor M2.
- the gate of the transistor M2 is controlled by the control signals TRr and RSTRc via the transistor M1.
- the transistor M4 performs an operation of resetting the electric charge accumulated in the floating diffusion FD when it is energized.
- the gate of the transistor M4 is controlled by the control signals RSr and RSTRc through the transistor M3.
- the charge accumulated in the floating diffusion FD is amplified by the transistor M5, and the output pixel signal SIGc is output via the transistor M6.
- the gate of the transistor M6 is controlled by the control signal SLr.
- the pixel operates in the following two patterns: (A) Charge accumulation process based on exposure process “SHUTTER (shutter)” (b) Accumulated charge output process based on read process “READ (read)” These two processes are performed. When neither of the operations (a) and (b) is performed, the state in which the exposed charge is accumulated is maintained.
- FIG. A timing chart for explaining the control signal pattern during the operation of these two processes. Show. The horizontal axis is time.
- the control signal RSTRc in the Column (column) direction creates a state in which the pixel is controllable by holding the active state when the column pixel is in the pixel control period.
- the control signals RSr and TRr in the Row direction are simultaneously active while RSTRc is active.
- the transistors M2 and M4 in FIG. 4 are simultaneously opened, and the charge stored in the photodiode PD and the floating diffusion FD is reset, that is, the exposure is started by the electronic shutter.
- the control signal SLr in the row direction holds the active state simultaneously with the control signal RSTRc during the pixel control period.
- the control signal RSr operates first, and then the control signal TRr sequentially becomes active.
- the control signal RSr becomes active, the transistor M4 is opened, and the charge of the floating diffusion FD is reset.
- the transistor M6 is opened by the control signal SLr.
- Signal SIGc is output.
- the transistor M2 is opened, and the charge accumulated in the photodiode PD is transferred to the floating diffusion FD.
- the output pixel signal SIGc corresponding to the transferred charge is output via the signal line.
- the reset state and accumulation state signals sequentially output by the READ operation are respectively held in the CDS, and then signals corresponding to the reset noise canceled by the difference detection operation in the CDS are generated.
- the exposure time (shutter time) is different for each pixel group including a plurality of pixels.
- a block (pixel group) is formed for each region obtained by dividing the imaging surface of the image sensor (image sensor) 103 into rectangular blocks, and different exposure times (shutter times) are provided for each block (pixel group). ) Is an example of performing control.
- FIG. 6 rectangular blocks (pixel groups) set in the image sensor 103 are indicated by broken-line rectangles.
- FIG. 6 an example in which one block includes pixels of P rows (Row) and Q columns (Column) is shown as an example.
- Various settings can be made for the block setting.
- the total number of pixel columns (Column) of the entire image sensor is W columns.
- the horizontal direction is the x direction and the vertical direction is the y direction.
- the block identifier (address) of the upper left block (pixel group) in FIG. 6 is (x1, yi).
- the block on the right side of the block (x1, yi) is the block (x2, yi).
- the block adjacent to the block (x1, yi) is the block (x1, yi + 1).
- the rightmost block in the horizontal direction of the block (x1, yi) is the block (xN, yi), and N blocks (x1, yi) to (xN, yi) are set in the horizontal direction of one block. Is done.
- the internal configuration of the row selector (row selector) 119 of this embodiment has the configuration shown in FIG. 6, the row selector (row selector) 119 includes a row group selector 123 that generates a control signal (SHy, RDy) in block (pixel group) units, and a block (pixel group) unit from the row group selector 123.
- the control signal (SHy, RDy) is input to generate a control signal to be output to the pixels in the block (pixel group).
- the row group selector 123 selects each row line selector 124 from (A) Start of SHUTTER control (SHy), or (B) READ control start (RDy), The above two types of control signals are selected and transmitted.
- control signals are (a) exposure start timing or (b) read start timing transmission in block (pixel group) units, and at the same time, a plurality of rows arranged in the horizontal direction for which one Row line selector 124 is responsible. It includes designation information indicating which of the blocks (pixel groups) is to be controlled.
- the row line selector 124 receives the control signal SHy or RDy from the row group selector 123 and applies all of the pixels in the block (pixel group) corresponding to the block designation information included in the input control signal to the FIG.
- A Charge accumulation process based on exposure process “SHUTTER (shutter)”
- Accumulated charge output process based on read process “READ (read)”
- a control signal pattern of either of these two processes is transmitted.
- a single block (pixel group) includes a plurality of blocks extending over several rows (Row) and several columns (Column). For example, in the example shown in FIG. 6, P ⁇ Q pixels are included in one block. Therefore, in order to complete the operation of one block (pixel group), it is necessary to appropriately shift the control signal to be given to each pixel in the block.
- the Row line selector 124 illustrated in FIG. 6 generates a control signal so that all the pixels in the pixel group operate at appropriate timing.
- FIG. 7 is a block diagram for explaining the internal configuration of one Row line selector 124 shown in FIG.
- One Row line selector includes N line selectors 125, 126,..., 127, a SHUTTER (shutter) control signal generator 128, a READ (readout) control signal generator 129, and P row selection switches 130. Is done.
- N corresponding to the number of line selectors is the number of blocks (pixel groups) arranged in the horizontal direction that are handled by the same Row line selector.
- P corresponding to the number of row selection switches 130 is the number of rows (rows) handled by the same row line selector.
- Each of the line selectors 125, 126,..., 127 is a control signal from the row group selector 123.
- Start of SHUTTER control SHy
- READ control start RDy
- they are control signals for the blocks (pixel groups) that they are responsible for, they generate a timing signal that sends a control signal to each pixel, and send the timing signal to the SHUTTER control signal generator 128
- the signals are output to the READ control signal generator 129 and the P row selection switches 130 to control them. That is, each of the N line selectors 125, 126,..., 127 is set for each of the N blocks (pixel groups) in the horizontal direction, and sets the output timing of the control signal corresponding to each block. To do.
- the SHUTTER control signal generator 128 and the READ control signal generator 129 are circuits for generating the pixel control patterns shown in FIGS. 5A and 5B, respectively.
- the SHUTTER control signal generator 128 is (A) A circuit for generating the pixel control pattern shown in FIG. 5A used in the “SHUTTER” process as the exposure process.
- the READ control signal generator 129 is (B) A circuit for generating the pixel control pattern shown in FIG. 5B used in the “READ” process as the readout process.
- any one of the line selectors 125, 126,..., 127 is inputted with a control signal (timing signal) from the active line selector, and the above (a), (b), that is, FIG. ) And (b) are generated, and the output is output toward all rows.
- the control signal once passes through the row selection switch 130 for each row, and the row selection switch 130 outputs a control signal output from any of the N line selectors 125, 126,. It is opened by (timing signal), and a pixel control signal is transmitted to the row.
- FIG. 7 is a timing chart for explaining the operation of the row line selector 124 when a control signal SHy indicating SHUTTER (shutter) control start for instructing the start of exposure processing is input to one row line selector 124 shown in FIG. It is shown in FIG.
- FIG. 8 shows the leftmost block (pixel group) among the blocks (x1, yi) to (xN, yi) which are blocks (pixel groups) to be controlled by the i-th row line selector (yi). It is an example of a process at the time of the input of the SHUTTER (shutter) start control signal (SHy) with respect to (x1).
- the horizontal axis is time, and each line is in order from the top.
- a control signal SHy to the yi-th row line selector 124 (see FIG. 6)
- RSTRc control signal controlled by the Column selector 120 (see FIG. 3) (c1st, c2th,..., CQth, c (Q + 1) th, cWth Column from the top)
- the yi-th row line selector 124 takes charge.
- Q is a block (pixel group) that is a block (pixel group) to be controlled by the i-th row line selector (yi), and is a block (x1, yi) that is the x1th block (pixel group) of (x1, yi) to (xN, yi).
- W is the total number of columns (number of columns) of the image sensor (image sensor).
- P is the number of rows (number of rows) belonging to the block (x1, yi).
- the Column selector 120 always performs the sequential scanning of the image sensor 103 in units of columns (columns) regardless of the exposure control input, and repeats the operation for all the columns (columns): c1 to cW of the image sensor. That is, the column control signal RSTRc repeats the cycle of becoming active sequentially from c1 to cW. A period in which RSTRc holds an active state with one column corresponds to a pixel control period.
- the control signal SHy that is, the signal for starting the SHUTTER operation to the pixel group of the block (x1, yi)
- the control signal SHy is RSTRc1 because x1 is the leftmost pixel group. Is transmitted to the yi-th row line selector 124 in synchronization with the.
- the x1-th line selector In the yi-th row line selector that has received the control signal SHy, first, the x1-th line selector immediately enters the active state, and first, the SHUTTER control signal generator 128 is activated to start the generation of the SHUTTER control signal.
- each row selection switch 130 shown in FIG. 7 is controlled at the timing of transmitting the control signal to each pixel, and the SHUTTER control signal is transmitted to each row (row): r1 row to rP row of the control target block.
- a SHUTTER control signal (RSyir1 and TRyir1 signals) for the r1th Row (row r1 shown in FIG. 6) is transmitted Q times in synchronization with RSTRc1 to RSTRcQ. This is a control signal corresponding to each of Q pixels (c1 column to cQ column) in the first row (r1 row) of the block to be controlled, for example, the upper left block (x1, yi) shown in FIG. .
- the SHUTTER control signal (RSyir2 and TRyir2 signals) for the r2th Row (row r2 shown in FIG. 6) is transmitted Q times in synchronization with RSTRc1 to RSTRcQ.
- This is a control signal corresponding to each of Q pixels (columns c1 to cQ) in the second row (row r2) of the block to be controlled, for example, the upper left block (x1, yi) shown in FIG. .
- the control signal is not generated during the period from RSTRc (Q + 1) to RSTRcW because it is not the corresponding column.
- the same operation is repeated until rP. That is, the same processing is performed up to the P-th row (rP row) of the upper left block (x1, yi) shown in FIG.
- the SHUTTER operation for all the pixels in the block (pixel group) to be controlled, for example, the upper left block (x1, yi) shown in FIG. 6 is completed, and thus the operation for the control signal SHy input is completed.
- the Row line selector may be a simple pattern generation circuit composed of a counter or the like.
- FIG. 9 is similar to FIG. 8 described above, in blocks (x1, yi) to (xN, yi) that are blocks (pixel groups) to be controlled by the i-th row line selector (yi). This is a processing example when a READ (reading) start control signal (RDy) is input to the leftmost block (pixel group) (x1).
- RDy READ (reading) start control signal
- the horizontal axis is time, and each line is in order from the top, (1) A control signal RDy to the yi-th Row line selector 124 (see FIG. 6), (2) RSTRc control signal controlled by the Column selector 120 (see FIG. 3) (c1st, c2th,..., CQth, c (Q + 1) th, cWth Column from the top), (3) The yi-th row line selector 124 (see FIG. 6) takes charge.
- Q is a block (pixel group) that is a block (pixel group) to be controlled by the i-th row line selector (yi), and is a block (x1, yi) that is the x1th block (pixel group) of (x1, yi) to (xN, yi).
- W is the total number of columns (number of columns) of the image sensor (image sensor).
- P is the number of rows (number of rows) belonging to the block (x1, yi).
- the Column selector 120 always performs the sequential scanning of the image sensor 103 in units of columns (columns) regardless of the exposure control input, and repeats the operation for all the columns (columns): c1 to cW of the image sensor. That is, the column control signal RSTRc repeats the cycle of becoming active sequentially from c1 to cW. A period in which RSTRc holds an active state with one column corresponds to a pixel control period.
- the control signal RDy that is, the signal for starting the READ operation to the pixel group of the block (x1, yi)
- the control signal RDy is RSTRc1 because x1 is the leftmost pixel group. Is transmitted to the yi-th row line selector 124 in synchronization with the.
- the x1-th line selector In the yi-th row line selector that has received the control signal RDy, first, the x1-th line selector immediately enters the active state, and first the READ control signal generator 129 is activated to start generation of the READ control signal.
- each row selection switch 130 shown in FIG. 7 is controlled at the timing at which the control signal is transmitted to each pixel, and the READ control signal is transmitted to each row (row): r1 to rP rows of the control target block.
- a READ control signal (RSyir1, TRyir1, and SLyir1 signals) for the r1th Row (row r1 shown in FIG. 6) is transmitted Q times in synchronization with RSTRc1 to RSTRcQ.
- a READ control signal (RSyir2, TRyir2, and SLyir2 signals) for the r2th Row (row r2 shown in FIG. 6) is transmitted Q times in synchronization with RSTRc1 to RSTRcQ.
- This is a control signal corresponding to each of Q pixels (columns c1 to cQ) in the second row (row r2) of the block to be controlled, for example, the upper left block (x1, yi) shown in FIG. .
- the control signal is not generated during the period from RSTRc (Q + 1) to RSTRcW because it is not the corresponding column.
- the same operation is repeated up to rP. That is, the same processing is performed up to the P-th row (rP row) of the upper left block (x1, yi) shown in FIG.
- the READ operation for all the pixels in the block (pixel group) to be controlled for example, the upper left block (x1, yi) shown in FIG. 6 is completed, so the operation for the control signal RDy input is completed.
- the Row line selector may be a simple pattern generation circuit composed of a counter or the like.
- Exposure control operation example 1 Normal uniform shutter operation
- the number of blocks (pixel groups) in the image sensor (image sensor) is assumed to be 3 (x1 to x3) in the horizontal direction and 3 (y1 to y3) in the vertical direction.
- Each block (pixel group) has two rows (r1 to r2).
- FIG. 10 is a timing chart for explaining the control of the Row group selector in the case of performing imaging by exposure control (shutter control) with a normal uniform exposure time on the entire surface.
- the horizontal axis represents time, and a section indicated by a vertical broken line represents Q pixel control periods corresponding to the width of one block (one pixel group).
- the area is divided into three types at the top of the figure so that it can be easily understood that it is the control period of the corresponding pixel group (any of x1, x2, and x3).
- White x3 It corresponds to these three blocks arranged in the horizontal direction.
- the shutter control signal SHy shown in (a1) to (a3) is not used, and the sequence is performed using only the read control signal RDy shown in (b1) to (b3). .
- the READ start control signal (RDy) is continuously given to the pixel group of x1, x2, and x3 to the y1th row line selector, and then 1 row worth. Just pause.
- the READ start control signal (RDy) is continuously given to the pixel group of x1, x2, and x3 to the y2th row line selector, and then 1 row worth. Just pause.
- the READ start control signal (RDy) is continuously given to the pixel group of x1, x2, and x3 to the y3th row line selector, and then 1 row worth. Just pause.
- each Row line selector performs the operation described above with reference to FIG. 9, so that the pixel READ operation is performed in the horizontal direction in the pixel sequence and in the vertical direction in the line sequence.
- Each line shown in FIG. 10C indicates the operation state of the pixel in a unit in which the block (pixel group) is further divided for each row.
- x1y1r1 the r1th row of the pixel group of the block (x1, y1)
- x2y1r1 The r1th row of the pixel group of the block (x2, y1)
- x3y1r1 the r1th row in the pixel group of the block (x3, y1)
- x1y1r2 the r2th row of the pixel group of the block (x1, y1)
- x2y1r2 the r2nd row of the pixel group of the block (x2, y1)
- x3y1r2 the r2th row of the pixel group of the block (x3, y1)
- x1y2r1 the r1th row of the pixel group of the block (x1, y2)
- [A solid line section] indicates a period during which a READ operation (reading) is performed. [Dashed line section] indicates that it is during the exposure period. As described above with reference to FIG. 5B, the READ operation of the pixel also serves to reset the charge of the photodiode PD, so that the next exposure period can be entered as it is at the end of the READ operation.
- the uppermost (x1y1r1) shown in (c) shows the sequence of exposure processing (SHUTTER) and readout processing (READ) for the first row (r1) of the block (x1, y1).
- the read process (READ) defined by the first solid line section (x1y1r1) in the uppermost stage shown in (c) is executed in response to the read start (RDy1) signal (s1) shown in (b1).
- the signal pattern shown in FIG. 5B is provided to the pixels in the first row (r1) of the block (x1, y1), and signal reading is executed.
- an exposure process (SHUTTER) is started. This is a broken line section shown in the figure.
- the charges accumulated in the exposure processing engine are read out as pixel signals.
- the wavy line sections indicating the exposure period are all the same period. That is, since the exposure period set from the preceding READ operation to the next READ operation is set to be the same for all pixels, all the pixels are exposed in the same exposure period (shutter period).
- FIG. 11 is a timing chart for explaining the control of the Row group selector in the case of performing imaging by exposure control (shutter control) with different exposure times for each pixel group.
- the horizontal axis represents time, and a section indicated by a vertical broken line represents Q pixel control periods corresponding to the width of one block (one pixel group).
- the area is divided into three types at the top of the figure so that it can be easily understood that it is the control period of the corresponding pixel group (any of x1, x2, and x3).
- White x3 It corresponds to these three blocks arranged in the horizontal direction.
- Imaging by exposure control is the readout control shown in (b1) to (b3) at intervals equal to all pixel groups, as in the case of uniform shutter control over the entire surface.
- this is realized by adding a sequence for providing the shutter control signal SHy shown in (a1) to (a3) at a different timing for each pixel group.
- the shutter control signal SHy shown in (a1) to (a3) is sent to the block (pixel group) somewhere during the period when the next control signal RDy is given to the same pixel group after the control signal RDy is given. It can be given in synchronization with the corresponding control period.
- the number of divisions of the vertical block (pixel group) is 3, and one pixel group includes 2 Row, so the interval from the control signal RDy to the next control signal RDy is 6 Row periods.
- the shutter time setting has a resolution that is obtained by dividing one frame period by the number of rows of the image sensor (image sensor), and each pixel group has a shutter time based on the input exposure control value within the resolution range. You can choose.
- the operation described with reference to FIG. 8 causes the SHUTTER operation as an exposure process to be performed on the pixel in charge of the row line selector, and the charge accumulated in the pixel is changed. Since it is reset, a new exposure period starts from that point.
- x1y1r1 the r1th row of the pixel group of the block (x1, y1)
- x2y1r1 The r1th row of the pixel group of the block (x2, y1), x3y1r1: the r1th row in the pixel group of the block (x3, y1), x1y1r2: the r2th row of the pixel group of the block (x1, y1), x2y1r2: the r2nd row of the pixel group of the block (x2, y1), x3y1r2: the r2th row of the pixel group of the block (x3, y1), x1y2r1: the r1th row of the pixel group of the block (x1, y2), : x1y3r2: the r2nd row of the pixel group of the block (x1, y3), x2y3r2: the r2nd row of the pixel pixel group
- a solid line section indicates a period during which a READ operation (reading) is performed.
- a broken line section indicates that it is during the exposure period.
- the pixels in the same pixel group are controlled to have the same exposure time even if they are different rows.
- the uppermost (x1y1r1) shown in (c) shows the sequence of exposure processing (SHUTTER) and readout processing (READ) for the first row (r1) of the block (x1, y1).
- the read process (READ) defined by the first solid line section (x1y1r1) in the uppermost stage shown in (c) is executed in response to the read start (RDy1) signal (s1) shown in (b1).
- RDy1 signal (s1) shown in (b1) Based on this signal (s1), the signal pattern shown in FIG. 5B is provided to the pixels in the first row (r1) of the block (x1, y1), and signal reading is executed.
- the exposure period is reset by the control signal SHy, and after this reset, the next exposure period starts.
- the exposure process is started in response to the input signal (s2) of (a1) the control signal SHy.
- the uppermost (x1y1r1) exposure period shown in (c) is controlled to a period from this (s2) position to the next reading start (RDy1) signal (s3) position shown in (b1).
- the entire imaging surface is controlled to the exposure time (shutter time) as shown in FIG.
- the horizontal direction is x
- the vertical direction is y
- the upper left block is the block (x1, y1)
- the lower right block is the block (x3, y3)
- Numerical values 1 to 4 in each block indicate relative values of the exposure period (shutter time).
- a block with a numerical value 4 indicates that an exposure period four times that of a block with a numerical value 1 is set.
- the readout processing of the accumulated charge of each pixel of the image sensor (image sensor) includes a column ADC configuration that reads signals from the pixels in parallel.
- the exposure control configuration of the present invention can also be applied to this column ADC readout configuration.
- this configuration example will be described.
- the configuration of FIG. 1 can be applied to the overall configuration of the imaging apparatus as in the above-described embodiment.
- the configuration and processing of the image sensor (image sensor) 103 are different.
- FIG. 13 is a diagram illustrating a configuration of an image sensor (image sensor) using a column ADC.
- Each small square in the figure represents a pixel arranged in a two-dimensional grid on the imaging surface. That is, it represents a pixel as a photoelectric conversion element.
- Each pixel is connected so that the control signals RSr, TRr, and SLr are input through three types of control lines extending in the horizontal direction and the control signal RSTRc is input through one type of control line extending in the vertical direction. Further, the pixel signal SIGc is output via a signal line extending in the vertical direction.
- All the control lines that transmit the three types of control signals (RSr, TRr, SLr) in the horizontal direction are connected to the row selector (row selector) 132, and the control signal is transmitted from the row selector 132 toward each pixel.
- All the vertical control lines are connected to a column selector (column selector) 133, and a control signal is transmitted from the column selector 133 to each pixel.
- the row selector 132 and the column selector 133 are connected to a timing generator (TG) 131, and the timing generator (TG) 131 receives an exposure control signal input from the outside of the image sensor (image sensor) 103.
- the exposure control signal input from the outside is the exposure control value 116 described with reference to FIG. 2, that is, the exposure control value in block units.
- the timing generator (TG) 131 converts the exposure control value for each block into timing information for shutter control for each block, and transmits it to the row selector 132 and the column selector 133.
- the row selector 132 and the column selector 133 generate control signals for each row and each column, and transmit the control signals RSr, TRr, SLr, and RSTRc to each pixel.
- the output pixel signal SIGc output from each pixel is connected to a column ADC 134 that operates in parallel with a plurality of Columns, and signals from the pixels are taken into the column ADC 134.
- the output pixel signal SIGc output from each pixel is read in parallel in units of blocks (pixel groups), and the signal is held in the column ADC 134.
- the column ADC 134 performs an AD conversion operation in parallel when the signals for 1 Row are prepared, and converts the analog pixel signals for 1 Row into digital values.
- the digitized pixel signals are sequentially output from the image sensor (image sensor) under the control of the Column selection control signal SLc.
- the same pixel configuration as that described with reference to FIG. 4 can be used as the configuration of one pixel in the image sensor (image sensor).
- the two pixel operation execution signal patterns described with reference to FIG. (A) Charge accumulation process based on the exposure process “SHUTTER (shutter)” (b) Accumulated charge output process based on the read process “READ (read)”
- the signal patterns for these two processes can use the same pattern. It is.
- the configuration described above with reference to FIGS. 6 and 7 can be used for the hierarchical internal configuration of the Row selector and the configuration of the Row line selector.
- the second embodiment using the column ADC is different from the first embodiment described above, and will be described below.
- the column selector of the second embodiment has a hierarchical structure as shown in FIG. 14 so that a plurality of pixels can be controlled simultaneously for each pixel group.
- the internal configuration of the column selector 133 of this embodiment is a block that receives a control signal in units of blocks (pixel groups) and a column group selector 135 that generates control signals in units of blocks (pixel groups).
- (Pixel group)] has a hierarchical structure with a plurality of column line selectors 136 that generate control signals.
- the Column group selector 135 transmits the start of the control period in units of blocks (pixel groups) to each Column line selector 136 by the control signal SLx.
- the column line selector 136 receives the control signal SLx from the column group selector 135 and transmits the control signal RSTRc in parallel to all columns of the pixel group in charge.
- the operation of the Column line selector 136 is simple, and the control signal SLx from the Column group selector 135 is converted into a control signal RSTRc that is transmitted to the pixels, and is only transmitted in parallel to a plurality of Columns.
- FIG. 15 shows the operation of the row line selector when the control signal SHy indicating the start of SHUTTER (shutter) control for instructing the start of exposure processing is input to one row line selector in the row selector 132 of FIG. A timing diagram to be described is shown.
- the configuration of the row selector 132 in the second embodiment is the same as that of the first embodiment described above, and has the configuration described with reference to FIGS.
- FIG. 15 shows the leftmost block (pixel group) among the blocks (x1, yi) to (xN, yi) which are blocks (pixel groups) to be controlled by the i-th row line selector (yi). It is an example of a process at the time of the input of the SHUTTER (shutter) start control signal (SHy) with respect to (x1).
- the horizontal axis is time, and each line is in order from the top.
- a control signal SHy to the yi-th Row line selector (see FIGS. 13 and 6)
- (2) SLx control signals (x1, x2,..., X (N ⁇ 1) th, xNth block (pixel group) from the top) controlled by the Column selector 133 (see FIG. 13)
- (3) RSTRc control signal (x1, x2,..., X (N ⁇ 1) th, xNth block (pixel group) from the top) controlled by the Column selector 133 (see FIG. 13)
- the yi-th row line selector 124 takes charge.
- N is the number of blocks (pixel groups) in the horizontal direction.
- P is the number of rows (number of rows) belonging to (x1, yi).
- the Column selector 133 always performs the sequential scanning in units of blocks (pixel groups) regardless of the exposure control input.
- the control signal SLx of the Column group selector repeats a cycle of becoming active sequentially from the horizontal pixel group, that is, the blocks (x1, yi) to (xN, yi).
- the control signal RSTRx of the Column line selector is synchronized with the control signal SLx and repeats a cycle of becoming active sequentially from the horizontal pixel group, that is, the blocks (x1, yi) to (xN, yi).
- the period during which RSTRx shown in FIG. 15 (3) holds the active state is the control period of each block (pixel group), and also corresponds to the control period of a plurality of pixels performed in parallel.
- the Row group selector outputs a signal to start the SHy, that is, the SHUTTER operation to the x1yi-th pixel group, since the x1 is the leftmost pixel group, the control signal SHy is synchronized with the RSTRx1 and the yi-th Row line. Is transmitted to the selector.
- the x1-th line selector In the yi-th row line selector that has received the control signal SHy, the x1-th line selector immediately becomes active, and first the SHUTTER control signal generator (see FIG. 7) is activated to start generation of the SHUTTER control signal. .
- each row selection switch 130 shown in FIG. 7 is controlled at the timing of transmitting the control signal to each pixel, and the SHUTTER control signal is transmitted to each row (row): r1 row to rP row of the control target block.
- a SHUTTER control signal (RSyir1 and TRyir1 signals) for the r1th Row (for example, the r1 row shown in FIG. 6) is transmitted once in synchronization with RSTRx1.
- a SHUTTER control signal (RSyir2 and TRyir2 signals) for the r2th Row (for example, the r2 row shown in FIG. 6) is transmitted once in synchronization with RSTRx1. Thereafter, the control signal is suspended because the period from RSTRc2 to RSTRxN is not the corresponding column.
- the same operation is repeated until rP. That is, for example, the same processing is performed up to the P-th row (rP row) of the upper left block (x1, yi) shown in FIG.
- the SHUTTER operation for all the pixels in the block (pixel group) to be controlled, for example, the upper left block (x1, yi) shown in FIG. 6 is completed, and thus the operation for the control signal SHy input is completed.
- the Row line selector may be a simple pattern generation circuit composed of a counter or the like.
- the configuration of the row selector 132 in the second embodiment is the same as that of the first embodiment described above, and has the configuration described with reference to FIGS.
- FIG. 16 is also a block (pixel group) to be controlled by the i-th row line selector (yi) in the blocks (x1, yi) to (xN, yi).
- This is a processing example when a READ (reading) start control signal (RDy) is input to the leftmost block (pixel group) (x1).
- the horizontal axis is time, and each line is in order from the top.
- a control signal RDy to the yi-th row line selector 124 (see FIGS. 13 and 6), (2) SLx control signals (x1, x2,..., X (N ⁇ 1) th, xNth block (pixel group) from the top) controlled by the Column selector 133 (see FIG. 13), (3) RSTRc control signal (x1, x2,..., X (N ⁇ 1) th, xNth block (pixel group) from the top) controlled by the Column selector 133 (see FIG. 13), (4) The yi-th row line selector 124 (see FIG. 6) takes charge.
- N is the number of blocks (pixel groups) in the horizontal direction.
- P is the number of rows (number of rows) belonging to (x1, yi).
- the column selector 133 always repeats sequential scanning for each block (pixel group) of the image sensor regardless of the exposure control input.
- the control signal SLx of the Column group selector repeats a cycle of becoming active sequentially from the horizontal pixel group, that is, the blocks (x1, yi) to (xN, yi).
- the control signal RSTRx of the Column line selector is synchronized with the control signal SLx and repeats a cycle of becoming active sequentially from the horizontal pixel group, that is, the blocks (x1, yi) to (xN, yi).
- the period during which RSTRx shown in FIG. 16 (3) holds the active state is a control period of each block (pixel group), and also corresponds to a control period of a plurality of pixels performed in parallel.
- the Row group selector outputs a signal for starting the RDy, that is, the READ operation to the x1yi-th pixel group, since the x1 is the leftmost pixel group, the control signal RDy is synchronized with the RSTRx1 and the yi-th Row line. Is transmitted to the selector.
- the x1-th line selector In the yi-th row line selector that has received the control signal SHy, first, the x1-th line selector immediately becomes active, and first, the READ control signal generator (see FIG. 7) is activated to start generation of the READ control signal. .
- each row selection switch 130 shown in FIG. 7 is controlled so that the READ control signal is transmitted to each row (row): r1 row to rP row of the control target block.
- READ control signal (RSyir1, TRyir1, and SLyir1 signals) for the r1th Row (for example, the r1 row shown in FIG. 6) is transmitted once in synchronization with RSTRx1.
- control signal is not generated during the period from RSTRx2 to RSTRxN because it is not the corresponding Column.
- a READ control signal (RSyir2, TRyir2, and SLyir2 signals) for the r2th Row (for example, the r2 row shown in FIG. 6) is transmitted once in synchronization with RSTRx1. Thereafter, the control signal is suspended because the period from RSTRc2 to RSTRxN is not the corresponding column.
- the same operation is repeated until rP. That is, for example, the same processing is performed up to the P-th row (rP row) of the upper left block (x1, yi) shown in FIG.
- the READ operation for all the pixels in the block (pixel group) to be controlled, for example, the upper left block (x1, yi) shown in FIG. 6 is completed, so the operation for the control signal RDy input is completed.
- the Row line selector may be a simple pattern generation circuit composed of a counter or the like.
- the present invention can coexist with the column ADC. Note that the exposure control operation of the entire image sensor (image sensor) is the same as the operation of FIGS. 10 and 11 described in the first embodiment, and thus the description thereof is omitted.
- a striped pixel group with a spacing of one to several pixels in the horizontal or vertical direction can be formed, It is possible to form a pixel group having a parallelogram shape that is slanted and set the exposure period in units of pixel groups having these various shapes.
- one pixel cannot belong to a plurality of pixel groups and cannot be controlled differently.
- a pixel group shape with an interval such as a stripe as described above a plurality of pixel groups can be placed on the imaging surface. It is also possible to form the ranges so as to overlap each other. A simple example thereof will be specifically described with reference to FIG.
- FIG. 17 is a diagram for explaining the hierarchical structure of the Row selector that forms blocks (pixel groups) whose regions overlap each other.
- a row selector 137 distributes a control signal to each row corresponding to each pixel group based on a control signal from the row group selector 138 and a control signal from the row group selector 138.
- the hierarchical structure by the row line selectors 139 and 140 is the same as the row selectors of the first and second embodiments described above with reference to FIG.
- the feature of the image sensor shown in FIG. 17 is that one row line selector controls every other row.
- the row line selector 139 extends a control line for each pixel in every other row pixel area (a ⁇ r1), (a ⁇ r2), (a ⁇ r3), and controls these pixels.
- the row line selector 140 extends a control line to each pixel of every other row of pixel regions (br-1), (br-2), (br-3), and so on. Execute control.
- this region can be subjected to two types of exposure control: a shutter by the row line selector 139 and a shutter by the row line selector 140.
- the fact that a plurality of shutters are possible in one area means that, for example, effective exposure control is realized in an image in which a bright subject and a dark subject are mixed in the same region.
- the structure of the Column selector 141 is changed to provide a Column group selector 142 and a plurality of Column line selectors.
- the column line selector 143 and the column line selector 144 in the figure may be controlled every other column (Column) so that the controlled columns are alternated.
- the column line selector 143 extends a control line for every other pixel pixel area (ac1), (ac2), (ac3)... And controls these pixels. Execute. Further, the column line selector 144 extends the control line to each of the pixels of every other column pixel area (b-c1), (bc2), (bc3),. Execute control. Such a setting is also possible.
- the exposure period is set not for each pixel but for each block (pixel group) composed of a plurality of pixels located close to each other in the imaging surface. Perform the set exposure control.
- adaptive exposure control for each region can be realized without excessively increasing the control circuit inside the image sensor (image sensor).
- the bandwidth of the exposure control value input can be kept low, and the calculation can be realized with a small-scale calculation.
- the mechanism for converting the exposure control value into the pixel control signal has a hierarchical structure, and the means for generating the control signal for the pixel group and the means for generating the control signal for the pixels in the pixel group are separated.
- the control signal to the pixel group is scene-dependent, and the aspect of the control signal time series changes greatly, but it has the feature that the data amount in the low band is small, while the control signal in the pixel group has a high data amount in the high band.
- the time series can be made in a fixed manner. In this way, the control signal generating means is divided into hierarchies to facilitate implementation.
- the present invention realizes a control mechanism for making the exposure times of pixels belonging to the same pixel group the same even over a plurality of rows. Further, for pixel signal readout, a control mechanism is realized that reads out sequentially in the same manner as in conventional rolling shutter control. Even if the conventional pixel-by-pixel control mechanism is applied to the pixel group as it is, all the pixels in the pixel group operate in synchronism, so the signal readout becomes a non-uniform rate and the data buffer is arranged outside the sensor. If the replacement process is not performed, there is a problem that data cannot be flowed to the subsequent pipeline process. According to the control mechanism of the present invention, reading of pixel signals is always constant, and data rearrangement is not necessary.
- the present invention realizes a mechanism that performs free exposure control on, for example, a rectangular block (pixel group).
- the mechanism can be extended to a region that is a collection of a plurality of rectangles, thereby substantially allowing the regions to overlap.
- it is possible to photograph one area with a plurality of exposure times, and it is possible to realize a highly practical exposure control mechanism that can handle any scene.
- the series of processes described in the specification can be executed by hardware, software, or a combined configuration of both.
- the program recording the processing sequence is installed in a memory in a computer incorporated in dedicated hardware and executed, or the program is executed on a general-purpose computer capable of executing various processing. It can be installed and run.
- the program can be recorded in advance on a recording medium.
- the program can be received via a network such as a LAN (Local Area Network) or the Internet and installed on a recording medium such as a built-in hard disk.
- system is a logical set configuration of a plurality of devices, and the devices of each configuration are not limited to being in the same casing.
- a configuration in which different exposure control is executed in units of pixel groups obtained by dividing a plurality of pixels on the imaging surface of the imaging device Luminance evaluation is performed in units of pixel groups composed of a plurality of pixels, and exposure control values in units of pixel groups are calculated according to the evaluation results.
- the image sensor outputs a control signal corresponding to the calculated exposure control value for each pixel group to the constituent pixels of each pixel group to execute exposure control for each pixel group.
- an exposure control signal having the same pattern is sequentially output to a plurality of pixels in a pixel group in time series, and exposure control in units of groups in which the exposure times of a plurality of pixels belonging to one pixel group are made the same. Is realized.
Abstract
Description
複数画素から構成される画素グループ単位の輝度評価を実行する輝度評価部と、
前記輝度評価部の評価結果に応じて、前記画素グループ単位の露光制御値を算出する露光制御値算出部と、
前記露光制御値算出部の算出した画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する撮像素子を有する撮像装置にある。
撮像面の複数の画素を分割した画素グループ単位で設定された露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する撮像素子にある。
撮像装置において実行する撮像制御方法であり、
輝度評価部が、複数画素から構成される画素グループ単位の輝度評価を実行する輝度評価ステップと、
露光制御値算出部が、前記輝度評価ステップにおける評価結果に応じて、前記画素グループ単位の露光制御値を算出する露光制御値算出ステップと、
撮像素子が、前記露光制御値算出ステップにおいて算出した画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する撮像ステップを有する撮像制御方法にある。
撮像装置において撮像制御処理を実行させるプログラムであり、
輝度評価部に、複数画素から構成される画素グループ単位の輝度評価を実行させる輝度評価ステップと、
露光制御値算出部に、前記輝度評価ステップにおける評価結果に応じて、前記画素グループ単位の露光制御値を算出させる露光制御値算出ステップと、
撮像素子に、前記露光制御値算出ステップにおいて算出した画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行させる撮像ステップを実行させるプログラムにある。
複数画素から構成される画素グループ単位の輝度評価を実行し、評価結果に応じて、画素グループ単位の露光制御値を算出する。撮像素子は、算出された画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する。制御信号として、例えば画素グループ内の複数画素に対して同一パターンからなる露光制御信号を時系列に順次、出力し、1つの画素グループに属する複数画素の露光時間を同一としたグループ単位の露光制御を実現する。
1.撮像装置の構成例について
2.露光評価および露光制御値算出処理について
3.撮像素子(イメージセンサ)の構成および露光制御機構について
4.露光制御動作例その1:通常の均一シャッター動作
5.露光制御動作例その2:画素グループ毎に異なるシャッター動作
6.第2の実施例:カラムADCとの共存
7.第3の実施例:画素グループの設定構成と画素グループ位置のオーバーラップ構成について
8.本発明の構成と効果のまとめ
以下、本発明の実施例について説明する。以下、本発明の一実施例としてデジタルビデオカメラの例について説明する。
はじめにカメラの構成と動作について説明し、その後、撮像素子(イメージセンサデバイス)の構成例と撮像素子を用いた露光制御の詳細について説明する。
なお、CPU109、DSP140では、例えばメモリ108に予め記録されたプログラムに従って様々な処理を実行可能であり、以下に説明する処理もプログラムに従って実行可能な処理である。
撮像素子(イメージセンサ)103は、撮像素子に設けられた画素の領域毎に異なる露光、すなわち領域単位で異なる露光時間を設定して1つの画像を撮影することができる。例えば、撮影する1つのシーン内で暗い被写体が存在する領域は明るい露光、すなわち長時間露光領域とし、一方、明るい被写体が存在する領域では暗い露光、すなわち短時間露光領域として撮影し1つの画像データを出力する。
このように各領域単位で、被写体の明るさに応じた最適露光で撮影を実行することでノイズや飽和の少ない画像データを生成することができる。
図2は本実施例の露光評価および露光制御値算出のための処理構成を説明するブロック図である。
なお、図2において、ブロック平均輝度114、露光制御値116、露光制御値117等、平行な水平2本線で示す図形はデータあるいはデータを格納するメモリを表す。また、イメージセンサ103等の矩形で示された図形は、処理の実行部または処理を表す。
従って、図1に示す撮像素子(イメージセンサ)103から出力される画像データそのままでは領域毎に異なる露光時間の設定に基づく信号出力がなされた状態であるので、各露光時間の違いを補償して最終的な出力値を設定する必要がある。なお、撮像素子(イメージセンサ)103から出力される画像データが撮影された時点における露光制御値は露光制御値117として、DSP104内のメモリに格納される。
なお、以下の実施例では、露光制御単位として規定するブロック(画素グループ)を矩形領域とした例を説明するが、ブロックは矩形領域に限定されるものではない。
撮像素子(イメージセンサ)103の各構成画素からの出力輝度値をIとする。
出力輝度値:Iは、
入射光量:L、
絞り口径の2乗:A2、
シャッター時間:T、および、
センサ感度:S、
これらに比例する。
I=k・L・A2・T・S ・・・・・・(式1)
kは比例係数である。
上記式から明らかなように、入射光量L、絞りAと感度Sが一定である場合は、出力輝度値Iはシャッター時間Tに比例する。なお、シャッター時間とは露光時間に相当する。
従って、所定のターゲット輝度値Itを得るためのシャッター時間Ttは、現在の出力輝度値Iとシャッター時間Tを用いて、以下の(式2)に従って算出することができる。
Tt=T(It/I) ・・・・・・(式2)
現在のブロック(画素グループ)平均輝度をI、
各ブロック(画素グループ)の現在のシャッター時間をT、
このようなブロック(画素グループ)単位での算出構成とすることによって、ブロック(画素グループ)毎に、上記(式2)によってTt(所定のターゲット輝度値Itを得るためのシャッター時間Tt)を算出し、それをブロック(画素グループ)毎の露光時間、すなわち露光制御値として利用する。
このように本発明の構成では、画素単位の輝度に基づく画素単位の露光制御ではなく、複数画素からなるブロック(画素グループ)単位の平均輝度に基づいてブロック単位の露光制御を実行する。
次に、撮像素子(イメージセンサ)103の構成と内部の露光制御機構について説明する。
図3は本実施例の撮像素子(イメージセンサ)の構成を説明する図である。図中の小さな正方形の各々が、撮像面に2次元格子状に配置された画素を表す。すなわち光電変換素子を持つ画素を表す。各画素は、水平方向に延びる3種類の制御線を介して制御信号RSr,TRr,SLrを入力し、さらに垂直方向に延びる1種類の制御線を介して制御信号RSTRcを入力する。
また、垂直方向に延びる信号線を介して画素信号SIGc、すなわち各画素が入射光に応じて蓄積した電荷を出力するようになっている。
また垂直方向の制御線は全てColumnセレクタ(列セレクタ)120に接続し、Columnセレクタ120から制御信号が各画素に向けて伝達される。
ここで外部から入力する露光制御信号とは、図2を参照して説明した露光制御値116、すなわち、ブロック単位の露光制御値である。
(a)露光処理「SHUTTER(シャッター)」に基づく電荷蓄積処理
(b)読み出し処理「READ(リード)」に基づく蓄積電荷出力処理
これら2つの処理をおこなう。
上記(a),(b)のどちらの動作もおこなわないときは、露光した電荷を蓄積した状態を維持している。
(a)露光処理「SHUTTER(シャッター)」に基づく電荷蓄積処理
(b)読み出し処理「READ(リード)」に基づく蓄積電荷出力処理
これら2つの処理の動作時の制御信号パターンを説明するタイミングチャートを示す。
横軸は時間である。
Column(列)方向の制御信号RSTRcは、当該Columnの画素が画素制御期間にあるときにactive状態を保持することにより、その画素が制御可能である状態を作る。
本発明を実現する撮像素子(イメージセンサ)103は、複数の画素からなる画素グループ毎に異なる露光時間(シャッター時間)となるように制御することが1つの特徴である。
ここで説明する実施例では、撮像素子(イメージセンサ)103の撮像面を矩形ブロック状に分割した領域毎にブロック(画素グループ)を形成し、ブロック(画素グループ)それぞれに異なる露光時間(シャッター時間)とする制御を行う例である。
図6においては、1つのブロックは、P行(Row)、Q列(Column)の画素によって構成された例を一例として示している。なお、ブロック設定は様々な設定が可能である。
撮像素子全体の画素列(Column)の総数はW列とする。
ブロック(x1,yi)の右隣りのブロックは、ブロック(x2,yi)である。
ブロック(x1,yi)の下に隣接するブロックは、ブロック(x1,yi+1)である。
図6に示すように、Rowセレクタ(行セレクタ)119は、ブロック(画素グループ)単位の制御信号(SHy,RDy)を生成するRowグループセレクタ123と、Rowグループセレクタ123からブロック(画素グループ)単位の制御信号(SHy,RDy)を入力して、ブロック(画素グループ)内の画素に出力する制御信号を生成する複数のRowラインセレクタ124の階層構造となっている。
(a)SHUTTER制御開始(SHy)、または、
(b)READ制御開始(RDy)、
上記の2種類の制御信号を選択して伝達する。
(b)READ制御開始(RDy)、
これらの制御信号は、ブロック(画素グループ)単位での(a)露光開始または(b)読み取り開始のタイミングの伝達であると同時に、1つのRowラインセレクタ124が担当する水平方向に並んだ複数のブロック(画素グループ)のうちのどれに対する制御であるかの指定情報を含んでいる。Rowラインセレクタ124は、Rowグループセレクタ123からの制御信号SHyもしくはRDyを入力して、入力制御信号に含まれるブロック指定情報に該当するブロック(画素グループ)の全画素に対して、先に図5を参照して説明した、
(a)露光処理「SHUTTER(シャッター)」に基づく電荷蓄積処理
(b)読み出し処理「READ(リード)」に基づく蓄積電荷出力処理
これら2つの処理いずれかの制御信号パターンを伝達する。
また、Row選択スイッチ130の数に相当するPは、同じRowラインセレクタが担当するRow(行)の本数である。
(a)SHUTTER制御開始(SHy)、または、
(b)READ制御開始(RDy)、
これらの制御信号をうけて、それが各自が担当するブロック(画素グループ)に対する制御信号であった場合に、各画素に制御信号を送るタイミング信号を生成し、タイミング信号をSHUTTER制御信号ジェネレータ128とREAD制御信号ジェネレータ129とP個のRow選択スイッチ130に出力してこれらを制御する。
すなわち、N個のラインセレクタ125,126,...,127の各々は、水平方向のN個のブロック(画素グループ)各々に対して設定され、各ブロックに対応する制御信号の出力タイミングを設定する。
SHUTTER制御信号ジェネレータ128は、
(a)露光処理としての「SHUTTER」処理において利用される図5(a)に示した画素制御パターンを発生させる回路である。
READ制御信号ジェネレータ129は、
(b)読み出し処理としての「READ」処理において利用される図5(b)に示した画素制御パターンを発生させる回路である。
(1)yi番目のRowラインセレクタ124(図6参照)への制御信号SHy、
(2)Columnセレクタ120(図3参照)が制御するRSTRc制御信号(上からc1番目、c2番目、…、cQ番目、c(Q+1)番目、…、cW番目のColumn)、
(3)yi番目のRowラインセレクタ124(図6参照)が担当する、
(3-1)r1番目のRowへのRSr,TRr,SLr制御信号、
(3-2)r2番目のRowへのRSr,TRr,SLr制御信号、
…、
(3-P)rP番目のRowへのRSr,TRr,SLr制御信号、
を示す。
Qはi番目のRowラインセレクタ(yi)の制御対象となるブロック(画素グループ)である(x1,yi)~(xN,yi)のx1番目のブロック(画素グループ)であるブロック(x1,yi)に属するColumn数(列数)である。
Wは撮像素子(イメージセンサ)の全Column数(列数)である。
Pはブロック(x1,yi)に属するRow数(行数)である。
その結果として、まず、図8(3-1)に示すように、
r1番目のRow(図6に示すr1行)に対するSHUTTER制御信号(RSyir1とTRyir1の信号)がQ回、RSTRc1~RSTRcQに同期して伝達される。
これは、制御対象とするブロック、例えば図6に示す左上のブロック(x1,yi)の第1行(r1行)のQ個の画素(c1列~cQ列)各々に対応する制御信号である。
r2番目のRow(図6に示すr2行)に対するSHUTTER制御信号(RSyir2とTRyir2の信号)がQ回、RSTRc1~RSTRcQに同期して伝達される。
これは、制御対象とするブロック、例えば図6に示す左上のブロック(x1,yi)の第2行(r2行)のQ個の画素(c1列~cQ列)各々に対応する制御信号である。
その後RSTRc(Q+1)~RSTRcWの期間は該当するColumnではないので制御信号を発生させない。
(1)yi番目のRowラインセレクタ124(図6参照)への制御信号RDy、
(2)Columnセレクタ120(図3参照)が制御するRSTRc制御信号(上からc1番目、c2番目、…、cQ番目、c(Q+1)番目、…、cW番目のColumn)、
(3)yi番目のRowラインセレクタ124(図6参照)が担当する、
(3-1)r1番目のRowへのRSr,TRr,SLr制御信号、
(3-2)r2番目のRowへのRSr,TRr,SLr制御信号、
…、
(3-P)rP番目のRowへのRSr,TRr,SLr制御信号、
を示す。
Qはi番目のRowラインセレクタ(yi)の制御対象となるブロック(画素グループ)である(x1,yi)~(xN,yi)のx1番目のブロック(画素グループ)であるブロック(x1,yi)に属するColumn数(列数)である。
Wは撮像素子(イメージセンサ)の全Column数(列数)である。
Pはブロック(x1,yi)に属するRow数(行数)である。
その結果として、まず、図9(3-1)に示すように、
r1番目のRow(図6に示すr1行)に対するREAD制御信号(RSyir1とTRyir1とSLyir1の信号)がQ回、RSTRc1~RSTRcQに同期して伝達される。
これは、制御対象とするブロック、例えば図6に示す左上のブロック(x1,yi)の第1行(r1行)のQ個の画素(c1列~cQ列)各々に対応する制御信号である。
r2番目のRow(図6に示すr2行)に対するREAD制御信号(RSyir2とTRyir2とSLyir2の信号)がQ回、RSTRc1~RSTRcQに同期して伝達される。
これは、制御対象とするブロック、例えば図6に示す左上のブロック(x1,yi)の第2行(r2行)のQ個の画素(c1列~cQ列)各々に対応する制御信号である。
その後RSTRc(Q+1)~RSTRcWの期間は該当するColumnではないので制御信号を発生させない。
以下、撮像素子(イメージセンサ)103の全体の露光制御動作例について説明する。
まず露光制御動作例その1として、従来の撮像素子(イメージセンサ)と同様に、撮像素子の撮像面の全面均一な露光期間設定としたシャッター制御撮影が可能であることを説明する。
なお、説明の簡略化のため、前提として、撮像素子(イメージセンサ)内のブロック(画素グループ)の数を水平方向に3(x1~x3)、垂直方向に3(y1~y3)とし、また各ブロック(画素グループ)は2つのRow(r1~r2)を有する構成とする。
横軸は時間であり、垂直の破線で示す区間は1ブロック(1画素グループ)の幅に相当するQ個の画素制御期間を示す。すなわちこの区間で画素グループの制御期間が切り替わるので、対応する画素グループ(x1,x2,x3のいずれか)の制御期間であることが解り易いように、図の上部に3種類に塗り分けた領域を設定している。
(1)黒=x1
(2)斜線=x2
(3)白=x3
これら水平方向に並んだ3つのブロックに対応する。
(x1,y1)、(x2,y1)、(x3,y1)
(x1,y2)、(x2,y2)、(x3,y2)
(x1,y3)、(x2,y3)、(x3,y3)
これらの9つのブロックを制御対象とした例である。
上から順に、
(a1)y1番目のRowラインセレクタへのSHy[SHUTTER(シャッター(露光))開始制御信号]、
(a2)y2番目のRowラインセレクタへのSHy[SHUTTER(シャッター(露光))開始制御信号]、
(a3)y3番目のRowラインセレクタへのSHy[SHUTTER(シャッター(露光))開始制御信号]、
(b1)y1番目のRowラインセレクタへのRDy[READ(読み出し)開始制御信号]、
(b2)y2番目のRowラインセレクタへのRDy[READ(読み出し)開始制御信号]、
(b3)y3番目のRowラインセレクタへのRDy[READ(読み出し)開始制御信号]、
これらの信号である。
次に、図10(b2)に示すように、y2番目のRowラインセレクタに対して、READ開始制御信号(RDy)をx1,x2,x3の画素グループ向けに連続して与えた後、1Row分だけ休止する。
次に、図10(b3)に示すように、y3番目のRowラインセレクタに対して、READ開始制御信号(RDy)をx1,x2,x3の画素グループ向けに連続して与えた後、1Row分だけ休止する。
以降は同じシーケンスを繰り返す。
このようなシーケンスで制御をすれば、各Rowラインセレクタが先に図9を参照して説明した動作をおこなうので、水平方向に画素順次そして垂直方向にライン順次で画素のREAD動作が行われる。
図10(c)に示す各ラインは、ブロック(画素グループ)をさらにRow毎に分割した単位での画素の動作状態を示している。上から、
x1y1r1:ブロック(x1,y1)の画素グループのr1番目のRow、
x2y1r1:ブロック(x2,y1)の画素グループのr1番目のRow、
x3y1r1:ブロック(x3,y1)の画素グループのr1番目のRow、
x1y1r2:ブロック(x1,y1)の画素グループのr2番目のRow、
x2y1r2:ブロック(x2,y1)の画素グループのr2番目のRow、
x3y1r2:ブロック(x3,y1)の画素グループのr2番目のRow、
x1y2r1:ブロック(x1,y2)の画素グループのr1番目のRow、
:
x1y3r2:ブロック(x1,y3)の画素グループのr2番目のRow、
x2y3r2:ブロック(x2,y3)の画素グループのr2番目のRow、
x3y3r2:ブロック(x3,y3)の画素グループのr2番目のRow、
このように、Row毎に分割した単位での画素の動作状態を示している。
[破線区間]は露光期間中であることを示す。
先に図5(b)を参照して説明したように画素のREAD動作はフォトダイオードPDの電荷のリセットも兼ねているので、READ動作終了時点で、そのまま次の露光期間に入ることができる。
(c)に示す最上段の(x1y1r1)の最初の実線区間で規定される読み出し処理(READ)は、(b1)に示す読み取り開始(RDy1)信号(s1)に応じて実行される。この信号(s1)に基づいて、図5(b)に示す信号パターンがブロック(x1,y1)の第1行(r1)の画素に提供され、信号読み取りが実行される。
この信号読み取りが終了すると、露光処理(SHUTTER)が開始される。図に示す破線区間である。次に、さらに、(b1)に示す読み取り開始(RDy1)信号(s2)に応じて、露光処理機関に蓄積された電荷が画素信号として読み出される。
次に、露光制御動作例その2として、ブロック(画素グループ)単位で異なる露光期間(シャッター期間)を設定した撮影が可能であることを説明する。
図10を参照して説明した通常の全面均一なシャッターによる撮像例と同様、前提として、撮像素子(イメージセンサ)内の画素グループの数を水平方向に3(x1~x3)、垂直方向に3(y1~y3)とし、また各ブロック(画素グループ)は2つのRow(r1~r2)を有する構成とする。
横軸は時間であり、垂直の破線で示す区間は1ブロック(1画素グループ)の幅に相当するQ個の画素制御期間を示す。すなわちこの区間で画素グループの制御期間が切り替わるので、対応する画素グループ(x1,x2,x3のいずれか)の制御期間であることが解り易いように、図の上部に3種類に塗り分けた領域を設定している。
(1)黒=x1
(2)斜線=x2
(3)白=x3
これら水平方向に並んだ3つのブロックに対応する。
(x1,y1)、(x2,y1)、(x3,y1)
(x1,y2)、(x2,y2)、(x3,y2)
(x1,y3)、(x2,y3)、(x3,y3)
これらの9つのブロックを制御対象とした例である。
上から順に、
(a1)y1番目のRowラインセレクタへのSHy[SHUTTER(シャッター(露光))開始制御信号]、
(a2)y2番目のRowラインセレクタへのSHy[SHUTTER(シャッター(露光))開始制御信号]、
(a3)y3番目のRowラインセレクタへのSHy[SHUTTER(シャッター(露光))開始制御信号]、
(b1)y1番目のRowラインセレクタへのRDy[READ(読み出し)開始制御信号]、
(b2)y2番目のRowラインセレクタへのRDy[READ(読み出し)開始制御信号]、
(b3)y3番目のRowラインセレクタへのRDy[READ(読み出し)開始制御信号]、
これらの信号である。
図11(c)に示す各ラインは、ブロック(画素グループ)をさらにRow毎に分割した単位での画素の動作状態を示している。上から、
x1y1r1:ブロック(x1,y1)の画素グループのr1番目のRow、
x2y1r1:ブロック(x2,y1)の画素グループのr1番目のRow、
x3y1r1:ブロック(x3,y1)の画素グループのr1番目のRow、
x1y1r2:ブロック(x1,y1)の画素グループのr2番目のRow、
x2y1r2:ブロック(x2,y1)の画素グループのr2番目のRow、
x3y1r2:ブロック(x3,y1)の画素グループのr2番目のRow、
x1y2r1:ブロック(x1,y2)の画素グループのr1番目のRow、
:
x1y3r2:ブロック(x1,y3)の画素グループのr2番目のRow、
x2y3r2:ブロック(x2,y3)の画素グループのr2番目のRow、
x3y3r2:ブロック(x3,y3)の画素グループのr2番目のRow、
このように、Row毎に分割した単位での画素の動作状態を示している。
破線区間は露光期間中であることを示す。
均一露光処理例として説明した図10とは異なり、制御信号SHyによって露光期間がリセットされるので、画素グループ毎に異なる長さの露光期間(=破線区間)によって撮像される。
(c)に示す最上段の(x1y1r1)の最初の実線区間で規定される読み出し処理(READ)は、(b1)に示す読み取り開始(RDy1)信号(s1)に応じて実行される。この信号(s1)に基づいて、図5(b)に示す信号パターンがブロック(x1,y1)の第1行(r1)の画素に提供され、信号読み取りが実行される。
(c)に示す最上段の(x1y1r1)は、(a1)制御信号SHyの入力信号(s2)に応じて、露光処理が開始される。(c)に示す最上段の(x1y1r1)の露光期間は、この(s2)位置から、次の(b1)に示す読み取り開始(RDy1)信号(s3)の位置までの期間に制御される。
各ブロック内の数値1~4は、露光期間(シャッター時間)の相対的な値を示している。数値4の設定されたブロックは、数値1の設定されたブロックの4倍の露光期間が設定されていることを示している。
ここまで、複数画素からなるブロック(画素グループ)毎に異なる露光期間を設定する露光期間制御(シャッター制御)を行って画像撮影を実行する撮像素子(イメージセンサ)について、画素順次読み出しをおこなう撮像素子(イメージセンサ)を例として説明した。
以下、この構成例について説明する。なお、本実施例においても、撮像装置の全体構成は、先に説明した実施例と同様、図1の構成が適用可能である。
撮像素子(イメージセンサ)103の構成と処理が異なってくる。
また、垂直方向に延びる信号線を介して画素信号SIGcを出力するようになっている。
また垂直方向の制御線は全てColumnセレクタ(列セレクタ)133に接続し、Columnセレクタ133から制御信号が各画素に向けて伝達される。
ここで外部から入力する露光制御信号とは、図2を参照して説明した露光制御値116、すなわち、ブロック単位の露光制御値である。
デジタル化された画素信号は、Column選択制御信号SLcの制御によって、順次撮像素子(イメージセンサ)から出力される。
(a)露光処理「SHUTTER(シャッター)」に基づく電荷蓄積処理
(b)読み出し処理「READ(リード)」に基づく蓄積電荷出力処理
これら2つの処理のための信号パターンも同様のパターンの利用が可能である。
さらに、Rowセレクタの階層的な内部構成およびRowラインセレクタの構成についても、先に図6と図7を参照して説明した構成が利用できる。
(1)yi番目のRowラインセレクタ(図13、図6参照)への制御信号SHy、
(2)Columnセレクタ133(図13参照)が制御するSLx制御信号(上からx1番目、x2番目、…、x(N-1)番目、xN番目のブロック(画素グループ))、
(3)Columnセレクタ133(図13参照)が制御するRSTRc制御信号(上からx1番目、x2番目、…、x(N-1)番目、xN番目のブロック(画素グループ))、
(4)yi番目のRowラインセレクタ124(図6参照)が担当する、
(4-1)r1番目のRowへのRSr,TRr,SLr制御信号、
(4-2)r2番目のRowへのRSr,TRr,SLr制御信号、
…、
(4-P)rP番目のRowへのRSr,TRr,SLr制御信号、
を示す。
Nは水平方向のブロック(画素グループ)数である。
Pは(x1,yi)に属するRow数(行数)である。
その結果として、まず、図15(4-1)に示すように、
r1番目のRow(例えば図6に示すr1行)に対するSHUTTER制御信号(RSyir1とTRyir1の信号)が1回、RSTRx1に同期して伝達される。
r2番目のRow(例えば図6に示すr2行)に対するSHUTTER制御信号(RSyir2とTRyir2の信号)が1回、RSTRx1に同期して伝達される。
その後RSTRc2~RSTRxNの期間は該当するColumnではないので制御信号を休止する。
なお、前述したように、本実施例2におけるRowセレクタ132の構成は、先に説明した実施例1と同様の構成であり、図6、図7を参照して説明した構成を持つ。
(1)yi番目のRowラインセレクタ124(図13、図6参照)への制御信号RDy、
(2)Columnセレクタ133(図13参照)が制御するSLx制御信号(上からx1番目、x2番目、…、x(N-1)番目、xN番目のブロック(画素グループ))、
(3)Columnセレクタ133(図13参照)が制御するRSTRc制御信号(上からx1番目、x2番目、…、x(N-1)番目、xN番目のブロック(画素グループ))、
(4)yi番目のRowラインセレクタ124(図6参照)が担当する、
(4-1)r1番目のRowへのRSr,TRr,SLr制御信号、
(4-2)r2番目のRowへのRSr,TRr,SLr制御信号、
…、
(4-P)rP番目のRowへのRSr,TRr,SLr制御信号、
を示す。
Nは水平方向のブロック(画素グループ)数である。
Pは(x1,yi)に属するRow数(行数)である。
その結果として、まず、図16(4-1)に示すように、
r1番目のRow(例えば図6に示すr1行)に対するREAD制御信号(RSyir1とTRyir1とSLyir1の信号)が1回、RSTRx1に同期して伝達される。
r2番目のRow(例えば図6に示すr2行)に対するREAD制御信号(RSyir2とTRyir2とSLyir2の信号)が1回、RSTRx1に同期して伝達される。その後RSTRc2~RSTRxNの期間は該当するColumnではないので制御信号を休止する。
上述した実施例では、撮像素子に含まれる多数の画素について、矩形上のブロック(画素グループ)を設定して、矩形上のブロック(画素グループ)単位での露光期間制御を行う例について説明した。
例えばRowラインセレクタ139は、1つおきのRowの画素領域(a-r1)、(a-r2)、(a-r3)・・の各画素に対して制御線を延ばし、これらの画素の制御を実行する。
また、Rowラインセレクタ140は、1つおきのRowの画素領域(b-r1)、(b-r2)、(b-r3)・・の各画素に対して制御線を延ばし、これらの画素の制御を実行する。
互いに担当する画素が交互になることによって、巨視的にみればこの領域は、Rowラインセレクタ139によるシャッターとRowラインセレクタ140によるシャッターの2種類の露光制御が可能になる。
1つの領域で複数のシャッターが可能になるということは、例えば明るい被写体と暗い被写体が同一領域に混在するような画像において有効な露光制御が実現される。
この場合は、図18に示すように、Columnセレクタ141の構造を変更し、Columnグループセレクタ142と、複数のColumnラインセレクタを設ける。例えば図中のColumnラインセレクタ143と、Columnラインセレクタ144が1各列(Column)おきに制御するようにして、制御するColumnを交互にするような構造をとればよい。
また、Columnラインセレクタ144は、1つおきのColumnの画素領域(b-c1)、(b-c2)、(b-c3)・・の各画素に対して制御線を延ばし、これらの画素の制御を実行する。
このような設定とすることも可能である。
上述した複数の実施例において説明したように、本発明の撮像装置では、画素毎でなく、撮像面内で互いに近い位置にある複数の画素で構成されるブロック(画素グループ)毎に露光期間を設定した露光制御をおこなう。この構成により撮像素子(イメージセンサ)内部の制御回路を過度に大規模にすることなく、領域毎の適応的な露光制御を実現することができる。
複数画素から構成される画素グループ単位の輝度評価を実行し、評価結果に応じて、画素グループ単位の露光制御値を算出する。撮像素子は、算出された画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する。制御信号として、例えば画素グループ内の複数画素に対して同一パターンからなる露光制御信号を時系列に順次、出力し、1つの画素グループに属する複数画素の露光時間を同一としたグループ単位の露光制御を実現する。
102 絞り
103 撮像素子(イメージセンサ)
104 DSPブロック
105 LCDドライバ
106 LCD
107 CODEC
108 メモリ
109 CPU
110 入力デバイス
111 露光補償乗算器
112 信号処理部
113 ブロック輝度評価値
115 露光制御値算出部
118 タイミングジェネレータ(TG)
119 Rowセレクタ
120 Columnセレクタ
121 CDS
122 ADC
123 Rowグループセレクタ
124 Rowラインセレクタ
125~127 ラインセレクタ
128 シャッター制御信号ジェネレータ
129 READ(読み出し)制御信号ジェネレータ
130 Row選択スイッチ
131 タイミングジェネレータ(TG)
132 Rowセレクタ
133 Columnセレクタ
134 ADC
135 Columnグループセレクタ
136 Columnラインセレクタ
137 Rowセレクタ
138 Rowグループセレクタ
139 Rowラインセレクタ
140 Rowラインセレクタ
141 Columnセレクタ
142 Columnグループセレクタ
143 Columnラインセレクタ
144 Columnラインセレクタ
Claims (16)
- 複数画素から構成される画素グループ単位の輝度評価を実行する輝度評価部と、
前記輝度評価部の評価結果に応じて、前記画素グループ単位の露光制御値を算出する露光制御値算出部と、
前記露光制御値算出部の算出した画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する撮像素子を有する撮像装置。 - 前記撮像素子は、
前記制御信号として、前記画素グループ内の複数画素に対して、同一パターンからなる露光制御信号を時系列に順次、出力する処理を行い、1つの画素グループに属する複数画素の露光時間を同一とした露光制御を行う請求項1に記載の撮像装置。 - 前記撮像素子は、
前記制御信号として、行(ロー:Row)単位の制御信号と、列(カラム:Column)単位の制御信号を組み合わせて、制御対象の画素を特定した制御処理を実行する請求項1に記載の撮像装置。 - 前記撮像素子は、
露光処理の開始タイミングを示す露光開始制御信号と、読み出し処理の開始タイミングを示す読み出し開始制御信号を画素グループ単位に設定して、画素グループ単位の露光制御を実行する請求項1に記載の撮像装置。 - 前記撮像素子は、
行(Row)方向に設定された画素グループに対する露光制御信号を出力する複数のRowラインセレクタと、
前記複数のRowラインセレクタに対する制御信号出力タイミングを指示する制御信号を出力するRowグループセレクタとの階層構成を有する請求項1に記載の撮像装置。 - 前記Rowラインセレクタは、
前記Rowグループセレクタからの制御信号出力タイミングを指示する制御信号に応じて、制御対象とする画素グループ単位で制御信号を出力する請求項5に記載の撮像装置。 - 前記Rowラインセレクタは、
各画素の露光処理を実行させる露光パターン信号を出力するシャッター制御信号生成部と、
各画素の読み出し処理を実行させる読み出しパターン信号を出力する読み出し制御信号生成部を有し、
前記Rowグループセレクタからの制御信号出力タイミングを指示する制御信号の種類に応じて、前記シャッター制御信号生成部または前記読み出し制御信号生成部の生成する制御信号の選択的な出力処理を実行する請求項5に記載の撮像装置。 - 前記撮像素子は、
撮像素子の1行(Row)の画素信号に対して並列にAD変換を実行するカラム(Column)ADCを有し、さらに、
画素グループ単位の制御信号を生成するカラム(Column)グループセレクタと、
画素グループ単位の制御信号を受けて画素グループ内の制御信号を生成する複数のカラム(Column)ラインセレクタとの階層構造を有する、
カラム(Column)セレクタを有する請求項1に記載の撮像装置。 - 前記画素グループは、隣接画素集合からなる画素グループである請求項1に記載の撮像装置。
- 前記画素グループは、複数の離間領域にある画素集合からなる画素グループである請求項1に記載の撮像装置。
- 撮像面の複数の画素を分割した画素グループ単位で設定された露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する撮像素子。
- 前記制御信号として、前記画素グループ内の複数画素に対して、同一パターンからなる露光制御信号を時系列に順次、出力する処理を行い、1つの画素グループに属する複数画素の露光時間を同一とした露光制御を行う請求項11に記載の撮像素子。
- 前記制御信号として、行(ロー:Row)単位の制御信号と、列(カラム:Column)単位の制御信号を組み合わせて、制御対象の画素を特定した制御処理を実行する請求項11に記載の撮像素子。
- 露光処理の開始タイミングを示す露光開始制御信号と、読み出し処理の開始タイミングを示す読み出し開始制御信号を画素グループ単位に設定して、画素グループ単位の露光制御を実行する請求項11に記載の撮像素子。
- 撮像装置において実行する撮像制御方法であり、
輝度評価部が、複数画素から構成される画素グループ単位の輝度評価を実行する輝度評価ステップと、
露光制御値算出部が、前記輝度評価ステップにおける評価結果に応じて、前記画素グループ単位の露光制御値を算出する露光制御値算出ステップと、
撮像素子が、前記露光制御値算出ステップにおいて算出した画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行する撮像ステップを有する撮像制御方法。 - 撮像装置において撮像制御処理を実行させるプログラムであり、
輝度評価部に、複数画素から構成される画素グループ単位の輝度評価を実行させる輝度評価ステップと、
露光制御値算出部に、前記輝度評価ステップにおける評価結果に応じて、前記画素グループ単位の露光制御値を算出させる露光制御値算出ステップと、
撮像素子に、前記露光制御値算出ステップにおいて算出した画素グループ単位の露光制御値に応じた制御信号を画素グループ各々の構成画素に出力して画素グループ単位の露光制御を実行させる撮像ステップを実行させるプログラム。
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