WO2012023119A1 - Procédé de stratification pour diodes électroluminescentes (del) - Google Patents

Procédé de stratification pour diodes électroluminescentes (del) Download PDF

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Publication number
WO2012023119A1
WO2012023119A1 PCT/IB2011/053661 IB2011053661W WO2012023119A1 WO 2012023119 A1 WO2012023119 A1 WO 2012023119A1 IB 2011053661 W IB2011053661 W IB 2011053661W WO 2012023119 A1 WO2012023119 A1 WO 2012023119A1
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WO
WIPO (PCT)
Prior art keywords
lamination layer
layer
phosphor
support film
led die
Prior art date
Application number
PCT/IB2011/053661
Other languages
English (en)
Inventor
Grigoriy Basin
Kazutoshi Iwata
Original Assignee
Koninklijke Philips Electronics N.V.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics N.V. filed Critical Koninklijke Philips Electronics N.V.
Publication of WO2012023119A1 publication Critical patent/WO2012023119A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C70/00—Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts
    • B29C70/68—Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts by incorporating or moulding on preformed parts, e.g. inserts or layers, e.g. foam blocks
    • B29C70/70—Completely encapsulating inserts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C2791/00—Shaping characteristics in general
    • B29C2791/004—Shaping under special conditions
    • B29C2791/006—Using vacuum
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C51/00—Shaping by thermoforming, i.e. shaping sheets or sheet like preforms after heating, e.g. shaping sheets in matched moulds or by deep-drawing; Apparatus therefor
    • B29C51/10—Forming by pressure difference, e.g. vacuum
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29K—INDEXING SCHEME ASSOCIATED WITH SUBCLASSES B29B, B29C OR B29D, RELATING TO MOULDING MATERIALS OR TO MATERIALS FOR MOULDS, REINFORCEMENTS, FILLERS OR PREFORMED PARTS, e.g. INSERTS
    • B29K2083/00—Use of polymers having silicon, with or without sulfur, nitrogen, oxygen, or carbon only, in the main chain, as moulding material
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29L—INDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
    • B29L2031/00—Other particular articles
    • B29L2031/747—Lightning equipment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/50—Wavelength conversion elements
    • H01L33/505—Wavelength conversion elements characterised by the shape, e.g. plate or foil

Definitions

  • This invention relates to light emitting diodes (LEDs) and, in particular, to a technique of laminating a layer over LEDs on a submount substrate, such as laminating a phosphor layer over the LEDs.
  • LEDs light emitting diodes
  • FIG. 1 illustrates a conventional flip chip LED die 10 mounted on a portion of a submount wafer 12. In a flip-chip, both the n and p contacts are formed on the same side of the LED die.
  • the LED die 10 is formed of semiconductor epitaxial layers, including an n-layer 14, an active layer 15, and a p-layer 16, grown on a growth substrate, such as a sapphire substrate.
  • the growth substrate has been removed in Fig. 1 by laser lift-off, etching, grinding, or by other techniques.
  • the epitaxial layers are GaN based, and the active layer 15 emits blue light.
  • a metal electrode 18 electrically contacts the p-layer 16, and a metal electrode 20 electrically contacts the n-layer 14.
  • the electrodes 18 and 20 are gold pads that are ultrasonically welded to anode and cathode metal pads 22 and 24 on a ceramic submount wafer 12.
  • the submount wafer 12 can be any suitable material, including silicon.
  • the submount wafer 12 has conductive vias 24 leading to bottom metal pads 26 and 28 for bonding to a printed circuit board. Many LEDs are mounted on the submount wafer 12, such as 2000, and the submount wafer 12 will be later singulated to form individual
  • Fig. 2 is a simplified top down view of LED dies 10 mounted on the submount wafer 12
  • Fig. 3 is a simplified cross-sectional view of a portion the wafer 12 of Fig. 2.
  • an underfill material such as silicone, may be dispensed beneath each LED die 10 to fill the gap between the LED die 10 and the underlying surface of the submount wafer 12.
  • a YAG phosphor, or red and green phosphors To produce white light using the blue LED die 10, it is well known to deposit a YAG phosphor, or red and green phosphors, directly over the die 10 by, for example, spraying or spin-coating the phosphor in a binder, electrophoresis, applying the phosphor in a reflective cup, or other means. It is also known to affix a preformed tile of phosphor (e.g., a sintered phosphor powder or phosphor powder in a binder) on the top of the LED die 10.
  • a preformed tile of phosphor e.g., a sintered phosphor powder or phosphor powder in a binder
  • US Patent No. 7,344,952 assigned to the present assignee, describes a single-step lamination process for laminating a sheet of phosphor in a silicone binder over LED dies mounted on a submount wafer.
  • An object of the invention is to propose a process for mass production of phosphor- converted LEDs.
  • Another object of the invention is to propose a way to efficiently laminate a lamination film over LED dies. Therefore, an embodiment of an LED device fabrication method is proposed as follows. First, the method includes a first step of providing at least one LED die on a substrate. Then a preformed lamination layer is mounted over the LED die.
  • the lamination layer comprises a binder, or other material, with a first and second surface and is supported by a support film on the first surface.
  • the binder may contain phosphor particles.
  • the support film remains on the first surface while the lamination layer is mounted over the LED die. Thereafter, the lamination layer is heated to a first temperature to soften the lamination layer, and the heating permits the creation of an airtight seal between the lamination layer and the substrate surrounding the at least one LED die.
  • the lamination layer is heated to a second temperature in a vacuum to remove air between the lamination layer and the substrate.
  • the structure may then be exposed to ambient air pressure, which presses the lamination layer against the surface to thus conform the lamination layer over the LED die.
  • the air tight seal prevents the air from entering under the lamination layer.
  • the LEDs may be flip-chips, or have top and bottom electrodes, or have top electrodes only.
  • Fig. 1 is a cross-sectional view of a prior art blue or UV LED die, mounted on a submount substrate or a portion of a submount wafer.
  • Fig. 2 is a simplified top down view of LED dies mounted on a submount wafer.
  • Fig. 3 is a simplified cross-sectional view of a portion the wafer of Fig. 2.
  • Fig. 4 illustrates a phosphor/silicone layer sandwiched between a support film and a protective film.
  • the sheet may be dispensed from a roll and be, for example, 30 cm wide by 150 meters long.
  • Fig. 5 illustrates the protective film being progressively removed as the sheet is unrolled just prior to being laminated over LED dies on a submount wafer.
  • Fig. 6 illustrates the phosphor/silicone layer on the support film after the protective film has been removed and after the phosphor/silicone layer has been cut to substantially match the size of the submount wafer.
  • Fig. 7 illustrates the phosphor/silicone layer softened by heating and undergoing a first lamination process over the LED dies.
  • Fig. 9 illustrates a second lamination process where the phosphor/silicone layer conforms to the LED dies and encapsulates them.
  • Fig. 10 is a cross-sectional view of a single LED and submount substrate after silicone lenses are molded over the LEDs while on the submount wafer and after dicing the submount wafer.
  • step 20 of Fig. 1 an LED wafer is fabricated using any suitable techniques, which may be prior art as described with respect to Fig. 1.
  • step 22 the LED wafer is then diced (e.g., by sawing), and the LED dies are mounted on a submount wafer, such as the submount wafer 12 described with respect to Figs. 1-3. In one example, there may be about 2000 LED dies mounted on the submount wafer 12. An underfill may be dispensed below each LED die. An optional encapsulant step may be performed to form a layer of silicone over the LED dies for protection and to increase light extraction.
  • a roll of a support film 26 is provided.
  • the support film 26 may be a commercially available ethyl tetra fluoro ethylene (ETFE) foil (a polymer) about 50 microns thick, 30 cm wide, and 150 meters long. Other dimensions are also suitable, such as providing the support film 26 as small sheets or a ribbon.
  • ETFE ethyl tetra fluoro ethylene
  • a phosphor powder is mixed with silicone, or other suitable binder, to form a slurry, and the slurry is sprayed on or otherwise deposited on the support film 26 to a predetermined thickness in a continuous process (assuming a roll is continuously dispensed).
  • a YAG phosphor yellow-green
  • the phosphor is mixed red and green phosphors. Any combination of phosphors may be used in conjunction with the LED light to make any color light. The density of phosphor, the thickness of the layer, and the type of phosphor or combination of phosphors are selected so that the light emitted by the combination of the LED die and the phosphor(s) has a target white point or other desired color.
  • the phosphor/silicone layer will be about 30-200 microns thick.
  • Other inert inorganic particles such as light scattering materials (e.g., silica, Ti0 2 ) may also be included in the slurry, or only non-phosphor materials are included in the slurry.
  • only clear silicone is used, and various rolls of silicone layers are fabricated using silicone of different indices of refraction.
  • slurry is then dried, such as by infrared lights or other heat sources, as the support film 26 is being unrolled.
  • the resulting dried phosphor/silicone layer 28 is shown in Fig. 4.
  • a protective film 32 of ETFE foil is placed over the dried
  • the protective film 32 is initially provided as a roll and may have a thickness of about 25 microns and the same other dimensions as the support film 26.
  • the protective film 32 would not be needed if the support film 26 were formed as small sheets and the top surface of the phosphor/silicone layer 28 would not be subjected to potentially damaging contacts. Additionally, the protective film would not be needed of the phosphor/silicone layer 28 would not be damaged without the protective film.
  • the sandwiched structure of Fig. 4 is rolled up for later use in laminating LED dies on a submount wafer.
  • the protective film 32 prevents the phosphor/silicone layer 28 from being contacted during the rolling up of the structure. Neither the support film 26 nor the protective film 32 is strongly affixed to the phosphor/silicone layer 28.
  • the phosphor/silicone layer 28 may be tested for its color conversion and matched to particular LED dies generating a certain range of peak wavelengths. Different rolls or sheets of the phosphor/silicone layer 28 having different characteristics may be fabricated for laminating LED dies having different characteristics.
  • step 34 it is assumed that the roll of the phosphor/silicone layer 28 has been chosen to be laminated onto LED dies, so the roll is mounted on a lamination system that dispenses the roll at a certain rate.
  • step 36 As the sandwiched phosphor/silicone layer 28 is rolled out, the protective film 32 is continuously removed since it is no longer needed.
  • the phosphor/silicone layer 28 and support film 26 is then cut into pieces (if needed) about the same size as the submount wafer 12, such as 4x4 inches or other size.
  • Fig. 6 illustrates a portion of a cut piece of the phosphor/silicone layer 28 and support film 26.
  • step 40 the phosphor/silicone layer 28 is mounted face down over the submount wafer 12. Fiducials on the wafer 12 may be used for alignment of the cut piece.
  • step 42 as shown in Fig. 7, a first lamination step is performed.
  • phosphor/silicone layer 28 is heated in a chamber to 40-120°C to soften it and to cause the phosphor/silicone layer 28 to adhere to the top surfaces of the LED dies 10.
  • a vacuum is created in the chamber, and downward mechanical pressure is applied to the surface of the support film 26, such as by a resilient pad, a diaphragm, or compressed air.
  • the uniform pressure causes the phosphor/silicone layer 28 to form an airtight seal around the periphery of the submount wafer 12 and helps the phosphor/silicone layer 28 to uniformly adhere to the top surfaces of the LED dies 10.
  • the support film 26 helps protect the phosphor/silicone layer 28 during application of the mechanical pressure and prevents deformation of the phosphor/silicone layer 28 over the LED dies 10 during this first lamination step.
  • step 44 the structure is removed from the chamber, cooled to room temperature, and the support film 26 is removed, such as by using adhesive tape.
  • Fig. 8 shows the resulting structure. The airtight seal around the periphery of the submount wafer 12 prevents air from filling in between the phosphor/silicone layer 28 and the submount wafer 12. If the support film 26 can be removed while the structure remains in the chamber, the process can be performed in-situ.
  • a second lamination process is performed.
  • the structure is placed in a vacuum chamber and heated to an elevated temperature of about 70-130°C, and a vacuum is created to remove the remaining air between the phosphor/silicone layer 28 and the submount wafer 12. Since the support film 26 has been removed, the air can escape through small pores in the thin phosphor/silicone layer 28.
  • the temperature during the second lamination process is higher than the temperature used during the first lamination process to cause the phosphor/silicone layer 28 to be more pliable/conformable.
  • the extent of the vacuum and the process times depend on the specific materials used. Generally, a thinner phosphor/silicone layer 28 requires less time to remove the remaining air than a thicker phosphor/silicone layer 28.
  • step 48 air is then allowed to enter the chamber to pressurize the chamber, which compresses the heated/softened phosphor/silicone layer 28 against the LED dies 10 and submount wafer 12 to conform the phosphor/silicone layer 28 around the LED dies 10 and encapsulate them.
  • the peripheral seal prevents this air from entering between the phosphor/silicone layer 28 and the submount wafer 12.
  • step 50 as shown in Fig. 10, an optional silicone lens 60 is molded over each LED die 10 using compression molding.
  • the submount wafer 12 is then diced, such as by sawing, to separate out the mounted phosphor-converted LED dies, one of which is shown in Fig. 10.
  • the double lamination process allows the support film 26 to remain on the phosphor/silicone layer 28 until the phosphor/silicone layer 28 is fully supported by the LED dies 10 and submount wafer 12 and the peripheral seal is created. Then, in the second lamination step, without the support film 26, the conformal encapsulation occurs. Many variations of the above-described mass production process are possible.
  • Variations include the temperatures needed to process the phosphor/silicone layer 28, the various sizes, the order of the steps such as cutting the pieces (if needed) before or after the protective film 32 is removed, types of LED dies and submount wafers used, additives to the silicone encapsulating layer, among others.
  • the LED dies can be other than flip-chips and may be formed of any suitable material.
  • the silicone (or other binder material) encapsulation layer is infused with light scattering particles such as silica or Ti0 2 , or the clear silicone may have no additives but has a selected index of refraction for maximizing light extraction from the LED dies 10.
  • Multiple layers may be sequentially laminated over each other by repeating the above-described technique for each layer, such as for white point tuning, scattering plus phosphor conversion, or other purpose.
  • the phosphor/silicone layer 28 need not be laminated directly over the LED dies 10 but may be laminated over an encapsulant layer or lens, such as silicone, or other layer that has already been formed over the LED dies 10. By distancing the layer 28 from the LED die, some advantages result, such as less die absorption from backscattered light and improved color uniformity.
  • the phosphor/silicone layer 28 may be laminated over the lens 60 in Fig. 10, where the lens 60 is first formed over the LED dies 10 using a
  • the lamination process may be applied to any size submount wafer or any other type of substrate, even a substrate including only one LED die.
  • the substrate need not have metal electrodes or other interconnection functions.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Mechanical Engineering (AREA)
  • Led Device Packages (AREA)

Abstract

L'invention porte sur un procédé pour stratifier une couche (28) sur un réseau de puces de diodes électroluminescentes (DEL) (10) sur une tranche d'embase (12). La couche (28) peut comprendre une poudre fluorescente contenue dans un liant silicone. La couche est formée sur un film de support (26), puis est séchée. La couche est ensuite montée sur les puces des DEL (10), et la structure est chauffée dans un vide. Une pression vers le bas est appliquée au film de support (26), de telle sorte que la couche adhère aux sommets des puces des DEL, et forme un joint étanche à l'air autour de la périphérie de la tranche. La structure est ensuite exposée à l'air ambiant, et le film de support (26) est retiré. Le joint d'étanchéité empêche l'air ambiant d'entrer entre la couche (28) et la tranche (12). Dans une seconde étape de stratification, la structure est portée à une température plus élevée dans un vide afin d'éliminer l'air restant entre la couche et la tranche. La structure est ensuite exposée à la pression de l'air ambiant, laquelle permet à la couche chauffée de s'adapter aux puces de diodes électroluminescentes.
PCT/IB2011/053661 2010-08-20 2011-08-19 Procédé de stratification pour diodes électroluminescentes (del) WO2012023119A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US37529610P 2010-08-20 2010-08-20
US61/375,296 2010-08-20

Publications (1)

Publication Number Publication Date
WO2012023119A1 true WO2012023119A1 (fr) 2012-02-23

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Cited By (14)

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WO2013175338A1 (fr) * 2012-05-23 2013-11-28 Koninklijke Philips N.V. Processus de revêtement fluorescent pour dispositifs électroluminescents discrets
WO2014195819A1 (fr) 2013-06-06 2014-12-11 Koninklijke Philips N.V. Diode électroluminescente stratifiée avec une feuille fluorescente et son procédé de fabrication
WO2015193763A1 (fr) * 2014-06-19 2015-12-23 Koninklijke Philips N.V. Dispositif électroluminescent à conversion de longueur d'onde à petite taille de source
WO2016065016A1 (fr) * 2014-10-24 2016-04-28 Dow Corning Corporation Procédé de stratification sous vide pour former un article à revêtement conforme et articles associés à revêtement conforme formé par celui-ci
US9351348B2 (en) 2010-10-27 2016-05-24 Koninklijke Philips N.V. Laminate support film for fabrication of light emitting devices and method of fabrication
JP2017034237A (ja) * 2015-06-26 2017-02-09 億光電子工業股▲ふん▼有限公司Ｅｖｅｒｌｉｇｈｔ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 発光デバイスおよびその製造方法
KR20180022863A (ko) * 2015-08-18 2018-03-06 장쑤 체리티 옵트로닉스 컴퍼니, 리미티드 직렬 롤링에 기반한 유기 실리콘 수지 광 변환체로 led를 본딩 패키징하는 장비 시스템
KR20180022862A (ko) * 2015-08-18 2018-03-06 장쑤 체리티 옵트로닉스 컴퍼니, 리미티드 직렬 롤링에 기반한 유기 실리콘 수지 광 변환체로 led를 본딩 패키징하는 공정방법
EP3321980A4 (fr) * 2015-08-18 2018-05-16 Jiangsu Cherrity Optronics Co., Ltd Système d'équipement utilisant un photoconvertisseur en résine de silicone organique déformable pour coller-encapsuler une del
WO2019049791A1 (fr) 2017-09-08 2019-03-14 東レ・ダウコーニング株式会社 Procédé de production de dispositif à semi-conducteur optique isolé
WO2019049794A1 (fr) 2017-09-08 2019-03-14 東レ・ダウコーニング株式会社 Procédé de production de dispositif à semi-conducteur optique étanchéifié
CN110446383A (zh) * 2018-05-02 2019-11-12 毅力科技有限公司 在至少一电子模块上形成保护膜的方法
US11145794B2 (en) 2013-05-20 2021-10-12 Lumileds Llc Chip scale light emitting device package with dome
DE102019110818B4 (de) 2018-05-02 2022-04-07 Eleadtk Co., Ltd. Verfahren zur herstellung eines schutzfilms auf mindestens einem elektronischen modul hintergrund

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CN111640840B (zh) * 2020-06-17 2021-11-30 鸿利智汇集团股份有限公司 一种led真空封装工艺及真空压制装置

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JP2017535945A (ja) * 2014-10-24 2017-11-30 ダウ コーニング コーポレーションＤｏｗ Ｃｏｒｎｉｎｇ Ｃｏｒｐｏｒａｔｉｏｎ 共形にコーティングされた物品を形成するための真空積層方法及び同方法から形成された関連する共形にコーティングされた物品
WO2016065016A1 (fr) * 2014-10-24 2016-04-28 Dow Corning Corporation Procédé de stratification sous vide pour former un article à revêtement conforme et articles associés à revêtement conforme formé par celui-ci
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JP2017034237A (ja) * 2015-06-26 2017-02-09 億光電子工業股▲ふん▼有限公司Ｅｖｅｒｌｉｇｈｔ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏ．，Ｌｔｄ． 発光デバイスおよびその製造方法
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JP2018525816A (ja) * 2015-08-18 2018-09-06 ジアンスー チェリティ オプトロニクス カンパニー リミテッドＪｉａｎｇｓｕ Ｃｈｅｒｒｉｔｙ Ｏｐｔｒｏｎｉｃｓ Ｃｏ．， Ｌｔｄ． 直列ローリングによって有機シリコン樹脂光変換体でｌｅｄを貼り合せてパッケージするプロセス方法
KR102026842B1 (ko) * 2015-08-18 2019-09-30 장쑤 체리티 옵트로닉스 컴퍼니, 리미티드 직렬 롤링에 기반한 유기 실리콘 수지 광 변환체로 led를 본딩 패키징하는 공정방법
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EP3340320A4 (fr) * 2015-08-18 2018-08-01 Jiangsu Cherrity Optronics Co., Ltd Procédé de traitement utilisant un photoconvertisseur en résine de silicone organique pour coller-encapsuler une del par cylindrage en tandem
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WO2019049794A1 (fr) 2017-09-08 2019-03-14 東レ・ダウコーニング株式会社 Procédé de production de dispositif à semi-conducteur optique étanchéifié
WO2019049791A1 (fr) 2017-09-08 2019-03-14 東レ・ダウコーニング株式会社 Procédé de production de dispositif à semi-conducteur optique isolé
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