WO2011001818A1 - Dispositif à semi-conducteurs et procédé de fabrication de dispositif à semi-conducteurs - Google Patents

Dispositif à semi-conducteurs et procédé de fabrication de dispositif à semi-conducteurs Download PDF

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Publication number
WO2011001818A1
WO2011001818A1 PCT/JP2010/060105 JP2010060105W WO2011001818A1 WO 2011001818 A1 WO2011001818 A1 WO 2011001818A1 JP 2010060105 W JP2010060105 W JP 2010060105W WO 2011001818 A1 WO2011001818 A1 WO 2011001818A1
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Prior art keywords
solder
semiconductor device
semiconductor element
connection
mass
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PCT/JP2010/060105
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English (en)
Japanese (ja)
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靖 池田
芹沢 弘二
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株式会社日立製作所
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Publication of WO2011001818A1 publication Critical patent/WO2011001818A1/fr

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/262Sn as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24Selection of soldering or welding materials proper
    • B23K35/26Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
    • B23K35/264Bi as the principal constituent
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B32LAYERED PRODUCTS
    • B32BLAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
    • B32B15/00Layered products comprising a layer of metal
    • B32B15/01Layered products comprising a layer of metal all layers being exclusively metallic
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
    • C22C12/00Alloys based on antimony or bismuth
    • CCHEMISTRY; METALLURGY
    • C22METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
    • C22CALLOYS
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    • C22C13/02Alloys based on tin with antimony or bismuth as the next major constituent
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    • H01L2924/19041Component type being a capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

Definitions

  • the present invention relates to a semiconductor device, and more particularly to flash prevention when a semiconductor element is connected on a frame using solder.
  • FIG. 12 is a configuration diagram showing a configuration of a conventional semiconductor device.
  • the semiconductor element 1 is die-bonded on the frame 2 with solder 3, and wire bonding is performed between the electrode on the upper surface of the semiconductor element 1 and the terminal 5 of the frame with a wire 4, and then sealed with a potting resin 6. Stopped.
  • the semiconductor device 7 is reflow soldered to a printed circuit board (not shown) with Sn-Ag-Cu-based medium temperature lead-free solder.
  • the melting point of Sn—Ag—Cu-based lead-free solder is as high as about 220 ° C., and it is assumed that the connection portion is heated up to 260 ° C. during reflow soldering.
  • high lead solder having a melting point of 290 ° C. or more has been used for the die bonding solder 3 of the semiconductor element 1 inside the semiconductor device 7 for the purpose of the temperature hierarchy.
  • High lead solder has 85 wt. Compared with Sn-Pb eutectic solder prohibited by the RoHS Directive that has been in force since July 2006, it contains a large amount of lead.
  • solders have a melting point of 260 ° C. or lower, so when used for die bonding of the semiconductor element 1, the solder is used during reflow soldering (maximum temperature 260 ° C.). Will melt.
  • the periphery of the connecting portion is resin-molded, when the internal solder 3 melts, the solder 3 leaks from the interface between the potting resin 6 and the frame 2 as shown in FIG. 13 due to volume expansion at the time of melting.
  • the solder 3 leaks from the interface between the potting resin 6 and the frame 2 as shown in FIG. 13 due to volume expansion at the time of melting.
  • FIG. 13 is a view showing a state after reflow soldering in a conventional semiconductor device.
  • Au-based solders such as Au-Sn, Au-Si, Au-Ge, Zn, Zn-Al solders, and solders such as Bi, Bi-Cu, Bi-Ag, etc. are reported in terms of melting point. Although being studied all over the world, there are problems in using it for general purposes.
  • Au-based solder is 80wt. % Or more, and there is difficulty in versatility in terms of cost.
  • Bi-based solder has a thermal conductivity of about 9 W / mK, which is lower than that of current high-lead solder, and it can be estimated that it is difficult to apply it to semiconductor devices that require high heat dissipation.
  • Zn and Zn—Al solder have a high thermal conductivity of about 100 W / mK, but they are difficult to wet (especially Zn—Al solder).
  • the solder is hard and the semiconductor element is destroyed by thermal stress during cooling after connection. There are problems such as easy.
  • a conductive adhesive is mentioned in addition to a metal material. This is a mixture of a resin and an Ag filler, and is most commonly used as an alternative material for high lead solder.
  • the thermal conductivity is about 10 W / mK, which is less than the thermal conductivity of high lead solder of about 30 W / mK.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2007-181880
  • Bi-0.01 to 57 mass% Sn is used to prevent volume shrinkage during solidification of the solder, and to the interface between the inner surface electrode of the through-type ceramic capacitor and the hole inner wall of the structure or the inside of the structure. This is to prevent cracks.
  • Patent Document 1 has the following problems when applied to a semiconductor device.
  • Bi-0.01 to 57 mass% Sn has high reactivity with the Ni layer used for the electrode of the semiconductor element.
  • a Ni electrode having a thickness of 0.5 ⁇ m to 1 ⁇ m is used as the back electrode of the semiconductor element. This Ni electrode is a layer necessary for maintaining the connection between the solder and the semiconductor element.
  • Ni metallization disappears due to reaction with solder at the time of connection, and the interface strength may be reduced, and the semiconductor element may be peeled off.
  • Bi-0.01 to 57 mass% Sn is weak in the strength of the base material because Bi is a brittle material, and cracks easily develop in the solder connection portion. .
  • an object of the present invention is to connect a semiconductor element with a Sn-37 to 60 mass% Bi-2 to 7 mass% Cu solder, and to reduce the volume change when the solder is melted within 0.5%, and to perform reflow soldering.
  • An object of the present invention is to provide a semiconductor device capable of preventing flashing of time, ensuring stability of a semiconductor element connection interface, and improving connection reliability against thermal stress.
  • a typical outline is that a semiconductor element having a Ni electrode is connected to a frame plated with Ni with Sn—Bi—Cu based lead-free solder, and the periphery thereof is sealed with resin.
  • the effect obtained by a typical one can suppress flashing during reflow soldering by applying Sn-37 to 60 mass% Bi-2 to 7 mass% Cu to the connection of the semiconductor element.
  • the addition of 2 to 7% by mass of Cu ensures the stability of the semiconductor element connection interface during connection and reflow soldering, and improves connection reliability against thermal stress.
  • connection part by the side of the semiconductor element of the semiconductor device which concerns on one embodiment of this invention. It is sectional drawing of the connection part by the side of the frame of the semiconductor device which concerns on one embodiment of this invention. It is sectional drawing of the connection part by the side of a semiconductor element at the time of using Sn-Bi type lead free solder which does not contain Cu used as the comparative example of the semiconductor device concerning one embodiment of the present invention. It is sectional drawing of the connection part by the side of a flame
  • FIGS. 1 is a cross-sectional view of a connection portion on the semiconductor element side of a semiconductor device according to an embodiment of the present invention
  • FIG. 2 is a cross-sectional view of a connection portion on the frame side of the semiconductor device according to the embodiment of the present invention
  • 3 is a cross-sectional view of the connection portion on the semiconductor element side when Sn—Bi based lead-free solder not containing Cu is used as a comparative example of the semiconductor device according to one embodiment of the present invention
  • FIG. 5 is a cross-sectional view of a connection portion on the frame side when Sn—Bi-based lead-free solder not containing Cu is used as a comparative example of the semiconductor device according to the embodiment, and FIG. 5 relates to the embodiment of the present invention.
  • FIG. 6 is a diagram showing the relationship between the temperature of the semiconductor device and the volume expansion of solder, and FIG. 6 is a diagram showing the relationship between the Cu content of the semiconductor device according to one embodiment of the present invention and the Ni electrode disappearance thickness of the semiconductor element.
  • the Ni electrode 14 and the frame 2 of the semiconductor element 1 are connected as shown in FIGS.
  • An intermetallic compound layer 11 containing (Cu, Ni) 6 Sn 5 can be formed on the Ni plating 12.
  • the intermetallic compound 11 ′ containing (Cu, Ni) 6 Sn 5 precipitated inside the solder reinforces Sn—Bi that is the parent phase.
  • the Ni electrode of the semiconductor element 1 disappears at the connection interface on the semiconductor element 1 side at the time of connection. As shown in FIG. 4, the interface of the connection interface may be peeled off. Further, the Ni 3 Sn 4 compound 13 is formed at the interface on the frame 2 side shown in FIG. Will be formed.
  • the volume change at the time of melting the solder can be made smaller than that of Sn-rich lead-free solder such as Sn-3Ag-0.5Cu.
  • the volume expansion at 260 ° C. in which reflow soldering is performed can be reduced as compared with Sn-rich lead-free solder.
  • FIG. 5 is a diagram showing the relationship between the temperature and volume expansion of Sn-48Bi-5Cu, Sn-rich solder, and Sn-58Bi.
  • Sn-rich solder the volume expansion of about 3% is caused by melting, whereas in the case of Sn-48Bi-5Cu and Sn-58Bi, the volume expansion is less than 1%.
  • the volume expansion of Sn-rich solder from room temperature is about 4.5%, while that of Sn-48Bi-5Cu and Sn-58Bi is about 2%.
  • FIG. 6 shows that the semiconductor element 1 having a Ni electrode 14 thickness of 0.5 ⁇ m is connected at 350 ° C. for 1 min. It is the graph which showed the loss
  • the horizontal axis represents the Cu content of the Sn—Bi—Cu alloy. When the Cu content is 2% by mass or more, the 0.5 ⁇ m Ni electrode 14 can be connected without disappearing.
  • the liquidus temperature of the solder is 400 ° C. or higher, and the wettability is reduced at 350 ° C. where the solder connection of the semiconductor device is performed, and the solder non-wetting portion is likely to occur. .
  • the volume change at the time of melting can be made within 5%.
  • the Cu content is 5% by mass or more.
  • the liquidus temperature of the solder is 400 ° C. or higher, and the wettability is reduced at 350 ° C. where the solder connection of the semiconductor device is performed, and the solder non-wetting portion is likely to occur. .
  • Ni, Ni—P, Ni—B or the like is plated as Ni-based plating, or at least one of Au, Ag, and Pd is applied thereon.
  • Ni-based plating can ensure sufficient wetting with respect to Sn-based solder, and a barrier layer mainly composed of (Cu, Ni) -Sn compound is formed on the Ni-based plating.
  • wetting can be improved by applying Au plating or Ag plating on the plating of Ni, Ni—P, Ni—B or the like.
  • a plating layer such as Au or Ag is diffused in the solder at the time of connection, so that a barrier layer mainly composed of (Cu, Ni) -Sn compound can be formed on the underlying Ni-based plating.
  • solder supply form can be strengthened by the solder flash and the stability of the semiconductor element connection interface, and the Sn—Bi matrix phase compound, regardless of the supply form of foil, wire, or paste. It is possible to select a supply method according to the connection environment.
  • the connected state can be maintained even when the resin is cured at a temperature higher than the solidus temperature of the solder.
  • FIG. 7 is a diagram showing the relationship between the solder composition and the connection reliability in the example of the semiconductor device according to the embodiment of the present invention and the comparative example
  • FIG. 8 is the implementation of the semiconductor device according to the embodiment of the present invention.
  • FIG. 9 is a diagram illustrating a connection state in an example
  • FIG. 9 is a diagram illustrating a crack state of a semiconductor device according to an embodiment of the present invention
  • FIG. 10 is a comparative example of a semiconductor device according to an embodiment of the present invention.
  • FIG. 11 is a diagram showing a state of cracks
  • FIG. 11 is a diagram showing generation of voids in a comparative example of a semiconductor device according to an embodiment of the present invention.
  • Examples 1 to 9 shown in FIG. 7 the semiconductor device 7 shown in FIG. 12 was manufactured, and the presence / absence of flash at the time of reflow soldering and the connection reliability based on crack progress were determined.
  • the semiconductor device 7 was produced as follows.
  • a semiconductor element 1 having a size of 3 mm ⁇ 3 mm having a metallization of Ti / Ni (0.5 ⁇ m) / flash Au from the Si side is applied to a N 2 + 4% H 2 atmosphere using solder 3 having a solder composition shown in FIG. Medium, 350 ° C. for 1 min.
  • the Ni-plated frame 2 was connected under the following conditions.
  • wire bonding was performed between the electrode on the upper surface of the semiconductor element 1 and the terminal 5 of the frame 2 with a wire 4. Further, after wire bonding, the periphery was surrounded by a metal mold, and a potting resin 6 was poured in, and the resin was cured in the atmosphere at 150 ° C. for 2 hours.
  • the potting resin 6 may be another resin such as a mold resin.
  • ribbon bonding may be used for connection between the upper surface of the semiconductor element 1 and the inter-terminal 5.
  • FIG. 8 shows a cross section of the connection part after the reflow test of Sn-48Bi-5Cu. It can be confirmed that the connection of the semiconductor element 1 is maintained without the solder 3 flowing out.
  • indicates that the connection is maintained at 80% or more of the original connection area after 1000 cycles, and x indicates that the connection area is less than 80%. In any of Examples 1 to 9, the connection area did not change before and after the test.
  • the crack 23 linearly propagated along the semiconductor element 1 and the solder connection portion. This is because the Cu content is low, and the intermetallic compound layer 11 containing (Cu, Ni) 6 Sn 5 is not formed at the connection interface as in Examples 1 to 9, so the solder matrix (Cu, Ni) is not formed. This is because 6 Sn 5 is not precipitated.
  • Comparative Example 1 since the crack 23 linearly propagates along the semiconductor element 1 and the solder connection portion, problems such as peeling easily occur and the connectivity is deteriorated.
  • FIG. 11 shows a connection portion made of Sn-3Ag-0.5Cu after the reflow test. It can be confirmed that voids are generated by melting and flowing out of the solder.
  • the present invention is widely applicable to semiconductor devices in which a semiconductor element is connected on a frame using solder.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Die Bonding (AREA)

Abstract

L'invention porte sur un dispositif à semi-conducteurs dans lequel des bavures sont supprimées lorsqu'un soudage par refusion est réalisé, la stabilité d'une interface de connexion d'élément à semi-conducteurs est assurée, et la fiabilité de connexion par rapport aux contraintes thermiques est améliorée. Le dispositif à semi-conducteurs comprend un élément à semi-conducteurs (1) ayant une électrode en Ni (14) ; une structure revêtue de Ni ; une soudure sans plomb Sn-Bi-Cu (3) qui raccorde l'électrode en Ni (14) de l'élément à semi-conducteurs (1) à la structure revêtue de Ni ; et une résine qui scelle la périphérie de l'élément à semi-conducteurs (1).
PCT/JP2010/060105 2009-07-01 2010-06-15 Dispositif à semi-conducteurs et procédé de fabrication de dispositif à semi-conducteurs WO2011001818A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2009-157248 2009-07-01
JP2009157248A JP2011014705A (ja) 2009-07-01 2009-07-01 半導体装置および半導体装置の製造方法

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WO2011001818A1 true WO2011001818A1 (fr) 2011-01-06

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Publication number Priority date Publication date Assignee Title
JP6543890B2 (ja) * 2014-04-14 2019-07-17 富士電機株式会社 高温はんだ合金
JPWO2020136979A1 (ja) * 2018-12-28 2021-09-09 Jx金属株式会社 はんだ接合部

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH071179A (ja) * 1993-06-16 1995-01-06 Internatl Business Mach Corp <Ibm> 無鉛すず−ビスマスはんだ合金
JP2001284792A (ja) * 2000-03-30 2001-10-12 Tanaka Electronics Ind Co Ltd 半田材料及びそれを用いた半導体装置の製造方法
JP2004533327A (ja) * 2001-05-28 2004-11-04 ハネウエル・インターナシヨナル・インコーポレーテツド 高温鉛フリーハンダ用組成物、方法およびデバイス
JP2007123566A (ja) * 2005-10-28 2007-05-17 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
JP2009060101A (ja) * 2000-12-21 2009-03-19 Hitachi Ltd 電子機器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH071179A (ja) * 1993-06-16 1995-01-06 Internatl Business Mach Corp <Ibm> 無鉛すず−ビスマスはんだ合金
JP2001284792A (ja) * 2000-03-30 2001-10-12 Tanaka Electronics Ind Co Ltd 半田材料及びそれを用いた半導体装置の製造方法
JP2009060101A (ja) * 2000-12-21 2009-03-19 Hitachi Ltd 電子機器
JP2004533327A (ja) * 2001-05-28 2004-11-04 ハネウエル・インターナシヨナル・インコーポレーテツド 高温鉛フリーハンダ用組成物、方法およびデバイス
JP2007123566A (ja) * 2005-10-28 2007-05-17 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法

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