WO2010105492A1 - Method for encapsulating multiple led chips with vertical structure on base to fabricate led lihgt source - Google Patents

Method for encapsulating multiple led chips with vertical structure on base to fabricate led lihgt source Download PDF

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Publication number
WO2010105492A1
WO2010105492A1 PCT/CN2010/000149 CN2010000149W WO2010105492A1 WO 2010105492 A1 WO2010105492 A1 WO 2010105492A1 CN 2010000149 W CN2010000149 W CN 2010000149W WO 2010105492 A1 WO2010105492 A1 WO 2010105492A1
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Prior art keywords
conductive
led
base
led chips
led chip
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PCT/CN2010/000149
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French (fr)
Chinese (zh)
Inventor
楼满娥
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浙江迈勒斯照明有限公司
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Priority to CN2010800015651A priority Critical patent/CN102037559B/en
Publication of WO2010105492A1 publication Critical patent/WO2010105492A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • FMECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F21LIGHTING
    • F21KNON-ELECTRIC LIGHT SOURCES USING LUMINESCENCE; LIGHT SOURCES USING ELECTROCHEMILUMINESCENCE; LIGHT SOURCES USING CHARGES OF COMBUSTIBLE MATERIAL; LIGHT SOURCES USING SEMICONDUCTOR DEVICES AS LIGHT-GENERATING ELEMENTS; LIGHT SOURCES NOT OTHERWISE PROVIDED FOR
    • F21K9/00Light sources using semiconductor devices as light-generating elements, e.g. using light-emitting diodes [LED] or lasers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49113Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a technology for fabricating a light emitting diode (hereinafter referred to as LED) in a multi-chip integrated package, and more particularly to a method for integrally mounting an LED chip of a plurality of vertical structures on a base to prepare an LED light source.
  • LED light emitting diode
  • LED As one of the mainstream light sources for next-generation lighting, LED has been recognized by the industry, but the illumination source requires not only high light efficiency, but also high luminous flux. It is often necessary to reach hundreds or even thousands of lumens. At present, the power of a single LED chip can withstand less than 10W, and its power conversion efficiency decreases as power increases. For example: a blue chip capable of withstanding 1.
  • 2W of electric power, plus YAG phosphor, made of white LED its luminous efficiency can reach 100 lumens / watt, the same process with a chip capable of withstanding 5W electric power into a white LED, it The luminous efficacy is only about 75 lumens per watt, and when it is 8W, the luminous efficacy is only 60 lumens per watt, and only 60% of the blue chip of 1. 2W of electric power is used.
  • planar LED chip has positive and negative electrodes disposed on the upper surface of the chip, and the working current of the chip does not pass through the bottom surface.
  • a vertically structured LED chip that is, one electrode is disposed on the upper surface of the chip, and the other electrode is disposed on the lower surface of the chip, and the chip operating current is drawn through the lower surface of the chip.
  • the base for carrying the chip must be made of a material with high thermal conductivity; and because it is a practical device, the base must have a certain mechanical strength.
  • the most widely used LED bases are made of copper or aluminum. These two materials have very good thermal conductivity. Their thermal conductivity is second only to silver in metals. But for most metals, the conductivity is good and the conductivity is not Often, this poses a very serious problem for the integrated packaging of vertical structure chips.
  • the vertical structure of the LED chip is disposed on the lower surface of the chip, when the base carrying the LED chip is a copper or aluminum metal material, when a plurality of LED chips are fixed on the base, if the vertical structure of the LED
  • the adhesive between the chip and the base is electrically conductive, and the bottom electrodes of all the chips mounted on the base are naturally electrically connected; that is, their electrical connection can only be used in parallel; however, actually the chip All paralleling is not feasible because the drive current can be large. If the adhesive is non-conductive, the bottom electrode can not be taken out, so the LED chip with vertical structure can not realize the integration of multiple LED chips into LED practical illumination source.
  • the planar structure chip is mounted on a base having good thermal conductivity and good electrical conductivity.
  • the base and the chip are electrically insulated, and can be electrically connected through electrodes on the chip, that is, connected in series, in parallel or in series. It can be done, but it is not feasible for vertical chips. Summary of the invention
  • the object of the present invention is to overcome the defects that a plurality of vertical structure LED chips cannot be directly mounted on a metal base when manufacturing an LED illumination source; in order to make the vertical structure chip and the planar structure chip the same, in one LED chip receiving cavity In the series, the multi-chip series, parallel or series and parallel combination of electric integrated package, to achieve a LED with a practical illumination source for the usual illumination, thereby proposing a plurality of vertical structure LED chips on a base A method of preparing an LED illumination source.
  • the invention provides a method for preparing an LED illumination source for packaging a plurality of vertical structure LED chips on a base. For the use of conductive and non-conductive bases, the following steps are respectively taken:
  • N and M are equal, and N and M 2;
  • the area is larger than the area of the LED chip and extends out of the periphery of the LED chip to facilitate electrical connection with adjacent LED chips; the conductive power sources are electrically insulated from each other.
  • the N vertical-structured LED chips are connected in series, in parallel, or in series and in parallel, and the terminals are fixed on the base through the lead and the external power lead frame, or the bayonet is fixed, and the external power leads are
  • the frame is insulated from the base, and the current generated by the external power source flows into the LED through the lead frame.
  • the non-conductive base is made of low temperature ceramic or plastic, and the non-conductive is The conductive region is formed on the base.
  • a sheet having a larger area than the LED chip (the sheet is used as a conductive region) is formed by using a material that is both electrically conductive and thermally conductive, and the sheet is embedded in the non-conductive base to expose the upper surface of the sheet.
  • a non-conductive base (see Figure lc);
  • the conductive region material is a silver or gold-tin alloy layer or the like (see FIG. 1a).
  • the method for packaging a plurality of vertical structure LED chips on a base provided by the present invention when using a conductive base, there are two preparation methods, and the first method comprises the following steps:
  • N and M are equal, and ⁇ or ⁇ ! 2;
  • the area of the conductive area is larger than the area of the LED chip, and extends out of the periphery of the LED chip to facilitate electrical connection with the adjacent LED chip;
  • the N vertical structure LED chips are then connected in series, in parallel or in series and in parallel in electrical connection.
  • the terminal is electrically connected to the external power supply through the bow wire and the outer power cable.
  • the conductive base is made of metal aluminum or copper; when the conductive base is made of metal aluminum, an aluminum nitride or aluminum oxide film is formed on the base of the metal aluminum, and then nitrogen is used.
  • a conductive layer is formed at a position where the LED chip and the lead wire are to be placed, and the conductive layer is formed by a screen printing method, a vacuum film forming process or an electroplating process to form a silver or gold tin alloy layer; 01 ⁇ The thickness of the layer of 0. 05 ⁇ 0. 01mm.
  • the method further includes: fixing (eg, inlaying, bonding) a piece of insulating material having thermal conductivity on the LED chip bearing surface of the conductive base; the insulating material piece is a diamond film and a high resistance single A crystalline silicon wafer, a silicon carbide wafer, a nanocarbon sheet, a nanocarbon material, a carbon composite material, a mica sheet, a graphite sheet, or a composite thereof (see Fig. 2a).
  • the second method includes the following steps:
  • the N vertical structure LED chips are connected in series, in parallel or in series, and in parallel, and the terminals are electrically connected through the lead wires and the external power lead frame and the external power source.
  • the conductive base may be made of copper or aluminum.
  • the M' non-conductive regions are formed on the LED chip bearing surface of the conductive base by a damascene, bonding or soldering process, and the high resistance single crystal silicon wafer, silicon carbide wafer, nanometer 5 ⁇ 0
  • the thickness of the sheet is 0. 05 ⁇ 0
  • the sheet thickness of the sheet is 0. 05 ⁇ 0 Olrran; further, on the upper surface of each of the sheets, a conductive region is formed according to the size of the LED chip and the shape of the bottom electrode lead-out area for mounting the LED chip and the bottom electrode, and the back surface of the sheet is plated for splicing. Tin-tin, silver or gold-tin alloy materials to join the original conductive base.
  • the conductive region may be inlaid or casted, embedded in a plastic or low-temperature ceramic, cast copper sheet, aluminum sheet; or on plastic or low-temperature ceramic, printed,
  • a vacuum coating or spraying method is used to form a layer of a metal such as gold, silver or tin or an alloy layer thereof.
  • the method further comprises growing a diamond film or depositing a nano carbon film on the silicon wafer.
  • the series connection method is as follows: a gold wire is connected from a conductive area on the bottom surface of one LED chip to a conductive area on the top surface of an adjacent LED chip, and then N pieces are sequentially sequentially replaced by a gold wire.
  • the vertical structure of the LED chips are electrically connected in series and then electrically connected to the external LED electrical lead wires (see FIG. 1a);
  • the parallel connection is as follows: all N vertical structure LED chip top electrodes are connected by one gold wire, and the other electrode is on the lower surface of the LED chip, the electrode and the conductive area are electrically connected, on the conductive area
  • the vacant part around the LED chip becomes the lead-out area of the lower surface electrode of the LED chip; the vacant part of the conductive area of one LED chip is connected in parallel with the vacant part of the conductive area of the adjacent LED chip, and the figure Id is three.
  • a schematic diagram of parallel connection of LED chips, after completion, is electrically connected to an external LED chip electrical lead-out line;
  • the invention provides a method for preparing an LED illumination source having the luminous flux required for normal illumination, and solves the problem that the vertical structure LED chip cannot be mounted on the bearing surface of the same base, and is combined into a high-power LED; the preparation of the invention
  • the electric combination of parallel or series and parallel combination is integrated and packaged, so as to achieve the purpose of one LED having the luminous flux required for normal illumination.
  • the preparation method is simple and easy to scale production.
  • the prepared LED illumination source has practicality and long service life, and the power can reach 50W, 100W or even larger.
  • FIG. 1 is a structural cross-sectional view of an LED illumination source made by mounting a plurality of conductive regions on a surface of a non-conductive base, and mounting a vertical structure of LED chips in each conductive region.
  • FIG. 1b is a structure shown in FIG. Top view
  • Figure lc is a cross-sectional view showing a structure in which a plurality of conductive materials are embedded in the upper surface of the non-conductive base of the present invention
  • FIG. 1d is a schematic diagram of an electrical connection embodiment in which three chips are connected in parallel according to the present invention.
  • 2a is a cross-sectional view showing the structure of an LED chip in which a vertical structure is formed by depositing an insulating non-conductive layer on the surface of the conductive substrate, and then forming N conductive regions on the non-conductive layer.
  • Figure 2b is a cross-sectional view showing the structure of an LED chip with a vertical structure in each conductive region by splicing an insulating sheet on the upper surface of the conductive base and then making N conductive regions on the insulating sheet.
  • Figure 2c is a cross-sectional view showing the fabrication of a plurality of insulating non-conductive regions on the upper surface of the conductive base, and then N conductive regions on the insulating layer, and mounting two vertical LED chips in each conductive region.
  • Figure 2d is a top view of the structure shown in Figure 2c
  • Figure 3 is a structure of an LED illumination source in which a metal piece is embedded in a non-conductive base of plastic, a vertical structure of an LED chip is mounted in each metal piece (conductive area), and electrical connection is made.
  • FIG. 4 is a cross-sectional view showing the structure of a 20W LED illumination source produced by the method of the present invention.
  • Figure 5 is a plan view showing the structure of a 50W LED illumination source produced by the method of the present invention. The picture is as follows:
  • Non-conductive base 1.
  • Conductive area 3. LED chip
  • Chip top surface electrode 4. Chip bottom electrode lead-out area 6. External power lead
  • an LED having a rated current of 700 raA and a power of 7 W is prepared, and the specific steps are as follows:
  • the conductive region 2 is made of a gold or silver film by printing or evaporation process; the area of the conductive region 2 is larger than the area of the LED chip 3, and extends out of the periphery of the LED chip 3, so as to be adjacent to 5 ⁇
  • the area of each of the conductive areas is 1. 5 mmX l. 5 mm.
  • the LED chip 3 of the vertical structure of 1. 0W-1. 2W is packaged in the six conductive regions 2 of the drawing, and the three LED chips 3 are used as a group, and the gold wire 7 is used.
  • a set of three LED chips are connected in series (refer to FIG. 1a), and then the two groups connected in series are electrically connected.
  • the terminal is connected to the driving power source through the external power supply lead 6, and the LED chip 3 is covered with Transparent optical material, transparent optical material can be silica gel, epoxy resin or lens; if white LED is to be made, blue light chip should be used, and the optical material covered on the blue chip should contain light conversion material such as phosphor (refer to the figure). Lb), these can be achieved by the skilled person, prepared into a rated current of 700mA, power of 7W LED.
  • the electrical connection is not in a proper manner. It is preferable to make a proper series connection and then parallel connection. Since the 12V is a universal power supply voltage, the voltage of the three LED chips 3 in series is 9. 0V - 10. 5V The voltage is exactly matched with the voltage of 12V. Therefore, the present embodiment uses three chips in series, and then serially connects the two electrical connections, which can be implemented by those skilled in the art.
  • a non-conductive base 1 is made of plastic or low-temperature ceramic material to prepare a 7W LED light source. 5 ⁇ 0 0.
  • the thickness of the thickness of the substrate is 0. 5mm ⁇ 0.
  • the thickness of the thickness of the substrate is 0. 5mm ⁇ 0 Lmm silver plated brass sheet, the frame is made around the silver plated brass piece, and the metal foil is shown in Fig. 3. It is a metal for mounting three strings of two LED chips 3 for electrical connection.
  • the sheet is then pressed into the non-conductive base 1 of the present embodiment to form an embedded conductive region 8.
  • the LED chip 3 can be placed in a large area, and the electrical connection is made, and the three chips are connected in series, and then the two groups are connected in parallel, and then taken out, as shown in the figure. 1 (b).
  • Low-temperature ceramics and plastics have poor thermal conductivity, so the base should be thin. Under the condition of satisfying the mechanical strength, it is as thin as possible, generally about 0.5 ⁇ 2mm, which is beneficial to the heat transfer to the radiator below. If the inorganic material is doped into the thermoplastic material, its thermal conductivity can be greatly improved, and it is suitable for mass production.
  • Example 2
  • a 20W white LED illumination source is fabricated using a vertical structure LED chip.
  • a general-purpose 20W white LED is produced by using a blue chip and a YAG garnet phosphor. Since the power of the entire LED is already quite large, the 20 or so LED chips 3 and 20 used in the operation of the LEDs have a large amount of heat generated during the simultaneous operation. Therefore, the non-conductive substrate in the embodiment 1 is not ideal for heat treatment. Another option in the present invention is required.
  • the conductive base 9 is made of an aluminum plate with a thickness of about 3 mm, and the aluminum plate is made into a basin shape.
  • the central portion of the aluminum plate is made into a pelvic bottom, and the bottom of the pelvis is a circle having a diameter of about 10-20 mm, and the aluminum plate can also be used.
  • the utility model is formed into a rectangle of considerable area, and two steps are arranged from the bottom of the bottom of the basin wall, the top of the basin edge is a platform, and the outer power lead 6 is arranged on the platform, as shown in FIG. 4; wherein, from the bottom of the basin
  • the angle between the slope of the first step and the plane of the basin bottom is between 100° and 160°, and the angle of the second step is not strictly required, so that the electrode is taken out as a principle.
  • a non-conductive layer 10 is formed on the bottom of the conductive base 9 to form a thin film of insulating material.
  • the general material film is formed into an aluminum nitride film or an aluminum oxide film by a conventional coating method.
  • Aluminum nitride has good thermal conductivity and insulation properties, but it is expensive, so alumina is usually used.
  • a conductive screen 2 is printed by using a conventional screen printing technique, that is, 20 conductive regions 2 (as shown in FIG. 4). Show).
  • 20 LED chips 3 are respectively divided into 4 groups, each group of 5 LED chips 3 are connected in series, and 4 groups in series are connected in parallel to each conductive region 2 made of silver paste. Put a 1W LED chip 3 and sinter the LED chip 3, then use the gold wire 7 to make the above electrical connection. First connect the 5 chips in series, then connect the LED chips 3 in the four groups. Together, the negative poles are connected together.
  • the white LED After completion, it is made by coating the white LED with the YAG phosphor powder on the chip, and then coating the transparent protective film. If the monochromatic light is added, the optical material such as transparent silica gel can be used to make the LED. Illumination source, which can be implemented by those skilled in the art.
  • an aluminum plate can also be used as the conductive base 9, that is, without making a basin type, an aluminum oxide insulating layer is directly formed on the aluminum plate, and an LED chip mounting region is made on the insulating layer of the aluminum oxide (20 conductive layers).
  • Zone 2 other electrical connection zones and connections are as described above.
  • such a structure must be protected by an optically transparent material for the LED chip carrying surface of the entire base 9, including the gold wire bonding area, which can be implemented by those skilled in the art to prevent contact or collision. Cause damage.
  • the electrical connection mode is 8 chips 3 connected in series, and six groups are connected in parallel to produce a 50W green LED illumination source, and the material and characteristics of the green LED chip. It has the same characteristics as the blue LED chip, and both can be used universally.
  • the conductive base 9 in this embodiment is a common metal copper base, and a high-resistance single crystal silicon wafer 14 having a thickness of 0.05 to 0.01 mm is used as a non-conductive region 11 on the metal copper base, which can be considered as Not electrically conductive.
  • the high-resistance single crystal silicon wafer 14 is plated with gold-tin alloy or other solderable material on both sides, and then patterned into one surface on one side by photolithography, thereby forming 48 mutually insulated conductive regions 2 and chips.
  • the bottom electrode lead-out area 5 (shown in Figure 5).
  • the other side of the high-resistance single crystal silicon wafer 14 has been plated with a gold-tin alloy or other solderable material, it can be attached to the copper base and equipped with a corresponding commercially available lead frame, thus making a suitable application.
  • the subsequent manufacturing process and the general LED manufacturing method are the same.
  • the method of the present invention can be divided into three categories, as follows:
  • N pieces of metal foil are produced, each of which is larger than the area of the LED chip, and then the metal foil is pressed into a plastic or low-temperature ceramic to form N conductive regions that are insulated from each other.
  • the N vertical structure LED chips are respectively placed on the N metal foils, the metal foil becomes the bottom electrode of the chip, and the top surface of the chip is the other electrode, so that the two electrodes of each chip are insulated from the other chip electrodes.
  • the bottom electrode of the previous chip and the top electrode of the latter chip are connected together by a gold wire to form a series connection between the two chips.
  • the LED chips are electrically connected in series or in parallel; as shown in Fig.
  • this is a metal foil for three strings.
  • Low-temperature ceramics and plastics have poor thermal conductivity, so the base should be thin. Under the condition of satisfying the mechanical strength, it is as thin as possible, which is beneficial to the heat transfer to the radiator below.
  • N mutually insulated conductive regions by printing or sputtering on a non-conductive base for mounting the chip and electrical connections.
  • the film is commonly referred to as a film, for example, in aluminum.
  • the film is coated with a thin film of a conductive layer.
  • the insulating layer is not electrically conductive, but has a certain degree of thermal conductivity, and the thickness of the insulating layer is about 0. 05 ⁇ 0.
  • a thin film of aluminum nitride or aluminum oxide is formed on the base, and a conductive layer is formed on the aluminum nitride or aluminum oxide film at a position where the LED chip and the lead wire are to be placed, for example, silver paste or silver or gold plating is applied by silk screen printing.
  • the conductive layer is formed by a process such as tin alloy, and the bottom electrodes of such a plurality of LED chips are separately drawn separately, and the electrical connection of the series, parallel connection and series-parallel connection can be performed between the chips. Due to the aluminum nitride, aluminum oxide has a certain thermal conductivity and is very thin, so it has little effect on the heat dissipation of the chip.
  • the LED base which is both conductive and thermally conductive, a layer of insulating but certain thermal conductivity is covered on the chip bearing surface by bonding or splicing, such as high resistance monocrystalline silicon wafer, silicon carbide wafer, Nano carbon sheet or nano carbon material, carbon composite material, mica sheet, graphite sheet, etc. and other composite materials, the upper surface of the sheet, according to the needs of the integrated package, the LED chip mounting area and the bottom electrode lead-out area are formed on the back side of the sheet.
  • bonding or splicing such as high resistance monocrystalline silicon wafer, silicon carbide wafer, Nano carbon sheet or nano carbon material, carbon composite material, mica sheet, graphite sheet, etc. and other composite materials
  • Plated with splicable materials such as tin-tin, silver, gold-tin alloy, etc., to be bonded to the original conductive base, or a bonding process, using a bonding or bonding process to wafer or Nano-carbon sheets and the like are bonded to a highly thermally conductive and electrically conductive base.
  • the present invention can grow a thin film material having a very high thermal conductivity on a silicon wafer, for example, a diamond film or a precipitated nanocarbon film on a silicon substrate, diamond
  • the thermal conductivity is almost five times that of copper. Therefore, the heat generated by the chip can be quickly transferred to the peripheral area of the chip, and then transferred to the heat dissipation base through the silicon wafer to achieve the purpose of rapid heat dissipation.
  • the thermal conductivity of the material such as nano carbon is copper. Double, but slightly reduced when made of non-conductive film, but it will greatly improve the thermal conductivity of silicon wafer.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Led Device Packages (AREA)

Abstract

A method for encapsulating multiple LED chips with vertical structure on a base to fabricate an LED light source is provided, which comprises: M conductive areas (2), the number of which is equal to the number of the chips, are formed on the chip bearing surface of a non-conductive base (1); the area of each of the conductive areas is larger than the area of each of the chips; N LED chips (3) are mounted on each of the conductive areas, respectively, and the N LED chips are electrically connected in series, parallel, or series-parallel. The method allows multiple chips with vertical structure to be electrically connected in one LED chip container just as the chips with planar structure, so that the flux required for conventional lighting are achieved.

Description

在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法  Method for preparing LED light source by packaging multiple vertical structure LED chips on a base
技术领域 Technical field
本发明涉及一种多芯片集成封装制作发光二极管(以下简称 LED)的技 术,特别是涉及一种将多个垂直结构的 LED芯片集成封装在一个底座上制备 LED光源的方法。 背景技术  The present invention relates to a technology for fabricating a light emitting diode (hereinafter referred to as LED) in a multi-chip integrated package, and more particularly to a method for integrally mounting an LED chip of a plurality of vertical structures on a base to prepare an LED light source. Background technique
LED作为新一代照明主流光源之一, 已为业界所肯定, 但是照明光源不 仅需要很高的光效, 还需要很高的光通量。往往要达到几百甚至几千流明的 数量。 目前功率型 LED单个芯片能承受的电功率不超过 10W, 而且随着功率 的增大, 它的电光转换效率也下降。 例如: 能承受 1. 2W电功率的蓝光芯片, 加上 YAG荧光粉, 制成白光 LED, 它的光效可以达到 100流明 /瓦, 同样的工 艺用能承受 5W电功率的芯片制作成白光 LED,它的光效只有 75流明 /瓦左右, 到 8W时光效只有 60流明 /瓦, 只有 1. 2W电功率的蓝光芯片的 60%。  As one of the mainstream light sources for next-generation lighting, LED has been recognized by the industry, but the illumination source requires not only high light efficiency, but also high luminous flux. It is often necessary to reach hundreds or even thousands of lumens. At present, the power of a single LED chip can withstand less than 10W, and its power conversion efficiency decreases as power increases. For example: a blue chip capable of withstanding 1. 2W of electric power, plus YAG phosphor, made of white LED, its luminous efficiency can reach 100 lumens / watt, the same process with a chip capable of withstanding 5W electric power into a white LED, it The luminous efficacy is only about 75 lumens per watt, and when it is 8W, the luminous efficacy is only 60 lumens per watt, and only 60% of the blue chip of 1. 2W of electric power is used.
然而照明需要几十瓦,甚至上百瓦功率的 LED,才能达到所需的光通量, 目前世界上还没有一种达到如此大功率的单片 LED芯片。解决这一矛盾的有 效办法就是采用多芯片集成封装技术, 也就是说, 在一个 LED底座上放置多 个现有的 LED芯片进行适当的电组合,制成一个能满足实用需要的 LED照明 光源。  However, lighting requires tens of watts, or even hundreds of watts of power, to achieve the required luminous flux. There is currently no single-chip LED chip in the world that achieves such high power. An effective way to solve this contradiction is to use multi-chip integrated packaging technology, that is, to place multiple existing LED chips on an LED base for proper electrical combination to make an LED illumination source that meets practical needs.
目前 LED芯片的结构有两大类,一类是平面结构的,一类是垂直结构的。 所谓平面结构的 LED芯片, 就是正、 负电极都设置在该芯片的上表面上, 芯 片工作电流不经过底面。但是对垂直结构的 LED芯片而言, 即一个电极设置 在该芯片的上表面, 另一个电极设置在该芯片的下表面, 芯片工作电流经过 芯片下表面引出。  At present, there are two major types of LED chip structures, one is a planar structure and the other is a vertical structure. The so-called planar LED chip has positive and negative electrodes disposed on the upper surface of the chip, and the working current of the chip does not pass through the bottom surface. However, for a vertically structured LED chip, that is, one electrode is disposed on the upper surface of the chip, and the other electrode is disposed on the lower surface of the chip, and the chip operating current is drawn through the lower surface of the chip.
不管是哪种结构的 LED芯片, 由于 LED芯片对温度敏感, 随着温度的上 升, LED芯片的能效会降低, 随之其他性能也会发生变化。 所以在制作 LED 时, 要求承载芯片的底座必须是具有高导热率的材料制作的; 又因为要作为 一个实用器件,所以底座又必须具有一定的机械强度。目前使用得最多的 LED 底座是由铜或铝金属制作的, 这两种材料的导热性能非常好, 在金属中它们 的导热率仅次于银。 但是对大多数金属而言, 在导热率好的同时导电率也非 常好, 这就对垂直结构芯片的集成封装带来一个十分严重的问题。 由于垂直 结构的 LED芯片一个电极设置在该芯片的下表面,所以当承载 LED芯片的底 座是铜的或铝的金属材料, 当多个 LED芯片固定在这种底座上时, 如果垂直 结构的 LED芯片和底座的粘结剂是导电的, 则按装在底座上的所有芯片的底 部电极就自然地全部电连接起来了; 也就是说它们的电连接方式只能用并 联; 然而, 实际上芯片全部并联是不可行的, 因为驱动电流会很大。 如果粘 结剂是不导电的, 那底面电极又无法引出, 所以采用垂直结构的 LED芯片就 无法实现多个 LED芯片集成封装成 LED实用照明光源。 Regardless of the structure of the LED chip, since the LED chip is temperature sensitive, as the temperature rises, the energy efficiency of the LED chip will decrease, and other properties will change. Therefore, when manufacturing LEDs, the base for carrying the chip must be made of a material with high thermal conductivity; and because it is a practical device, the base must have a certain mechanical strength. The most widely used LED bases are made of copper or aluminum. These two materials have very good thermal conductivity. Their thermal conductivity is second only to silver in metals. But for most metals, the conductivity is good and the conductivity is not Often, this poses a very serious problem for the integrated packaging of vertical structure chips. Since the vertical structure of the LED chip is disposed on the lower surface of the chip, when the base carrying the LED chip is a copper or aluminum metal material, when a plurality of LED chips are fixed on the base, if the vertical structure of the LED The adhesive between the chip and the base is electrically conductive, and the bottom electrodes of all the chips mounted on the base are naturally electrically connected; that is, their electrical connection can only be used in parallel; however, actually the chip All paralleling is not feasible because the drive current can be large. If the adhesive is non-conductive, the bottom electrode can not be taken out, so the LED chip with vertical structure can not realize the integration of multiple LED chips into LED practical illumination source.
对平面结构芯片安装在一个既导热率好, 同时导电率也好的底座完全没 问题, 底座和芯片是电绝缘的, 可以通过芯片上面的电极进行电连接, 即通 过串联、 并联或串并结合都可以做, 但是对垂直芯片而言就不可行了。 发明内容  The planar structure chip is mounted on a base having good thermal conductivity and good electrical conductivity. The base and the chip are electrically insulated, and can be electrically connected through electrodes on the chip, that is, connected in series, in parallel or in series. It can be done, but it is not feasible for vertical chips. Summary of the invention
本发明的目的在于克服在制作 LED照明光源时, 多个垂直结构的 LED芯 片不能直接安装在一个金属底座上的缺陷; 为了使垂直结构的芯片和平面结 构的芯片一样, 在一个 LED芯片容纳腔内, 实现多芯片的串联、 并联或串联 和并联结合的电组合集成封装,达到一个 LED具有通常照明所需光通量的实 用照明光源, 从而提出一种在一个底座上封装多个垂直结构 LED芯片的 LED 照明光源的制备方法。  The object of the present invention is to overcome the defects that a plurality of vertical structure LED chips cannot be directly mounted on a metal base when manufacturing an LED illumination source; in order to make the vertical structure chip and the planar structure chip the same, in one LED chip receiving cavity In the series, the multi-chip series, parallel or series and parallel combination of electric integrated package, to achieve a LED with a practical illumination source for the usual illumination, thereby proposing a plurality of vertical structure LED chips on a base A method of preparing an LED illumination source.
本发明提供的在一个底座上封装多个垂直结构 LED芯片的 LED照明光源 的制备方法, 针对使用导电和不导电底座, 分别采取以下步骤:  The invention provides a method for preparing an LED illumination source for packaging a plurality of vertical structure LED chips on a base. For the use of conductive and non-conductive bases, the following steps are respectively taken:
一. 使用不导电的底座 1. Use a non-conductive base
1.在所述底座的 LED芯片承载面上, 根据所要安装的 N个 LED芯片的 数量制作 M个相互绝缘的导电区, 其中, N和 M相等, 且 N和 M 2; 所述导 电区的面积比 LED芯片的面积大,且延伸出 LED芯片周边,以便于和相邻 LED 芯片做电连接; 导电源之间相互电绝缘。  1. on the LED chip carrying surface of the base, according to the number of N LED chips to be mounted, M mutually insulated conductive regions, wherein N and M are equal, and N and M 2; The area is larger than the area of the LED chip and extends out of the periphery of the LED chip to facilitate electrical connection with adjacent LED chips; the conductive power sources are electrically insulated from each other.
2.将 N个垂直结构的 LED芯片分别安装在每一个导电区内;  2. Install N vertical LED chips in each conductive area;
3.然后, 对所述的 N个垂直结构的 LED芯片迸行串联、 并联或串联和并 联结合电连接, 终端通过引线和外电源引线架粘结或卡口固定在底座上, 并 且外电源引线架和底座绝缘, 外电源产生的电流经引线架流入 LED。  3. Then, the N vertical-structured LED chips are connected in series, in parallel, or in series and in parallel, and the terminals are fixed on the base through the lead and the external power lead frame, or the bayonet is fixed, and the external power leads are The frame is insulated from the base, and the current generated by the external power source flows into the LED through the lead frame.
其中, 在不导电的底座上制作导电区可以有两种方法. - ( 1 ) 所述的不导电的底座是低温陶瓷或塑料制作的, 在所述的不导电 的底座上制作导电区, 首先用既导电又导热的材料做成比 LED芯片面积大的 片 (片作为导电区), 将所述的片嵌入不导电的底座中, 让该片的上表面露 出不导电的底座 (参见图 lc) ; Wherein, there are two ways to make a conductive region on a non-conductive base. - (1) The non-conductive base is made of low temperature ceramic or plastic, and the non-conductive is The conductive region is formed on the base. First, a sheet having a larger area than the LED chip (the sheet is used as a conductive region) is formed by using a material that is both electrically conductive and thermally conductive, and the sheet is embedded in the non-conductive base to expose the upper surface of the sheet. a non-conductive base (see Figure lc);
( 2 ) 在所述的不导电的底座上需要安放 LED芯片的位置上和在 LED芯 片引出线的位置上, 采用丝网印法、 真空制备薄膜工艺或电镀工艺, 制作 M 个导电区, 所述的导电区材料是银或金锡合金层等 (参见图 la)。  (2) M conductive regions are formed on the non-conductive base at the position where the LED chip needs to be placed and at the position of the LED chip lead-out line by using a screen printing method, a vacuum preparation thin film process or an electroplating process. The conductive region material is a silver or gold-tin alloy layer or the like (see FIG. 1a).
二. 本发明提供的用于多个垂直结构的 LED芯片封装在底座上的方法, 当使用导电的底座时, 有两种制备方法, 第一种方法包括以下步骤:  2. The method for packaging a plurality of vertical structure LED chips on a base provided by the present invention, when using a conductive base, there are two preparation methods, and the first method comprises the following steps:
1.并在所述导电的底座 LED芯片承载面上, 制作与底座面积一样大小的 不导电层 (绝缘材料层);  1. and on the conductive base LED chip bearing surface, make a non-conductive layer (insulating material layer) of the same size as the base area;
2.再根据所要安装的 N个 LED芯片的数量,在所述底座的不导电层表面 上制作 M个相互绝缘的导电区, 其中, N和 M相等, 且 ^^或^! 2; 所述导电 区的面积比 LED芯片的面积大, 且延伸出 LED芯片周边, 以便于和相邻 LED 芯片做电连接;  2. Depending on the number of N LED chips to be mounted, M mutually insulated conductive regions are formed on the surface of the non-conductive layer of the base, wherein N and M are equal, and ^^ or ^! 2; The area of the conductive area is larger than the area of the LED chip, and extends out of the periphery of the LED chip to facilitate electrical connection with the adjacent LED chip;
3.将 N个垂直结构的 LED芯片分别安装在每一个导电区内;  3. Install N vertical structure LED chips in each conductive area;
4.然后, 对所述的 N个垂直结构的 LED芯片进行串联、 并联或串联和并 联结合电连接。 终端通过弓 I线和外电源弓 I线架和外电源电联接。  4. The N vertical structure LED chips are then connected in series, in parallel or in series and in parallel in electrical connection. The terminal is electrically connected to the external power supply through the bow wire and the outer power cable.
在上述的技术方案中, 所述的导电的底座为金属铝或铜; 使用导电的底 座为金属铝时, 需在所述的金属铝的底座上制作氮化铝或氧化铝薄膜, 再在 氮化铝或氧化铝薄膜上, 需要安放 LED芯片和引出线的位置上制作导电层, 所述的导电层采用丝网印法、真空制备薄膜工艺或电鍍工艺制作银或金锡合 金层; 所述的绝缘材料层厚度为 0. 05〜0. 01mm。  In the above technical solution, the conductive base is made of metal aluminum or copper; when the conductive base is made of metal aluminum, an aluminum nitride or aluminum oxide film is formed on the base of the metal aluminum, and then nitrogen is used. On the aluminum or aluminum oxide film, a conductive layer is formed at a position where the LED chip and the lead wire are to be placed, and the conductive layer is formed by a screen printing method, a vacuum film forming process or an electroplating process to form a silver or gold tin alloy layer; 01毫米。 The thickness of the layer of 0. 05~0. 01mm.
在上述的技术方案中, 还包括在所述导电底座的 LED芯片承载面上固定 (例如镶嵌、 粘结)一块具有导热能力的绝缘材料片; 所述绝缘材料片为金 刚石薄膜、 高阻的单晶硅片、 碳化硅片、 纳米碳片、 纳米碳材料、 碳复合材 料、 云母片、 石墨片或及其它们的复合材料 (参见图 2a)。  In the above technical solution, the method further includes: fixing (eg, inlaying, bonding) a piece of insulating material having thermal conductivity on the LED chip bearing surface of the conductive base; the insulating material piece is a diamond film and a high resistance single A crystalline silicon wafer, a silicon carbide wafer, a nanocarbon sheet, a nanocarbon material, a carbon composite material, a mica sheet, a graphite sheet, or a composite thereof (see Fig. 2a).
第二种方法包括以下步骤:  The second method includes the following steps:
1.使用导电的底座,按照所要安装的 N个 LED芯片的数量,在所述导电 的底座 LED芯片承载面上制作 M' 个非导电区 (见图 2c) ; 其中, N和 M' 相 等, 且 N或 M' ^2;  1. Using a conductive base, make M' non-conductive areas on the conductive base LED chip bearing surface according to the number of N LED chips to be mounted (see Fig. 2c); wherein, N and M' are equal, And N or M' ^2;
2.再在每一个所述非导电区内制作一导电区, 其中, 所述导电区的面积 比非导电区的面积小, 但比 LED芯片的面积大, 且延伸出 LED芯片周边, 非 导电区和导电的底座绝缘; 2. further forming a conductive region in each of the non-conductive regions, wherein the conductive region has a smaller area than the non-conductive region, but is larger than the area of the LED chip, and extends beyond the periphery of the LED chip. The conductive area is insulated from the conductive base;
3.将 N个垂直结构的 LED芯片分别安装在每一个导电区内;  3. Install N vertical structure LED chips in each conductive area;
4.然后, 对所述的 N个垂直结构的 LED芯片进行串联、 并联或串联和并 联结合电连接, 终端通过引线和外电源引线架和外电源电联接。  4. Then, the N vertical structure LED chips are connected in series, in parallel or in series, and in parallel, and the terminals are electrically connected through the lead wires and the external power lead frame and the external power source.
在上述的技术方案中, 所述的导电底座可以是铜或铝制作的。  In the above technical solution, the conductive base may be made of copper or aluminum.
在上述的技术方案中, 在所述导电的底座的 LED芯片承载面上制作 M' 个非导电区是通过镶嵌、 粘结或焊接工艺, 将高阻的单晶硅薄片、 碳化硅薄 片、 纳米碳薄片、 纳米碳材料薄片、 碳复合材料薄片, 云母薄片、 石墨薄片 或及其它们的复合材料的薄片固定在底座的 LED芯片承载面上, 其中, 所述 的薄片厚度为 0. 05〜0. Olrran; 再在所述的每一个薄片的上表面, 按照 LED 芯片大小及底面电极引出区形状制作导电区,用于安放 LED芯片及底面电极, 在该薄片的背面镀上用于悍接的悍锡、 银或金锡合金材料, 以便和原导电的 底座悍接在一起。  In the above technical solution, the M' non-conductive regions are formed on the LED chip bearing surface of the conductive base by a damascene, bonding or soldering process, and the high resistance single crystal silicon wafer, silicon carbide wafer, nanometer 5〜0 The thickness of the sheet is 0. 05~0, the sheet thickness of the sheet is 0. 05~0 Olrran; further, on the upper surface of each of the sheets, a conductive region is formed according to the size of the LED chip and the shape of the bottom electrode lead-out area for mounting the LED chip and the bottom electrode, and the back surface of the sheet is plated for splicing. Tin-tin, silver or gold-tin alloy materials to join the original conductive base.
在上述的技术方案中, 所述的导电区可以是采用镶嵌、 铸入方法, 在塑 料或低温陶瓷中镶嵌、 铸上铜片、 铝片;也可以是在塑料或低温陶瓷上, 采 用印刷、真空镀膜、喷涂方法, 制作一层金、银或锡等金属或它们的合金层。  In the above technical solution, the conductive region may be inlaid or casted, embedded in a plastic or low-temperature ceramic, cast copper sheet, aluminum sheet; or on plastic or low-temperature ceramic, printed, A vacuum coating or spraying method is used to form a layer of a metal such as gold, silver or tin or an alloy layer thereof.
在上述的技术方案中,还包括在硅片上生长一层金刚石薄膜或沉淀纳米 碳薄膜。  In the above technical solution, the method further comprises growing a diamond film or depositing a nano carbon film on the silicon wafer.
在上述的技术方案中, 所述的串联方式为: 用一根金丝从一个 LED芯片 底面导电区连结到相邻的 LED芯片顶面的导电区, 再用一根金丝依次顺序将 N个垂直结构的 LED芯片串联电连接,然后与外部的 LED电引出线电连接 (参 见图 la) ;  In the above technical solution, the series connection method is as follows: a gold wire is connected from a conductive area on the bottom surface of one LED chip to a conductive area on the top surface of an adjacent LED chip, and then N pieces are sequentially sequentially replaced by a gold wire. The vertical structure of the LED chips are electrically connected in series and then electrically connected to the external LED electrical lead wires (see FIG. 1a);
所述的并联方式为: 用一根金丝将所有 N个垂直结构的 LED芯片顶面电 极相联, 另一个电极在 LED芯片的下表面, 该电极和导电区是电联通的, 导 电区上 LED芯片四周的空余部分就成了 LED芯片下表面电极的引出区; 把一 个 LED芯片导电区空余部分用金丝和相邻 LED芯片导电区的空余部分连接起 来就成了并联, 图 Id是三个 LED芯片并联的示意图, 完成后与外部的 LED 芯片电引出线电连接;  The parallel connection is as follows: all N vertical structure LED chip top electrodes are connected by one gold wire, and the other electrode is on the lower surface of the LED chip, the electrode and the conductive area are electrically connected, on the conductive area The vacant part around the LED chip becomes the lead-out area of the lower surface electrode of the LED chip; the vacant part of the conductive area of one LED chip is connected in parallel with the vacant part of the conductive area of the adjacent LED chip, and the figure Id is three. A schematic diagram of parallel connection of LED chips, after completion, is electrically connected to an external LED chip electrical lead-out line;
所述的串联和并联结合方式为:先把所有 LED芯片分成数量相等的几组, 每一组的 LED芯片串联起来, 再把每组 LED芯片的正极相连、 负极相连(参 见图 lb)0 本发明的优点在于: The series and parallel combined way: first of all the number of the LED chips into two equal groups, each group of LED chips are connected in series, and then connected to each of the positive electrode of the LED chip is connected to the negative electrode (see FIG. Lb) 0 The advantages of the invention are:
本发明提供的制备一种具有通常照明所需光通量的 LED照明光源方法, 解决了垂直结构 LED芯片不能多个安装在同一底座的承载面上,而组合成大 功率 LED的难题; 本发明的制备可在一个底座上封装多个垂直结构的 LED芯 片制备 LED照明光源的方法,可使垂直结构的 LED芯片和平面结构的 LED芯 片一样, 在一个 LED芯片容纳腔内, 实现多个 LED芯片的串联、 并联或串、 并联相结合的电组合, 进行集成封装, 从而达到一个 LED具有通常照明所需 光通量的目的。 该制备方法简单, 易于规模化生产。  The invention provides a method for preparing an LED illumination source having the luminous flux required for normal illumination, and solves the problem that the vertical structure LED chip cannot be mounted on the bearing surface of the same base, and is combined into a high-power LED; the preparation of the invention A method for preparing an LED illumination source by encapsulating a plurality of LED chips of a vertical structure on a base, so that the LED chip of the vertical structure and the LED chip of the planar structure can be connected in series in one LED chip receiving cavity. The electric combination of parallel or series and parallel combination is integrated and packaged, so as to achieve the purpose of one LED having the luminous flux required for normal illumination. The preparation method is simple and easy to scale production.
采用本发明提供的将多个垂直结构的 LED 芯片封装在一个底座上的方 法, 所制备的 LED照明光源实用、 寿命长, 其功率可以达到 50W, 100W, 甚 至更大。  By adopting the method of packaging a plurality of vertical structure LED chips on a base provided by the invention, the prepared LED illumination source has practicality and long service life, and the power can reach 50W, 100W or even larger.
附图说明 DRAWINGS
图 la是本发明在不导电的底座上表面制作多个导电区, 在每个导电 区内安装一个垂直结构的 LED芯片制成的一种 LED照明光源的结构剖视图 图 lb是图 la所示结构的俯视图  1 is a structural cross-sectional view of an LED illumination source made by mounting a plurality of conductive regions on a surface of a non-conductive base, and mounting a vertical structure of LED chips in each conductive region. FIG. 1b is a structure shown in FIG. Top view
图 lc 是本发明的一种在不导电底座上表面中嵌入多个导电材料的结 构剖视图  Figure lc is a cross-sectional view showing a structure in which a plurality of conductive materials are embedded in the upper surface of the non-conductive base of the present invention
图 Id是本发明的一种三个芯片并联的电连接实施例示意图  FIG. 1d is a schematic diagram of an electrical connection embodiment in which three chips are connected in parallel according to the present invention.
图 2a是本发明的一种在导电底座上表面沉积一层绝缘的不导电层, 再在不导电层上制作 N个导电区,在每个导电区内安装一个垂直结构的 LED 芯片的结构剖视图  2a is a cross-sectional view showing the structure of an LED chip in which a vertical structure is formed by depositing an insulating non-conductive layer on the surface of the conductive substrate, and then forming N conductive regions on the non-conductive layer.
图 2b是在导电底座上表面悍接一块绝缘片, 再在绝缘片上制作 N个 导电区, 在每个导电区内安装一个垂直结构的 LED芯片的结构剖视图  Figure 2b is a cross-sectional view showing the structure of an LED chip with a vertical structure in each conductive region by splicing an insulating sheet on the upper surface of the conductive base and then making N conductive regions on the insulating sheet.
图 2c 是在导电底座上表面制作多个绝缘的不导电区, 再在绝缘层上 制作 N个导电区, 在每个导电区内安装 2个垂直结构的 LED芯片的结构剖 视图  Figure 2c is a cross-sectional view showing the fabrication of a plurality of insulating non-conductive regions on the upper surface of the conductive base, and then N conductive regions on the insulating layer, and mounting two vertical LED chips in each conductive region.
图 2d是图 2c所示结构的俯视图  Figure 2d is a top view of the structure shown in Figure 2c
图 3是一种塑料的不导电底座中嵌入金属片,在每个金属片(导电区) 内安装一个垂直结构的 LED芯片,并进行电连接的一种 LED照明光源的结构  Figure 3 is a structure of an LED illumination source in which a metal piece is embedded in a non-conductive base of plastic, a vertical structure of an LED chip is mounted in each metal piece (conductive area), and electrical connection is made.
、 图 4是本发明方法制作的 20W LED照明光源的结构剖视图 4 is a cross-sectional view showing the structure of a 20W LED illumination source produced by the method of the present invention.
图 5是本发明方法制作的 50W LED照明光源的结构俯视图 图面说明如下: Figure 5 is a plan view showing the structure of a 50W LED illumination source produced by the method of the present invention. The picture is as follows:
1.不导电的底座 2.导电区 3. LED芯片  1. Non-conductive base 2. Conductive area 3. LED chip
4.芯片顶面电极 5.芯片底面电极引出区 6.外电源引线  4. Chip top surface electrode 5. Chip bottom electrode lead-out area 6. External power lead
7.金丝 8.嵌入的导电区 9.导电的底座  7. Gold wire 8. Embedded conductive area 9. Conductive base
10.不导电层 11.不导电区 12.焊锡  10. Non-conductive layer 11. Non-conductive area 12. Solder
13. 边框 14.高阻单晶硅片 具体实施方式  13. Frame 14. High-resistance monocrystalline silicon wafer
为了使本发明的目的、 技术方案及优点更加清楚明白, 以下结合附图 和实施例对本发明封装方法进行详细说明。  In order to make the objects, technical solutions and advantages of the present invention more apparent, the packaging method of the present invention will be described in detail below with reference to the accompanying drawings and embodiments.
实施例 1 Example 1
参考图 la, 采用本发明的封装方法, 制备成额定电流为 700raA、 功率 为 7W的 LED, 具体步骤如下:  Referring to FIG. la, using the packaging method of the present invention, an LED having a rated current of 700 raA and a power of 7 W is prepared, and the specific steps are as follows:
选取一个低温陶瓷做 LED芯片的不导电的底座 1, 并在该陶瓷的不导电 的底座 1的 LED芯片承载面上,根据所要安装的 6 个垂直结构的 LED芯片 3 的数量制作 6个导电区 2, 该导电区 2是用印刷或蒸镀工艺制作出一层金或 银薄膜; 所述导电区 2的面积比 LED芯片 3的面积大, 且延伸出 LED芯片 3 周边, 以便于和相邻 LED芯片做电连接; 例如: 每一块 LED芯片 3的面积为 1. 0 mmX 1. 0 mm, 每一导电区的面积为 1. 5 mmX l. 5 mm。  Selecting a low temperature ceramic as the non-conductive base 1 of the LED chip, and making 6 conductive regions according to the number of 6 vertical structure LED chips 3 to be mounted on the LED chip bearing surface of the ceramic non-conductive base 1 2, the conductive region 2 is made of a gold or silver film by printing or evaporation process; the area of the conductive region 2 is larger than the area of the LED chip 3, and extends out of the periphery of the LED chip 3, so as to be adjacent to 5毫米。 The area of each of the conductive areas is 1. 5 mmX l. 5 mm.
把选用的 6粒功率为 1. 0W-1. 2W的垂直结构的 LED芯片 3封装在图 la 制好的 6个导电区 2内, 以 3个 LED芯片 3为一组, 采用金丝 7将一组的 3 个 LED芯片之间串连 (参照图 la), 然后串连后的两组再进行两并的电连接 方式, 终端通过外电源引线 6连接驱动电源, 在 LED芯片 3上覆盖有透明光 学材料, 透明光学材料可以是硅胶、 环氧树脂或透镜; 如果要制成白光 LED 则要用蓝光芯片,在该蓝光芯片上面覆盖的光学材料中应含有荧光粉等光转 换材料 (参照图 lb), 这些都是本专业技术人员可以实现的, 制备成额定电 流为 700mA、 功率为 7W的 LED。  The LED chip 3 of the vertical structure of 1. 0W-1. 2W is packaged in the six conductive regions 2 of the drawing, and the three LED chips 3 are used as a group, and the gold wire 7 is used. A set of three LED chips are connected in series (refer to FIG. 1a), and then the two groups connected in series are electrically connected. The terminal is connected to the driving power source through the external power supply lead 6, and the LED chip 3 is covered with Transparent optical material, transparent optical material can be silica gel, epoxy resin or lens; if white LED is to be made, blue light chip should be used, and the optical material covered on the blue chip should contain light conversion material such as phosphor (refer to the figure). Lb), these can be achieved by the skilled person, prepared into a rated current of 700mA, power of 7W LED.
显然电连接采用全部并联的方式是不合适的, 最好先做适当的串联再并 联起来, 由于 12V是一个通用的电源电压, 而三个 LED芯片 3串联的电压在 9. 0V- 10. 5V之间和 12V的电压正好匹配, 所以本实施采用 3个芯片之间串 连,然后串连后再进行两并的电连接方式,这是本领域技术人员可以实施的。  It is obvious that the electrical connection is not in a proper manner. It is preferable to make a proper series connection and then parallel connection. Since the 12V is a universal power supply voltage, the voltage of the three LED chips 3 in series is 9. 0V - 10. 5V The voltage is exactly matched with the voltage of 12V. Therefore, the present embodiment uses three chips in series, and then serially connects the two electrical connections, which can be implemented by those skilled in the art.
参考图 3, 用塑料或低温陶瓷材料做不导电的底座 1, 制备 7W LED光源 的另一途径是: 将不导电的底座 1做成长方形, 并按照底座 1承载垂直结构 LED芯片 3的承载面形状, 和芯片底面电极引出区 5的形状, 选取一块厚度 为 0. 5mm~0. lmm的鍍银黄铜片, 将该镀银黄铜片的四周做出边框 13, 金属 薄片如图 3所示, 它是一种用于安装三串两并 LED芯片 3电连接用的金属薄 片; 然后把该金属薄片压注在本实施例的不导电的底座 1中, 形成嵌入的导 电区 8。 在完成定型以后切去金属边框 13, 便可以在面积较大区域安放 LED 芯片 3, 和进行电连接, 以 3个芯片为一组进行串连, 再把两组并连, 然后 引出, 如图 1 (b)所示。 低温陶瓷和塑料的导热性能都很差, 所以底座要薄。 在满足机械强度的条件下, 尽可能薄一些, 一般在 0. 5~2mm左右为宜, 这样 有利于热量传至下面的散热器上。 如在热塑材料中掺杂无机材料, 还可大幅 度地提高它的导热能力, 而且适合批量生产使用。 实施例 2 Referring to Figure 3, a non-conductive base 1 is made of plastic or low-temperature ceramic material to prepare a 7W LED light source. 5毫米~0 0. The thickness of the thickness of the substrate is 0. 5mm~0. The thickness of the thickness of the substrate is 0. 5mm~0 Lmm silver plated brass sheet, the frame is made around the silver plated brass piece, and the metal foil is shown in Fig. 3. It is a metal for mounting three strings of two LED chips 3 for electrical connection. The sheet is then pressed into the non-conductive base 1 of the present embodiment to form an embedded conductive region 8. After the metal frame 13 is cut after the finalization is completed, the LED chip 3 can be placed in a large area, and the electrical connection is made, and the three chips are connected in series, and then the two groups are connected in parallel, and then taken out, as shown in the figure. 1 (b). Low-temperature ceramics and plastics have poor thermal conductivity, so the base should be thin. Under the condition of satisfying the mechanical strength, it is as thin as possible, generally about 0.5~2mm, which is beneficial to the heat transfer to the radiator below. If the inorganic material is doped into the thermoplastic material, its thermal conductivity can be greatly improved, and it is suitable for mass production. Example 2
参考图 4, 利用垂直结构 LED芯片, 制作一个 20W白光 LED照明光源。 本实施例选择通用的利用蓝光芯片加 YAG (钇榴石榴石)荧光粉的方法制 作 20W白光 LED。由于整个 LED的功率已相当大了,所用 20粒左右 LED芯片 3, 20粒在同时工作时产生的热量较大, 因此, 对实施例 1中的不导电的底 座对热处理已不是很理想, 就需选用本发明中另一种方案。  Referring to Figure 4, a 20W white LED illumination source is fabricated using a vertical structure LED chip. In this embodiment, a general-purpose 20W white LED is produced by using a blue chip and a YAG garnet phosphor. Since the power of the entire LED is already quite large, the 20 or so LED chips 3 and 20 used in the operation of the LEDs have a large amount of heat generated during the simultaneous operation. Therefore, the non-conductive substrate in the embodiment 1 is not ideal for heat treatment. Another option in the present invention is required.
本实施例采用导电的底座 9是用一块厚约 3mm的铝板,并把该铝板做成 盆状, 铝板中心部分做成盆底, 盆底为直径约 10— 20mm的圆形, 也可以将 铝板做成一个面积相当的矩形, 从盆壁的底部四周向上设有两层台阶, 盆沿 的顶部为平台, 外电源引线 6设置在该平台上, 如图 4所示; 其中, 从盆底 向上的第一个台阶的斜面与盆底平面之间的夹角在 100° — 160° 之间,第二 个台阶的角度没有严格要求, 以便于电极引出为原则。  In the embodiment, the conductive base 9 is made of an aluminum plate with a thickness of about 3 mm, and the aluminum plate is made into a basin shape. The central portion of the aluminum plate is made into a pelvic bottom, and the bottom of the pelvis is a circle having a diameter of about 10-20 mm, and the aluminum plate can also be used. The utility model is formed into a rectangle of considerable area, and two steps are arranged from the bottom of the bottom of the basin wall, the top of the basin edge is a platform, and the outer power lead 6 is arranged on the platform, as shown in FIG. 4; wherein, from the bottom of the basin The angle between the slope of the first step and the plane of the basin bottom is between 100° and 160°, and the angle of the second step is not strictly required, so that the electrode is taken out as a principle.
铝导电的底座 9制作完成以后, 在导电的底座 9的盆底部制作一不导电 层 10, 即制作一层绝缘材料薄膜, 一般材料薄膜采用常规镀膜方法, 做成氮 化铝薄膜或氧化铝薄膜, 氮化铝导热性能和绝缘性能都较好, 但价格贵所以 通常都用氧化铝。  After the aluminum conductive base 9 is completed, a non-conductive layer 10 is formed on the bottom of the conductive base 9 to form a thin film of insulating material. The general material film is formed into an aluminum nitride film or an aluminum oxide film by a conventional coating method. Aluminum nitride has good thermal conductivity and insulation properties, but it is expensive, so alumina is usually used.
再在制作好的氮化铝薄膜或氧化铝薄膜上, 根据所要安放 LED芯片的数 量, 利用常规丝网印刷技术印上银浆制成导电区 2, 即 20个导电区 2 (如图 4所示)。 在本实施例中将 20粒 LED芯片 3均勾分成 4组, 每一组 5粒 LED 芯片 3串联, 串联后的 4组并联的方式, 在银浆制得的每一个导电区 2上安 放一粒 1W的 LED芯片 3, 并烧结固定好 LED芯片 3, 之后就可以用金丝 7进 行上述的电连接, 先把 5个芯片串联成一组, 再把四组中的 LED芯片 3正极 连在一起, 负极连在一起。 完成以后就按一般生产白光 LED工艺制作在芯片 上覆盖掺有 YAG荧光粉的硅胶, 再覆上透明保护膜即可, 如果制作单色光的 就加透明硅胶等光学材料, 即可制成 LED照明光源, 这是本专业技术人员可 以实施的。 Then, on the prepared aluminum nitride film or aluminum oxide film, according to the number of LED chips to be placed, a conductive screen 2 is printed by using a conventional screen printing technique, that is, 20 conductive regions 2 (as shown in FIG. 4). Show). In this embodiment, 20 LED chips 3 are respectively divided into 4 groups, each group of 5 LED chips 3 are connected in series, and 4 groups in series are connected in parallel to each conductive region 2 made of silver paste. Put a 1W LED chip 3 and sinter the LED chip 3, then use the gold wire 7 to make the above electrical connection. First connect the 5 chips in series, then connect the LED chips 3 in the four groups. Together, the negative poles are connected together. After completion, it is made by coating the white LED with the YAG phosphor powder on the chip, and then coating the transparent protective film. If the monochromatic light is added, the optical material such as transparent silica gel can be used to make the LED. Illumination source, which can be implemented by those skilled in the art.
为简化制作工艺, 还可以用一块铝板做导电底座 9, 即不做成盆型, 直接 在铝板上做上氧化铝绝缘层, 再在氧化铝的绝缘层上做 LED芯片安装区(20 个导电区 2), 其它电连接区和连接方式如上所述。但是, 这种结构必须用光 学透明材料把整个底座 9的 LED芯片承载面,包括金丝焊接区在内都要保护 起来,这是本领域技术人员可以实施的,以便防止由于触碰或跌撞造成损坏。 实施例 3.  In order to simplify the production process, an aluminum plate can also be used as the conductive base 9, that is, without making a basin type, an aluminum oxide insulating layer is directly formed on the aluminum plate, and an LED chip mounting region is made on the insulating layer of the aluminum oxide (20 conductive layers). Zone 2), other electrical connection zones and connections are as described above. However, such a structure must be protected by an optically transparent material for the LED chip carrying surface of the entire base 9, including the gold wire bonding area, which can be implemented by those skilled in the art to prevent contact or collision. Cause damage. Example 3.
参考图 5, 采用 48粒 1W的垂直结构的 LED芯片 3, 电连接方式为 8个芯 片 3串联成一组, 六组并联供电, 制作一 50W绿光 LED照明光源, 绿光 LED 芯片的材质和特性和蓝光 LED芯片特性相同, 两者可以通用。  Referring to FIG. 5, 48 pieces of 1W vertical structure LED chip 3 are used, and the electrical connection mode is 8 chips 3 connected in series, and six groups are connected in parallel to produce a 50W green LED illumination source, and the material and characteristics of the green LED chip. It has the same characteristics as the blue LED chip, and both can be used universally.
本实施例中的导电的底座 9 是通常的金属铜底座, 一块厚度为 0. 05〜 0. 01mm的高阻单晶硅薄片 14, 作为金属铜底座上的不导电区 11, 它可以认 为是不导电的。 把该高阻单晶硅薄片 14两面镀上金锡合金或其他可焊接材 料, 然后采用光刻工艺在其中的一面上刻成预定的图形, 即制成 48个相互 绝缘的导电区 2和芯片底面电极引出区 5 (如图 5所示)。因为高阻单晶硅薄 片 14的另一面已镀了金锡合金或其他可焊接材料, 所以可以把它悍接在铜 底座上, 再配上相应的市售引线架, 这样就做了一个适用于垂直结构 LED芯 片的底座, 其后序的制作工艺流程和一般 LED的制作方法就相同了。  The conductive base 9 in this embodiment is a common metal copper base, and a high-resistance single crystal silicon wafer 14 having a thickness of 0.05 to 0.01 mm is used as a non-conductive region 11 on the metal copper base, which can be considered as Not electrically conductive. The high-resistance single crystal silicon wafer 14 is plated with gold-tin alloy or other solderable material on both sides, and then patterned into one surface on one side by photolithography, thereby forming 48 mutually insulated conductive regions 2 and chips. The bottom electrode lead-out area 5 (shown in Figure 5). Since the other side of the high-resistance single crystal silicon wafer 14 has been plated with a gold-tin alloy or other solderable material, it can be attached to the copper base and equipped with a corresponding commercially available lead frame, thus making a suitable application. In the base of the vertical structure LED chip, the subsequent manufacturing process and the general LED manufacturing method are the same.
针对垂直结构芯片的特点和 LED底座有导电与不导电之分,本发明中的 方法可以分为三大类, 具体如下:  For the characteristics of the vertical structure chip and the LED base having electrical and non-conducting points, the method of the present invention can be divided into three categories, as follows:
1.对不导电的底座来说, 制作 N块金属薄片, 每一块金属薄片比 LED芯 片的面积大, 然后把金属薄片压注在塑料或低温陶瓷中成型, 成为 N个相互 绝缘的导电区。 再把 N个垂直结构 LED芯片分别安置在 N块金属薄片上, 金 属薄片就成了芯片的底面电极, 芯片的顶面是另一个电极, 如此每个芯片的 两个电极都和其它芯片电极绝缘,把前一个芯片的底电极和后一个芯片的顶 电极用金丝连在一起就形成了两个芯片间的串联。对所述的 N个垂直结构的 LED芯片串联或并联电连接; 如图 1 (b)所示, 这是一种用于三串两并的金 属薄片。 低温陶瓷和塑料的导热性能都很差, 所以底座要薄。 在满足机械强 度的条件下, 尽可能薄一些, 有利于热量传至下面的散热器上。 1. For a non-conducting base, N pieces of metal foil are produced, each of which is larger than the area of the LED chip, and then the metal foil is pressed into a plastic or low-temperature ceramic to form N conductive regions that are insulated from each other. Then, the N vertical structure LED chips are respectively placed on the N metal foils, the metal foil becomes the bottom electrode of the chip, and the top surface of the chip is the other electrode, so that the two electrodes of each chip are insulated from the other chip electrodes. The bottom electrode of the previous chip and the top electrode of the latter chip are connected together by a gold wire to form a series connection between the two chips. For the N vertical structures described The LED chips are electrically connected in series or in parallel; as shown in Fig. 1(b), this is a metal foil for three strings. Low-temperature ceramics and plastics have poor thermal conductivity, so the base should be thin. Under the condition of satisfying the mechanical strength, it is as thin as possible, which is beneficial to the heat transfer to the radiator below.
也可以在不导电底座上用印刷或喷镀制作出 N个相互绝缘的导电区用于安装 芯片和电连接。 It is also possible to produce N mutually insulated conductive regions by printing or sputtering on a non-conductive base for mounting the chip and electrical connections.
2. 在既导热又导电的底座上覆盖一层薄膜绝缘层, 绝缘层不导电, 但 是具有一定的导热能力,且绝缘层的厚度很薄约 0. 05〜0. 01mm,俗称薄膜例 如在铝的底座上制作氮化铝或氧化铝薄膜, 再在氮化铝或氧化铝薄膜上, 需 要安放 LED芯片和引出线的位置上制作导电层,例如用丝印法印上银浆或镀 上银或金锡合金等工艺制作导电层,如此许多个 LED芯片的底面电极都各自 独立分别引出了, 这些芯片之间就可以进行串联, 并联和串并联结合等方式 的电连接。 由于氮化铝, 氧化铝有一定的导热能力, 又很薄, 所以对芯片散 热影响很小。  The film is commonly referred to as a film, for example, in aluminum. The film is coated with a thin film of a conductive layer. The insulating layer is not electrically conductive, but has a certain degree of thermal conductivity, and the thickness of the insulating layer is about 0. 05~0. A thin film of aluminum nitride or aluminum oxide is formed on the base, and a conductive layer is formed on the aluminum nitride or aluminum oxide film at a position where the LED chip and the lead wire are to be placed, for example, silver paste or silver or gold plating is applied by silk screen printing. The conductive layer is formed by a process such as tin alloy, and the bottom electrodes of such a plurality of LED chips are separately drawn separately, and the electrical connection of the series, parallel connection and series-parallel connection can be performed between the chips. Due to the aluminum nitride, aluminum oxide has a certain thermal conductivity and is very thin, so it has little effect on the heat dissipation of the chip.
3.在既导电又导热的 LED底座上, 在芯片承载面上通过粘结或悍接工 艺覆盖一层绝缘的但具有一定导热能力的薄片, 例如高阻的单晶硅片、 碳化 硅片、 纳米碳片或纳米碳材料、 碳复合材料, 云母片、 石墨片等及其它复合 材料, 这个薄片的上表面, 根据集成封装的需要制作 LED芯片安放区及底面 电极引出区, 在这个薄片的背面镀上可悍接的材料, 例如悍锡、 银、 金锡合 金等等, 以便和原导电的底座悍接在一起, 也可以采用粘结的工艺, 利用悍 接或粘结工艺把硅片或纳米碳片等连结到高导热也导电的底座上。  3. On the LED base which is both conductive and thermally conductive, a layer of insulating but certain thermal conductivity is covered on the chip bearing surface by bonding or splicing, such as high resistance monocrystalline silicon wafer, silicon carbide wafer, Nano carbon sheet or nano carbon material, carbon composite material, mica sheet, graphite sheet, etc. and other composite materials, the upper surface of the sheet, according to the needs of the integrated package, the LED chip mounting area and the bottom electrode lead-out area are formed on the back side of the sheet. Plated with splicable materials, such as tin-tin, silver, gold-tin alloy, etc., to be bonded to the original conductive base, or a bonding process, using a bonding or bonding process to wafer or Nano-carbon sheets and the like are bonded to a highly thermally conductive and electrically conductive base.
考虑到硅片等材料的导热性能不如铜、 铝等金属, 本发明可以在硅片上 长一层导热率非常高的薄膜材料,例如在硅基板上生长金刚石薄膜或沉淀纳 米碳薄膜, 金刚石的导热率几乎是铜的 5倍, 因此芯片产生的热可以迅速传 到芯片周边地区, 再经硅片传到散热底座上, 达到快速散热的目的, 而纳米 碳等材料的导热率是铜的 8倍, 不过在制成不导电薄膜时略有下降, 但仍会 大幅度的提高硅薄片导热散热性能。  Considering that the thermal conductivity of materials such as silicon wafers is not as good as that of metals such as copper and aluminum, the present invention can grow a thin film material having a very high thermal conductivity on a silicon wafer, for example, a diamond film or a precipitated nanocarbon film on a silicon substrate, diamond The thermal conductivity is almost five times that of copper. Therefore, the heat generated by the chip can be quickly transferred to the peripheral area of the chip, and then transferred to the heat dissipation base through the silicon wafer to achieve the purpose of rapid heat dissipation. The thermal conductivity of the material such as nano carbon is copper. Double, but slightly reduced when made of non-conductive film, but it will greatly improve the thermal conductivity of silicon wafer.
上述三类方法实现了各 LED芯片底部间的相互绝缘和电极的引出, 使 用电连接可以串并联,以后的 LED制作步骤和通常功率型 LED制作步骤相同。 应该注意到并理解, 在不脱离后附的权利要求所要求的本发明的精神 和范围的情况下, 能够对上述详细描述的本发明做出各种修改和改进。 因 此, 要求保护的技术方案的范围不受所给出的任何特定示范教导的限制。  The above three methods achieve mutual insulation and electrode extraction between the bottoms of the LED chips, and the electrical connections can be connected in series and in parallel. The subsequent LED fabrication steps are the same as the conventional power LED manufacturing steps. It will be appreciated and appreciated that various modifications and improvements can be made to the present invention described above without departing from the spirit and scope of the invention. Therefore, the scope of the claimed technical solutions is not limited by any particular exemplary teachings presented.

Claims

1.一种在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法,包 括以下步骤: A method of fabricating an LED light source by packaging a plurality of vertical structure LED chips on a substrate, comprising the steps of:
1 ) 使用不导电的底座, 并在所述底座的 LED芯片承载面上, 根据所要 安装的 N个 LED芯片的数目制作 M个相互绝缘的导电区,其中, N和 M相等, 且 1^和¾ 2;所述导电区的面积比 LED芯片的面积大,且延伸出 LED芯片周 边, 以便于和相邻 LED芯片做电连接;  1) using a non-conductive base, and on the LED chip carrying surface of the base, making M mutually insulated conductive regions according to the number of N LED chips to be mounted, wherein N and M are equal, and 1^ and The conductive area has a larger area than the LED chip and extends out of the periphery of the LED chip to facilitate electrical connection with adjacent LED chips;
2 ) 将 N个垂直结构的 LED芯片分别安装在每一个所述的导电区内; 2) mounting N vertical-structured LED chips in each of the conductive regions;
3 ) 然后, 对所述的 N个垂直结权构的 LED芯片进行串联、 并联或串联和 并联结合的电连接。 利 3) Then, the N vertical-right-weighted LED chips are connected in series, in parallel, or in series and in parallel. Profit
2.按照权利要求 1 所述的在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 其特征在于, 所述的不导电的底座是低温陶瓷或塑料制作 的, 在所述的不导电的底座上制作导电区是用既导电又导热的材料做成比 LED芯片面积大的片, 将所述的片嵌入不导电的底座中, 让所述的片的表面 露出不导电底座; 或者  2 . The method of claim 1 , wherein the non-conductive base is made of low temperature ceramic or plastic, and the non-conductive base is made of low temperature ceramic or plastic. The conductive region is formed on the conductive base by using a material that is both electrically conductive and thermally conductive to form a larger area than the LED chip, and the sheet is embedded in the non-conductive base to expose the surface of the sheet to the non-conductive base; or
在所述的底座 LED芯片的承载面上需要安放 LED芯片的位置,采用丝网 印法、 真空制备薄膜工艺或电镀工艺制作 M个导电区, M个导电区是相互绝 缘的, 所述的导电区是银或金锡合金层。  The position of the LED chip needs to be placed on the bearing surface of the base LED chip, and M conductive regions are formed by a screen printing method, a vacuum preparation thin film process or an electroplating process, and the M conductive regions are insulated from each other, and the conductive The zone is a layer of silver or gold tin alloy.
3.—种在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法,包 括以下步骤:  3. A method of fabricating an LED light source by encapsulating a plurality of vertical structure LED chips on a base, comprising the following steps:
1 ) 使用导电的底座, 在所述底座的 LED芯片承载面上, 制作与底座面 积一样大小的不导电区;  1) using a conductive base, on the LED chip carrying surface of the base, making a non-conductive area of the same size as the base area;
2 )根据所要安装的 LED芯片的数量 N,再在不导电区上制作 M个相互绝 缘的导电区, 其中, N和 M相等, 且 和¾1 2; 所述导电区的面积比 LED芯 片的面积大, 且延伸出 LED芯片周边, 以便于和相邻 LED芯片做电连接; 2) according to the number N of LED chips to be mounted, and then making M mutually insulated conductive regions on the non-conducting region, wherein N and M are equal, and the sum is 3⁄41 2; the area of the conductive region is larger than the area of the LED chip Large, and extending out of the periphery of the LED chip to facilitate electrical connection with adjacent LED chips;
3 ) 将 N个垂直结构的 LED芯片分别安装在每一个导电区内; 3) mounting N vertical LED chips in each of the conductive regions;
4) 然后, 对所述的 N个垂直结构的 LED芯片进行串联、 并联或串联和 并联结合电连接。  4) Then, the N vertical-structured LED chips are connected in series, in parallel, or in series and in parallel.
4.按照权利要求 3所述的在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 其特征在于, 所述的导电的底座为金属铝或铜; 其中, 所 述导电区的制备方法: 直接在导电的底座 LED芯片承载面上沉积或生长一层 绝缘层, 在底座 LED芯片承载面上固定一块具有导热能力的绝缘材料片, 所 述的绝缘材料层或绝缘材料片的厚度为 0. 05〜0. 01mm。 The method for preparing an LED light source by packaging a plurality of vertical structure LED chips on a substrate according to claim 3, wherein the conductive base is metal aluminum or copper; wherein, the preparation of the conductive region Method: deposit or grow a layer directly on the conductive chip LED chip bearing surface 1 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。.
5.按照权利要求 4所述的在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 其特征在于, 所述导电的底座为金属铝时, 需在所述的金 属铝的底座上制作氮化铝或氧化铝薄膜, 再在氮化铝或氧化铝薄膜上, 再在 需要安放 LED芯片和引出线的位置上制作导电层; 其中, 所述的导电层釆用 丝网印法、 真空制备薄膜工艺或电镀工艺制作银或金锡合金层。  5 . The method of claim 4 , wherein the conductive base is made of metal aluminum, and the metal aluminum is mounted on the base of the metal aluminum. Making an aluminum nitride or aluminum oxide film, and then forming a conductive layer on the aluminum nitride or aluminum oxide film at a position where the LED chip and the lead wire need to be placed; wherein the conductive layer is screen printed, A silver or gold-tin alloy layer is formed by vacuum forming a thin film process or an electroplating process.
6.按照权利要求 4所述的在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 其特征在于, 所述绝缘材料片为高阻的单晶硅片、 碳化硅 片、 纳米碳片、 纳米碳材料、 碳复合材料、 云母片、 石墨片或及其它们的复 合材料。  6 . The method of claim 4 , wherein the insulating material sheet is a high resistance monocrystalline silicon wafer, a silicon carbide wafer, and a nano carbon. Sheets, nanocarbon materials, carbon composites, mica flakes, graphite flakes or composites thereof.
7.按照权利要求 6 所述的在一底座上封装多个垂直结构 LED 芯片制备 LED光源的方法, 其特征在于, 所述的复合材料是碳纳米材料薄片, 其中, 所述的绝缘材料片的厚度为 0. 05〜0. 01mm。  7 . The method of claim 6 , wherein the composite material is a carbon nano material sheet, wherein the insulating material sheet is formed by a method of packaging a plurality of vertical structure LED chips on a substrate. 01毫米。 Thickness is 0. 05~0. 01mm.
8. 一种在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 包括以下步骤- 8. A method of fabricating an LED light source by packaging a plurality of vertical structure LED chips on a substrate, comprising the following steps -
1 ) 使用导电的底座, 按照所要安装的 LED芯片的数量 N , 在所述导电 底座的 LED芯片承载面上制作 M ' 个非导电区; 其中, N和 M ' 相等, 且 N 或 M ' ^2; 1) using a conductive base, according to the number N of LED chips to be mounted, M' non-conductive regions are formed on the LED chip bearing surface of the conductive base; wherein N and M' are equal, and N or M' ^ 2;
2 ) 再在每一个所述非导电区内制作一导电区, 其中, 所述导电区的面 积比非导电区的面积小, 且该导电区的面积比 LED芯片的面积大, 以及延伸 出 LED芯片周边, 以便于芯片间电连接非导电区和导电的底座绝缘;  2) forming a conductive region in each of the non-conductive regions, wherein the conductive region has a smaller area than the non-conductive region, and the conductive region has a larger area than the LED chip, and extends out of the LED The periphery of the chip, so as to electrically connect the non-conductive area between the chips and the conductive base;
3 ) 将 N个垂直结构的 LED芯片分别安装在每一个导电区内;  3) mounting N vertical LED chips in each of the conductive regions;
4) 然后, 对所述的 N个垂直结构的 LED芯片进行串联、 并联或串联和 并联结合电连接。  4) Then, the N vertical-structured LED chips are connected in series, in parallel, or in series and in parallel.
9.按照权利要求 8所述的在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 其特征在于, 在所述导电的底座的 LED芯片承载面上制作 M' 个非导电区是通过粘结或焊接工艺, 将高阻的单晶硅薄片、 碳化硅薄片、 纳米碳薄片、 纳米碳材料薄片、 碳复合材料薄片, 云母薄片、 石墨薄片或及 其它们的复合材料薄片固定在底座的 LED芯片承载面上, 其中, 所述的薄片 的厚度为 0. 05〜0. 01mm;再在所述的薄片的上表面制作 LED芯片安放区及底 面电极引出区, 在该薄片的背面镀上用于悍接的焊锡、 银或金锡合金材料, 以便和原导电的底座悍接在一起。 9 . The method of claim 8 , wherein a plurality of vertical structure LED chips are mounted on a substrate to prepare an LED light source, wherein the M′ non-conductive regions are formed on the LED chip bearing surface of the conductive base. Fixing a high-resistance single crystal silicon wafer, a silicon carbide foil, a nanocarbon foil, a nanocarbon material sheet, a carbon composite sheet, a mica sheet, a graphite sheet, or a composite sheet thereof on a base by a bonding or soldering process The LED chip carrying surface, wherein the thickness of the sheet is 0. 05~0. 01mm; and further, an LED chip mounting area and a bottom electrode lead-out area are formed on the upper surface of the sheet, and the back surface of the sheet is plated. Solder, silver or gold-tin alloy material for splicing, In order to be connected with the original conductive base.
10.按照权利要求 8所述的在一底座上封装多个垂直结构 LED芯片制备 LED光源的方法, 其特征在于, 所述的单晶硅薄片或碳化硅薄片上, 再生长 一层金刚石薄膜或沉淀纳米碳薄膜。  10 . The method of claim 8 , wherein a plurality of vertical structure LED chips are mounted on a substrate to prepare an LED light source, wherein the single crystal silicon wafer or the silicon carbide wafer is further grown with a diamond film or Precipitating a nanocarbon film.
11.按照权利要求 1、 3或 8所述的在一底座上封装多个垂直结构 LED芯 片制备 LED光源的方法, 其特征在于,  11. A method of fabricating an LED light source by packaging a plurality of vertical structure LED chips on a substrate according to claim 1, 3 or 8, wherein
所述的串联方式为:用一根金丝从一个 LED芯片底面导电区连结到相邻 的 LED芯片顶面的导电区,再用一根金丝依次顺序将 N个垂直结构的 LED芯 片串联电连接, 终端与外部 LED的电引出线电连接;  The series connection method is: connecting a conductive wire of a top surface of an LED chip to a conductive area of a top surface of an adjacent LED chip by using a gold wire, and sequentially connecting N vertical LED chips in series with a gold wire. Connecting, the terminal is electrically connected to the electrical lead wire of the external LED;
所述的并联方式为: 用一根金丝将所有 N个垂直结构的 LED芯片顶面电 极相联, 芯片下表面电极和导电区相通, 把 N个导电区用金丝接通, 终端与 LED外部的电引出线电连接;  The parallel connection is as follows: all N vertical structure LED chip top electrodes are connected by a gold wire, the lower surface electrode of the chip and the conductive area are connected, and the N conductive areas are connected by gold wire, the terminal and the LED External electrical lead wire electrical connection;
所述的串联和并联结合方式为: 把 N个 LED芯片分成相等的几个组, 每 一组内的 LED芯片进行串联, 然后把每组的 LED芯片正极接在一起, 负极接 在一起, 终端与 LED外部的引出线电连接。  The series and parallel combination manners are as follows: dividing the N LED chips into equal groups, the LED chips in each group are connected in series, and then the positive electrodes of each group are connected together, and the negative electrodes are connected together, the terminal It is electrically connected to the lead wire outside the LED.
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