CN201904368U - LED (light emitting diode) surface-mounting package structure based on silicon substrate integrated with functional circuit - Google Patents

LED (light emitting diode) surface-mounting package structure based on silicon substrate integrated with functional circuit Download PDF

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Publication number
CN201904368U
CN201904368U CN 201020279941 CN201020279941U CN201904368U CN 201904368 U CN201904368 U CN 201904368U CN 201020279941 CN201020279941 CN 201020279941 CN 201020279941 U CN201020279941 U CN 201020279941U CN 201904368 U CN201904368 U CN 201904368U
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Prior art keywords
silicon substrate
led
circuit
metal
led chip
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CN 201020279941
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Inventor
曾照明
肖国伟
陈海英
周玉刚
侯宇
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Guangdong APT Electronics Ltd
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APT (GUANGZHOU) ELECTRONICS Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48464Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area also being a ball bond, i.e. ball-to-ball
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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Abstract

The utility model relates to an LED (light emitting diode) surface-mounting package structure based on a silicon substrate integrated with a functional circuit, which comprises the silicon substrate and an LED chip. The upper surface of the silicon substrate is a plane structure without a groove. An oxidization layer is covered on the upper surface of the silicon substrate, and a metal electrode layer is arranged on the upper surface of the oxidization layer. A metal convex point is arranged on the upper surface of the metal electrode layer, and the LED chip is inversely arranged on the silicon substrate. Two conductive metal welding pads are arranged on the lower surface of the silicon substrate, and the conductive metal welding pads and the metal electrode layer on the upper surface of the silicon substrate are electrically connected with each other through a metal lead wire arranged on the side wall of the silicon substrate. A heat-conduction metal welding pad is arranged on the lower surface of the silicon substrate corresponding to the right lower side of the LED chip. The upper surface of the silicon substrate is integrated with a peripheral functional circuit needed by the LED. The structure of the LED surface-mounting package structure has the advantages of good heat dissipation effect and small volume. Functional circuits such as protection circuits, driving circuits and the like of the LED are directly integrated into the silicon substrate, therefore, the large production packaging of wafer grade is realized, and the packaging cost and the cost of the lamps are reduced.

Description

A kind of silicon substrate is integrated with the LED surface mounting structure of functional circuit
Technical field
The utility model belongs to the manufacturing field of luminescent device, relates to a kind of LED encapsulating structure based on silicon substrate.
Background technology
Light-emitting diode (LED) light source has high efficiency, long-life, does not contain the advantage of harmful substances such as Hg.Along with the fast development of LED technology, performances such as the brightness of LED, life-span have all obtained great lifting, make LED application more and more widely, from outdoor lightings such as street lamps to room lightings such as decorative lamps, all use one after another or be replaced with LED as light source.
The encapsulating structure of LED surface attaching type (SMD) is because it uses convenient and volume is little etc. that advantage has become main packing forms.See also Fig. 1, it is a LED surface mounting structure commonly used in the prior art, comprises that a package support 100 and is mounted on led chip 200 in the package support 100 by solid brilliant technology.Package support 100 surfaces are provided with metal lead wire 500, and the metal lead wire 500 of led chip 200 both sides is provided with electrode 400, and the positive and negative electrode of led chip 200 is electrically connected with electrode 400 on the package support 100 respectively by gold thread 300.Above led chip 200, fill embedding colloid 600 by fluorescent powder coated and sealing adhesive process, thereby finish encapsulation led chip 200.Yet, there is following problem in present this LED surface mounting structure: because package support 100 is that the employing metallic support is a substrate, form also to cut after jetting plastic groove or the sealing of mold casting forming mode, so its temperature tolerance is not good, thermal diffusivity is not ideal enough, microminiaturized being difficult for makes again.In addition, led chip 200 dress that faces up is pasted and adopts the structure of gold thread 300 connection electrode owing to adopted, and gold thread connects that the LED that lost efficacy often produces and use in the maximum failure mode of appearance.In addition, the led chip 200 that positive dress pastes is by the sapphire heat radiation, but its radiating effect is not good.
In order to solve the problem that above-mentioned enclosure support structure exists, one preferably method be to adopt silicon substrate directly as the base plate for packaging of led chip.At present also fail mass selling and application in practice, relevant patent report is just arranged based on the SMD constructed products of silicon substrate.What they adopted mostly all is that the silicon chip upper surface is dug a dark groove, digs through the hole again in groove, and the electrode in the upper surface groove is linked the back side, forms the packing forms of SMD; Led chip is embedded in the silicon groove, fills fluorescent material and colloid during encapsulation in groove; And what generally adopt is that positive cartridge chip is beaten gold thread and connected.Part has also adopted the structure of flip-chip, sees also Fig. 2, and this encapsulating structure comprises a silicon substrate 10, a led chip 20 and packing colloid 30.Wherein the upper surface of this silicon substrate 10 has a dark groove, and led chip 20 upside-down mountings are in the dark groove of this silicon substrate 10.Be provided with through hole 50 in the groove of the silicon substrate 10 of the positive and negative electrode correspondence of led chip 20, the back side of the silicon substrate 10 of through hole 50 correspondences has conductive welding disk 60 and 70, and led chip 20 is electrically connected with conductive welding disk 60,70 by the lead-in wire of establishing in the through hole 50.This packing colloid 30 is to form by filling fluorescent material and sealing in dark groove.This structure need be corroded silicon chip for a long time owing to need dig big dark groove at the upper surface of silicon chip, and complex process and cost are higher; Very dark owing to groove simultaneously, thus the difficulty of portion's wiring within it increases, if particularly adopt flip-chip, need make metal salient point on the electrode in groove, and its technology difficulty is bigger; Moreover, be not easy the peripheral function circuit (as electrostatic discharge protective circuit, drive circuit etc.) of integrated LED on silicon substrate because the silicon substrate upper surface has dark groove, also be restricted on its application prospect; In addition, be subjected to the restriction of groove size, the core number of placing in the groove is limited, is difficult for realizing multi-chip modules.
Be easy to by electrostatic breakdown in the light-emitting diode production and the course of work, cause the dead lamp of LED to lose efficacy, therefore, present most LED need additionally connect zener again and make electrostatic protection in encapsulation process, increased extra work and cost.In fact LED is exactly the PN junction diode, its need of work DC power supply drives, its operating voltage is by material and the decision of PN junction characteristic, basically be constant, its brightness is just decided by operating current like this, therefore, for guaranteeing the operate as normal of LED, generally require constant-current source to drive, holding current is constant, and LED needs additional power source constant-current driving system like this.In addition, the LED peripheral circuit also comprises rectification circuit (being ac-dc converter circuit), light adjusting circuit, load monitoring diagnosis etc., these functional circuits are encapsulation separately all, volume is big, the cost height, but these circuit reality all are the integrated circuits that silicon technology is produced, if partial circuit can be integrated in the silicon substrate, to effectively improve integrated level, improve job stability, reduce cost.
The utility model content
The purpose of this utility model is to overcome shortcoming of the prior art with not enough, and the LED surface mounting structure of a kind of perfect heat-dissipating, miniaturization, low cost, high integration is provided.
A kind of silicon substrate is integrated with the LED surface mounting structure of functional circuit, comprises silicon substrate and led chip.The upper surface of described silicon substrate is a planar structure, no groove.One oxide layer covers the upper surface of silicon substrate, is arranged on the upper surface and the mutually insulated of this oxide layer respectively in order to two metal electrode layers that connect positive and negative electrode.The upper surface of described metal electrode layer is respectively arranged with metal salient point, and the led chip upside-down mounting is on this silicon substrate, and the both positive and negative polarity of led chip is connected with two metal salient points respectively, thereby is electrically connected with metal electrode layer.Lower surface at described silicon substrate is respectively arranged with two conducting metal pads, and described conducting metal pad is electrically connected by the metal lead wire that is arranged on the silicon substrate sidewall with the metal electrode layer of silicon substrate upper surface.One heat-conducting metal pad is arranged on the lower surface of silicon substrate corresponding under the led chip.The upper surface of described silicon substrate is integrated with the required peripheral function circuit of LED, and it realizes being electrically connected with metal electrode layer by the contact hole that runs through oxide layer.
Further, also comprise the colloid lens, the upper surface that it is arranged on silicon substrate forms a confined air chien shih led chip and interior metal line thereof and is isolated from the outside.
Further, described peripheral function circuit is a kind of circuit in electrostatic discharge protective circuit, power driving circuit, rectification circuit, light adjusting circuit, the load monitoring diagnostic circuit or the combination of multiple circuit.
With respect to prior art, structure of the present utility model has good heat dissipation effect, advantage that volume is little; Not having the gold thread encapsulation simultaneously makes this structure have high reliability; Directly saved the step of digging dark groove at silicon chip surface at the surperficial flip LED chips of silicon substrate, technology cost and technology difficulty have been reduced, and can easily carry out arranging of led chip, can realize easily that multi-chip modules connects and encapsulation at the silicon chip upper surface.Directly at the peripheral function circuit of silicon substrate surface integrated LED, realized the Highgrade integration of LED encapsulating structure simultaneously, the LED device volume is reduced, cost reduces, and job stability improves.And realized the big production encapsulation of wafer scale making packaging cost reduce.
In order to understand the utility model more clearly, set forth embodiment of the present utility model below with reference to description of drawings.
Description of drawings
Fig. 1 is a LED surface mounting structure schematic diagram commonly used in the prior art.
Fig. 2 is the silicon substrate that the exemplifies encapsulating structure schematic diagram as the base plate for packaging of led chip.
Fig. 3 the utility model is based on the generalized section of the LED encapsulating structure of silicon substrate.
Fig. 4 is a vertical view shown in Figure 3.
Fig. 5 is a upward view shown in Figure 3.
Fig. 6 to Figure 11 is the cross-sectional view of each step of technological process of the utility model LED encapsulating structure.
Electrostatic discharge protective circuit vertical view and the equivalent circuit diagram of Figure 12 embodiment 1.
Electrostatic discharge protective circuit vertical view and the equivalent circuit diagram of Figure 13 embodiment 2.
Embodiment
Please consult Fig. 3, Fig. 4 and Fig. 5 simultaneously, it is respectively generalized section, vertical view and the upward view of the utility model based on the LED encapsulating structure of silicon substrate.This LED encapsulating structure comprises silicon substrate 1, led chip 3 and lens 11.
This led chip 3 has P and two electrodes of N respectively, and electrode is provided with electrode metal pad (figure does not show).
The upper surface of this silicon substrate 1 is a planar structure, no groove.Be integrated with peripheral function circuit 2 in the upper surface of this silicon substrate 1.One oxide layer 5 covers the upper surface of silicon substrate 1, and has contact hole 13 at the correspondence position of peripheral functional circuit 2.Be arranged on the upper surface and the mutually insulated of this oxide layer 5 respectively in order to two metal electrode layers 6 that connect positive and negative electrode.The upper surface of metal electrode layer 6 is respectively arranged with metal salient point 4.Led chip 3 upside-down mountings are on this silicon substrate 1, and the electrode metal pad on the P of led chip 3, the N electrode engages with metal salient point 4 on the metal electrode layer 6 respectively.The lower surface of this silicon substrate 1 is respectively arranged with two conducting metal pads 9 and a heat-conducting metal pad 10.This conducting metal pad 9 is connected with the metal electrode layer 6 of silicon substrate 1 upper surface by the metal lead wire 7 that is arranged on silicon substrate 1 sidewall respectively.Between this conducting metal pad 9 and the silicon substrate 1, and be provided with an insulating barrier 8 between this metal lead wire 7 and the silicon substrate 1.Heat-conducting metal pad 10 covers the lower surface of this silicon substrate 1, and with the position of this led chip 3 over against, between this heat-conducting metal pad 10 and the silicon substrate 1 insulating barrier can be arranged, also can the naked layer.
Lens 11 are arranged on the upper surface of silicon substrate 1, and it forms a confined air chien shih led chip 3 and interior metal line is isolated from the outside.
Described peripheral function circuit 2 specifically is a kind of circuit in electrostatic discharge protective circuit, power driving circuit, rectification circuit, light adjusting circuit, the load monitoring diagnostic circuit or the combination of multiple circuit.
The material of described metal salient point 4 can be material single in lead, tin, gold, nickel, copper, aluminium, the indium, multilayer material or alloy.
The material of the electrode metal pad on the described led chip 3 can be single material, multilayer material or alloy in nickel, gold, silver, aluminium, titanium, tungsten, cadmium, vanadium, the platinum etc.
The material of described conducting metal pad 9 and heat-conducting metal pad 10 can be single material, multilayer material or alloy in nickel, gold, silver, aluminium, titanium, tungsten, cadmium, vanadium, the platinum etc.
The material of described lens 11 is transparent resin or silica gel; Also can be resin or the silica gel that is mixed with graininess fluorescent material; Or be made up of two layers of material: ground floor is colloid or the fluorescent material solid thin-sheet that is mixed with fluorescent material, and the second layer is transparent resin or silica gel.
Described insulating barrier 8 can be polyimides (Polyimide), silica, silicon nitride, the permanent photoresist that uses in curable back etc.
Please consult Fig. 6 to Figure 11 simultaneously, it is the cross-sectional view of each step of technological process of the utility model LED encapsulating structure.Below describe the manufacturing step of LED encapsulating structure of the present utility model in detail:
Step S1: make led chip 3.Particularly, growth has the extension disk of nitride multilayer gallium on Sapphire Substrate, through sequence of process steps such as photoetching, etching, layer metal deposition and passivation layer protections, forms P electrode and N electrode on led chip, and the metal pad on the electrode.This disk cuts into the led chip 3 of simple grain behind grinding and polishing.
Step S2: on silicon substrate 1, form peripheral function circuit 2 and metal electrode layer 6.Particularly, on a slice silicon substrate disk 1, pass through production process of semiconductor earlier, as extension, oxidation, photoetching, the injection of burn into ion, diffusion, annealing etc., produce required LED peripheral circuit 2, and leave contact hole 13, form metal level 6 with technologies such as evaporation, sputter or plating at the upper surface of silicon substrate 1 again, by photoetching, corrode or technology such as peel off and form figure and connecting line layer corresponding to led chip.
Step S3: form metal salient point 4.Particularly, adopt plating, evaporation or metal wire to plant mode such as ball and form metal salient point 4 in the position of metal electrode layer 6 corresponding flip LED chips.
Step S4: the lower surface at silicon substrate 1 forms groove 16: be stained with one deck support medium disk 15 identical with silicon substrate 1 size at silicon substrate 1 upper surface; material is silicon chip, glass, metal or pottery etc., is used to protect upper surface and as the support after the lower surface etching.Then silicon substrate 1 is carried out lower surface and grind, be ground to needed thickness.Then carry out operations such as cvd dielectric layer, gluing, exposure, development, corrosion, leave the graph window of sheltering dielectric layer in the position, scribing road of silicon substrate 1 intergranule at silicon substrate 1 lower surface.Utilize dielectric layer or photoresist as masking layer, silicon substrate 1 is carried out dry etching or wet etching, wear silicon chip, form groove 16 up to corrosion.
Step S5: form insulating barrier 8: cover insulating barrier 8 at the sidewall of groove 16 and the lower surface of silicon substrate 1 by modes such as plating or sprayings.
Step S6: form metal lead wire 7, conducting metal pad 9 and heat-conducting metal pad 10: at first the insulating barrier of the side-walls of the metal electrode layer 6 of groove 16 corresponding silicon substrate 1 upper surfaces is removed by exposure imaging; In groove 16, form metal lead wire 7 by modes such as plating, chemical plating then and at the lower surface formation conducting metal pad 9 and the heat-conducting metal pad 10 of silicon substrate 1.The metal electrode layer 6 of silicon substrate 1 upper surface has been realized being electrically connected by metal lead wire 7 with the conducting metal pad of silicon substrate 1 lower surface.
Step S7: paste second support chip 18 and remove first support chip 15: the lower surface of the silicon substrate 1 made is affixed on second support chip 18 by second adhesive-layer 17, then first support chip 15 of silicon substrate 1 upper surface is got rid of, cleaned up the silicon chip upper surface simultaneously.
Step S8: the upper surface that led chip 3 flip chip bondings is connected on silicon substrate 1.Flip chip bonding equipment by automation is connected on led chip 3 flip chip bondings one by one on the silicon chip upper surface, the flip chip bonding process is actual to be metal salient point 4 with the bonding process of the metal pad of the P electrode of led chip 3 and N electrode, can adopt the mode of Reflow Soldering or decide technology with adding hyperacoustic nation after the heating.
Step S9: form lens 11.The making of lens can be to form by mold, also can be to utilize the surface tension of glue itself directly to form by a glue mode.If the making blue-ray LED, then do not need to carry out fluorescent powder coated, directly make lens at silicon chip surface.If the making white light LEDs can have three kinds of modes to add fluorescent material.First kind is that fluorescent powder grain is evenly mixed with casting glue, makes lens at silicon chip surface with mold or some glue then.The second way is earlier to carry out the coating of fluorescent material on the led chip surface, and method is that fluorescent powder grain is sneaked into earlier and made gluey fluorescent material in the glue, applies then, and application pattern can be spraying, brush or drip mode such as glue; Form lens at silicon chip surface with mold or some glue separately with transparent casting glue again.The third mode is to stick the fluorescent material solid thin-sheet of having made earlier on the led chip surface, and then forms lens at silicon chip surface with mold or some glue with transparent casting glue.
After finishing above step, simple grain crystal grain is taken off from the medium disk, promptly is a LED encapsulating products that can direct appliedly be integrated with functional circuit.
Embodiment 1:
Below be described in detail in the method for integrated static protective circuit on the silicon substrate 1.
Specifically in above-mentioned steps S2, realize.On silicon substrate 1, form electrostatic discharge protective circuit 2 and metal electrode layer 6.The vertical view of concrete electrostatic discharge protective circuit and equivalent circuit diagram see also Figure 12, and this circuit is in parallel with two electrodes of led chip.Its manufacturing process is: selection has the silicon substrate 1 of the P type doping of certain resistivity, carry out thermal oxidation technology earlier on the surface and form oxide layer 5, leave the window that needs doping position by photoetching corrosion then, utilize ion injection or diffusion technology to form N type heavily doped region 2 at the window's position, the doping content and the degree of depth are according to required PN junction reverse breakdown voltage decision; Carry out a thermal oxidation again at silicon chip surface when mixing, also cover layer of oxide layer at N type doped region 2; Leave contact hole 13 by lithography corrosion process at N type doped region then, leave behind the contact hole and carry out metal level 6 depositions on the surface, then utilize lithography corrosion process to form the wiring layer 6 of electrode metal line with evaporation or sputtering technology.
Embodiment 2:
Below be described in detail in the method for integrated another kind of electrostatic discharge protective circuit on the silicon substrate 1.
Specifically in above-mentioned steps S2, realize.On silicon substrate 1, form electrostatic discharge protective circuit 2 and metal electrode layer 6.The vertical view of concrete electrostatic discharge protective circuit and equivalent circuit diagram see also Figure 13, and this circuit is in parallel with two electrodes of led chip.Selection has the silicon substrate 1 of the N type doping of certain resistivity, carry out thermal oxidation technology earlier on the surface and form oxide layer 5, leave the window that needs doping position by photoetching corrosion then, utilize ion injection or diffusion technology to form P type heavily doped region 2 at the window's position, the doping content and the degree of depth are according to required PN junction reverse breakdown voltage decision; Carry out a thermal oxidation again at silicon chip surface when mixing, also cover layer of oxide layer at P type doped region 2; Leave contact hole 13 by lithography corrosion process at P type doped region then, leave behind the contact hole and carry out metal level 6 depositions on the surface, then utilize lithography corrosion process to form the wiring layer 6 of electrode metal line with evaporation or sputtering technology.
Because the peripheral function circuit kind of LED is more, and also of all kinds with a kind of mode of circuit realization, no longer exemplify at this.
With respect to prior art, the utility model adopts one deck silicon as base plate for packaging, and the heat that led chip is produced directly derives by silicon, and thermal resistance is smaller.Adopt flip chip bonding technology that LED directly is connected on the silicon substrate by metal salient point, dispel the heat by sapphire, have better radiating effect with respect to the forward LED product.Do not have a gold thread in the whole encapsulating structure, reduced because gold thread connects the integrity problem that lost efficacy and cause.The utility model is directly at the surperficial flip LED chips of silicon substrate; silicon chip surface does not dig dark groove; therefore can be directly at the peripheral function circuit of the surperficial integrated LED of silicon substrate; as anti-static protective circuit, LED constant-current drive circuit etc.; realized the Highgrade integration of LED encapsulating structure; the LED device volume is reduced, and cost reduces, and job stability improves.Silicon chip surface does not have groove, can easily carry out arranging of led chip at the silicon chip upper surface, can realize easily that multi-chip modules connects and encapsulation.This method for packing has been realized the big production encapsulation of wafer scale, makes packaging cost reduce.In addition, the lower surface at silicon substrate is provided with the heat-conducting metal pad in addition, has realized thermoelectric separation, can satisfy the heat radiation requirement of high-powered LED lamp, improves the reliability of its performance.
The utility model is not limited to above-mentioned execution mode, if various changes of the present utility model or distortion are not broken away from spirit and scope of the present utility model, if these changes and distortion belong within claim of the present utility model and the equivalent technologies scope, then the utility model also is intended to comprise these changes and distortion.

Claims (3)

1. a silicon substrate is integrated with the LED surface mounting structure of functional circuit, it is characterized in that: comprise silicon substrate and led chip, the upper surface of described silicon substrate is a planar structure, no groove, one oxide layer covers the upper surface of silicon substrate, be arranged on the upper surface and the mutually insulated of this oxide layer respectively in order to two metal electrode layers that connect positive and negative electrode, the upper surface of described metal electrode layer is respectively arranged with metal salient point, the led chip upside-down mounting is on this silicon substrate, the both positive and negative polarity of led chip is connected with two metal salient points respectively, thereby is electrically connected with metal electrode layer; Lower surface at described silicon substrate is respectively arranged with two conducting metal pads, described conducting metal pad is electrically connected by the metal lead wire that is arranged on the silicon substrate sidewall with the metal electrode layer of silicon substrate upper surface, and a heat-conducting metal pad is arranged on the lower surface of silicon substrate corresponding under the led chip; The upper surface of described silicon substrate is integrated with the required peripheral function circuit of LED, and it realizes being electrically connected with metal electrode layer by the contact hole that runs through oxide layer.
2. silicon substrate according to claim 1 is integrated with the LED surface mounting structure of functional circuit, it is characterized in that: also comprise the colloid lens, the upper surface that it is arranged on silicon substrate forms a confined air chien shih led chip and interior metal line thereof and is isolated from the outside.
3. silicon substrate according to claim 1 is integrated with the LED surface mounting structure of functional circuit, it is characterized in that: described peripheral function circuit is a kind of circuit in electrostatic discharge protective circuit, power driving circuit, rectification circuit, light adjusting circuit, the load monitoring diagnostic circuit or the combination of multiple circuit.
CN 201020279941 2010-07-30 2010-07-30 LED (light emitting diode) surface-mounting package structure based on silicon substrate integrated with functional circuit Expired - Lifetime CN201904368U (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958389A (en) * 2010-07-30 2011-01-26 晶科电子(广州)有限公司 LED surface mounting structure for silicon substrate integrated with functional circuits and packaging method thereof
CN104953007A (en) * 2014-03-26 2015-09-30 贺喜能源股份有限公司 Light-emitting diode with silicon base and light-emitting diode lamp
CN106299072A (en) * 2016-09-30 2017-01-04 映瑞光电科技(上海)有限公司 Light-emitting diode chip for backlight unit
CN106972095A (en) * 2017-05-26 2017-07-21 厦门市东太耀光电子有限公司 A kind of LED wafer structure
CN111863833A (en) * 2019-04-30 2020-10-30 云谷(固安)科技有限公司 Driving backboard structure, display panel and manufacturing method of driving backboard structure
CN116053261A (en) * 2023-01-28 2023-05-02 微龛(广州)半导体有限公司 High-precision thin film resistor device and preparation method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101958389A (en) * 2010-07-30 2011-01-26 晶科电子(广州)有限公司 LED surface mounting structure for silicon substrate integrated with functional circuits and packaging method thereof
CN104953007A (en) * 2014-03-26 2015-09-30 贺喜能源股份有限公司 Light-emitting diode with silicon base and light-emitting diode lamp
CN106299072A (en) * 2016-09-30 2017-01-04 映瑞光电科技(上海)有限公司 Light-emitting diode chip for backlight unit
US10490701B2 (en) 2016-09-30 2019-11-26 Enraytek Optoelectronics Co., Ltd. Light emitting diode chip
CN106972095A (en) * 2017-05-26 2017-07-21 厦门市东太耀光电子有限公司 A kind of LED wafer structure
CN111863833A (en) * 2019-04-30 2020-10-30 云谷(固安)科技有限公司 Driving backboard structure, display panel and manufacturing method of driving backboard structure
CN111863833B (en) * 2019-04-30 2024-03-29 成都辰显光电有限公司 Driving back plate structure, display panel and manufacturing method of driving back plate structure
CN116053261A (en) * 2023-01-28 2023-05-02 微龛(广州)半导体有限公司 High-precision thin film resistor device and preparation method thereof

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