WO2010076966A3 - 메모리 컨트롤러 및 메모리 관리 방법 - Google Patents

메모리 컨트롤러 및 메모리 관리 방법 Download PDF

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Publication number
WO2010076966A3
WO2010076966A3 PCT/KR2009/006426 KR2009006426W WO2010076966A3 WO 2010076966 A3 WO2010076966 A3 WO 2010076966A3 KR 2009006426 W KR2009006426 W KR 2009006426W WO 2010076966 A3 WO2010076966 A3 WO 2010076966A3
Authority
WO
WIPO (PCT)
Prior art keywords
memory
management method
ecc
code
memory controller
Prior art date
Application number
PCT/KR2009/006426
Other languages
English (en)
French (fr)
Other versions
WO2010076966A2 (ko
Inventor
안병영
정현모
Original Assignee
(주)인디링스
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by (주)인디링스 filed Critical (주)인디링스
Priority to EP09836287A priority Critical patent/EP2383750A4/en
Priority to US13/142,605 priority patent/US8738987B2/en
Priority to JP2011544355A priority patent/JP2012514266A/ja
Priority to CN2009801534658A priority patent/CN102272855A/zh
Publication of WO2010076966A2 publication Critical patent/WO2010076966A2/ko
Publication of WO2010076966A3 publication Critical patent/WO2010076966A3/ko

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/38—Response verification devices
    • G11C29/42—Response verification devices using error correcting codes [ECC] or parity check
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1048—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using arrangements adapted for a specific error detection or correction feature
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0411—Online error correction

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

데이터의 종류에 따라 선정된(predetermined), 요구(required) 신뢰 수준에 기초하여 상기 데이터에 대한 오류 정정 코드(Error Correction Code: ECC) 정보를 생성하고, 상기 ECC 정보에 기초하여 상기 데이터에 대한 ECC 코드를 연산한 후 상기 ECC 코드를 메모리에 기록하는 메모리 컨트롤러가 개시된다.
PCT/KR2009/006426 2008-12-30 2009-11-03 메모리 컨트롤러 및 메모리 관리 방법 WO2010076966A2 (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
EP09836287A EP2383750A4 (en) 2008-12-30 2009-11-03 MEMORY CONTROLLER AND MEMORY MANAGEMENT PROCESS
US13/142,605 US8738987B2 (en) 2008-12-30 2009-11-03 Memory controller and memory management method
JP2011544355A JP2012514266A (ja) 2008-12-30 2009-11-03 メモリコントローラおよびメモリ管理方法
CN2009801534658A CN102272855A (zh) 2008-12-30 2009-11-03 存储器控制器及存储器管理方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2008-0136866 2008-12-30
KR1020080136866A KR101042197B1 (ko) 2008-12-30 2008-12-30 메모리 컨트롤러 및 메모리 관리 방법

Publications (2)

Publication Number Publication Date
WO2010076966A2 WO2010076966A2 (ko) 2010-07-08
WO2010076966A3 true WO2010076966A3 (ko) 2010-08-19

Family

ID=42310300

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2009/006426 WO2010076966A2 (ko) 2008-12-30 2009-11-03 메모리 컨트롤러 및 메모리 관리 방법

Country Status (6)

Country Link
US (1) US8738987B2 (ko)
EP (1) EP2383750A4 (ko)
JP (1) JP2012514266A (ko)
KR (1) KR101042197B1 (ko)
CN (1) CN102272855A (ko)
WO (1) WO2010076966A2 (ko)

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JP5217570B2 (ja) * 2008-03-31 2013-06-19 日本電気株式会社 メモリ装置及びメモリ制御方法
US8301980B2 (en) * 2009-09-28 2012-10-30 Nvidia Corporation Error detection and correction for external DRAM
US8190974B2 (en) * 2009-09-28 2012-05-29 Nvidia Corporation Error detection and correction for external DRAM
JP2012084127A (ja) * 2010-09-15 2012-04-26 Toshiba Corp 半導体装置
CN103197985B (zh) * 2011-11-08 2018-07-13 索尼公司 存储控制装置
JP2013101455A (ja) * 2011-11-08 2013-05-23 Sony Corp 記憶制御装置、記憶装置、情報処理システム、および、それらにおける処理方法
US9164832B2 (en) * 2013-02-27 2015-10-20 Seagate Technology Llc ECC management for variable resistance memory cells
JP6092673B2 (ja) * 2013-03-21 2017-03-08 スタンレー電気株式会社 メモリ制御装置、メモリ制御方法
CN104182292A (zh) * 2013-05-21 2014-12-03 华为技术有限公司 一种数据存储方法及装置
CN104346234B (zh) * 2013-08-09 2017-09-26 华为技术有限公司 一种内存访问的方法、设备及系统
JP6107625B2 (ja) * 2013-12-02 2017-04-05 ソニー株式会社 記憶制御装置、記憶装置、情報処理システムおよびその記憶制御方法
US9954557B2 (en) * 2014-04-30 2018-04-24 Microsoft Technology Licensing, Llc Variable width error correction
US10437479B2 (en) * 2014-08-19 2019-10-08 Samsung Electronics Co., Ltd. Unified addressing and hierarchical heterogeneous storage and memory
US10002043B2 (en) * 2014-08-19 2018-06-19 Samsung Electronics Co., Ltd. Memory devices and modules
US10002044B2 (en) 2014-08-19 2018-06-19 Samsung Electronics Co., Ltd. Memory devices and modules
US10282100B2 (en) 2014-08-19 2019-05-07 Samsung Electronics Co., Ltd. Data management scheme in virtualized hyperscale environments
US20160055058A1 (en) * 2014-08-19 2016-02-25 Hongzhong Zheng Memory system architecture
US9594623B2 (en) * 2015-03-24 2017-03-14 Nxp Usa, Inc. System on chip and method of updating program code on a system on chip
US9916091B2 (en) 2015-07-13 2018-03-13 Samsung Electronics Co., Ltd. Memory system architecture
KR20180051706A (ko) 2016-11-07 2018-05-17 삼성전자주식회사 어드레스 맵핑 테이블의 에러 정정을 수행하는 메모리 시스템
US10261876B2 (en) * 2016-11-08 2019-04-16 Micron Technology, Inc. Memory management
FR3077655A1 (fr) * 2018-02-05 2019-08-09 Proton World International N.V. Gestion d'une memoire non volatile
KR102398540B1 (ko) * 2018-02-19 2022-05-17 에스케이하이닉스 주식회사 메모리 장치, 반도체 장치 및 반도체 시스템
JP7177338B2 (ja) * 2018-09-06 2022-11-24 富士通株式会社 メモリコントローラ装置、メモリコントローラ装置を有するメモリ装置及びメモリコントロール方法
US11132253B2 (en) 2018-12-06 2021-09-28 Micron Technology, Inc. Direct-input redundancy scheme with dedicated error correction code circuit
KR20230019573A (ko) 2021-08-02 2023-02-09 에스케이하이닉스 주식회사 컨트롤러 및 컨트롤러의 동작 방법

Citations (5)

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US5559956A (en) * 1992-01-10 1996-09-24 Kabushiki Kaisha Toshiba Storage system with a flash memory module
US20040156251A1 (en) * 2003-02-07 2004-08-12 Renesas Technology Corp. Nonvolatile memory system
JP2005078431A (ja) * 2003-09-01 2005-03-24 Toshiba Corp 半導体装置
EP1548602A1 (en) * 2002-10-02 2005-06-29 Matsushita Electric Industrial Co., Ltd. Non-volatile storage device control method
JP2007207376A (ja) * 2006-02-03 2007-08-16 Matsushita Electric Ind Co Ltd 不揮発性記憶装置およびメモリコントローラ

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US5559956A (en) * 1992-01-10 1996-09-24 Kabushiki Kaisha Toshiba Storage system with a flash memory module
EP1548602A1 (en) * 2002-10-02 2005-06-29 Matsushita Electric Industrial Co., Ltd. Non-volatile storage device control method
US20040156251A1 (en) * 2003-02-07 2004-08-12 Renesas Technology Corp. Nonvolatile memory system
JP2005078431A (ja) * 2003-09-01 2005-03-24 Toshiba Corp 半導体装置
JP2007207376A (ja) * 2006-02-03 2007-08-16 Matsushita Electric Ind Co Ltd 不揮発性記憶装置およびメモリコントローラ

Also Published As

Publication number Publication date
US8738987B2 (en) 2014-05-27
KR20100078568A (ko) 2010-07-08
US20110271164A1 (en) 2011-11-03
WO2010076966A2 (ko) 2010-07-08
CN102272855A (zh) 2011-12-07
EP2383750A4 (en) 2012-07-04
EP2383750A2 (en) 2011-11-02
KR101042197B1 (ko) 2011-06-20
JP2012514266A (ja) 2012-06-21

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