WO2010072555A1 - Elektrisches oder elektronisches verbundbauteil sowie verfahren zum herstellen eines elektrischen oder elektronischen verbundbauteils - Google Patents
Elektrisches oder elektronisches verbundbauteil sowie verfahren zum herstellen eines elektrischen oder elektronischen verbundbauteils Download PDFInfo
- Publication number
- WO2010072555A1 WO2010072555A1 PCT/EP2009/066518 EP2009066518W WO2010072555A1 WO 2010072555 A1 WO2010072555 A1 WO 2010072555A1 EP 2009066518 W EP2009066518 W EP 2009066518W WO 2010072555 A1 WO2010072555 A1 WO 2010072555A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- sintered
- joining partner
- joining
- molded part
- composite component
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29075—Plural core members
- H01L2224/2908—Plural core members being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13062—Junction field-effect transistor [JFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
Definitions
- the invention relates to an electrical or electronic composite component according to the preamble of claim 1 and to a method for producing an electrical or electronic composite component according to claim 8.
- NTV Low Temperature Connection Technology
- the sintering of silver metal nanoparticles offers the option to perform the sintering process with significantly less pressure from a pressure range between about 10OkPa and 5MPa.
- oxygen and a process temperature of about 280 ° C. are also required for sintering nanoparticles.
- the known silver metal nanoparticle paste formulation contains an even higher organic content, such as solvents and / or binders, than silver metal flake-based paste formulations.
- sintering paste is applied directly to the first and / or the second joining partner, whereupon the joining partners are pressed against one another under the influence of temperature.
- the invention is based on the object, an electronic or electrical
- Composite component and to propose a manufacturing method for such a composite component in which cracking during joining can be avoided.
- the composite component should be inexpensive to produce and reliable at thermal cycling.
- the invention is based on the idea not to connect at least two joining partners as in the prior art directly by means of sintering paste, i. but to fix the joining partners firmly, dispensing with sintering paste with a previously prepared sintered molding with a continuous open porosity.
- the thickness extension of the sintered shaped part (sintered foil) used in the stacking direction of the joining partners is preferably between about 10 ⁇ m and about 300 ⁇ m or more.
- Such a sintered molded part has the advantage of already integrated and in the subsequent joining process with the joining partners of stable gas ducts for the ventilation, which, for example, by soldering, welding or gluing forming joint.
- a porous sintered molded part as an insert or insert has a positive effect on the joining process for joining the joining partners with the sintered molded part, especially when large-area joining partners, such as silicon power semiconductors and circuit carriers or circuit substrate and heat sinks are connected to the sintered molded part. It is also possible to connect punched grid over a sintered molded part.
- Another advantage of the use of a sintered molded part is that the freedom in the design of the joint can be extended, since the sintered molded part can have a larger area than at least one of the joining partners, preferably as both joining partners, and / or the joining partners much further apart can be, than at the
- the invention can be used in a variety of electrical and / or electronic
- power electronic modules which are required, for example, for many forms of energy conversion, in particular mechanically / electrically (generator, rectifier), electrical / electrical (converter, AC / AC, DC / DC) and also electrical / mechanical ( electric drives, change direction).
- suitably designed power electronic modules for the rectifier be used in a motor vehicle generator, for controlling electric drives, for DC / DC converters, for a pulse change direction, for hybrid / FC / E drives and for photovoltaic inverters, etc.
- individual Components with higher power losses, in particular on the lead frames of discrete packages, are joined according to the invention, which then, for example, in the case of the absence of lead, can be used as completely lead-free solutions in printed circuit board technology.
- the implementation of the invention is particularly preferred in constructions with semiconductor laser diodes or in MEMs and sensors, in particular for high-temperature applications. Further application examples are semiconductor light-emitting diodes and high-frequency semiconductors for radar applications.
- Sintered molded parts made of silver metal or silver metal are advantageous in view of the high electrical and thermal conductivity.
- silver is suitable for realizing a continuous, gas channel forming, porosity.
- the first and / or the second joining partner is / are sintered with the sintered part without additional sintering paste.
- the sintered molded part enters into a binding to the at least one joining partner, i. becomes sinterable.
- solder at least one joining partner preferably both joining partners
- solder paste solder powder or a solder preform (in general: brazing material).
- the solder material passes through the effect of temperature in a liquid phase and connects the sintered molded part with the at least one joining partner.
- the solder material is lead-free solder paste,
- lead-containing solder pastes especially standard solder pastes to see. Due to its porous structure, the sintered part used is ideal for entering into a robust solder joint.
- the "buffering" effect of the sintered molded article significantly reduces the effect of thermo-mechanical stresses which destroy the pure solder material, in particular during later use of the electrical or electronic composite component Joining partners as well as on the then serving as a depot sintered molding, in particular imprinted or dispenst, or alternatively only on both sides of the sintered molding, or alternatively only on one side of the sintered molding and on only one joining partner It is also possible, in a solder paste printing process upstream of the actual soldering process, to apply a solder deposit to the subsequent joints for the placement of SMD components and subsequent reflow soldering n. In this case, only one more flux is needed at these locations.
- the porous structure of the sintered molding brings with it sufficient opportunities for the degassing of the flux system with it.
- Another way of connecting at least one joining partner with the sintered molded part is to glue the joining partner with the sintered molded part, in particular by Leitkleben.
- more preferably silver-containing (filled with silver) adhesives are used, which find an ideal connection surface in the sintered molded part.
- the surface of the preferably silver-containing or consisting of silver sintered molding can be optimally in a welding process with at least one joining partner, preferably with two joining partners connect.
- the first joining partner is very particularly preferably an electronic component, preferably a semiconductor component, very particularly preferably a power semiconductor, which can be connected via a sintered molded part to the second joining part, in particular a circuit carrier (printed circuit board).
- first joining partner designed as a circuit carrier via a sintered shaped part to a second joining partner, preferably a second base plate, preferably a copper base plate.
- a second joining partner preferably a second base plate, preferably a copper base plate.
- the copper base plate serves as a heat sink or is with a as
- Heat sink serving heatsink connected It is also possible to connect the heat sink (first joining partner) to the base plate (second joining partner) via a sintered shaped part. Furthermore, it is possible to connect via a sintered molded part at least one bonding wire or at least one bonding ribbon to a further joining partner, in particular an electronic component, preferably a semiconductor component, in particular a power semiconductor component or a circuit carrier (electrical component), i. to contact.
- the sintered molded part increases reliability.
- the first joining partner to be, for example, an electrical component, in particular a stamped grid, which can be connected via a sintered shaped part to a second joining partner, in particular a circuit carrier, more precisely a metal of the circuit carrier.
- sintered components is not limited to composite components with only two
- Joining partners limited.
- a sandwich-like structure comprising three or more joining partners can be produced, wherein the joining partners and the sintered shaped parts are preferably stacked in a stacking direction.
- one of a Semiconductor formed second joining partner on both sides via a respective sintered molded part with a first or a second joining partner forming circuit carrier are connected so that the power semiconductor is sandwiched between the circuit carriers, and wherein in each case between a circuit carrier and the power semiconductor is a sintered molded part.
- the sandwich construction does not necessarily have to be realized in one process step, but can also be produced, for example, in two or more stages.
- the invention also leads to a method for producing an electrical or electronic composite component, preferably a composite component designed as described above.
- the core of the method is to connect at least two joining partners with an open porous sintered part (sintered film), preferably by direct sintering without sintering paste, by soldering by means of a solder material, in particular lead-free solder material, preferably with solder paste, by gluing, in particular Leitkleben preferably using a silver-containing adhesive or alternatively by welding, in particular friction welding, ultrasonic welding or resistance welding.
- the advantage of the method according to the invention is that gases escape during the bonding process with the joining partners as a result of the continuously open-porous structure of the sintered molded part and, if required, gases, such as oxygen, can be passed to the joints, so that cracking is avoided.
- gases such as oxygen
- 1 is a power electronic composite component (here power electronic module / module),
- FIG. 2 is a fragmentary view of a sintered molded part for interconnecting two joining partners
- 3 schematically shows a manufacturing process for producing an electrical or electronic composite component, comprising two joining partners
- FIG. 4 shows a schematic representation of a production process for producing an electrical or electronic composite component with three joining partners and two sintered shaped parts.
- the 1 shows an electronic composite component 1. This comprises a first joining partner 2, a second joining partner 3 and a third joining partner 4.
- the first joining partner 2 is a power semiconductor component, here an IGB transistor
- the second joining partner 3 is a circuit carrier
- the third joining partner 4 is a base plate made of copper.
- the base plate made of copper is in turn fixed to a heat sink 5 (heat sink).
- a sintered shaped part 6 is arranged with a thickness extension of about 50 microns in a stacking direction S.
- the first joint partner 2 and the second joint partner 3 are fixed on two opposite sides of the sintered molded part 6 respectively by soldering by means of solder paste (alternatively, for example, solder powder or solder preform).
- the sintered shaped part 6 is formed of silver sintered material.
- the second joining partner 3 is in turn connected via a further sintered shaped part 7, which is identical to the sintered shaped part 6, with the third joining partner 4, wherein also the third joining partner 4 and the second joining partner 3 are respectively fixedly connected to the further sintered shaped part 7 by soldering , Alternatively, a mutually different shape of the sintered moldings 6, 7 is possible.
- the third joining partner 4 is soldered directly to the heat sink 5.
- Alternatively may be provided between the third joining partner 4 and the heat sink 5 and a sintered molded part, with which the third joining partner 4 and the heat sink 5, for example are determined by direct sintering without sintering paste, by soldering, gluing or welding.
- a plastic housing 8 is fixed to the third joining partner 4 formed by the base plate, which encloses the stack arrangement comprising the first and the second joining partners 2, 3 as well as the sintered shaped part 6.
- the so-called stacked arrangement is surrounded by an elastic protective compound 9.
- connecting wires 10, 11 are guided up to the outside of the housing 8, which are fixed via the sintered shaped part 6 to the second joining partner 3 (circuit carrier), contacting it.
- Fig. 2 shows the structure of a sintered compact 6, which is made of silver metal flakes. Evident is the continuous open porosity. This forms gas passageways, through which gases can flow away from the joints to the outside or to the joints. The gases preferably emerge laterally, ie transversely to the stacking direction S (see FIG. 1), out of the pores or the gas channels formed by them, as a result of which crack formation, in particular during a possible soldering process, is avoided.
- FIG. 3 shows a highly schematic representation of the manufacturing process for producing an electrical or electronic composite component 1 shown on the right in the drawing plane.
- the latter comprises a first in the drawing plane upper joint partner 2 and a second in the plane of the drawing lower joining partner 3, which receive a sintered molded part 6 sandwiched between them.
- the first joining partner 2 is, for example, a chip and the second joining partner 3 is a circuit carrier.
- the first joining partner 2 is a circuit carrier and the second joining partner 3 is a base plate, in particular made of copper, and / or a heat sink (heat sink). Further combinations of the first and second joining partners 2, 3 resulting from the arrival claims are alternatively feasible.
- a solder material 12 in particular solder paste or a solder preform, was first applied as a depot to both surface sides of the sintered shaped part 6.
- a flux application preferably follows at the joints. After stacking in the stacking direction S, the joining partners 2, 3, the sintered shaped part 6 and the brazing material 12 are fed to a joining process 13, here a brazing process.
- the gas Exchange for brazing the brazing material 12 may take place over the entire porous volume of the sintered compact 6.
- the second joining partner 3 may be a circuit carrier, in particular the metal of a circuit carrier, typically copper or a copper alloy, and the first joining partner 2 may be a stamped grid, typically copper or a copper alloy.
- Adhesive 14, in particular silver-containing adhesive 14, can for example be printed or dispensed onto the second joining partner 3.
- the sintered molded part 6 can already bring an adhesive depot on the opposite side for the first joining partner 2 (stamped grid) with it.
- the adhesive 14 is applied in a downstream process, such as dispensing, as an adhesive depot.
- the first joining partner 2 is placed on the adhesive 14 and exposed to a curing process, preferably under temperature and / or pressure.
- the adhesive 14 or its constituents can / can outgas through the porous structure of the sintered molding.
- the joining partners 2, 3 with the sintered molded part 6 by welding.
- the welding process may, but not necessarily, be carried out by means of an auxiliary material 15.
- the auxiliary material depots according to FIG. 3 are not necessary.
- FIG. 4 shows in the plane of the drawing on the right a multipart electrical or electronic composite component 1.
- This comprises a total of three joining partners 2, 3, 4, wherein between two joining partners 2, 3; 3, 4 a sintered molded part 6, 7 is arranged.
- the first and third joining partners 2, 4 may be a circuit carrier and the central one, i. inner joining partner 3 act for a power semiconductor.
- the sandwich structure does not necessarily have to be joined in a common joining process, but also a two-stage sequential process management can be realized, for example, first the first joining partner 2, the sintered shaped part 6, the second joining partner 3 and then subsequently the third joining partner 4, or alternatively next to the third joining partner 4, the further sintered shaped part 7, the second joining partner 3 and then downstream of the first joining partner. 2
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Powder Metallurgy (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011542749A JP5602763B2 (ja) | 2008-12-23 | 2009-12-07 | 電気複合構成部材または電子複合構成部材、および、電気複合構成部材または電子複合構成部材の製造方法 |
EP09764842A EP2382659A1 (de) | 2008-12-23 | 2009-12-07 | Elektrisches oder elektronisches verbundbauteil sowie verfahren zum herstellen eines elektrischen oder elektronischen verbundbauteils |
AU2009331707A AU2009331707A1 (en) | 2008-12-23 | 2009-12-07 | Electrical or electronic composite component and method for producing an electrical or electronic composite component |
CN2009801522006A CN102265393A (zh) | 2008-12-23 | 2009-12-07 | 电气的或者电子的复合构件以及用于制造该复合构件的方法 |
US13/141,947 US20110304985A1 (en) | 2008-12-23 | 2009-12-07 | Electrical or electronic composite component and method for producing an electrical or electronic composite component |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102008055134A DE102008055134A1 (de) | 2008-12-23 | 2008-12-23 | Elektrisches oder elektronisches Verbundbauteil sowie Verfahren zum Herstellen eines elektrischen oder elektronischen Verbundbauteils |
DE102008055134.1 | 2008-12-23 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2010072555A1 true WO2010072555A1 (de) | 2010-07-01 |
Family
ID=41467197
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/EP2009/066518 WO2010072555A1 (de) | 2008-12-23 | 2009-12-07 | Elektrisches oder elektronisches verbundbauteil sowie verfahren zum herstellen eines elektrischen oder elektronischen verbundbauteils |
Country Status (7)
Country | Link |
---|---|
US (1) | US20110304985A1 (de) |
EP (1) | EP2382659A1 (de) |
JP (1) | JP5602763B2 (de) |
CN (1) | CN102265393A (de) |
AU (1) | AU2009331707A1 (de) |
DE (1) | DE102008055134A1 (de) |
WO (1) | WO2010072555A1 (de) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140234649A1 (en) * | 2011-09-30 | 2014-08-21 | Robert Bosch Gmbh | Layered composite of a substrate film and of a layer assembly comprising a sinterable layer made of at least one metal powder and a solder layer |
WO2016193038A1 (de) * | 2015-06-01 | 2016-12-08 | Siemens Aktiengesellschaft | Verfahren zur elektrischen kontaktierung eines bauteils mittels galvanischer anbindung eines offenporigen kontaktstücks und entsprechendes bauteilmodul |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011083931A1 (de) * | 2011-09-30 | 2013-04-04 | Robert Bosch Gmbh | Schichtverbund aus einem elektronischen Substrat und einer Schichtanordnung umfassend ein Reaktionslot |
CN204991692U (zh) * | 2014-11-26 | 2016-01-20 | 意法半导体股份有限公司 | 具有引线键合和烧结区域的电子器件 |
JP6287789B2 (ja) * | 2014-12-03 | 2018-03-07 | 三菱電機株式会社 | パワーモジュール及びその製造方法 |
DE102015113421B4 (de) * | 2015-08-14 | 2019-02-21 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen von Halbleiterchips |
US9655280B1 (en) * | 2015-12-31 | 2017-05-16 | Lockheed Martin Corporation | Multi-directional force generating line-replaceable unit chassis by means of a linear spring |
CN110447094B (zh) | 2017-03-30 | 2023-12-12 | 三菱电机株式会社 | 半导体装置及其制造方法、及电力变换装置 |
DE102017206930A1 (de) * | 2017-04-25 | 2018-10-25 | Siemens Aktiengesellschaft | Lotformteil zum Diffusionslöten, Verfahren zu dessen Herstellung und Verfahren zu dessen Montage |
DE102017217537B4 (de) | 2017-10-02 | 2021-10-21 | Danfoss Silicon Power Gmbh | Leistungsmodul mit integrierter Kühleinrichtung |
US20220415747A1 (en) * | 2019-12-26 | 2022-12-29 | Mitsubishi Electric Corporation | Power module and power conversion device |
DE102020102876B4 (de) | 2020-02-05 | 2023-08-10 | Infineon Technologies Ag | Elektronisches Bauelement, Herstellungsverfahren dafür und Verfahren zur Herstellung eines elektronischen Moduls dieses aufweisend mittels eines Sinterverfahrens mit einer Opferschicht auf der Rückseitenmetallisierung eines Halbleiterdies |
EP4283662A1 (de) * | 2022-05-23 | 2023-11-29 | Hitachi Energy Switzerland AG | Verfahren zum befestigen eines anschlusses an einer metallsubstratstruktur für ein halbleiterleistungsmodul und halbleiterleistungsmodul |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0242626A2 (de) * | 1986-04-22 | 1987-10-28 | Siemens Aktiengesellschaft | Verfahren zur Befestigung von elektronischen Bauelementen auf einem Substrat |
US4965659A (en) * | 1987-06-30 | 1990-10-23 | Sumitomo Electric Industries, Ltd. | Member for a semiconductor structure |
DE4315272A1 (de) * | 1993-05-07 | 1994-11-10 | Siemens Ag | Leistungshalbleiterbauelement mit Pufferschicht |
US5527627A (en) * | 1993-03-29 | 1996-06-18 | Delco Electronics Corp. | Ink composition for an ultra-thick thick film for thermal management of a hybrid circuit |
US5561321A (en) * | 1992-07-03 | 1996-10-01 | Noritake Co., Ltd. | Ceramic-metal composite structure and process of producing same |
DE10009678C1 (de) * | 2000-02-29 | 2001-07-19 | Siemens Ag | Wärmeleitende Klebstoffverbindung und Verfahren zum Herstellen einer wärmeleitenden Klebstoffverbindung |
EP1737034A1 (de) * | 2004-04-05 | 2006-12-27 | Mitsubishi Materials Corporation | Ai/ain-verbindungsmaterial, basisplatte für ein leistungsmodul, leistungsmodul und prozess zur herstellung eines ai/ain-verbindungsmaterials |
DE102006009159A1 (de) * | 2006-02-21 | 2007-08-23 | Curamik Electronics Gmbh | Verfahren zum Herstellen eines Verbundsubstrates sowie Verbundsubstrat |
US20070261778A1 (en) * | 2004-10-27 | 2007-11-15 | Jurgen Schulz-Harder | Method for the Production of a Metal-Ceramic Substrate or Copper-Ceramic Substrate, and Support to be Used in Said Method |
EP1930943A1 (de) * | 2005-09-28 | 2008-06-11 | Ngk Insulators, Ltd. | Kühlkörpermodul und prozess zu seiner herstellung |
US20080292874A1 (en) * | 2007-05-12 | 2008-11-27 | Semikron Elektronik Gmbh & Co. Kg | Sintered power semiconductor substrate and method of producing the substrate |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CH387809A (de) * | 1961-11-17 | 1965-02-15 | Bbc Brown Boveri & Cie | Lötverbindung an einem Halbleiterelement |
DE3575829D1 (de) | 1985-10-30 | 1990-03-08 | Ibm | Synchronisiertes system fuer mehrere signalprozessoren. |
DE3777995D1 (de) * | 1986-12-22 | 1992-05-07 | Siemens Ag | Verfahren zur befestigung von elektronischen bauelementen auf einem substrat, folie zur durchfuehrung des verfahrens und verfahren zur herstellung der folie. |
DE4040753A1 (de) * | 1990-12-19 | 1992-06-25 | Siemens Ag | Leistungshalbleiterbauelement |
JP3120826B2 (ja) * | 1995-08-09 | 2000-12-25 | 三菱マテリアル株式会社 | パワーモジュール用基板の端子構造 |
DE59611448D1 (de) * | 1995-09-11 | 2007-12-06 | Infineon Technologies Ag | Verfahren zur Befestigung elektronischer Bauelemente auf einem Substrat durch Drucksintern |
US6717819B1 (en) * | 1999-06-01 | 2004-04-06 | Amerasia International Technology, Inc. | Solderable flexible adhesive interposer as for an electronic package, and method for making same |
JP2000349100A (ja) * | 1999-06-04 | 2000-12-15 | Shibafu Engineering Kk | 接合材とその製造方法及び半導体装置 |
JP2004298962A (ja) * | 2003-03-17 | 2004-10-28 | Mitsubishi Materials Corp | はんだ接合材及びこれを用いたパワーモジュール基板 |
KR20070033329A (ko) | 2004-02-18 | 2007-03-26 | 버지니아 테크 인터렉추얼 프라퍼티스, 인크. | 인터커넥트를 위한 나노 크기의 금속 페이스트 및 이의사용 방법 |
JP4770533B2 (ja) * | 2005-05-16 | 2011-09-14 | 富士電機株式会社 | 半導体装置の製造方法および半導体装置 |
DE102005047566C5 (de) * | 2005-10-05 | 2011-06-09 | Semikron Elektronik Gmbh & Co. Kg | Anordnung mit einem Leistungshalbleiterbauelement und mit einem Gehäuse sowie Herstellungsverfahren hierzu |
JP4826426B2 (ja) * | 2006-10-20 | 2011-11-30 | 株式会社デンソー | 半導体装置 |
JP2008153470A (ja) * | 2006-12-18 | 2008-07-03 | Renesas Technology Corp | 半導体装置および半導体装置の製造方法 |
JP2009094385A (ja) * | 2007-10-11 | 2009-04-30 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
-
2008
- 2008-12-23 DE DE102008055134A patent/DE102008055134A1/de not_active Withdrawn
-
2009
- 2009-12-07 US US13/141,947 patent/US20110304985A1/en not_active Abandoned
- 2009-12-07 JP JP2011542749A patent/JP5602763B2/ja not_active Expired - Fee Related
- 2009-12-07 WO PCT/EP2009/066518 patent/WO2010072555A1/de active Application Filing
- 2009-12-07 AU AU2009331707A patent/AU2009331707A1/en not_active Abandoned
- 2009-12-07 EP EP09764842A patent/EP2382659A1/de not_active Withdrawn
- 2009-12-07 CN CN2009801522006A patent/CN102265393A/zh active Pending
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0242626A2 (de) * | 1986-04-22 | 1987-10-28 | Siemens Aktiengesellschaft | Verfahren zur Befestigung von elektronischen Bauelementen auf einem Substrat |
US4965659A (en) * | 1987-06-30 | 1990-10-23 | Sumitomo Electric Industries, Ltd. | Member for a semiconductor structure |
US5561321A (en) * | 1992-07-03 | 1996-10-01 | Noritake Co., Ltd. | Ceramic-metal composite structure and process of producing same |
US5527627A (en) * | 1993-03-29 | 1996-06-18 | Delco Electronics Corp. | Ink composition for an ultra-thick thick film for thermal management of a hybrid circuit |
DE4315272A1 (de) * | 1993-05-07 | 1994-11-10 | Siemens Ag | Leistungshalbleiterbauelement mit Pufferschicht |
DE10009678C1 (de) * | 2000-02-29 | 2001-07-19 | Siemens Ag | Wärmeleitende Klebstoffverbindung und Verfahren zum Herstellen einer wärmeleitenden Klebstoffverbindung |
EP1737034A1 (de) * | 2004-04-05 | 2006-12-27 | Mitsubishi Materials Corporation | Ai/ain-verbindungsmaterial, basisplatte für ein leistungsmodul, leistungsmodul und prozess zur herstellung eines ai/ain-verbindungsmaterials |
US20070261778A1 (en) * | 2004-10-27 | 2007-11-15 | Jurgen Schulz-Harder | Method for the Production of a Metal-Ceramic Substrate or Copper-Ceramic Substrate, and Support to be Used in Said Method |
EP1930943A1 (de) * | 2005-09-28 | 2008-06-11 | Ngk Insulators, Ltd. | Kühlkörpermodul und prozess zu seiner herstellung |
DE102006009159A1 (de) * | 2006-02-21 | 2007-08-23 | Curamik Electronics Gmbh | Verfahren zum Herstellen eines Verbundsubstrates sowie Verbundsubstrat |
US20080292874A1 (en) * | 2007-05-12 | 2008-11-27 | Semikron Elektronik Gmbh & Co. Kg | Sintered power semiconductor substrate and method of producing the substrate |
Non-Patent Citations (1)
Title |
---|
See also references of EP2382659A1 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20140234649A1 (en) * | 2011-09-30 | 2014-08-21 | Robert Bosch Gmbh | Layered composite of a substrate film and of a layer assembly comprising a sinterable layer made of at least one metal powder and a solder layer |
WO2016193038A1 (de) * | 2015-06-01 | 2016-12-08 | Siemens Aktiengesellschaft | Verfahren zur elektrischen kontaktierung eines bauteils mittels galvanischer anbindung eines offenporigen kontaktstücks und entsprechendes bauteilmodul |
US11037862B2 (en) | 2015-06-01 | 2021-06-15 | Siemens Aktiengesellschaft | Method for electrically contacting a component by galvanic connection of an open-pored contact piece, and corresponding component module |
Also Published As
Publication number | Publication date |
---|---|
DE102008055134A1 (de) | 2010-07-01 |
JP2012513682A (ja) | 2012-06-14 |
US20110304985A1 (en) | 2011-12-15 |
AU2009331707A1 (en) | 2010-07-01 |
CN102265393A (zh) | 2011-11-30 |
EP2382659A1 (de) | 2011-11-02 |
JP5602763B2 (ja) | 2014-10-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2010072555A1 (de) | Elektrisches oder elektronisches verbundbauteil sowie verfahren zum herstellen eines elektrischen oder elektronischen verbundbauteils | |
DE102010044709B4 (de) | Leistungshalbleitermodul mit Metallsinterverbindungen sowie Herstellungsverfahren | |
DE102009029577B3 (de) | Verfahren zur Herstellung eines hochtemperaturfesten Leistungshalbleitermoduls | |
EP2387477B1 (de) | Verfahren zum herstellen einer sinterverbindung | |
DE102009000587B4 (de) | Verfahren zur Herstellung eines Moduls mit einer gesinterten Verbindung zwischen einem Halbleiterchip und einer Kupferoberfläche | |
EP2743973A2 (de) | Verfahren zur Kontaktierung eines Halbleiterelements mittels Schweißens eines Kontaktelements an eine Sinterschicht auf dem Halbleiterelement und Halbleiterbauelement mit erhöhter Stabilität gegenüber thermomechanischen Einflüssen | |
EP2761056B1 (de) | Schichtverbund aus einer trägerfolie und einer schichtanordnung umfassend eine sinterbare schicht aus mindestens einem metallpulver und eine lotschicht | |
DE10238320B4 (de) | Keramische Leiterplatte und Verfahren zu ihrer Herstellung | |
EP3103138B1 (de) | Verfahren zum montieren eines elektrischen bauelements, bei der eine haube zum einsatz kommt | |
DE102014221636B4 (de) | Halbleitermodul und Verfahren zum Herstellen desselben | |
EP1989741B1 (de) | Verfahren zum herstellen von peltier-modulen | |
EP2382660A1 (de) | Elektrisches oder elektronisches verbundbauteil sowie verfahren zum herstellen eines elektrischen oder elektronischen verbundbauteils | |
DE102005047106A1 (de) | Leistungshalbleitermodul | |
EP2721646A1 (de) | Verfahren zum elektrischen verbinden mehrerer solarzellen und photovoltaikmodul | |
DE102016218968A1 (de) | Leistungsmodul und Verfahren zur Herstellung eines Leistungsmoduls | |
DE102009026480A1 (de) | Modul mit einer gesinterten Fügestelle | |
DE102009018541A1 (de) | Kontaktierungsmittel und Verfahren zur Kontaktierung elektrischer Bauteile | |
DE102017004626A1 (de) | Bleifreie Lötfolie zum Diffusionslöten | |
DE102015118664A1 (de) | Verfahren zur herstellung eines leistungshalbleitermoduls | |
DE102007036045A1 (de) | Elektronischer Baustein mit zumindest einem Bauelement, insbesondere einem Halbleiterbauelement, und Verfahren zu dessen Herstellung | |
EP2928630A1 (de) | Verfahren zum verbinden von wenigstens zwei komponenten unter verwendung eines sinterprozesses | |
DE102011083899A1 (de) | Schichtverbund zum Verbinden von elektronischen Bauteilen umfassend eine Ausgleichsschicht, Anbindungsschichten und Verbindungsschichten | |
DE102006011743A1 (de) | Verfahren zum Herstellen von Peltier-Modulen sowie Peltier-Modul | |
DE102018115509A1 (de) | Wärmedissipationsvorrichtung, Halbleiterpackagingsystem und Verfahren zum Herstellen derselben | |
EP2382654A1 (de) | Hochtemperaturbeständige lötmittelfreie bauelementstruktur und verfahren zum elektrischen kontaktieren |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200980152200.6 Country of ref document: CN |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 09764842 Country of ref document: EP Kind code of ref document: A1 |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009764842 Country of ref document: EP |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009331707 Country of ref document: AU |
|
ENP | Entry into the national phase |
Ref document number: 2009331707 Country of ref document: AU Date of ref document: 20091207 Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 3996/CHENP/2011 Country of ref document: IN |
|
ENP | Entry into the national phase |
Ref document number: 2011542749 Country of ref document: JP Kind code of ref document: A |
|
WWE | Wipo information: entry into national phase |
Ref document number: 13141947 Country of ref document: US |