WO2010064869A2

WO2010064869A2 - Semiconductor light-emitting device

Info

Publication number: WO2010064869A2
Application number: PCT/KR2009/007235
Authority: WO
Inventors: 김창태; 이태희
Original assignee: 주식회사 에피밸리
Priority date: 2008-12-04
Filing date: 2009-12-04
Publication date: 2010-06-10
Also published as: KR101062754B1; WO2010064869A3; KR20100064048A

Abstract

The present invention relates to a semiconductor light-emitting device, and more particularly, to a semiconductor light-emitting device comprising: a substrate; an active layer which is formed on the substrate, and which generates light through electron-hole recombination; and a plurality of blocks formed beneath the substrate.

Description

Semiconductor light emitting device

The present disclosure relates to a semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device for improving peeling of a metal layer for adhesion of a light emitting device.

Here, the semiconductor light emitting device refers to a semiconductor optical device that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting device. The group III nitride semiconductor consists of a compound of Al (x) Ga (y) In (1-x-y) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). In addition, GaAs type semiconductor light emitting elements used for red light emission, etc. are mentioned.

This section provides backgound information related to the present disclosure which is not necessarily prior art.

1 is a view illustrating an example of a conventional Group III nitride semiconductor light emitting device, wherein the Group III nitride semiconductor light emitting device is grown on the substrate 100, the buffer layer 200 grown on the substrate 100, and the buffer layer 200. n-type group III nitride semiconductor layer 300, an active layer 400 grown on the n-type group III nitride semiconductor layer 300, p-type group III nitride semiconductor layer 500, p-type 3 grown on the active layer 400 The p-side electrode 600 formed on the group nitride semiconductor layer 500, the p-side bonding pad 700 formed on the p-side electrode 600, the p-type group III nitride semiconductor layer 500 and the active layer 400 are formed. The n-side electrode 800 and the passivation layer 900 are formed on the n-type group III nitride semiconductor layer 300 exposed by mesa etching.

As the substrate 100, a GaN-based substrate is used as the homogeneous substrate, and a sapphire substrate, a SiC substrate, or a Si substrate is used as the heterogeneous substrate. Any substrate may be used as long as the group III nitride semiconductor layer can be grown. When a SiC substrate is used, the n-side electrode 800 may be formed on the SiC substrate side.

Group III nitride semiconductor layers grown on the substrate 100 are mainly grown by MOCVD (organic metal vapor growth method).

The buffer layer 200 is intended to overcome the difference in lattice constant and thermal expansion coefficient between the dissimilar substrate 100 and the group III nitride semiconductor, and US Pat. A technique for growing an AlN buffer layer having a thickness of US Pat. No. 5,290,393 describes Al (x) Ga (1-x) N having a thickness of 10 kPa to 5000 kPa at a temperature of 200 to 900 C on a sapphire substrate. (0 ≦ x <1) A technique for growing a buffer layer is described, and US Patent Publication No. 2006/154454 discloses growing a SiC buffer layer (seed layer) at a temperature of 600 ° C. to 990 ° C., followed by In (x Techniques for growing a Ga (1-x) N (0 <x≤1) layer are described. Preferably, the undoped GaN layer is grown prior to the growth of the n-type Group III nitride semiconductor layer 300, which may be viewed as part of the buffer layer 200 or as part of the n-type Group III nitride semiconductor layer 300. .

In the n-type group III nitride semiconductor layer 300, at least a region (n-type contact layer) in which the n-side electrode 800 is formed is doped with impurities, and the n-type contact layer is preferably made of GaN and doped with Si. . U. S. Patent No. 5,733, 796 describes a technique for doping an n-type contact layer to a desired doping concentration by controlling the mixing ratio of Si and other source materials.

The active layer 400 is a layer that generates photons (light) through recombination of electrons and holes, and is mainly composed of In (x) Ga (1-x) N (0 <x≤1), and one quantum well layer (single quantum wells) or multiple quantum wells.

The p-type III-nitride semiconductor layer 500 is doped with an appropriate impurity such as Mg, and has an p-type conductivity through an activation process. U.S. Patent No. 5,247,533 describes a technique for activating a p-type group III nitride semiconductor layer by electron beam irradiation, and U.S. Patent No. 5,306,662 annealing the p-type Group III nitride semiconductor layer at a temperature of 400 占 폚 or higher. A technique for activating is described, and US Patent Publication No. 2006/157714 discloses a p-type III-nitride semiconductor layer without an activation process by using ammonia and a hydrazine-based source material together as a nitrogen precursor for growth of the p-type III-nitride semiconductor layer. Techniques for having this p-type conductivity have been described.

The p-side electrode 600 is provided to supply a good current to the entire p-type group III nitride semiconductor layer 500. US Patent No. 5,563,422 is formed over almost the entire surface of the p-type group III nitride semiconductor layer. A light-transmitting electrode made of Ni and Au in ohmic contact with the p-type III-nitride semiconductor layer 500 is described. US Pat. No. 6,515,306 discloses n on the p-type III-nitride semiconductor layer. A technique is described in which a type superlattice layer is formed and then a translucent electrode made of indium tin oxide (ITO) is formed thereon.

On the other hand, the p-side electrode 600 may be formed to have a thick thickness so as not to transmit light, that is, to reflect the light toward the substrate side, this technique is referred to as flip chip (flip chip) technology. U. S. Patent No. 6,194, 743 describes a technique relating to an electrode structure including an Ag layer having a thickness of 20 nm or more, a diffusion barrier layer covering the Ag layer, and a bonding layer made of Au and Al covering the diffusion barrier layer.

The p-side bonding pad 700 and the n-side electrode 800 are for supplying current and wire bonding to the outside, and US Patent No. 5,563,422 describes a technique in which the n-side electrode is composed of Ti and Al.

The passivation layer 900 is formed of a material such as silicon dioxide and may be omitted.

Meanwhile, the n-type III-nitride semiconductor layer 300 or the p-type III-nitride semiconductor layer 500 may be composed of a single layer or a plurality of layers, and recently, the substrate 100 may be formed by laser or wet etching. A technique for manufacturing a vertical light emitting device by separating from group III nitride semiconductor layers has been introduced.

FIG. 2 is a view showing an example of a method for manufacturing a semiconductor light emitting device according to International Publication No. 2006/019180. Laser trenching is performed on the upper side of the substrate 100 to form the trench 130, and the substrate ( A technique of separating the light emitting device by forming the trench 140 by dicing under the 100 is described.

3 is a view illustrating an example of a method of manufacturing a semiconductor light emitting device according to Korean Patent No. 10-0702449, wherein the light emitting device 210 having the reflective layer 110 for reflecting light is about 100 ° C to 400 ° C. A method of manufacturing a light emitting device for bonding on a sub-mount substrate 310 on which an electrode pattern 410 is formed using a flux 510 mixed with a metal powder having a low melting point (eg, eutectic metal) It is described.

4 is a view illustrating an example of a conventional semiconductor light emitting device. The light emitting device 210 includes a metal layer 610 (for example, a eutectic metal) at a lower portion thereof, so that the light emitting device 210 includes the electrode pattern 410. The light emitting device 210 may be directly adhered to the submount substrate 310 without applying a flux 510 (see FIG. 3) in which metal powder is mixed separately to adhere the formed submount substrate 310. .

However, the light emitting device 210 may have a problem that the metal layer 610 is separated from the light emitting device 210 by being subjected to an external force by a dicer or the like through a process of separating into individual devices.

This will be described later in the section on Embodiments of the Invention.

This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all, provided that this is a summary of the disclosure. of its features).

According to one aspect of the present disclosure, a substrate; An active layer formed on the substrate and generating light through recombination of electrons and holes; In addition, a semiconductor light emitting device is provided, including a plurality of blocks formed under the substrate.

According to one semiconductor light emitting device according to the present disclosure, it is possible to improve the separation of the eutectic metal from the substrate.

According to another semiconductor light emitting device according to the present disclosure, it is possible to facilitate heat transfer of the light emitting device.

According to another semiconductor light emitting device according to the present disclosure, it is possible to improve the light extraction efficiency of the light emitting device.

1 is a view showing an example of a conventional group III nitride semiconductor light emitting device,

2 is a view showing an example of a method of manufacturing a semiconductor light emitting device disclosed in International Publication No. 2006/019180;

3 is a view showing an example of a method of manufacturing a semiconductor light emitting device described in Korean Patent No. 10-0702449;

4 is a view showing an example of a conventional semiconductor light emitting device;

5 is a view showing an example of a group III nitride semiconductor light emitting device according to the present disclosure;

6 is a view showing another example of the group III nitride semiconductor light emitting device according to the present disclosure;

7 is a view illustrating an example of a method of manufacturing a plurality of blocks according to the present disclosure;

8 is a photograph showing an example of a substrate on which a plurality of blocks according to the present disclosure are formed.

The present disclosure will now be described in detail with reference to the accompanying drawing (s).

5 is a view illustrating an example of a group III nitride semiconductor light emitting device according to the present disclosure, wherein the light emitting device is a substrate 10, a buffer layer 20 grown on the substrate 10, and an n-type grown on the buffer layer 20. Group III nitride semiconductor layer 30, active layer 40 grown on n-type Group III nitride semiconductor layer 30, p-type Group III nitride semiconductor layer 50 grown on active layer 40, p-type Group III nitride The p-side electrode 60 formed on the semiconductor layer 50, the p-side bonding pad 70 formed on the p-side electrode 60, at least the p-type group III nitride semiconductor layer 50 and the active layer 40 are etched. And an n-side electrode 80, blocks 90, a reflective film 92, and an oxide film 94 formed on the n-type group III nitride semiconductor layer 30 that is exposed.

Blocks 90 are formed under the substrate 10. The blocks 90 serve to fix the light emitting device on the submount substrate 12, and at the same time, transfer heat generated from the light emitting device to the submount substrate 12.

The blocks 90 are formed under the substrate 10 at intervals from each other. In the block 90, the light emitting device is placed on the submount substrate 10 so that heat generated from the light emitting device can be smoothly transferred to the submount substrate 12, and the block 90 is melted by applying heat to the adjacent block. It is desirable to have a thickness and thickness that can come into contact with (90).

For example, the blocks 90 are made of Au / Sn having a thickness of about 3 μm to about 7 μm, and the blocks 90 are spaced about 15 μm from each other. In addition, when the block 90 is made of a thickness of about 7㎛ 10㎛, the blocks 90 may be spaced about 23㎛ each other. The block 90 may be made of Pb / Sn, Au / Ge, Au / Sn / Ge, Au / Pb / Sn, Cu / Pb / Sn, and the like.

Accordingly, even when an external force is applied by the dicer or the like below the substrate 10, the portion where the blocks 90 are peeled from the light emitting device may be limited to the portion where the dicer or the like directly touches.

The reflective film 92 is to improve the light extraction efficiency of the light emitting device by reflecting the light emitted from the active layer 40 toward the substrate 10 toward the upper side of the light emitting device, and between the substrate 10 and the blocks 90. Is formed. The reflective film 92 is preferably made of a metal having a reflectance of 80% or more. For example, the reflective film 92 is formed on the lower surface of the substrate 10 of Al having a thickness of about 500 GPa. In this case, the reflective film 92 may be formed of Ag.

The oxide film 94 is for preventing oxidation of the reflective film 92 and is formed between the blocks 90 and the reflective film 92. For example, the oxide film 94 is formed under the reflective film 92 in Ni / Au. In this case, the oxide film 94 may be formed of Au.

The reflective film 92 and the oxide film 94 may be omitted.

6 is a view showing another example of the group III nitride semiconductor light emitting device according to the present disclosure, wherein the light emitting device includes a refractive film 96 between the substrate 10 and the reflective film 92. The same reference numerals as in FIG. 5 will be omitted.

The refractive film 96 is to prevent the total reflection of the light incident on the inside of the substrate 10 generated in the active layer 40, and serves to change the refractive index difference between the inside of the substrate 10 and the outside of the substrate 10. do. Thereby, the light extraction efficiency of the light emitting device can be further improved.

For example, the refractive film 96 is made of SiO ₂ having a thickness of about 6000 mW. In this case, the refraction film 96 may be formed with a thickness of about 725 μm by stacking SiO ₂ and TiO ₂ .

Hereinafter, a method of manufacturing a group III nitride semiconductor light emitting device according to the present disclosure will be described.

7 is a diagram illustrating an example of a method of manufacturing a plurality of blocks 90 according to the present disclosure.

First, the substrate 10 is prepared (see FIG. 7A). A plurality of semiconductor layers 20, 30, 40, and 50 are grown on the substrate 10, and the plurality of semiconductor layers 20, 30, 40, and 50 may be grown after forming the plurality of blocks 90. have.

Next, the mask 99 is positioned on the lower surface side of the substrate 10 (see FIG. 7B). Mask 99 has a pattern 99a for forming blocks 90. For example, the mask 99 may use a mesh having a line width of about 15 μm and an opening width of about 25 μm to provide a space of about 15 μm between the blocks 90. In addition, the mask 90 may use a mesh having a line width of about 23 μm and an opening width of about 41 μm in order to provide a space of about 23 μm between the blocks 90.

Next, a source is deposited to form a block 90 on the bottom surface of the substrate 10 through the mask 99 (see FIGS. 7C and 7D). For example, the block 90 may be formed of Au / Sn having a thickness of about 3 μm to 7 μm by using Au and Sn as the source through electron beam deposition.

8 is a photograph showing an example of a substrate on which a plurality of blocks are formed according to the present disclosure, and it can be seen that a block 90 is formed on a bottom surface of the substrate 10. The block 90 is made of Au / Sn having a thickness of about 3 μm, and the blocks 90 are spaced about 15 μm from each other.

Hereinafter, various embodiments of the present disclosure will be described.

(1) A semiconductor light emitting device comprising a plurality of blocks made of eutectic metal and formed at predetermined intervals from each other. As a result, the part where the eutectic metal is separated from the light emitting device by external force can be reduced, and there is an advantageous effect in transferring heat generated from the light emitting device to the outside.

(2) A semiconductor light emitting element comprising a refractive film between a sapphire substrate and a plurality of blocks. As a result, the light extraction efficiency of the light emitting device can be improved.

Claims

Board;

An active layer formed on the substrate and generating light through recombination of electrons and holes; And,

A plurality of blocks formed under the substrate; semiconductor light emitting device comprising a.
In claim 1,

And a plurality of blocks are eutectic metals.
In claim 1,

And a plurality of blocks are spaced apart from each other.
In claim 3,

And a plurality of blocks are melted and spaced apart such that the plurality of blocks are in contact with each other.
In claim 1,

The light emitting device is a semiconductor light emitting device, characterized in that the Group III nitride semiconductor light emitting device.
In claim 1,

A refractive film positioned between the substrate and the plurality of blocks; And,

And a reflective film positioned between the refractive film and the plurality of blocks.

A semiconductor light emitting device, characterized in that the substrate is made of sapphire.
In claim 6,

And a plurality of blocks are eutectic metals.