WO2010064870A2 - Semiconductor light-emitting device - Google Patents

Semiconductor light-emitting device Download PDF

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Publication number
WO2010064870A2
WO2010064870A2 PCT/KR2009/007236 KR2009007236W WO2010064870A2 WO 2010064870 A2 WO2010064870 A2 WO 2010064870A2 KR 2009007236 W KR2009007236 W KR 2009007236W WO 2010064870 A2 WO2010064870 A2 WO 2010064870A2
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Prior art keywords
electrode
bonding
emitting device
branch
light emitting
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PCT/KR2009/007236
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French (fr)
Korean (ko)
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WO2010064870A3 (en
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김창태
남기연
이태희
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주식회사 에피밸리
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Priority to JP2011539450A priority Critical patent/JP2012511248A/en
Priority to CN2009801488467A priority patent/CN102239577A/en
Priority to US12/647,860 priority patent/US20100140656A1/en
Publication of WO2010064870A2 publication Critical patent/WO2010064870A2/en
Publication of WO2010064870A3 publication Critical patent/WO2010064870A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

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  • the present disclosure relates to a semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device having an electrode structure for current diffusion.
  • the semiconductor light emitting device refers to a semiconductor optical device that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting device.
  • the group III nitride semiconductor consists of a compound of Al (x) Ga (y) In (1-x-y) N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1).
  • GaAs type semiconductor light emitting elements used for red light emission, etc. are mentioned.
  • FIG. 1 is a view illustrating an example of a conventional Group III nitride semiconductor light emitting device, wherein the Group III nitride semiconductor light emitting device is grown on the substrate 100, the buffer layer 200 grown on the substrate 100, and the buffer layer 200.
  • the p-side electrode 600 formed on the group nitride semiconductor layer 500, the p-side bonding pad 700 formed on the p-side electrode 600, the p-type group III nitride semiconductor layer 500 and the active layer 400 are formed.
  • the n-side electrode 800 and the passivation layer 900 are formed on the n-type group III nitride semiconductor layer 300 exposed by mesa etching.
  • a GaN-based substrate is used as the homogeneous substrate, and a sapphire substrate, a SiC substrate, or a Si substrate is used as the heterogeneous substrate. Any substrate may be used as long as the group III nitride semiconductor layer can be grown.
  • the n-side electrode 800 may be formed on the SiC substrate side.
  • Group III nitride semiconductor layers grown on the substrate 100 are mainly grown by MOCVD (organic metal vapor growth method).
  • the buffer layer 200 is intended to overcome the difference in lattice constant and thermal expansion coefficient between the dissimilar substrate 100 and the group III nitride semiconductor, and US Pat.
  • a technique for growing an AlN buffer layer having a thickness of US Pat. No. 5,290,393 describes Al (x) Ga (1-x) N having a thickness of 10 kPa to 5000 kPa at a temperature of 200 to 900 C on a sapphire substrate. (0 ⁇ x ⁇ 1)
  • a technique for growing a buffer layer is described, and US Patent Publication No. 2006/154454 discloses growing a SiC buffer layer (seed layer) at a temperature of 600 ° C.
  • the undoped GaN layer is grown prior to the growth of the n-type Group III nitride semiconductor layer 300, which may be viewed as part of the buffer layer 200 or as part of the n-type Group III nitride semiconductor layer 300. .
  • n-type contact layer In the n-type group III nitride semiconductor layer 300, at least a region (n-type contact layer) in which the n-side electrode 800 is formed is doped with impurities, and the n-type contact layer is preferably made of GaN and doped with Si. .
  • U. S. Patent No. 5,733, 796 describes a technique for doping an n-type contact layer to a desired doping concentration by controlling the mixing ratio of Si and other source materials.
  • the active layer 400 is a layer that generates photons (light) through recombination of electrons and holes, and is mainly composed of In (x) Ga (1-x) N (0 ⁇ x ⁇ 1), and one quantum well layer (single quantum wells) or multiple quantum wells.
  • the p-type III-nitride semiconductor layer 500 is doped with an appropriate impurity such as Mg, and has an p-type conductivity through an activation process.
  • U.S. Patent No. 5,247,533 describes a technique for activating a p-type group III nitride semiconductor layer by electron beam irradiation, and U.S. Patent No. 5,306,662 annealing the p-type Group III nitride semiconductor layer at a temperature of 400 ⁇ ⁇ or higher. A technique for activating is described, and US Patent Publication No.
  • the p-side electrode 600 is provided to supply a good current to the entire p-type group III nitride semiconductor layer 500.
  • US Patent No. 5,563,422 is formed over almost the entire surface of the p-type group III nitride semiconductor layer.
  • a light-transmitting electrode made of Ni and Au in ohmic contact with the p-type III-nitride semiconductor layer 500 is described.
  • US Pat. No. 6,515,306 discloses n on the p-type III-nitride semiconductor layer. A technique is described in which a type superlattice layer is formed and then a translucent electrode made of indium tin oxide (ITO) is formed thereon.
  • ITO indium tin oxide
  • the p-side electrode 600 may be formed to have a thick thickness so as not to transmit light, that is, to reflect the light toward the substrate side, this technique is referred to as flip chip (flip chip) technology.
  • U. S. Patent No. 6,194, 743 describes a technique relating to an electrode structure including an Ag layer having a thickness of 20 nm or more, a diffusion barrier layer covering the Ag layer, and a bonding layer made of Au and Al covering the diffusion barrier layer.
  • the p-side bonding pad 700 and the n-side electrode 800 are for supplying current and wire bonding to the outside, and US Patent No. 5,563,422 describes a technique in which the n-side electrode is composed of Ti and Al.
  • the passivation layer 900 is formed of a material such as silicon dioxide and may be omitted.
  • the n-type III-nitride semiconductor layer 300 or the p-type III-nitride semiconductor layer 500 may be composed of a single layer or a plurality of layers, and recently, the substrate 100 may be formed by laser or wet etching. A technique for manufacturing a vertical light emitting device by separating from group III nitride semiconductor layers has been introduced.
  • FIG. 2 is a view showing an example of the electrode structure described in U.S. Patent No. 5,563,422, wherein the p-side bonding pad 700 and the n-side electrode 800 are positioned at diagonal corners of the light emitting device to improve current spreading. It is described.
  • FIG. 3 is a diagram illustrating an example of an electrode structure described in US Pat. No. 6,307,218.
  • the light emitting device has branches having equal intervals between the p-side bonding pads 710 and 710 and the n-side electrodes 810 and 810 as the light emitting device becomes larger. Techniques for improving current spreading with electrodes 910 and 910 are described.
  • a light emitting device having such an electrode structure has a problem in that current may be concentrated in an area R close to the distance between the p-side bonding pads 710 and the n-side electrodes 810.
  • FIG. 4 is a diagram illustrating an example of a photograph of a semiconductor light emitting device in which wire bonding defects occur.
  • FIG. 4A illustrates a light emitting device in which four wires are normally bonded
  • FIG. 4B Is a picture in which two wires fall, and the light emitting device in which two wires are diagonally bonded emits light
  • FIG. 4 (c) shows that the light emitting device in which two wires are dropped and two wires are bonded only in one direction is lighted. It is a photograph to emit. It can be seen that light does not come out evenly due to poor bonding of the wire.
  • a first bonding supplying a current for recombination of electrons and holes
  • An electrode and a second bonding electrode An electrode and a second bonding electrode; A first branch electrode and a second branch electrode extending from the first bonding electrode; A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode;
  • the second branch electrode is located farther from the center of the light emitting device than the first branch electrode, and the third branch electrode is located farther from the center of the light emitting device than the second branch electrode.
  • a light emitting element is provided.
  • a first bonding supplying a current for recombination of electrons and holes
  • An electrode and a second bonding electrode wherein at least one of the first bonding electrode and the second bonding electrode comprises: a first bonding electrode and a second bonding electrode having two bonding pads; A first branch electrode and a second branch electrode extending from the first bonding electrode; A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode;
  • a semiconductor light emitting device comprising a branch electrode.
  • the other semiconductor light emitting device According to the other semiconductor light emitting device according to the present disclosure, it is possible to improve the concentration of the current in the case of poor wire bonding.
  • FIG. 1 is a view showing an example of a conventional group III nitride semiconductor light emitting device
  • FIG. 2 is a view showing an example of an electrode structure described in US Patent No. 5,563,422;
  • FIG. 3 is a view showing an example of an electrode structure described in US Pat. No. 6,307,218;
  • FIG. 6 illustrates an example of a semiconductor light emitting device according to the present disclosure.
  • a driving region (hereinafter, referred to as a concentrated region R) may occur.
  • the concentrated region R is often located on a straight line distance between the bonding pad 70 and the bonding pad 80, but in the present disclosure, the concentrated region R is the bonding pad 70 and the bonding pad 80. It is not limited to the area
  • the region R1 may be the concentrated region R with respect to the region R2, and the region R2 may be the concentrated region R with respect to the region R3 (FIG. 5A). Reference). Therefore, the concentrated region R may be formed by relatively changing the distribution of current even in the region R1.
  • the branch electrode 91 is connected to the bonding pad 70 and is positioned in the concentrated region R.
  • the branch electrode 92 is connected to the bonding pad 80 and is positioned at a distance G1 from the branch electrode 91.
  • the branch electrode 93 is connected to the branch electrode 91 and is positioned at a distance G2 from the branch electrode 92.
  • the interval G1 is wider than the interval G2 (see FIG. 5B). Accordingly, the concentrated region R may be relaxed or eliminated.
  • the branch electrode 92 and the branch electrode 93 may be sequentially removed from the branch electrode 91 so as to be more advantageous in relaxing or eliminating the concentrated region R.
  • the branch electrode 94 is positioned at a gap G3 narrower than the gap G1 with the branch electrode 93, and the gap G3 is preferably narrower than the gap G2. Do.
  • the relationship between the gap G1 formed by the branch electrode 91 and the branch electrode 92 and the gap G2 formed by the branch electrode 92 and the branch electrode 93 is the interval G2 and the gap G3. Because it can be applied to.
  • FIG. 6 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure.
  • the light emitting device includes bonding pads 70 and 80 and branch electrodes 91, 92, 93, 94, and 95.
  • the light emitting device is an example of the size of 1mm horizontal, 1mm vertical.
  • the bonding pad 70 and the bonding pad 80 supply current to emit light in the active layer (see FIG. 1) by recombination of electrons and holes.
  • the bonding pad 70 and the bonding pad 80 are located between both sides of the light emitting element.
  • the bonding pads 70 are formed by attaching two circular pads 72 and 74 to each other. Meanwhile, in the bonding pad 70, two pads 72 and 74 which are circular are positioned apart from each other, and the two pads 72 and 74 are connected to each other by the branch electrodes 91, 93 and 95. It may be.
  • the bonding pad 80 may also be formed in the same manner as the bonding pad 70. Meanwhile, the pads 72, 74, 82, and 84 may have various shapes such as ellipses and polygons.
  • the branch electrode 91 extends from the bonding pad 70 toward the bonding pad 80, which means that the branch electrode 91 is located in the concentrated region R, described with reference to FIG. 5.
  • the branch electrode 92 is positioned at a distance G1 from the branch electrode 91.
  • the branch electrode 92 extends from the bonding pad 80 toward the bonding pad 70 so that the current can be smoothly spread with the branch electrode 91 at a gap G1 of about 128 ⁇ m. It is divided into and is bent and extended in the shape which embraces the branch electrode 91 as a whole.
  • the branch electrode 93 is positioned at a distance G2 narrower than the distance G1 with the branch electrode 92.
  • the branch electrode 93 is branched from the branch electrode 91 to both sides so that the current spreads smoothly with the branch electrode 92 at an interval G2 of about 89 ⁇ m. It is bent and extended in a shape to hold.
  • the branch electrode 94 is positioned at a distance G3 from the branch electrode 93.
  • the interval G3 is narrower than the interval G1.
  • the interval G3 is preferably narrower than the interval G2.
  • the branch electrode 94 is divided from both sides of the branch electrode 92 so that the current can be smoothly spread with the branch electrode 93 at an interval G3 of about 80 ⁇ m. It is bent and extended in a shape to hold.
  • the branch electrode 95 may be positioned with respect to the branch electrode 94 at an interval G4 of, for example, about 89 ⁇ m, and the interval G4 is wider and narrower than the interval G3 depending on the degree of current concentration. Can also be formed.
  • the branch electrodes 92, 93, 94, and 95 have an annular extension e. Through the extension portion e, the current can be spread around, thereby further improving the spread of the current.
  • a semiconductor light emitting device comprising a plurality of branch electrodes at different intervals. This can improve the concentration of the current.
  • a semiconductor light emitting element comprising an electrode to which a plurality of wires can be bonded. This can improve the concentration of current even when the wire is poorly bonded to the electrode.
  • first bonding electrode and a second bonding electrode for supplying a current for recombination of electrons and holes;
  • a first branch electrode and a second branch electrode extending from the first bonding electrode;
  • At least one of the second bonding electrodes is located at the central portion of the light emitting device on one side of the semiconductor light emitting device.

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Abstract

The present disclosure relates to a semiconductor light-emitting device, and more particularly, to a semiconductor light-emitting device which generates light through electron-hole recombination, wherein said semiconductor light-emitting device comprises: a first bonding electrode and a second bonding electrode which supply current for the electron-hole recombination; a first branched finger electrode and a second branched finger electrode branched from the first bonding electrode; and a third branched finger electrode which is branched from a third bonding electrode, and which is interposed between the first branched finger electrode and the second branched finger electrode to have a first spacing from the first branched finger electrode and a second spacing from the second branched finger electrode, wherein said second spacing is narrower than the first spacing. The second branched finger electrode is located farther than the first branched finger electrode from the center of the light-emitting device, and the third branched finger electrode is located farther than the second branched finger electrode from the center of the light-emitting device.

Description

반도체 발광소자Semiconductor light emitting device
본 개시(Disclosure)는 전체적으로 반도체 발광소자에 관한 것으로, 특히 전류확산을 위한 전극구조를 지니는 반도체 발광소자에 관한 것이다.The present disclosure relates to a semiconductor light emitting device as a whole, and more particularly, to a semiconductor light emitting device having an electrode structure for current diffusion.
여기서, 반도체 발광소자는 전자와 정공의 재결합을 통해 빛을 생성하는 반도체 광소자를 의미하며, 3족 질화물 반도체 발광소자를 예로 들 수 있다. 3족 질화물 반도체는 Al(x)Ga(y)In(1-x-y)N (0≤x≤1, 0≤y≤1, 0≤x+y≤1)로 된 화합물로 이루어진다. 이외에도 적색 발광에 사용되는 GaAs계 반도체 발광소자 등을 예로 들 수 있다.Here, the semiconductor light emitting device refers to a semiconductor optical device that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting device. The group III nitride semiconductor consists of a compound of Al (x) Ga (y) In (1-x-y) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). In addition, GaAs type semiconductor light emitting elements used for red light emission, etc. are mentioned.
여기서는, 본 개시에 관한 배경기술이 제공되며, 이들이 반드시 공지기술을 의미하는 것은 아니다(This section provides backgound information related to the present disclosure which is not necessarily prior art).This section provides backgound information related to the present disclosure which is not necessarily prior art.
도 1은 종래의 3족 질화물 반도체 발광소자의 일 예를 나타내는 도면으로서, 3족 질화물 반도체 발광소자는 기판(100), 기판(100) 위에 성장되는 버퍼층(200), 버퍼층(200) 위에 성장되는 n형 3족 질화물 반도체층(300), n형 3족 질화물 반도체층(300) 위에 성장되는 활성층(400), 활성층(400) 위에 성장되는 p형 3족 질화물 반도체층(500), p형 3족 질화물 반도체층(500) 위에 형성되는 p측 전극(600), p측 전극(600) 위에 형성되는 p측 본딩 패드(700), p형 3족 질화물 반도체층(500)과 활성층(400)이 메사 식각되어 노출된 n형 3족 질화물 반도체층(300) 위에 형성되는 n측 전극(800), 그리고 보호막(900)을 포함한다.1 is a view illustrating an example of a conventional Group III nitride semiconductor light emitting device, wherein the Group III nitride semiconductor light emitting device is grown on the substrate 100, the buffer layer 200 grown on the substrate 100, and the buffer layer 200. n-type group III nitride semiconductor layer 300, an active layer 400 grown on the n-type group III nitride semiconductor layer 300, p-type group III nitride semiconductor layer 500, p-type 3 grown on the active layer 400 The p-side electrode 600 formed on the group nitride semiconductor layer 500, the p-side bonding pad 700 formed on the p-side electrode 600, the p-type group III nitride semiconductor layer 500 and the active layer 400 are formed. The n-side electrode 800 and the passivation layer 900 are formed on the n-type group III nitride semiconductor layer 300 exposed by mesa etching.
기판(100)은 동종기판으로 GaN계 기판이 이용되며, 이종기판으로 사파이어 기판, SiC 기판 또는 Si 기판 등이 이용되지만, 3족 질화물 반도체층이 성장될 수 있는 기판이라면 어떠한 형태이어도 좋다. SiC 기판이 사용될 경우에 n측 전극(800)은 SiC 기판 측에 형성될 수 있다.As the substrate 100, a GaN-based substrate is used as the homogeneous substrate, and a sapphire substrate, a SiC substrate, or a Si substrate is used as the heterogeneous substrate. Any substrate may be used as long as the group III nitride semiconductor layer can be grown. When a SiC substrate is used, the n-side electrode 800 may be formed on the SiC substrate side.
기판(100) 위에 성장되는 3족 질화물 반도체층들은 주로 MOCVD(유기금속기상성장법)에 의해 성장된다.Group III nitride semiconductor layers grown on the substrate 100 are mainly grown by MOCVD (organic metal vapor growth method).
버퍼층(200)은 이종기판(100)과 3족 질화물 반도체 사이의 격자상수 및 열팽창계수의 차이를 극복하기 위한 것이며, 미국특허 제5,122,845호에는 사파이어 기판 위에 380℃에서 800℃의 온도에서 100Å에서 500Å의 두께를 가지는 AlN 버퍼층을 성장시키는 기술이 기재되어 있으며, 미국특허 제5,290,393호에는 사파이어 기판 위에 200℃에서 900℃의 온도에서 10Å에서 5000Å의 두께를 가지는 Al(x)Ga(1-x)N (0≤x<1) 버퍼층을 성장시키는 기술이 기재되어 있고, 미국공개특허공보 제2006/154454호에는 600℃에서 990℃의 온도에서 SiC 버퍼층(씨앗층)을 성장시킨 다음 그 위에 In(x)Ga(1-x)N (0<x≤1) 층을 성장시키는 기술이 기재되어 있다. 바람직하게는 n형 3족 질화물 반도체층(300)의 성장에 앞서 도핑되지 않는 GaN층이 성장되며, 이는 버퍼층(200)의 일부로 보아도 좋고, n형 3족 질화물 반도체층(300)의 일부로 보아도 좋다.The buffer layer 200 is intended to overcome the difference in lattice constant and thermal expansion coefficient between the dissimilar substrate 100 and the group III nitride semiconductor, and US Pat. A technique for growing an AlN buffer layer having a thickness of US Pat. No. 5,290,393 describes Al (x) Ga (1-x) N having a thickness of 10 kPa to 5000 kPa at a temperature of 200 to 900 C on a sapphire substrate. (0 ≦ x <1) A technique for growing a buffer layer is described, and US Patent Publication No. 2006/154454 discloses growing a SiC buffer layer (seed layer) at a temperature of 600 ° C. to 990 ° C., followed by In (x Techniques for growing a Ga (1-x) N (0 <x≤1) layer are described. Preferably, the undoped GaN layer is grown prior to the growth of the n-type Group III nitride semiconductor layer 300, which may be viewed as part of the buffer layer 200 or as part of the n-type Group III nitride semiconductor layer 300. .
n형 3족 질화물 반도체층(300)은 적어도 n측 전극(800)이 형성된 영역(n형 컨택층)이 불순물로 도핑되며, n형 컨택층은 바람직하게는 GaN로 이루어지고, Si으로 도핑된다. 미국특허 제5,733,796호에는 Si과 다른 소스 물질의 혼합비를 조절함으로써 원하는 도핑농도로 n형 컨택층을 도핑하는 기술이 기재되어 있다.In the n-type group III nitride semiconductor layer 300, at least a region (n-type contact layer) in which the n-side electrode 800 is formed is doped with impurities, and the n-type contact layer is preferably made of GaN and doped with Si. . U. S. Patent No. 5,733, 796 describes a technique for doping an n-type contact layer to a desired doping concentration by controlling the mixing ratio of Si and other source materials.
활성층(400)은 전자와 정공의 재결합을 통해 광자(빛)를 생성하는 층으로서, 주로 In(x)Ga(1-x)N (0<x≤1)로 이루어지고, 하나의 양자우물층(single quantum well)이나 복수개의 양자우물층들(multi quantum wells)로 구성된다.The active layer 400 is a layer that generates photons (light) through recombination of electrons and holes, and is mainly composed of In (x) Ga (1-x) N (0 <x≤1), and one quantum well layer (single quantum wells) or multiple quantum wells.
p형 3족 질화물 반도체층(500)은 Mg과 같은 적절한 불순물을 이용해 도핑되며, 활성화(activation) 공정을 거쳐 p형 전도성을 가진다. 미국특허 제5,247,533호에는 전자빔 조사에 의해 p형 3족 질화물 반도체층을 활성화시키는 기술이 기재되어 있으며, 미국특허 제5,306,662호에는 400℃ 이상의 온도에서 열처리(annealing)함으로써 p형 3족 질화물 반도체층을 활성화시키는 기술이 기재되어 있고, 미국공개특허공보 제2006/157714호에는 p형 3족 질화물 반도체층 성장의 질소전구체로서 암모니아와 하이드라진계 소스 물질을 함께 사용함으로써 활성화 공정없이 p형 3족 질화물 반도체층이 p형 전도성을 가지게 하는 기술이 기재되어 있다.The p-type III-nitride semiconductor layer 500 is doped with an appropriate impurity such as Mg, and has an p-type conductivity through an activation process. U.S. Patent No. 5,247,533 describes a technique for activating a p-type group III nitride semiconductor layer by electron beam irradiation, and U.S. Patent No. 5,306,662 annealing the p-type Group III nitride semiconductor layer at a temperature of 400 占 폚 or higher. A technique for activating is described, and US Patent Publication No. 2006/157714 discloses a p-type III-nitride semiconductor layer without an activation process by using ammonia and a hydrazine-based source material together as a nitrogen precursor for growth of the p-type III-nitride semiconductor layer. Techniques for having this p-type conductivity have been described.
p측 전극(600)은 p형 3족 질화물 반도체층(500) 전체로 전류가 잘 공급되도록 하기 위해 구비되는 것이며, 미국특허 제5,563,422호에는 p형 3족 질화물 반도체층의 거의 전면에 걸쳐서 형성되며 p형 3족 질화물 반도체층(500)과 오믹접촉하고 Ni과 Au로 이루어진 투광성 전극(light-transmitting electrode)에 관한 기술이 기재되어 있으며, 미국특허 제6,515,306호에는 p형 3족 질화물 반도체층 위에 n형 초격자층을 형성한 다음 그 위에 ITO(Indium Tin Oxide)로 이루어진 투광성 전극을 형성한 기술이 기재되어 있다.The p-side electrode 600 is provided to supply a good current to the entire p-type group III nitride semiconductor layer 500. US Patent No. 5,563,422 is formed over almost the entire surface of the p-type group III nitride semiconductor layer. A light-transmitting electrode made of Ni and Au in ohmic contact with the p-type III-nitride semiconductor layer 500 is described. US Pat. No. 6,515,306 discloses n on the p-type III-nitride semiconductor layer. A technique is described in which a type superlattice layer is formed and then a translucent electrode made of indium tin oxide (ITO) is formed thereon.
한편, p측 전극(600)이 빛을 투과시키지 못하도록, 즉 빛을 기판 측으로 반사하도록 두꺼운 두께를 가지게 형성할 수 있는데, 이러한 기술을 플립칩(flip chip) 기술이라 한다. 미국특허 제6,194,743호에는 20nm 이상의 두께를 가지는 Ag 층, Ag 층을 덮는 확산 방지층, 그리고 확산 방지층을 덮는 Au와 Al으로 이루어진 본딩 층을 포함하는 전극 구조에 관한 기술이 기재되어 있다.On the other hand, the p-side electrode 600 may be formed to have a thick thickness so as not to transmit light, that is, to reflect the light toward the substrate side, this technique is referred to as flip chip (flip chip) technology. U. S. Patent No. 6,194, 743 describes a technique relating to an electrode structure including an Ag layer having a thickness of 20 nm or more, a diffusion barrier layer covering the Ag layer, and a bonding layer made of Au and Al covering the diffusion barrier layer.
p측 본딩 패드(700)와 n측 전극(800)은 전류의 공급과 외부로의 와이어 본딩을 위한 것이며, 미국특허 제5,563,422호에는 n측 전극을 Ti과 Al으로 구성한 기술이 기재되어 있다.The p-side bonding pad 700 and the n-side electrode 800 are for supplying current and wire bonding to the outside, and US Patent No. 5,563,422 describes a technique in which the n-side electrode is composed of Ti and Al.
보호막(900)은 이산화규소와 같은 물질로 형성되며, 생략될 수도 있다.The passivation layer 900 is formed of a material such as silicon dioxide and may be omitted.
한편, n형 3족 질화물 반도체층(300)이나 p형 3족 질화물 반도체층(500)은 단일의 층이나 복수개의 층으로 구성될 수 있으며, 최근에는 레이저 또는 습식 식각을 통해 기판(100)을 3족 질화물 반도체층들로부터 분리하여 수직형 발광소자를 제조하는 기술이 도입되고 있다.Meanwhile, the n-type III-nitride semiconductor layer 300 or the p-type III-nitride semiconductor layer 500 may be composed of a single layer or a plurality of layers, and recently, the substrate 100 may be formed by laser or wet etching. A technique for manufacturing a vertical light emitting device by separating from group III nitride semiconductor layers has been introduced.
도 2는 미국특허 제5,563,422호에 기재된 전극 구조의 일 예를 나타내는 도면으로서, p측 본딩 패드(700)와 n측 전극(800)이 발광소자의 대각 코너에 위치하여 전류 확산을 개선하는 기술이 기재되어 있다.2 is a view showing an example of the electrode structure described in U.S. Patent No. 5,563,422, wherein the p-side bonding pad 700 and the n-side electrode 800 are positioned at diagonal corners of the light emitting device to improve current spreading. It is described.
도 3은 미국특허 제6,307,218호에 기재된 전극 구조의 일 예를 나타내는 도면으로서, 발광소자가 대면적화됨에 따라 p측 본딩 패드들(710,710)과 n측 전극들(810,810) 사이에 등간격을 가지는 가지 전극들(910,910)을 구비하여 전류 확산을 개선하는 기술이 기재되어 있다.3 is a diagram illustrating an example of an electrode structure described in US Pat. No. 6,307,218. The light emitting device has branches having equal intervals between the p- side bonding pads 710 and 710 and the n- side electrodes 810 and 810 as the light emitting device becomes larger. Techniques for improving current spreading with electrodes 910 and 910 are described.
그러나, 이러한 전극 구조를 지니는 발광소자는 p측 본딩 패드들(710)과 n측 전극들(810) 간의 거리가 가까운 영역(R)으로 전류가 집중될 수 있는 문제가 있다.However, a light emitting device having such an electrode structure has a problem in that current may be concentrated in an area R close to the distance between the p-side bonding pads 710 and the n-side electrodes 810.
한편, p측 본딩 패드들(710) 또는 n측 본딩 패드들(810)에 연결되는 와이어들 중에 본딩 불량이 발생하는 경우, 발광소자의 전류 확산이 원활하지 못하게 되는 문제가 있다.On the other hand, when a bonding failure occurs in the wires connected to the p-side bonding pads 710 or the n-side bonding pads 810, there is a problem that the current diffusion of the light emitting device is not smooth.
도 4는 와이어 본딩 불량이 발생한 반도체 발광소자의 사진의 일 예를 나타내는 도면으로서, 도 4의 (a)는 4개의 와이어가 정상적으로 본딩된 발광소자가 빛을 발하는 사진이고, 도 4의 (b)는 2개의 와이어가 떨어지고, 2개의 와이어가 대각으로 본딩된 발광소자가 빛을 발하는 사진이고, 도 4의 (c)는 2개의 와이어가 떨어지고, 2개의 와이어가 한쪽 방향에만 본딩된 발광소자가 빛을 발하는 사진이다. 와이어의 본딩 불량에 따라 빛이 고르게 나오지 않는 것을 볼 수 있다.FIG. 4 is a diagram illustrating an example of a photograph of a semiconductor light emitting device in which wire bonding defects occur. FIG. 4A illustrates a light emitting device in which four wires are normally bonded, and FIG. 4B. Is a picture in which two wires fall, and the light emitting device in which two wires are diagonally bonded emits light, and FIG. 4 (c) shows that the light emitting device in which two wires are dropped and two wires are bonded only in one direction is lighted. It is a photograph to emit. It can be seen that light does not come out evenly due to poor bonding of the wire.
이런 문제를 해소하기 위해, 2개의 본딩 패드가 함께 위치하도록 붙인 발광소자가 도입되었으나, 반대측에 위치하는 본딩 패드 사이에서 전류 집중이 일어나는 문제점을 해소하지 못하고 있다.In order to solve this problem, a light emitting device in which two bonding pads are attached to each other has been introduced, but it does not solve the problem of current concentration occurring between the bonding pads located on opposite sides.
이에 대하여 '발명의 실시를 위한 형태'의 후단에 기술한다.This will be described later in the section on Embodiments of the Invention.
여기서는, 본 개시의 전체적인 요약(Summary)이 제공되며, 이것이 본 개시의 외연을 제한하는 것으로 이해되어서는 아니된다(This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all of its features).This section provides a general summary of the disclosure and is not a comprehensive disclosure of its full scope or all, provided that this is a summary of the disclosure. of its features).
본 개시에 따른 일 태양에 의하면(According to one aspect of the present disclosure), 전자와 정공의 재결합을 통해 빛을 발생하는 반도체 발광소자에 있어서, 전자와 정공의 재결합을 위한 전류를 공급하는 제1 본딩 전극 및 제2 본딩 전극; 제1 본딩 전극으로부터 뻗어 있는 제1 가지 전극 및 제2 가지 전극; 제2 본딩 전극으로부터 뻗어 있고, 제1 가지 전극과 제2 가지 전극 사이에서 제1 가지 전극에 대하여 제1 간격을 두며 제2 가지 전극에 대하여 제1 간격 보다 좁은 제2 간격을 두고 위치하는 제3 가지 전극;을 포함하며, 제2 가지 전극은 제1 가지 전극 보다 발광소자의 중심에서 멀리 위치하며, 제3 가지 전극은 제2 가지 전극 보다 발광소자의 중심에서 더 멀리 위치하는 것을 특징으로 하는 반도체 발광소자가 제공된다.According to one aspect of the present disclosure, in a semiconductor light emitting device that generates light through recombination of electrons and holes, a first bonding supplying a current for recombination of electrons and holes An electrode and a second bonding electrode; A first branch electrode and a second branch electrode extending from the first bonding electrode; A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode; Wherein the second branch electrode is located farther from the center of the light emitting device than the first branch electrode, and the third branch electrode is located farther from the center of the light emitting device than the second branch electrode. A light emitting element is provided.
본 개시에 따른 다른 태양에 의하면(According to another aspect of the present disclosure), 전자와 정공의 재결합을 통해 빛을 발생하는 반도체 발광소자에 있어서, 전자와 정공의 재결합을 위한 전류를 공급하는 제1 본딩 전극 및 제2 본딩 전극;으로서, 제1 본딩 전극 및 제2 본딩 전극 중 적어도 하나는 두개의 본딩 패드를 구비하는 제1 본딩 전극 및 제2 본딩 전극; 제1 본딩 전극으로부터 뻗어 있는 제1 가지 전극 및 제2 가지 전극; 제2 본딩 전극으로부터 뻗어 있고, 제1 가지 전극과 제2 가지 전극 사이에서 제1 가지 전극에 대하여 제1 간격을 두며 제2 가지 전극에 대하여 제1 간격 보다 좁은 제2 간격을 두고 위치하는 제3 가지 전극;을 포함하는 것을 특징으로 하는 반도체 발광소자가 제공된다.According to an aspect according to the present disclosure, in a semiconductor light emitting device that generates light through recombination of electrons and holes, a first bonding supplying a current for recombination of electrons and holes An electrode and a second bonding electrode, wherein at least one of the first bonding electrode and the second bonding electrode comprises: a first bonding electrode and a second bonding electrode having two bonding pads; A first branch electrode and a second branch electrode extending from the first bonding electrode; A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode; There is provided a semiconductor light emitting device comprising a branch electrode.
본 개시에 따른 하나의 반도체 발광소자에 의하면, 전류가 집중되는 것을 개선할 수 있다.According to one semiconductor light emitting device according to the present disclosure, it is possible to improve the concentration of current.
본 개시에 따른 다른 반도체 발광소자에 의하면, 와이어 본딩 불량시 전류가 집중되는 것을 개선할 수 있다.According to the other semiconductor light emitting device according to the present disclosure, it is possible to improve the concentration of the current in the case of poor wire bonding.
도 1은 종래의 3족 질화물 반도체 발광소자의 일 예를 나타내는 도면,1 is a view showing an example of a conventional group III nitride semiconductor light emitting device,
도 2는 미국특허 제5,563,422호에 기재된 전극 구조의 일 예를 나태내는 도면,2 is a view showing an example of an electrode structure described in US Patent No. 5,563,422;
도 3은 미국특허 제6,307,218호에 기재된 전극 구조의 일 예를 나타내는 도면,3 is a view showing an example of an electrode structure described in US Pat. No. 6,307,218;
도 4는 와이어 본딩 불량이 발생한 반도체 발광소자의 사진의 일 예를 나타내는 도면,4 is a diagram illustrating an example of a photograph of a semiconductor light emitting device in which wire bonding defects occur;
도 5는 본 개시에 따른 반도체 발광소자가 지니는 전극 구조의 일 예를 나타내는 도면,5 is a view illustrating an example of an electrode structure of a semiconductor light emitting device according to the present disclosure;
도 6은 본 개시에 따른 반도체 발광소자의 일 예를 나타내는 도면.6 illustrates an example of a semiconductor light emitting device according to the present disclosure.
이하, 본 개시를 첨부된 도면을 참고로 하여 자세하게 설명한다(The present disclosure will now be described in detail with reference to the accompanying drawing(s)). The present disclosure will now be described in detail with reference to the accompanying drawing (s).
도 5는 본 개시에 따른 발광소자가 지니는 전극 구조의 일 예를 나타내는 도면으로서, 전극 구조는 본딩 패드들(70,80), 그리고 가지 전극들(91,92,93,94)을 구비한다.5 is a view illustrating an example of an electrode structure of a light emitting device according to the present disclosure. The electrode structure includes bonding pads 70 and 80 and branch electrodes 91, 92, 93, and 94.
본딩 패드들(70,80)에는 전류가 인가된다. 본딩 패드들(70,80)에 전류가 인가되면, 본딩 패드들(70,80) 사이에서 전류가 고르게 확산되지 않고, 몰리는 영역(이하, 집중영역(R) 이라함)이 발생할 수 있다. 여기서, 집중영역(R)은 본딩 패드(70)와 본딩 패드(80) 간의 직선 거리 상에 위치하는 경우가 많지만, 본 개시에서 집중영역(R)은 본딩 패드(70)와 본딩 패드(80) 간의 직선 거리 상에 위치하는 영역(R1)에 한정되는 것은 아니고, 주변과 비교하여 상대적으로 전류가 집중되는 영역을 의미한다. 즉, 영역(R1)은 영역(R2)에 대하여 집중영역(R)이 될 수 있고, 영역(R2)은 영역(R3)에 대하여 집중영역(R)이 될 수 있다(도 5의 (a)참조). 따라서, 집중영역(R)은 영역(R1) 내에서도 전류의 분포가 상대적으로 달라짐으로써 형성될 수 있다.Current is applied to the bonding pads 70 and 80. When a current is applied to the bonding pads 70 and 80, a current may not be evenly spread between the bonding pads 70 and 80, and a driving region (hereinafter, referred to as a concentrated region R) may occur. Here, the concentrated region R is often located on a straight line distance between the bonding pad 70 and the bonding pad 80, but in the present disclosure, the concentrated region R is the bonding pad 70 and the bonding pad 80. It is not limited to the area | region R1 located on the linear distance between them, and it means the area | region which a current concentrates relatively compared with surrounding. That is, the region R1 may be the concentrated region R with respect to the region R2, and the region R2 may be the concentrated region R with respect to the region R3 (FIG. 5A). Reference). Therefore, the concentrated region R may be formed by relatively changing the distribution of current even in the region R1.
가지 전극(91)은 본딩 패드(70)와 연결되며, 집중영역(R)에 위치한다. 가지 전극(92)은 본딩 패드(80)와 연결되며, 가지 전극(91)으로부터 간격(G1)을 두고 위치한다. 가지 전극(93)은 가지 전극(91)과 연결되며, 가지 전극(92)으로부터 간격(G2)을 두고 위치한다. 이때, 간격(G1)은 간격(G2) 보다 넓다(도 5의 (b)를 참조). 이에 따라, 집중영역(R)이 완화 또는 해소될 수 있는데, 가지 전극(92)과 가지 전극(93)은, 집중영역(R)의 완화 또는 해소에 보다 유리하도록, 가지 전극(91)으로부터 순차적으로 배열되는 것이 바람직하다.The branch electrode 91 is connected to the bonding pad 70 and is positioned in the concentrated region R. The branch electrode 92 is connected to the bonding pad 80 and is positioned at a distance G1 from the branch electrode 91. The branch electrode 93 is connected to the branch electrode 91 and is positioned at a distance G2 from the branch electrode 92. At this time, the interval G1 is wider than the interval G2 (see FIG. 5B). Accordingly, the concentrated region R may be relaxed or eliminated. The branch electrode 92 and the branch electrode 93 may be sequentially removed from the branch electrode 91 so as to be more advantageous in relaxing or eliminating the concentrated region R. FIG. It is preferred to be arranged as.
도 5의 (c)를 참조하면, 가지 전극(94)은 가지 전극(93)과 간격(G1) 보다 좁은 간격(G3)을 두고 위치하는데, 간격(G3)이 간격(G2) 보다 좁은 것이 바람직하다. 이는, 가지 전극(91)과 가지 전극(92)이 이루는 간격(G1)과, 가지 전극(92)과 가지 전극(93)이 이루는 간격(G2)의 관계가 간격(G2)와 간격(G3)에도 적용될 수 있기 때문이다.Referring to FIG. 5C, the branch electrode 94 is positioned at a gap G3 narrower than the gap G1 with the branch electrode 93, and the gap G3 is preferably narrower than the gap G2. Do. The relationship between the gap G1 formed by the branch electrode 91 and the branch electrode 92 and the gap G2 formed by the branch electrode 92 and the branch electrode 93 is the interval G2 and the gap G3. Because it can be applied to.
도 6은 본 개시에 따른 반도체 발광소자의 일 예를 나타내는 도면으로서, 발광소자는 본딩 패드들(70,80), 그리고 가지 전극들(91,92,93,94,95)을 구비한다. 여기서, 발광소자는 가로 1mm, 세로 1mm의 사이즈인 것을 예로 한다.FIG. 6 is a diagram illustrating an example of a semiconductor light emitting device according to the present disclosure. The light emitting device includes bonding pads 70 and 80 and branch electrodes 91, 92, 93, 94, and 95. Here, the light emitting device is an example of the size of 1mm horizontal, 1mm vertical.
본딩 패드(70) 및 본딩 패드(80)는 전자와 정공의 재결합에 의해 활성층(도 1 참조)에서 빛을 발하도록 전류를 공급한다. 본딩 패드(70) 및 본딩 패드(80)는 발광소자의 양쪽의 사이에 위치하고 있다. 본딩 패드(70)는 원형인 2개의 패드(72,74)가 서로 붙어서 형성되어 있다. 한편, 본딩 패드(70)는 원형인 2개의 패드(72,74)가 서로 떨어져서 위치하여, 가지 전극들(91,93,95)에 의해 2개의 패드(72,74)가 서로 연결되어 형성될 수도 있다. 본딩 패드(80)도 본딩 패드(70)와 동일하게 형성될 수 있다. 한편, 패드들(72,74,82,84)의 형태는 타원형, 다각형 등 다양하게 형성될 수 있다.The bonding pad 70 and the bonding pad 80 supply current to emit light in the active layer (see FIG. 1) by recombination of electrons and holes. The bonding pad 70 and the bonding pad 80 are located between both sides of the light emitting element. The bonding pads 70 are formed by attaching two circular pads 72 and 74 to each other. Meanwhile, in the bonding pad 70, two pads 72 and 74 which are circular are positioned apart from each other, and the two pads 72 and 74 are connected to each other by the branch electrodes 91, 93 and 95. It may be. The bonding pad 80 may also be formed in the same manner as the bonding pad 70. Meanwhile, the pads 72, 74, 82, and 84 may have various shapes such as ellipses and polygons.
가지 전극(91)은 본딩 패드(70)에서 본딩 패드(80)를 향하여 뻗어 있는데, 이는 가지 전극(91)이, 도 5를 참조하여 설명된, 집중영역(R)에 위치함을 의미한다.The branch electrode 91 extends from the bonding pad 70 toward the bonding pad 80, which means that the branch electrode 91 is located in the concentrated region R, described with reference to FIG. 5.
가지 전극(92)은 가지 전극(91)과 간격(G1)을 두고 위치한다. 예를 들면, 가지 전극(92)은 가지 전극(91)과 128㎛ 정도의 간격(G1)을 두고 전류의 확산이 원활히 이루어질 수 있도록 본딩 패드(80)에서 본딩 패드(70)를 향해 뻗다가 양쪽으로 갈라지며 전체적으로 가지 전극(91)을 끌어 안는 형상으로 절곡되어 연장되어 있다.The branch electrode 92 is positioned at a distance G1 from the branch electrode 91. For example, the branch electrode 92 extends from the bonding pad 80 toward the bonding pad 70 so that the current can be smoothly spread with the branch electrode 91 at a gap G1 of about 128 μm. It is divided into and is bent and extended in the shape which embraces the branch electrode 91 as a whole.
가지 전극(93)은 가지 전극(92)과 간격(G1) 보다 좁은 간격(G2)을 두고 위치한다. 예를 들면, 가지 전극(93)은 가지 전극(92)과 89㎛ 정도의 간격(G2)을 두고 전류의 확산이 원활히 이루어질 수 있도록 가지 전극(91)에서 양쪽으로 갈라지며 전체적으로 가지 전극(92)을 끌어 안는 형상으로 절곡되어 연장되어 있다.The branch electrode 93 is positioned at a distance G2 narrower than the distance G1 with the branch electrode 92. For example, the branch electrode 93 is branched from the branch electrode 91 to both sides so that the current spreads smoothly with the branch electrode 92 at an interval G2 of about 89 μm. It is bent and extended in a shape to hold.
가지 전극(94)은 가지 전극(93)과 간격(G3)을 두고 위치한다. 간격(G3)은 간격(G1)보다 좁은데, 도 5를 참조하여 설명한 바와 같이, 간격(G2) 보다 좁은 것이 바람직하다. 예를 들면, 가지 전극(94)은 가지 전극(93)과 80㎛ 정도의 간격(G3)을 두고 전류의 확산이 원활히 이루어질 수 있도록 가지 전극(92)에서 양쪽으로 갈라지며 전체적으로 가지 전극(93)을 끌어 안는 형상으로 절곡되어 연장되어 있다.The branch electrode 94 is positioned at a distance G3 from the branch electrode 93. The interval G3 is narrower than the interval G1. As described with reference to FIG. 5, the interval G3 is preferably narrower than the interval G2. For example, the branch electrode 94 is divided from both sides of the branch electrode 92 so that the current can be smoothly spread with the branch electrode 93 at an interval G3 of about 80 μm. It is bent and extended in a shape to hold.
가지 전극(95)은 예를 들어 89㎛ 정도의 간격(G4)을 두고 가지 전극(94)에 대하여 위치할 수 있으며, 간격(G4)은 전류 집중의 정도에 따라 간격(G3)보다 넓게도 좁게도 형성될 수 있다.The branch electrode 95 may be positioned with respect to the branch electrode 94 at an interval G4 of, for example, about 89 μm, and the interval G4 is wider and narrower than the interval G3 depending on the degree of current concentration. Can also be formed.
가지 전극들(92,93,94,95)은 환형의 확장부(e)가 형성되어 있다. 확장부(e)를 통해 주위로 전류가 퍼질 수 있게 되어 전류의 확산을 더욱 개선할 수 있다.The branch electrodes 92, 93, 94, and 95 have an annular extension e. Through the extension portion e, the current can be spread around, thereby further improving the spread of the current.
이하에서, 본 개시의 다양한 실시 형태에 대하여 기술한다.Hereinafter, various embodiments of the present disclosure will be described.
(1) 서로 다른 간격을 두고 있는 복수개의 가지 전극을 구비하는 반도체 발광소자. 이에 의해, 전류가 집중되는 것을 개선할 수 있다.(1) A semiconductor light emitting device comprising a plurality of branch electrodes at different intervals. This can improve the concentration of the current.
(2) 복수개의 와이어가 본딩 가능한 전극을 구비하는 반도체 발광소자. 이에 의해, 전극에 와이어가 본딩 불량되어도 전류가 집중되는 것을 개선할 수 있다.(2) A semiconductor light emitting element comprising an electrode to which a plurality of wires can be bonded. This can improve the concentration of current even when the wire is poorly bonded to the electrode.
(3) 전자와 정공의 재결합을 위한 전류를 공급하는 제1 본딩 전극 및 제2 본딩 전극; 제1 본딩 전극으로부터 뻗어 있는 제1 가지 전극 및 제2 가지 전극; 제2 본딩 전극으로부터 뻗어 있고, 제1 가지 전극과 제2 가지 전극 사이에서 제1 가지 전극에 대하여 제1 간격을 두며 제2 가지 전극에 대하여 제1 간격 보다 좁은 제2 간격을 두고 위치하는 제3 가지 전극;을 포함하며, 제2 가지 전극은 제1 가지 전극 보다 발광소자의 중심에서 멀리 위치하고, 제3 가지 전극은 제2 가지 전극 보다 발광소자의 중심에서 더 멀리 위치하며, 제1 본딩 전극 및 제2 본딩 전극 중 적어도 하나는 발광소자의 일 측에서 그 중앙부에 위치하는 것을 특징으로 하는 반도체 발광소자. 이에 의해, 발광소자 중앙부에서 주변으로 전류를 확산시킬 수 있다.(3) a first bonding electrode and a second bonding electrode for supplying a current for recombination of electrons and holes; A first branch electrode and a second branch electrode extending from the first bonding electrode; A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode; A branch electrode; wherein the second branch electrode is located farther from the center of the light emitting device than the first branch electrode, and the third branch electrode is located farther from the center of the light emitting device than the second branch electrode. At least one of the second bonding electrodes is located at the central portion of the light emitting device on one side of the semiconductor light emitting device. Thus, the current can be diffused from the center of the light emitting element to the surroundings.

Claims (10)

  1. 전자와 정공의 재결합을 통해 빛을 발생하는 반도체 발광소자에 있어서,In a semiconductor light emitting device that generates light through recombination of electrons and holes,
    전자와 정공의 재결합을 위한 전류를 공급하는 제1 본딩 전극 및 제2 본딩 전극;A first bonding electrode and a second bonding electrode supplying a current for recombination of electrons and holes;
    제1 본딩 전극으로부터 뻗어 있는 제1 가지 전극 및 제2 가지 전극;A first branch electrode and a second branch electrode extending from the first bonding electrode;
    제2 본딩 전극으로부터 뻗어 있고, 제1 가지 전극과 제2 가지 전극 사이에서 제1 가지 전극에 대하여 제1 간격을 두며 제2 가지 전극에 대하여 제1 간격 보다 좁은 제2 간격을 두고 위치하는 제3 가지 전극;을 포함하며,A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode; And a branch electrode;
    제2 가지 전극은 제1 가지 전극 보다 발광소자의 중심에서 멀리 위치하며, 제2 가지 전극은 제3 가지 전극 보다 발광소자의 중심에서 더 멀리 위치하는 것을 특징으로 하는 반도체 발광소자.The second branch electrode is located farther from the center of the light emitting device than the first branch electrode, and the second branch electrode is located farther from the center of the light emitting device than the third branch electrode.
  2. 청구항 1에 있어서,The method according to claim 1,
    제1 본딩 전극 및 제2 본딩 전극 중 적어도 하나는 두 개의 본딩 패드를 포함하는 것을 특징으로 하는 반도체 발광소자.At least one of the first bonding electrode and the second bonding electrode includes two bonding pads.
  3. 청구항 1에 있어서,The method according to claim 1,
    제1 본딩 전극 및 제2 본딩 전극 중 적어도 하나는 발광소자의 일 측에서 그 중앙부에 위치하는 것을 특징으로 하는 반도체 발광소자.At least one of the first bonding electrode and the second bonding electrode is a semiconductor light emitting device, characterized in that located in the central portion at one side of the light emitting device.
  4. 청구항 3에 있어서,The method according to claim 3,
    제1 본딩 전극과 제2 본딩 전극은 마주하게 위치하는 것을 특징으로 하는 반도체 발광소자.The first bonding electrode and the second bonding electrode are positioned facing each other.
  5. 청구항 1에 있어서,The method according to claim 1,
    제1 가지 전극은 제2 본딩 전극을 향해 뻗어 있는 것을 특징으로 하는 반도체 발광소자.The first branch electrode extends toward the second bonding electrode.
  6. 청구항 1에 있어서,The method according to claim 1,
    제2 본딩 전극으로부터 뻗어 있고, 제2 가지 전극에 대하여 제2 간격 보다 좁은 제3 간격을 두고 위치하는 제4 가지 전극;을 포함하는 것을 특징으로 하는 반도체 발광소자.And a fourth branch electrode extending from the second bonding electrode and positioned at a third interval narrower than the second interval with respect to the second branch electrode.
  7. 청구항 2에 있어서,The method according to claim 2,
    제1 본딩 전극 및 제2 본딩 전극 중 적어도 하나는 발광소자의 일 측에서 그 중앙부에 위치하며,At least one of the first bonding electrode and the second bonding electrode is located at the central portion of one side of the light emitting device,
    제1 본딩 전극과 제2 본딩 전극은 마주하게 위치하고,The first bonding electrode and the second bonding electrode are located facing each other,
    제1 가지 전극은 제2 본딩 전극을 향해 뻗어 있는 것을 특징으로 하는 반도체 발광소자.The first branch electrode extends toward the second bonding electrode.
  8. 청구항 7에 있어서,The method according to claim 7,
    제2 본딩 전극으로부터 뻗어 있고, 제2 가지 전극에 대하여 제2 간격 보다 좁은 제3 간격을 두고 위치하는 제4 가지 전극;을 포함하는 것을 특징으로 하는 반도체 발광소자.And a fourth branch electrode extending from the second bonding electrode and positioned at a third interval narrower than the second interval with respect to the second branch electrode.
  9. 청구항 8에 있어서,The method according to claim 8,
    발광소자는 3족 질화물 반도체 발광소자인 것을 특징으로 하는 반도체 발광소자.The light emitting device is a semiconductor light emitting device, characterized in that the Group III nitride semiconductor light emitting device.
  10. 전자와 정공의 재결합을 통해 빛을 발생하는 반도체 발광소자에 있어서,In a semiconductor light emitting device that generates light through recombination of electrons and holes,
    전자와 정공의 재결합을 위한 전류를 공급하는 제1 본딩 전극 및 제2 본딩 전극;으로서, 제1 본딩 전극 및 제2 본딩 전극 중 적어도 하나는 두개의 본딩 패드를 구비하는 제1 본딩 전극 및 제2 본딩 전극;A first bonding electrode and a second bonding electrode for supplying a current for recombination of electrons and holes, wherein at least one of the first bonding electrode and the second bonding electrode includes a first bonding electrode and a second bonding pad; Bonding electrodes;
    제1 본딩 전극으로부터 뻗어 있는 제1 가지 전극 및 제2 가지 전극;A first branch electrode and a second branch electrode extending from the first bonding electrode;
    제2 본딩 전극으로부터 뻗어 있고, 제1 가지 전극과 제2 가지 전극 사이에서 제1 가지 전극에 대하여 제1 간격을 두며 제2 가지 전극에 대하여 제1 간격 보다 좁은 제2 간격을 두고 위치하는 제3 가지 전극;을 포함하는 것을 특징으로 하는 반도체 발광소자.A third extending from the second bonding electrode and positioned between the first branch electrode and the second branch electrode with a first gap with respect to the first branch electrode and with a second gap narrower than the first gap with respect to the second branch electrode; A branch light emitting device comprising a; electrode.
PCT/KR2009/007236 2008-12-04 2009-12-04 Semiconductor light-emitting device WO2010064870A2 (en)

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