WO2010048782A1 - 片式保险丝及其制备方法 - Google Patents

片式保险丝及其制备方法 Download PDF

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Publication number
WO2010048782A1
WO2010048782A1 PCT/CN2009/001182 CN2009001182W WO2010048782A1 WO 2010048782 A1 WO2010048782 A1 WO 2010048782A1 CN 2009001182 W CN2009001182 W CN 2009001182W WO 2010048782 A1 WO2010048782 A1 WO 2010048782A1
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WIPO (PCT)
Prior art keywords
metal layer
layer
metal
substrate
high reliability
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PCT/CN2009/001182
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English (en)
French (fr)
Inventor
陆秀荣
曹小明
南式荣
杨漫雪
Original Assignee
南京萨特科技发展有限公司
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Priority claimed from CNU2008201868280U external-priority patent/CN201315301Y/zh
Priority claimed from CN2008102354397A external-priority patent/CN101447370B/zh
Application filed by 南京萨特科技发展有限公司 filed Critical 南京萨特科技发展有限公司
Priority to US13/063,985 priority Critical patent/US20110163840A1/en
Publication of WO2010048782A1 publication Critical patent/WO2010048782A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H69/00—Apparatus or processes for the manufacture of emergency protective devices
    • H01H69/02—Manufacture of fuses
    • H01H69/022—Manufacture of fuses of printed circuit fuses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
    • H01H85/02—Details
    • H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
    • H01H85/05—Component parts thereof
    • H01H85/055—Fusible members
    • H01H85/06—Fusible members characterised by the fusible material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49107—Fuse making

Definitions

  • the invention belongs to the field of fuses, and in particular relates to a chip fuse for protecting electronic components and a preparation method thereof. Background technique
  • the existing chip fuses and their fabrication can be divided into three categories, namely, a fuse made by a monolithic process, a fuse made by a chip resistance process, and a fuse wearing a wire in an insulator.
  • the monolithic process is to print one or more layers of melt on a ceramic green substrate through a thick film, and to form a single component green body through transverse and longitudinal cutting, and then co-firing, capping and electroplating, the advantage is that The arc ability is strong and can achieve a large breaking capacity.
  • the disadvantage is that it has a long manufacturing cycle and it is difficult to form a mark on the fuse chip.
  • the fuse that wears a wire in the insulator is most often left in the ceramic body.
  • the hole penetrates the hole into the hole and then connects with the terminal electrode.
  • the advantage is that the fuse has a large breaking capacity and good consistency.
  • the disadvantage is that it is leading the film opening, and the ceramic body threading process is complicated and inefficient. 4, difficult to carry out large-scale production; and the chip resistance process is a very mature process, the basic process is to first provide an insulating substrate with front and back, the substrate has lateral and longitudinal slots, thus the substrate Dividing into a plurality of rectangular units, and then forming a surface electrode, a back electrode and a melt, and a protective layer covering the melt on each unit on the substrate, and cutting the substrate in the longitudinal direction Cutting into a plurality of substrates, forming end internal electrodes on both end faces of each substrate, and finally dividing each substrate into a plurality of rectangular units in a lateral slit to obtain a desired chip, and the manufacturing process is simple, and Each process has a short production cycle, greatly increasing production and reducing manufacturing costs, and has been widely adopted.
  • the chip-type fuse using the chip resistance process is divided into three methods at the present stage.
  • One is a thick film process, which is characterized by printing a melt directly on a substrate with a wire mesh; one is a thin film process, which uses a surface. Techniques such as deposition, electroplating, and photolithography form a melt on the surface of the substrate; the last one is a multi-metal method, which is often performed by thick film printing to obtain a specific melt pattern (sometimes a thermal barrier layer is formed on the insulating substrate). After sintering, a second or third metal layer of a different material is formed thereon by a thin film method.
  • the multi-metal method fully utilizes the alloying effect of low-melting-point metal on high-melting-point metal during melting, which not only improves the anti-surge ability, but also ensures its quick-breaking property under overload. It is the most widely used chip fuse at present. Production Method.
  • FIG. 3 A conventional structure of the above multi-metal foil fuse is shown in FIG. 3, comprising: an insulating substrate 100, two back electrodes 101 on the lower surface of the substrate, a heat insulating layer 102 having a smaller area on the substrate than the substrate, and a second metal
  • the layer 103 has a first metal layer 105 of a copper metal layer, a top layer 107 of a tin metal layer, a first protective layer 108, a second protective layer 109, a terminal internal electrode 110, and a terminal electrode 111.
  • the manufacturing method of the above multi-metal foil fuse comprises the following steps:
  • two back electrodes are formed on the left and right sides of the lower surface of the substrate, and the material is silver; three: forming the heat insulating layer: forming a heat insulating layer on the center of the upper surface of the substrate, the area of which is smaller than the substrate, and the material is ⁇ Rubber
  • a second metal layer forming a second metal layer covering the upper surface of the substrate by a thin film deposition method, and the material is titanium tungsten alloy and copper;
  • a first photoresist layer forming a first photoresist layer on the second metal layer
  • forming a second metal layer placing the substrate in the plating bath, forming a first metal layer on the exposed second metal layer;
  • removing the remaining first photoresist layer removing the unnecessary first photoresist layer, causing the second metal layer originally covered by the first photoresist layer to be exposed;
  • etching the second metal layer etching removes the exposed portion of the second metal layer not covered by the first metal layer; X: forming a second photoresist layer;
  • exposure development performing exposure development, the second photoresist layer leaves two second photoresist block layers covering both ends of the first metal layer, so that the middle portion of the first metal layer is completely exposed ;
  • first protective layer 14 forming a first protective layer: forming a first protective layer covering at least the fuse layer with ruthenium rubber; fifteen: forming a second protective layer: forming a second protective layer with an epoxy resin;
  • forming the inner electrode of the tip forming the terminal inner electrode on the left and right end faces of the substrate by sputtering; 17: forming the terminal electrode: forming the terminal electrode by barrel plating.
  • a fatal disadvantage of the fuses made by the above multi-metal method is that it is susceptible to aging. Since the copper metal layer and the tin metal layer are in close contact with each other, they are often accompanied by mutual penetration at the time of contact, and the degree of penetration is positively related to time and temperature, that is, the degree of penetration becomes more severe with time. As the temperature increases, the degree of penetration becomes more severe, and in normal work, it is often accompanied by more heat, especially when the fuse has a very transient surge (this surge current is not enough to make the fuse blow at this moment). ), the tin metal layer partially melts due to the lower melting point, and the melted tin accelerates the penetration of the high melting point metal copper.
  • the two layers of metal originally belonging to different layers gradually form an alloy layer, and then, when a normal When the surge current passes, the unexpected melting of the copper-tin alloy may occur due to the low melting point of the copper-tin alloy.
  • the formation of an alloy layer of copper-tin two-layer metal is an extreme assumption, but as the alloy layer is from scratch, the process from small to large is actually a process of gradually reducing the surge resistance.
  • Another disadvantage of the above-mentioned multi-metal fuse is that: since the tin layer is in close contact with the copper layer, it participates in the distribution of current during operation, which is an unfavorable factor for the consistency of the fuse characteristics, because The thickness, width and uniformity of the copper or tin layers of different chips during the production process always exist. Differences, the only thing that can be easily detected during operation is the measurement of the cold resistance of the chip, and generally, in the same type of chip fuse, we measure the internal resistance to select qualified products.
  • An object of the present invention is to provide a method for preparing a chip fuse which can ensure a required breaking property such as a quick-breaking property and a pulse resistance, and more importantly, a melting curve due to its aging during long-term use. It is more stable and can be effectively used in demanding equipment such as aerospace and military.
  • a chip fuse comprising a ceramic substrate 1, a first metal layer 2, an insulating layer 3, a ⁇ metal layer 4, an encapsulation layer 5, a back electrode 6 and a metal tip.
  • An insulating layer is spaced apart between the first metal layer 2 and the second metal layer 4, and the softening point temperature of the insulating layer is between the first metal layer and the second metal layer.
  • the metal tip described above includes the terminal inner electrode 7, the terminal electrode nickel 8, and the terminal electrode tin 9.
  • the invention also provides a method for preparing the above-mentioned chip fuse: firstly forming a back electrode on the substrate, and then on the substrate according to the shape of the fuse metal melt, using a screen printing method or a deposition plating mask etching method on the insulating substrate Forming a first metal layer; attaching a metal mesh to the substrate, shielding both ends of the first metal layer, depositing an insulating layer by vapor deposition; removing the metal mesh, and printing on the insulating layer by screen printing
  • the second metal layer is covered with a protective layer covering the upper surface of the substrate except the electrode at both ends to protect the melt; finally, the inner electrode and the terminal electrode are formed to form the finished product.
  • the material of the first metal layer is silver, copper or gold.
  • the insulating layer has a thickness of 1-5 micrometers and is made of a mixture of metal oxides or oxides having good thermal conductivity and insulation, and the softening point temperature is higher than the melting point temperature of the first metal layer.
  • the melting point of the second metal layer The melting point of the second metal layer.
  • Material of the second metal layer For tin, the lines of the pattern coincide with the partial lines of the first metal layer in plan view.
  • the protective layer material is glass paste, silicone resin, polyamide or epoxy resin.
  • the manufacturing process of the invention is simple, and the manufacturing cost is correspondingly greatly reduced.
  • the first metal layer uses a thick film printing method, which is simpler and more efficient than the photolithography etching method, and the control precision is not lower than the photolithography, and the ability to use the technology on the product is sufficient.
  • the working principle of the chip fuse produced by the method of the invention is as follows: as the fuse over-loading time increases or the overload continues to increase, the first metal layer generates heat and the temperature rises when the softening point of the insulating layer is reached. The insulating layer tears a gap. At this time, the molten tin metal layer rapidly enters the first metal layer, and the first metal layer is instantaneously blown, thereby achieving the purpose of protecting the circuit.
  • Figure 1 is a flow chart of the preparation method of the present invention
  • FIG. 2 is a schematic view showing the structure of a chip fuse manufactured by the method of the present invention
  • Substrate 1.
  • First metal layer 3.
  • Insulating layer 4.
  • Second metal layer 5.
  • Encapsulation layer 6.
  • Back electrode 7.
  • End electrode 8.
  • Terminal electrode nickel 9.
  • FIG. 3 is a schematic structural view of a conventional multi-metal foil fuse
  • the material is mainly alumina or talc
  • a back electrode pattern 6 is formed by screen printing a conductive paste, and the conductive paste material shield contains silver;
  • the fuse paste is printed on the ceramic sheet by screen printing between the two surface electrodes, two of the fuses The heads are respectively overlapped on the surface electrodes to form an electrical connection with the surface electrodes.
  • the pattern of the fuse may be a straight line or any other shape, and a snake shape or the like is generally common.
  • the composition of the fuse slurry is mainly a conductive metal, and generally may be composed of one or more of materials such as silver, palladium, copper, platinum, and the like.
  • the graphic can also be designed as an integral "work" shape with the face electrode pattern, and the two patterns are printed at one time during printing.
  • the fuse and the surface electrode are collectively referred to herein as a surface electrode, that is, a "working" shaped surface electrode.
  • the substrate with the metal mesh is attached to the substrate 1 and the front electrode 2 by a vapor deposition method to form a thin oxide material;
  • the inner electrode 7 is plated on the left and right end faces of the substrate 1 by sputtering, and the material is Ni-Cr alloy; thirteen: forming the terminal electrode
  • the end electrodes 8 and 9 which are formed by the barrel plating to cover the back, the front electrode, and the inner electrode of the tip are made of nickel and tin, respectively.
  • the chip fuse structure obtained by the above steps is as shown in FIG. 2, comprising a ceramic substrate 1, a first metal layer 2, an insulating layer 3, a second metal layer 4, an encapsulation layer 5, a back electrode 6, and a metal tip, first The insulating layer 3 is between the metal layer 2 and the second metal layer 4.
  • Example 2 The S1206-V-2A product is made by the above-mentioned Embodiment 1, and tested according to GB9364. 4-2006 and GB9364. 1-1997 inspection items and technical requirements, which fully meet the performance requirements, especially the aging test results are compared with the traditional multi-metal Is the law even more so? Wenshan, the difference between the fuse current of twice the current and ten times the current is much lower than the former. For ease of explanation, a comparison table of the above tests is listed: Table 1: Comparison of aging tests
  • the aging test conditions are as follows: 20 samples are taken from each sample. The temperature is 30 °C and the humidity is 60%. The rated current is 200 h. After the sample is finished, the fuse time is twice and the current is cut. Instruments used in this test: BXC-35A Fuse Tester, DS5062M Digital Oscilloscope, HWS-08A

Description

片式保险丝及其制备方法 技术领域
本发明属于熔断器领域，具体涉及一种用于保护电子元器件的贴片保险丝及 其制备方法。 背景技术
现有的片式保险丝及其制作可分为三大类， 即独石工艺制作的保险丝、 片阻 工艺法制作的保险丝以及在绝缘体内穿金属丝的保险丝。独石工艺方法是在陶瓷 生坯基板上通过厚膜印刷一层或多层熔体，经过横向和纵向切割形成单个元件的 生坯， 再经过共烧、 封端及电镀得到， 其优点是灭弧能力较强， 且能达到较大的 分断能力， 缺点是它的制作周期较长， 且较难在保险丝芯片上形成标记； 在绝缘 体内穿金属丝的保险丝最常见的是在陶瓷体内留下孔洞，将熔丝穿入孔洞后再与 端电极相联， 其优点是该保险丝分断能力很大， 且一致性也较好， 缺点是要领先 开膜， 且陶瓷体穿丝的工艺复杂效率低下， 4艮难进行大批量的制作； 而片阻工艺 法是一个很成熟的工艺， 其基本工艺是首先提供具有正反面的绝缘基片，基片上 有横向和纵向的切槽，从而将基片分割成多个矩形单元， 随后在基片上的各单元 上分别形成面电极、 背电极和熔体以及覆盖熔体的保护层，将基片沿纵向切槽分 割为多条基片，在各条基片的两侧端面上形成端头内电极， 最后将各基片按横向 切槽分割成多个矩形单元从而得到所需要的芯片， 制造流程简单， 且每一流程的 制作周期都很短， 大大提高了产量降低了制造成本， 因而得到了广泛的采用。 用 片阻工艺法制片式保险丝在现阶段分为三种方法， 一种是厚膜工艺法， 其特点是 用丝网直接在基片上印刷熔体； 一种是薄膜工艺法， 其运用了表面沉积、 电镀、 光刻等技术使基片表面形成熔体； 最后一种是多元金属法， 往往是先进行厚膜印 刷得到一特定熔体图形 （有时会先在绝缘基板上形成一隔热层）， 烧结后再在其 上用薄膜法形成不同材料的第二或第三金属层。多元金属法充分运用到了低熔点 金属在融化时对高熔点金属的合金效用， 既提高了抗浪涌能力， 又能保证其在过 载时速断性， 是目前使用得最多的一种片式保险丝的制作方法。
上述多元金属法片式保险丝的一种现有结构如图 3 所示， 包括： 绝缘基片 100, 基片下表面两背电极 101， 基片上面积小于基片的隔热层 102 , 第二金属层 103, 第一金属层 105为铜金属层， 顶层 107为锡金属层， 第一保护层 108， 第 二保护层 109， 端头内电极 110， 端电极 111。
上述多元金属法片式保险丝的制造方法包括如下步骤：
一： 提供基片， 材质为氧化铝；
二： 形成背电极： 在基片下表面的左右两侧形成两背电极， 材质为银； 三： 形成隔热层： 于基片上表面中央形成隔热层， 其面积小于基片， 材质为 矽橡胶；
1
确认本 四： 形成第二金属层： 以薄膜沉积法形成覆盖基片上表面的第二金属层， 材 质为钛钨合金和铜；
五： 形成第一光刻抗蚀剂层： 于第二金属层上形成第一光刻抗蚀剂层； 六： 暴光显影： 对第一光致抗蚀剂层进行暴光显影， 移除第一光致抗蚀剂层 中的左右两侧及 ί接两侧的中间部份，使预备形成的第一金属层对应位置部分第 二金属层棵露；
七： 形成第二金属层： 将基片放置于电镀槽中， 于棵露的第二金属层上形成 第一金属层；
八： 除去剩余的第一光致抗蚀剂层： 将不需要的第一光致抗蚀剂层移除， 使 原被第一光致抗蚀剂层覆盖的第二金属层棵露；
九：蚀刻第二金属层：蚀刻移除未被第一金属层覆盖的第二金属层棵露部分； 十： 形成第二光致抗蚀剂层；
十一： 暴光显影： 进行暴光显影， 第二光致抗蚀剂层剩下覆盖第一金属层两 侧端的两第二光致抗蚀剂块层， 使第一金属层的中间部分完全棵露；
十二： 形成顶层金属层： 在第一金属层中间棵露部分电镀顶层金属层； 十三： 除去第二光致抗蚀剂层块： 除去第二光致抗蚀剂层块；
十四： 形成第一保护层： 以矽橡胶形成至少覆盖熔断体层的第一保护层； 十五： 形成第二保护层： 以环氧树脂形成第二保护层；
十六： 形成端头内电极： 以溅镀方式在基片的左右端面形成端头内电极； 十七： 形成端电极： 以滚镀方式形成端电极。
上述多元金属法制作的保险丝存在一个致命的缺点是容易老化。由于铜金属 层与锡金属层之间是紧密接触的，在接触的时候往往伴随着相互的渗透， 而渗透 的程度与时间和温度相互正关系， 即随着时间的增加渗透的程度愈厉害、 随着温 度的增加渗透的程度愈厉害， 而且在正常的工作中往往是伴随着较多的发热，特 别是当保险丝有非常瞬间的浪涌时（此浪涌电流不足以使保险丝在该时刻熔断）， 锡金属层由于熔点较低产生部分融化， 该融化的锡加速了对高熔点金属铜的渗 透， 久而久之， 本来属于不同层的两层金属逐步形成了一个合金层， 这时， 当一 个正常的浪涌电流通过时， 由于铜锡合金的熔点较低， 这时可能会出现意外的熔 断现象。 当然， 铜锡两层金属形成了一个合金层是一个极端的假设， 但随着合金 层的从无到有， 从小到大的过程实际上确是抗浪涌能力逐渐降低的过程。
上述多元金属法制作的保险丝另一个缺点是： 由于锡层与铜层是紧密接触 的，在工作时它参与了电流的分配， 这对于熔断特性的一致性来说是一个不利的 因素， 因为在制作过程中不同芯片的铜层或锡层的厚度、 宽度及均匀性总存在着 差异，这些差异在操作过程中唯一能被方便检测的是通过芯片冷电阻的测量， 而 且一般地，在同一种型号的片式保险丝里，我们就是通过检测内阻来筛选合格的 产品的， 这样， 针对这种由两层金属参与导电的保险丝就存在这么一个问题： 总 电阻相等的两个保险丝，可能一个保险丝的铜电 P且相对于另一个保险丝的铜电阻 大， 而其锡电阻相对另一个保险丝的锡电阻则小。众所周知，铜的电阻率、密度、 导热性等与锡有着很大的差别，这就造成了可能通过冷电阻严格分选出的 "合格" 的保险丝其熔断特性会有较大的差异。
发明内容
本发明的目的是提供一种贴片保险丝的制备方法，该保险丝能确保所需的速 断性、 耐脉冲性等熔断特性， 更主要的是， 由于其在长期的使用中不易老化， 熔 断的曲线更为稳定， 可有效地使用在诸如航天、 军工等要求严酷的设备中。
本发明所采用的技术方案是：
一种贴片保险丝， 包括陶瓷基片 1、第一金属层 2、绝缘层 3、 ^二金属层 4、 封装层 5、 背电极 6和金属端头。 第一金属层 2和第二金属层 4之间有一绝缘 层相隔开，且绝缘层的软化点温度在第一金属层和第二金属层之间。其优点在于： 第二金属层锡与第一金属层相隔开，在正常的状态下二者不会相互渗透而形成合 金层，避免了前面所讲到的老化现象； 由于第二金属层在常态下不参与电流的分 配，在冷态下所测量到的电阻完全是第一金属层的电阻， 这样通过阻值筛选出的 合格的保险丝， 其熔断特性更为一致。
上述所说的金属端头包括端头内电极 7、 端电极镍 8和端电极锡 9。
本发明还提供了上述贴片保险丝的制备方法： 先在基板上形成背电极， 然后 在基板上根据保险丝金属熔体的形状，采用丝网印刷法或沉积电镀掩膜蚀刻的方 法在绝缘基板上形成第一金属层； 将金属漏网贴在基板上， 第一金属层的两端被 遮挡， 用汽相沉积法沉积一绝缘层； 移开金属漏网， 用丝网印刷法在绝缘层上印 刷第二金属层， 再将保护层覆盖在基板的除两端电极所在部位的上表面， 以保护 熔体； 最后形成形成端头内电极和端电极， 即得成品。
本发明方法中， 第一金属层的材质为银、 铜或金。 所说的绝缘层的厚度为 1-5微米， 材质为导热性和绝缘性均好的金属氧化物或氧化物的混合物， 其软化 点温度'〗、于第一金属层的熔点温度但高于第二金属层的熔点。第二金属层的材质 为锡， 其图形的线条与第一金属层的部分线条在俯视下重合。保护层材料为玻璃 浆料、 硅树脂、 聚酰胺或环氧树脂等。
相对于现有方法而言， 本发明制作过程简单， 制造成本亦相应大大降低。 本发明中，第一金属层使用了厚膜印刷方式，比使用光刻腐蚀方式更加简单， 效率更高， 而且控制精度并不会比光刻低， 在该产品上使用该技术能力已足够。
本发明方法制得的贴片保险丝， 其工作原理主要是： 随着保险丝过负栽时间 的增加或过负载的继续变大， 第一金属层发热， 温度上升， 当达到绝缘层的软化 点时， 绝缘层撕开一缺口， 这时， 已经熔融的第二金属层锡迅速进入到第一金属 层， 使第一金属层瞬间熔断， 从而达到了保护电路的目的。
附图说明
图 1是本发明制备方法流程图
图 2为本发明方法制得的贴片保险丝结构示意图
1.基板 2.第一金属层 3.绝缘层 4.第二金属层 5.封装层 6.背电 极 7.端头内电极 8.端电极镍 9.端电极锡
图 3是现有多元金属法片式保险丝的结构示意图 具体实施方式
实施例 1 : 贴片保险丝的制备
制备流程如图 1， 具体操作如下：
一： 提供基板 1 , 材质以氧化铝或滑石瓷为主
二： 形成背电极
在基板 1下表面的左右两侧， 通过丝网印刷导电浆料形成背电极图形 6 , 导 电浆料材盾含银；
三、 放入干燥炉中干燥（温度： 150°C 时间： 15min )
四： 形成正面电极
在基板 1的正面通过丝网印刷形成正面电极 2 , 材质含银；
五、 放入千燥炉中干燥（温度： 150。C 时间： 15min )
六、 放入烧结炉中烧结 （最高温度： 600。C-850°C 时间： 60min ) 七、 形成熔丝图形
在两个面电极之间通过丝网印刷方式将熔丝浆料印刷在陶瓷片上，熔丝的两 头分别搭接在面电极上面， 与面电极形成电气连接。 熔丝的图形可以是直线形， 也可以是其他任何形状， 一般常见的还有蛇形等。熔丝浆料的成分主要是一些导 电金属， 一般可以由银、 钯、 铜、 铂等材料中的一种或多种组成。
该图形还可以和面电极图形一起设计成一个整体的 "工"字形， 在印刷时两 个图形一次印刷成型。
为了便于图示说明， 这里将熔丝和面电极合二为一后统称为面电极， 即一个 "工" 字形的面电极。
八、 放入烧结炉中烧结 （最高温度： 600。C-850。C 时间： 60min ) 九： 形成绝缘层
用金属漏网对齐贴在基板的正面；
将贴有金属漏网的基板通过汽相沉积法在基板 1和正面电极 2上被上一层很 薄的氧化物材料；
十： 形成第二金属层
通过丝网印刷在绝缘层 3上形成第二金属层 4 ,其范围小于绝缘层 3，材盾为 锡；
十一： 形成保护层（封装层 5 )
通过丝网印刷方式在覆盖有以上图形的表面上印刷一层保护材料（可以是环 氧树脂或酚酸树脂等材料）， 该图形的长度小于陶瓷片的长度， 印刷在正中位置， 将面电极露出来；
十二： 形成端头内电极
以溅镀方式在基板 1左右端面镀上内电极 7， 材质为 Ni- Cr合金； 十三： 形成端电极
以滚镀方式形成覆盖背、 正面电极、 端头内电极的端电极 8和 9， 材质分别 是镍和锡。
经上述步骤制得的片式保险丝结构如图 2， 包括陶瓷基片 1、 第一金属层 2、 绝缘层 3、 第二金属层 4、 封装层 5、 背电极 6和金属端头， 第一金属层 2和第 二金属层 4之间绝缘层 3。 实施例 2: 通过上述实施例 1 做出 S1206- V-2A 产品， 按照 GB9364. 4-2006 及 GB9364. 1-1997 检验项目和技术要求进行测试， 完全满足性能要求，特别是老化 试验结果相对于传统的多元金属法更是大有？文善，其两倍电流和十倍电流的熔断 时间的散差远远低于前者。 为了便于说明， 列出上述试验的对照表： 表一： 老化试验对比
Figure imgf000008_0001
注： 老化试验条件为： 各取样品 20只， 在温度为 30°C湿度为 60% 通以额定电 流 200h, 样品结束后分别做两倍电流和十倍电流的熔断时间。 本试验所用到仪器： BXC-35A熔断测试仪， DS5062M数字示波器， HWS-08A
1¾溫 湿恒温炉。

Claims

权利要求
1、 一种高可靠性片式保险丝， 包括陶瓷基片、 第一金属层、 第二金属层、 封装层、 背电极和金属端头， 其特征在于， 第一金属层和第二金属层之间有一 绝缘层， 且绝缘层的软化点温度在第一金属层和第二金属层之间。
2、 根据权利要求 1所说的高可靠性片式保险丝， 其特征在于， 第一金属层 的材质为银、 铜或金。
3、 根据权利要求 2所说的高可靠性片式保险丝， 其特征在于， 所说的绝缘 层的厚度为 1-5微米，材质为导热性和绝缘性均好的金属氧化物或氧化物的混合 物， 其软化点温度' j、于第一金属层的熔点温度但高于第二金属层的熔点。
4、 根据权利要求 3所说的高可靠性片式保险丝， 其特征在于， 第二金属层 的材盾为锡。
5、 一种权利要求 1所述高可靠性片式保险丝的制备方法， 是： 先在基板上 形成背电极， 然后在基板上根据保险丝金属熔体的形状， 采用丝网印刷法或沉积 电镀掩膜蚀刻的方法在绝缘基板上形成第一金属层； 将金属漏网贴在基板上， 第 一金属层的两端被遮挡， 用汽相沉积法沉积一绝缘层； 移开金属漏网， 用丝网印 刷法在绝缘层上印刷第二金属层，再将保护层覆盖在基板的除两端电极所在部位 的上表面， 以保护熔体； 最后形成形成端头内电极和端电极， 即得成品。
6、 根据权利要求 5所说的高可靠性片式保险丝的制备方法， 其特征在于， 第一金属层的材质为银、 铜或金。
7、 根据权利要求 6所说的高可靠性片式保险丝的制备方法， 其特征在于， 所说的绝缘层的厚度为 1-5微米，材质为导热性和绝缘性均好的金属氧化物或氧 化物的混合物，其软化点温度' j、于第一金属层的熔点温度但高于第二金属层的熔 点。
8、 根据权利要求 7所说的高可靠性片式保险丝的制备方法， 其特征在于， 第二 金属层的材质为锡。
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