WO2009078069A1 - 半導体装置 - Google Patents

半導体装置 Download PDF

Info

Publication number
WO2009078069A1
WO2009078069A1 PCT/JP2007/074091 JP2007074091W WO2009078069A1 WO 2009078069 A1 WO2009078069 A1 WO 2009078069A1 JP 2007074091 W JP2007074091 W JP 2007074091W WO 2009078069 A1 WO2009078069 A1 WO 2009078069A1
Authority
WO
WIPO (PCT)
Prior art keywords
diffusion region
continuous diffusion
area
transistor
transistor formed
Prior art date
Application number
PCT/JP2007/074091
Other languages
English (en)
French (fr)
Inventor
Hiroshi Katakura
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to JP2009546084A priority Critical patent/JPWO2009078069A1/ja
Priority to EP07859821A priority patent/EP2251901A4/en
Priority to PCT/JP2007/074091 priority patent/WO2009078069A1/ja
Publication of WO2009078069A1 publication Critical patent/WO2009078069A1/ja
Priority to US12/794,966 priority patent/US8338864B2/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Abstract

　半導体基板上に形成されたＰ極性又はＮ極性のいずれかの極性を有する連続拡散領域において、連続拡散領域に形成された第１トランジスタと、連続拡散領域において、第１トランジスタが形成された領域とは異なる領域に形成された第２トランジスタと、連続拡散領域において、第１トランジスタと第２トランジスタとの間の領域に形成され、ゲート電極に一定の電位が与えられる第３トランジスタと、連続拡散領域において、第２トランジスタと第３トランジスタとの間の領域に形成され、ゲート電極に一定の電位が与えられる第４トランジスタとを備えた。
PCT/JP2007/074091 2007-12-14 2007-12-14 半導体装置 WO2009078069A1 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2009546084A JPWO2009078069A1 (ja) 2007-12-14 2007-12-14 半導体装置
EP07859821A EP2251901A4 (en) 2007-12-14 2007-12-14 SEMICONDUCTOR DEVICE
PCT/JP2007/074091 WO2009078069A1 (ja) 2007-12-14 2007-12-14 半導体装置
US12/794,966 US8338864B2 (en) 2007-12-14 2010-06-07 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/074091 WO2009078069A1 (ja) 2007-12-14 2007-12-14 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/794,966 Continuation US8338864B2 (en) 2007-12-14 2010-06-07 Semiconductor device

Publications (1)

Publication Number Publication Date
WO2009078069A1 true WO2009078069A1 (ja) 2009-06-25

Family

ID=40795196

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/074091 WO2009078069A1 (ja) 2007-12-14 2007-12-14 半導体装置

Country Status (4)

Country Link
US (1) US8338864B2 (ja)
EP (1) EP2251901A4 (ja)
JP (1) JPWO2009078069A1 (ja)
WO (1) WO2009078069A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015537383A (ja) * 2012-11-07 2015-12-24 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ 共用拡散標準セルの構造
WO2019116883A1 (ja) * 2017-12-12 2019-06-20 株式会社ソシオネクスト 半導体集積回路装置

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9035359B2 (en) 2006-03-09 2015-05-19 Tela Innovations, Inc. Semiconductor chip including region including linear-shaped conductive structures forming gate electrodes and having electrical connection areas arranged relative to inner region between transistors of different types and associated methods
US7446352B2 (en) 2006-03-09 2008-11-04 Tela Innovations, Inc. Dynamic array architecture
US9009641B2 (en) 2006-03-09 2015-04-14 Tela Innovations, Inc. Circuits with linear finfet structures
US9230910B2 (en) 2006-03-09 2016-01-05 Tela Innovations, Inc. Oversized contacts and vias in layout defined by linearly constrained topology
US8541879B2 (en) 2007-12-13 2013-09-24 Tela Innovations, Inc. Super-self-aligned contacts and method for making the same
US7763534B2 (en) 2007-10-26 2010-07-27 Tela Innovations, Inc. Methods, structures and designs for self-aligning local interconnects used in integrated circuits
US7956421B2 (en) 2008-03-13 2011-06-07 Tela Innovations, Inc. Cross-coupled transistor layouts in restricted gate level layout architecture
US7908578B2 (en) 2007-08-02 2011-03-15 Tela Innovations, Inc. Methods for designing semiconductor device with dynamic array section
US9563733B2 (en) 2009-05-06 2017-02-07 Tela Innovations, Inc. Cell circuit and layout with linear finfet structures
US8658542B2 (en) 2006-03-09 2014-02-25 Tela Innovations, Inc. Coarse grid design methods and structures
US8448102B2 (en) 2006-03-09 2013-05-21 Tela Innovations, Inc. Optimizing layout of irregular structures in regular layout context
US8839175B2 (en) 2006-03-09 2014-09-16 Tela Innovations, Inc. Scalable meta-data objects
US8653857B2 (en) 2006-03-09 2014-02-18 Tela Innovations, Inc. Circuitry and layouts for XOR and XNOR logic
US8667443B2 (en) 2007-03-05 2014-03-04 Tela Innovations, Inc. Integrated circuit cell library for multiple patterning
US8453094B2 (en) 2008-01-31 2013-05-28 Tela Innovations, Inc. Enforcement of semiconductor structure regularity for localized transistors and interconnect
US7939443B2 (en) 2008-03-27 2011-05-10 Tela Innovations, Inc. Methods for multi-wire routing and apparatus implementing same
KR101739709B1 (ko) 2008-07-16 2017-05-24 텔라 이노베이션스, 인코포레이티드 동적 어레이 아키텍쳐에서의 셀 페이징과 배치를 위한 방법 및 그 구현
US9122832B2 (en) 2008-08-01 2015-09-01 Tela Innovations, Inc. Methods for controlling microloading variation in semiconductor wafer layout and fabrication
US8332794B2 (en) * 2009-01-22 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. Circuits and methods for programmable transistor array
US8661392B2 (en) 2009-10-13 2014-02-25 Tela Innovations, Inc. Methods for cell boundary encroachment and layouts implementing the Same
JP2011242541A (ja) * 2010-05-17 2011-12-01 Panasonic Corp 半導体集積回路装置、および標準セルの端子構造
JP5531848B2 (ja) * 2010-08-06 2014-06-25 富士通セミコンダクター株式会社 半導体装置、半導体集積回路装置、ＳＲＡＭ、Ｄｔ−ＭＯＳトランジスタの製造方法
US9159627B2 (en) 2010-11-12 2015-10-13 Tela Innovations, Inc. Methods for linewidth modification and apparatus implementing the same
JP5695734B2 (ja) * 2011-03-04 2015-04-08 ルネサスエレクトロニクス株式会社 半導体装置
US9767058B2 (en) * 2011-11-17 2017-09-19 Futurewei Technologies, Inc. Method and apparatus for scalable low latency solid state drive interface
US20140246725A1 (en) * 2013-03-04 2014-09-04 Samsung Electronics Co., Ltd. Integrated Circuit Memory Devices Including Parallel Patterns in Adjacent Regions
US9190405B2 (en) 2014-01-31 2015-11-17 Qualcomm Incorporated Digital circuit design with semi-continuous diffusion standard cell
US9318476B2 (en) * 2014-03-03 2016-04-19 Qualcomm Incorporated High performance standard cell with continuous oxide definition and characterized leakage current
US10361195B2 (en) 2014-09-04 2019-07-23 Samsung Electronics Co., Ltd. Semiconductor device with an isolation gate and method of forming
US10692808B2 (en) 2017-09-18 2020-06-23 Qualcomm Incorporated High performance cell design in a technology with high density metal routing

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006005103A (ja) * 2004-06-16 2006-01-05 Matsushita Electric Ind Co Ltd 標準セル、標準セルライブラリおよび半導体集積回路
JP2007036194A (ja) * 2005-07-26 2007-02-08 Taiwan Semiconductor Manufacturing Co Ltd デバイス性能の不整合低減方法および半導体回路
JP2007311491A (ja) * 2006-05-17 2007-11-29 Toshiba Corp 半導体集積回路

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5847429A (en) * 1995-07-31 1998-12-08 Integrated Device Technology, Inc. Multiple node ESD devices
JPH09289251A (ja) * 1996-04-23 1997-11-04 Matsushita Electric Ind Co Ltd 半導体集積回路のレイアウト構造およびその検証方法
DE19907921C1 (de) * 1999-02-24 2000-09-28 Siemens Ag Halbleiterspeicheranordnung mit Dummy-Bauelementen auf durchgehenden Diffusionsgebieten
JP5028714B2 (ja) * 2001-03-30 2012-09-19 富士通セミコンダクター株式会社 半導体集積回路装置、および配線方法
JP4398195B2 (ja) 2003-08-08 2010-01-13 パナソニック株式会社 半導体記憶装置
JP2005268610A (ja) * 2004-03-19 2005-09-29 Matsushita Electric Ind Co Ltd スタンダードセルの設計方法及び半導体集積回路
JP2006210453A (ja) 2005-01-26 2006-08-10 Sony Corp 半導体装置
CN1893085A (zh) * 2005-07-07 2007-01-10 松下电器产业株式会社 半导体装置及其制造方法
JP4564469B2 (ja) 2005-07-07 2010-10-20 パナソニック株式会社 半導体装置
JP2007027272A (ja) 2005-07-13 2007-02-01 Toshiba Corp 半導体集積回路
KR100665850B1 (ko) * 2005-07-22 2007-01-09 삼성전자주식회사 고집적 반도체 메모리 소자용 모오스 트랜지스터들의배치구조 및 그에 따른 배치방법

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006005103A (ja) * 2004-06-16 2006-01-05 Matsushita Electric Ind Co Ltd 標準セル、標準セルライブラリおよび半導体集積回路
JP2007036194A (ja) * 2005-07-26 2007-02-08 Taiwan Semiconductor Manufacturing Co Ltd デバイス性能の不整合低減方法および半導体回路
JP2007311491A (ja) * 2006-05-17 2007-11-29 Toshiba Corp 半導体集積回路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015537383A (ja) * 2012-11-07 2015-12-24 クゥアルコム・インコーポレイテッドＱｕａｌｃｏｍｍ Ｉｎｃｏｒｐｏｒａｔｅｄ 共用拡散標準セルの構造
WO2019116883A1 (ja) * 2017-12-12 2019-06-20 株式会社ソシオネクスト 半導体集積回路装置
JPWO2019116883A1 (ja) * 2017-12-12 2020-12-03 株式会社ソシオネクスト 半導体集積回路装置
US11342412B2 (en) 2017-12-12 2022-05-24 Socionext Inc. Semiconductor integrated circuit device
JP7174263B2 (ja) 2017-12-12 2022-11-17 株式会社ソシオネクスト 半導体集積回路装置

Also Published As

Publication number Publication date
US20100244142A1 (en) 2010-09-30
US8338864B2 (en) 2012-12-25
JPWO2009078069A1 (ja) 2011-04-28
EP2251901A1 (en) 2010-11-17
EP2251901A4 (en) 2012-08-29

Similar Documents

Publication Publication Date Title
WO2009078069A1 (ja) 半導体装置
EP2863433A3 (en) Semiconductor device and driving system
GB2453492A (en) Organic el device and manufacturing method thereof
WO2007117312A3 (en) Power device utilizing chemical mechanical planarization
JP2016508671A5 (ja)
WO2009072421A1 (ja) Ｃｍｏｓ半導体装置およびその製造方法
SG170670A1 (en) Method of fabricating a silicon tunneling field effect transistor (tfet) with high drive current
EP2704188A3 (en) Semiconductor device and method of fabricating the same
TW200731415A (en) Methods for forming a semiconductor device
EP2811527A3 (en) Dual-mode transistor devices and methods for operating same
SG191459A1 (en) Semiconductor device with transistor local interconnects
WO2008111991A3 (en) Spintronic transistor
JP2011124560A5 (ja)
TW200701461A (en) Semiconductor device
TW200644221A (en) Method of forming an integrated power device and structure
WO2009091840A3 (en) Power transistor with protected channel
WO2011093953A3 (en) High voltage scrmos in bicmos process technologies
WO2009058695A3 (en) Cool impact-ionization transistor and method for making same
TW200503268A (en) High voltage metal-oxide semiconductor device
TW200723549A (en) Dual gate electrode metal oxide semiconductor transistors
WO2008105816A3 (en) Gate dielectric structures, organic semiconductors, thin film transistors and related methods
WO2008054477A3 (en) High-performance field effect transistors with self-assembled nanodielectrics
WO2008101926A3 (en) Field effect transistor with metal-semiconductor junction
TW200719413A (en) Semiconductor device and fabricating method thereof
EP1976002A3 (en) Semiconductor device and method for manufacturing the same

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07859821

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2009546084

Country of ref document: JP

WWE Wipo information: entry into national phase

Ref document number: 2007859821

Country of ref document: EP

NENP Non-entry into the national phase

Ref country code: DE