WO2009034730A1 - ホスト負荷調整機能付周辺回路 - Google Patents

ホスト負荷調整機能付周辺回路 Download PDF

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Publication number
WO2009034730A1
WO2009034730A1 PCT/JP2008/055118 JP2008055118W WO2009034730A1 WO 2009034730 A1 WO2009034730 A1 WO 2009034730A1 JP 2008055118 W JP2008055118 W JP 2008055118W WO 2009034730 A1 WO2009034730 A1 WO 2009034730A1
Authority
WO
WIPO (PCT)
Prior art keywords
peripheral circuit
adjusting function
load adjusting
host load
interval
Prior art date
Application number
PCT/JP2008/055118
Other languages
English (en)
French (fr)
Inventor
Yasushi Nagai
Hiroshi Nakagoe
Shigeki Taira
Original Assignee
Renesas Technology Corp.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp. filed Critical Renesas Technology Corp.
Priority to US12/668,561 priority Critical patent/US20100241771A1/en
Publication of WO2009034730A1 publication Critical patent/WO2009034730A1/ja

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Bus Control (AREA)
  • Logic Circuits (AREA)

Abstract

　周辺回路による割込み、メモリバス帯域の利用や、データの処理スループットに制限をかける事により、周辺回路とホストＣＰＵによるデータ処理量がバランスするように容易に制御可能であるホスト負荷調整機能付周辺回路である。本発明の代表的な実施の形態は、ホスト負荷調整機能付周辺回路が発生する割込み要求の間隔の最小値を設定するための調整制約設定部と、割込み要求の発生タイミングをカウントするための周期カウンタとを備え、周期カウンタの値と調整制約設定部に設定された間隔とを比較することにより、設定間隔より短い間隔で発生する割込み要求を抑制するものである。
PCT/JP2008/055118 2007-09-13 2008-03-19 ホスト負荷調整機能付周辺回路 WO2009034730A1 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US12/668,561 US20100241771A1 (en) 2007-09-13 2008-03-19 Peripheral circuit with host load adjusting function

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2007237634A JP4659008B2 (ja) 2007-09-13 2007-09-13 ホスト負荷調整機能付周辺回路
JP2007-237634 2007-09-13

Publications (1)

Publication Number Publication Date
WO2009034730A1 true WO2009034730A1 (ja) 2009-03-19

Family

ID=40451745

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2008/055118 WO2009034730A1 (ja) 2007-09-13 2008-03-19 ホスト負荷調整機能付周辺回路

Country Status (3)

Country Link
US (1) US20100241771A1 (ja)
JP (1) JP4659008B2 (ja)
WO (1) WO2009034730A1 (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080288828A1 (en) * 2006-12-09 2008-11-20 Baker Marcus A structures for interrupt management in a processing environment
JP2011180767A (ja) * 2010-02-26 2011-09-15 Kyocera Mita Corp 半導体装置
KR101841930B1 (ko) * 2012-01-30 2018-03-26 삼성전자주식회사 인터럽트 스프레드 방법, 인터럽트 스프레드 장치 및 이를 구비하는 시스템 온-칩
WO2015173853A1 (ja) 2014-05-12 2015-11-19 株式会社日立製作所 情報処理装置、その処理方法、及び入出力装置
US10198275B2 (en) * 2016-05-31 2019-02-05 American Megatrends, Inc. Protecting firmware flashing from power operations
US11144481B2 (en) * 2018-04-11 2021-10-12 Apple Inc. Techniques for dynamically adjusting the manner in which I/O requests are transmitted between a computing device and a storage device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01201758A (ja) * 1988-02-08 1989-08-14 Fujitsu Ltd Ｄｍａ制御装置
JPH11149442A (ja) * 1997-11-18 1999-06-02 Hitachi Ltd データ転送制御装置
JP2001297053A (ja) * 2000-04-13 2001-10-26 Matsushita Electric Ind Co Ltd Ｄｍａリクエスト発行回路およびｄｍａリクエスト発行方法
JP2007041771A (ja) * 2005-08-02 2007-02-15 Matsushita Electric Ind Co Ltd プロセススケジューリングシステム、プロセススケジューリング方法およびプログラム

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5286168A (en) * 1992-01-31 1994-02-15 Westinghouse Electric Corp. Freestanding mixed tuned blade
US5352092A (en) * 1993-11-24 1994-10-04 Westinghouse Electric Corporation Light weight steam turbine blade
US5980209A (en) * 1997-06-27 1999-11-09 General Electric Co. Turbine blade with enhanced cooling and profile optimization
US6331100B1 (en) * 1999-12-06 2001-12-18 General Electric Company Doubled bowed compressor airfoil
US6398489B1 (en) * 2001-02-08 2002-06-04 General Electric Company Airfoil shape for a turbine nozzle
JP2004127163A (ja) * 2002-10-07 2004-04-22 Renesas Technology Corp マルチプロセッサシステム
JP2004227501A (ja) * 2003-01-27 2004-08-12 Yamaha Corp データ転送制御装置および方法
US7634589B2 (en) * 2004-09-23 2009-12-15 International Business Machines Corporation Method for controlling peripheral adapter interrupt frequency by estimating processor load in the peripheral adapter
US20060274351A1 (en) * 2005-06-02 2006-12-07 Daos Brenda F System and method for tracking conditions during document processing operations

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01201758A (ja) * 1988-02-08 1989-08-14 Fujitsu Ltd Ｄｍａ制御装置
JPH11149442A (ja) * 1997-11-18 1999-06-02 Hitachi Ltd データ転送制御装置
JP2001297053A (ja) * 2000-04-13 2001-10-26 Matsushita Electric Ind Co Ltd Ｄｍａリクエスト発行回路およびｄｍａリクエスト発行方法
JP2007041771A (ja) * 2005-08-02 2007-02-15 Matsushita Electric Ind Co Ltd プロセススケジューリングシステム、プロセススケジューリング方法およびプログラム

Also Published As

Publication number Publication date
JP2009070122A (ja) 2009-04-02
US20100241771A1 (en) 2010-09-23
JP4659008B2 (ja) 2011-03-30

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