WO2008146356A1 - 自動配線装置，自動配線方法，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体 - Google Patents

自動配線装置，自動配線方法，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体 Download PDF

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Publication number
WO2008146356A1
WO2008146356A1 PCT/JP2007/060837 JP2007060837W WO2008146356A1 WO 2008146356 A1 WO2008146356 A1 WO 2008146356A1 JP 2007060837 W JP2007060837 W JP 2007060837W WO 2008146356 A1 WO2008146356 A1 WO 2008146356A1
Authority
WO
WIPO (PCT)
Prior art keywords
automatic wiring
program
wiring
design condition
wiring processing
Prior art date
Application number
PCT/JP2007/060837
Other languages
English (en)
French (fr)
Inventor
Daita Tsubamoto
Hitoshi Yokemura
Hidenobu Shiihara
Kazukiyo Ogawa
Hisashi Aoyama
Masaki Tosaka
Original Assignee
Fujitsu Limited
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Limited filed Critical Fujitsu Limited
Priority to PCT/JP2007/060837 priority Critical patent/WO2008146356A1/ja
Priority to JP2009516096A priority patent/JP4555891B2/ja
Publication of WO2008146356A1 publication Critical patent/WO2008146356A1/ja
Priority to US12/574,084 priority patent/US8219955B2/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

　本発明は、設計条件を満たすとともに電気特性に関する設計品質を満たす配線処理を自動的に実行できるようにするために、第１配線処理部（１５ａ）によって設計条件を満たす配線処理を行なえなかった場合に、設計条件に係る優先度情報に応じて設計条件を変更する設計条件変更部（１６）と、第２配線処理部（１５ｂ）によって変更後の設計条件を満たす配線処理が実行できた場合に、配線領域の品質が許容できるものであるか否かを判断する品質許否判断部（１７）と、配線領域の品質が許容できるものであると判断されると、第２配線処理部（１５ｂ）による配線領域の配線処理の結果を出力する出力部（１８）とをそなえて構成する。
PCT/JP2007/060837 2007-05-28 2007-05-28 自動配線装置，自動配線方法，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体 WO2008146356A1 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
PCT/JP2007/060837 WO2008146356A1 (ja) 2007-05-28 2007-05-28 自動配線装置，自動配線方法，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体
JP2009516096A JP4555891B2 (ja) 2007-05-28 2007-05-28 自動配線装置，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体
US12/574,084 US8219955B2 (en) 2007-05-28 2009-10-06 Automatically wiring circuit by setting and changing reference to design quality relating to electric characteristic

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2007/060837 WO2008146356A1 (ja) 2007-05-28 2007-05-28 自動配線装置，自動配線方法，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US12/574,084 Continuation US8219955B2 (en) 2007-05-28 2009-10-06 Automatically wiring circuit by setting and changing reference to design quality relating to electric characteristic

Publications (1)

Publication Number Publication Date
WO2008146356A1 true WO2008146356A1 (ja) 2008-12-04

Family

ID=40074641

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2007/060837 WO2008146356A1 (ja) 2007-05-28 2007-05-28 自動配線装置，自動配線方法，自動配線プログラム，及び同プログラムを記録したコンピュータ読取可能な記録媒体

Country Status (3)

Country Link
US (1) US8219955B2 (ja)
JP (1) JP4555891B2 (ja)
WO (1) WO2008146356A1 (ja)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8578318B2 (en) 2011-08-24 2013-11-05 Kabushiki Kaisha Toshiba Method for implementing circuit design for integrated circuit and computer readable medium
JP2014099195A (ja) * 2014-01-08 2014-05-29 Fujitsu Ltd 設計支援装置、設計支援方法及びプログラム
US10839119B2 (en) 2018-02-16 2020-11-17 Fujitsu Limited Bus wiring searching method and information processing apparatus

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5583332B2 (ja) * 2008-06-06 2014-09-03 ピーエスフォー ルクスコ エスエイアールエル スルーホール配置装置およびスルーホール配置方法
CN103778266A (zh) * 2012-10-18 2014-05-07 鸿富锦精密工业（深圳）有限公司 信号线走线检查系统及方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498900A (ja) * 1990-08-17 1992-03-31 Oki Electric Ind Co Ltd プリント配線板の自動配線方法
JPH0689314A (ja) * 1992-04-16 1994-03-29 Hitachi Ltd 設計支援方式および装置

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JPH01292473A (ja) * 1988-05-19 1989-11-24 Hitachi Ltd 配線経路決定法
JPH0221633A (ja) 1988-07-11 1990-01-24 Hitachi Ltd 配線方式
JP3017214B1 (ja) 1999-02-05 2000-03-06 日本電気通信システム株式会社 配線条件自動生成装置及び配線条件自動生成方法
US6631509B2 (en) * 2000-01-27 2003-10-07 Matsushita Electric Industrial Co., Ltd. Computer aided design apparatus for aiding design of a printed wiring board to effectively reduce noise
US7280953B2 (en) 2000-05-11 2007-10-09 Fujitsu Limited Noise countermeasure determination method and apparatus and storage medium
US7065480B2 (en) 2000-05-11 2006-06-20 Fujitsu Limited Noise countermeasure determination method and apparatus and storage medium
JP2002259481A (ja) 2000-05-11 2002-09-13 Fujitsu Ltd ノイズ対策決定方法及び装置、記憶媒体並びにコンピュータプログラム
JP2002092059A (ja) 2000-09-18 2002-03-29 Sohwa Corporation プリント配線基板の配線設計システム
JP4035354B2 (ja) * 2001-07-11 2008-01-23 富士通株式会社 電子回路設計方法及び装置、コンピュータプログラム及び記憶媒体
JP4059067B2 (ja) 2002-11-15 2008-03-12 富士通株式会社 設計ルール決定方法
JP2004258869A (ja) * 2003-02-25 2004-09-16 Denso Corp 実装回路設計方法、実装回路設計システムおよび実装回路設計プログラム
US20060168551A1 (en) * 2003-06-30 2006-07-27 Sanyo Electric Co., Ltd. Integrated circuit having a multi-layer structure and design method thereof
JP4017583B2 (ja) * 2003-10-16 2007-12-05 松下電器産業株式会社 半導体集積回路の設計データの回路表示方法
JP2006155120A (ja) * 2004-11-29 2006-06-15 Fujitsu Ltd 配線方法、プログラム及び装置
JP2008009574A (ja) * 2006-06-28 2008-01-17 Fujitsu Ltd 設計検証装置，設計検証プログラム，設計検証方法およびｃａｄシステム
US7757196B2 (en) * 2007-04-04 2010-07-13 Cisco Technology, Inc. Optimizing application specific integrated circuit pinouts for high density interconnect printed circuit boards
JP5082784B2 (ja) * 2007-11-09 2012-11-28 富士通株式会社 Ｃａｄシステム及びプログラム
KR101570993B1 (ko) * 2008-09-23 2015-11-23 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치의 제조방법

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0498900A (ja) * 1990-08-17 1992-03-31 Oki Electric Ind Co Ltd プリント配線板の自動配線方法
JPH0689314A (ja) * 1992-04-16 1994-03-29 Hitachi Ltd 設計支援方式および装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
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YAMAGUCHI T. ET AL.: "Tsushin Kiki Sekkei-yo CAD System: TCAD", FUJITSU, vol. 50, no. 6, 10 November 1999 (1999-11-10), pages 411 - 415, Retrieved from the Internet <URL:http://www.img.jp.fujitsu.com/downloads/jp/jmag/vol5-6/paper14.pdf> *

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8578318B2 (en) 2011-08-24 2013-11-05 Kabushiki Kaisha Toshiba Method for implementing circuit design for integrated circuit and computer readable medium
KR101382984B1 (ko) * 2011-08-24 2014-04-08 가부시끼가이샤 도시바 집적 회로의 회로 설계 구현 방법 및 컴퓨터 판독 가능 매체
JP2014099195A (ja) * 2014-01-08 2014-05-29 Fujitsu Ltd 設計支援装置、設計支援方法及びプログラム
US10839119B2 (en) 2018-02-16 2020-11-17 Fujitsu Limited Bus wiring searching method and information processing apparatus

Also Published As

Publication number Publication date
US8219955B2 (en) 2012-07-10
JP4555891B2 (ja) 2010-10-06
US20100030358A1 (en) 2010-02-04
JPWO2008146356A1 (ja) 2010-08-12

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