Classifications

• • G—PHYSICS
  • G11—INFORMATION STORAGE
  • G11C—STATIC STORES
  • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
  • G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
  • G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
  • G11C11/165—Auxiliary circuits
  • G11C11/1659—Cell access
• • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
  • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
  • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
  • Y10T29/00—Metal working
  • Y10T29/49—Method of mechanical manufacture
  • Y10T29/49002—Electrical device making

Definitions

• the present invention relates to nonvolatile memories and, in particular, to memories based on magnetoresistance.
• MRAM magnetic RAM
• MRAM architectures provide nonvolatility by using magnetic storage elements, but employ CMOS transistors to address individual memory cells, thereby incorporating vulnerability to radiation damage into the system.
• memory cells and architectures based on magnetoresistance are provided.
• memories including one or more memory cells (and electronic systems incorporating such memories) are enabled in which each memory cell includes a first multilayer thin-film storage element exhibiting magnetoresistance.
• a first signal line is disposed above the first thin-film storage element and electrically isolated therefrom.
• a second signal line is disposed above the first signal line. The second signal line is electrically isolated from both the first thin-film storage element and the first signal line.
• At least one non-conductive keeper element is in direct contact with the first thin-film storage element.
• each first thin-film storage element may be one or more of a GMR element, an MTJ element, a CIP element, or a CPP element.
• the first signal line and the second signal line in each memory cell are configured such that current directions associated with each are parallel.
• memories are enabled in which each memory cell in an array includes a magnetic tunnel junction (MTJ) storage element having first and second magnetic layers separated by an insulator.
• the first magnetic layers of the memory cells in each row of the array are connected in series to form a first sense line, and the second magnetic layers of the memory cells in each row of the array are connected in series to form a second sense line.
• MTJ magnetic tunnel junction
• each memory cell includes a multilayer thin-film storage element exhibiting magnetoresistance.
• the storage element is characterized by a horizontal width and a vertical thickness.
• the vertical thickness of the storage element is controlled with reference to the horizontal width of the storage element such that a volume of the storage element is sufficient to ensure thermal stability of a magnetization state of the storage element for a specified period of time.
• FIG. 1 is a simplified cross-section of a memory cell for use with embodiments of the invention.
• FIG. 2 is an example of a plot of demagnetizing field as a function of cell length.
• FIG. 3 is an example of a plot of demagnetizing field as a function of cell length for two different gap sizes.
• FIG. 4 is an example of a plot of theoretical write currents for an open-flux structure and a structure with a keeper.
• FIG. 5 is a simplified cross-section of a memory cell having a fully-closed- flux structure for use with various embodiments of the invention.
• FIGs. 6-10 are simplified top views of memory arrays according to specific embodiments of the invention.
• FIGs. 11 and 12 are simplified cross-sections of memory cells having fully-closed-flux structures for use with various embodiments of the invention.
• FIGs. 13-16 are simplified views of various aspects of memory cells having fully-closed-flux structures for use with various embodiments of the invention.
• nonvolatile memories based on various magnetoresistive mechanisms are enabled. Some embodiments described herein address various obstacles to miniaturization to enable magnetoresistive memories on scales not previously possible with conventional techniques. According to a particular class of embodiments, memory cells and architectures are implemented using memory cell designs having fully-closed-flux structures for which the write-current density is largely invariant with lithography linewidth, i.e., write current shrinks in proportion to linewidth.
• the term "demagnetizing field" as applied to a magnetic medium refers to the field inside the magnetic medium whose source is the magnetization of the medium itself. This field extends outside the magnetic medium where it is commonly referred to as the "fringe field.” However, it will be understood that these are just two different names for a single phenomenon. Inside the magnetic medium, the demagnetizing field opposes drive currents and grows significantly as the element size decreases. This is the reason for the large write currents necessary in conventional MTJ MRAM designs. The fringe field is essential in disk heads where it is used to write on the magnetic disk. However, it poses a significant problem in MRAM because the fringe field from one cell can change the bit value in a neighboring cell.
• a saturated rectangular cell will have a sheet of poles on each end of the cell normal to the direction of magnetization.
• the near-field of Ha will be constant at 2 ⁇ M, which for NiFe would be 5000 gauss, far in excess of the 2 Oe value for the film coercivity.
• M is likely to vary with position over the memory cell.
• demagnetizing fields are reduced through the use of a keeper to promote closure and/or form a closed-flux structure.
• a keeper is a low-coercivity magnetic film whose magnetization results in boundary conditions that cancel the magnetic field in the plane of the film, thereby lowering the demagnetizing fields.
• keepers serve two functions: reducing the demagnetizing field, and reducing the required drive current (this is apart from the issue of demagnetizing fields).
• L is the cell length along the easy axis
• a is the cell width along the hard axis
• T is the total thickness of the magnetic layers (exclusive of intervening conductive, nonmagnetic layers)
• g is the gap thickness between the cell and the keeper (i.e., the thickness of insulation 1)
• FIG. 2 A plot of the demagnetizing field as a function of the cell length for fixed values of the other parameters is shown FIG. 2.
• the demagnetizing field H ⁇ j is in given in oe and L in ⁇ m.
• M 0 800 gauss
• T 20 nm
• g 0.1 ⁇ m
• a 1 ⁇ m.
• Ha grows as the scale of the cell shrinks for fixed gap size. Therefore the demagnetizing field becomes unacceptably large as the cell size shrinks to nanoscale features.
• cell designs are provided in which the gap between the storage element(s) and the keeper is eliminated and, as a result, drive currents continue to decrease substantially linearly with cell width.
• GMR giant magnetoresistance
• These embodiments employ thin-film structures exhibiting GMR and in which the magnetic layer that has higher coercivity (i.e., switches at relatively higher fields) is used for storage, and the magnetic layer that has lower coercivity (i.e., switches at relatively lower fields) is used for readout.
• the bit value is stored as a magnetization direction.
• the resistance of the element depends on the relative orientation of the magnetizations in the hard and soft layers.
• GMR elements suitable for use with such embodiments may have one of each type of magnetic layer separated by an intervening non-magnetic conductive layer, or multiple periods of such layers.
• FIG. 5 An example of a "gapless" cell design having a fully-closed-flux structure and designed in accordance with a specific embodiment of the invention is shown in FIG. 5.
• An array of such memory cells may be configured as shown in FIG. 6.
• individual cells are accessed by an array of intersecting drive (address) lines.
• Write is by a coincidence of two half-select currents applied to one of each intersecting drive line. Each half-select current supplies one-half of the field required to switch the hard (storage) layer.
• This type of architecture is typically referred to as a "crosspoint" memory array.
• the cells of FIG. 6 reside in and are part of the GMR sense line. The cells are thus in series, though they are not physically distinct entities in the GMR elements, i.e., there is a continuous line.
• the active parts of the GMR line - the memory cells - are determined physically by the portions of the GMR line under the overlay of the straight lines and serpentine lines, where these drive lines are parallel.
• the straight drive lines will be referred to as "word” lines and the serpentine drive lines as "digit” lines. However, it will be understood that these designation are arbitrary and therefore should not be used to limit the scope of the invention.
• Reading involves applying a full-select current pulse to one word line, of sufficient strength to switch the soft layers of all the cells in that column without switching any of the hard layers (nondestructive readout), but of less strength than a half- select current to switch the hard layer.
• a sense-line bias current produces a signal on the GMR line.
• a full-select field to switch a cobalt (storage) layer may be 10 Oe
• a full- select field to switch a permalloy (readout) layer may be 2 Oe.
• the depicted design uses parallel word and digit lines at the memory cells for a couple of reasons.
• the first is that it allows the keeper ends to be positioned closely to the GMR element so as to keep Ha small.
• the second is that there is a cumulative disturb mechanism (also referred to as magnetization creep) caused by a combination of a pulsed hard-axis field together with an easy-axis field that is on while the hard-axis field is changing.
• This form of disturb in which the cells themselves become demagnetized so their information contents are lost, is avoided by this design which uses only easy-axis fields.
• arrays of memory cells taking advantage of this "easy-axis" configuration are not limited to the configuration illustrated in FIG. 5.
• the memory cells shown in FIGs. 1 and 11-16 may be arranged in similar configurations.
• the memory cell of FIG. 5 has a fully-closed-flux structure, as a result of which, the field required to switch a bit should remain constant as cell size decreases. That is, experimental evidence of mitigation of the disturb problem strongly suggests that drive currents will scale with decreasing feature size because of the common physical origin of the two problems, i.e., the demagnetizing field. Microamp drive currents at nanoscale feature sizes are expected, and cell size near the theoretical limit of a crosspoint memory array, i.e., a memory accessed by an intersecting array of address lines, should be achievable. This is an order of magnitude smaller than that of a typical MTJ MRAM cell.
• a keeper may be employed to keep external fields from entering the structure over which the keeper is placed.
• the magnetization in the keeper changes to a configuration whose poles create a magnetic field equal and opposite to the external field and functions to neutralize its entry into the keeper- protected structure.
• conetic magnetic shielding that protects the whole chip may be provided.
• Such shielding has long been used by the military to protect magnetic thin-film memories in submarines, planes, and missiles.
• FIG. 7 Various geometries for arranging memory cells such as various ones of those shown in FIGs. 1, 5, and 11-16 will now be described with reference to FIGs. 7- 9.
• the first two are based on the use of a permalloy keeper.
• Permalloy is a conductive metal alloy that requires insulation between the keeper and the magnetoresistive element to prevent shorting (e.g., the cell of FIG. 1).
• the denser, third geometry is enabled by the use of a gapless design with a non-conductive keeper (e.g., the cell of FIG. 5).
• the first geometry, illustrated in FIG. 7, assumes a conservative spacing requirement of one minimum feature size - f - resulting in a cell area of approximately 16f .
• bit lines are overlapped (but insulated) serpentine conductors, as shown in the light and dark shades of gray.
• the word lines are vertical striplines, shown in white, but partially obscured by the bit lines in the drawing.
• the GMR lines also used as sense lines, are horizontal striplines as shown.
• the keepers are indicated by the Xs.
• the second geometry illustrated in FIG. 8, assumes that features fabricated on different layers can be spaced more closely; a common practice in older semiconductor processes. In this example, the distance between features formed on different layers is assumed to be f/2. A thinner insulation for the conductive keepers results in a cell area of approximately 9f 2 .
• the cell in the third geometry, illustrated in FIG. 9, employs a non- conductive magnetic keeper material. This eliminates the need for a separate insulation layer, resulting in a cell area of approximately 4f 2 , the theoretical limit for a single-bit cell.
• Ferrites are a class of magnetic materials that are also insulators. There was a large and fairly successful effort in the recording-disk industry some years ago to make ferrite-coated disks for hard drives. This effort focused on high-coercivity materials.
• the keeper in the 4f 2 cells of FIG. 9 comprises a material with low coercivity and high permeability. Amorphous ferrite films are an example of materials suitable for use as a keeper in such implementations.
• the bit lines are overlapped (but insulated) serpentine conductors, shown in the light and dark shades of gray.
• the word lines are vertical striplines, shown in white, but partially obscured by the bit lines.
• the GMR lines are horizontal striplines (also white) under the keepers, but are also partially obscured.
• the keepers are again indicated by the Xs.
• ferrites having a Spinel structure e.g., MO-Fe 2 O 3 where M is a divalent metal such as Mn, Fe, Co, Ni, Cu, Mg, or Li. Mixtures of these ferrites may also be used.
• M is a divalent metal such as Mn, Fe, Co, Ni, Cu, Mg, or Li.
• corundum-type oxides e.g., hematite (alpha Fe 2 O 3 ), ilmenite (FeTiO 3 ).
• MTiO-Fe 2 O 3 where M may be Co, Ni, or Mn.
• Magnetoplumbite oxides e.g., MO-OFe 2 O 3 where M is one of the large divalent ions Ba, Sr, or Pb
• M is one of the large divalent ions Ba, Sr, or Pb
• pervoskite oxides e.g., MFeO 3 where M is one of La, Ca, Ba, or St.
• Other series such as MMnO 3 and MCoO 3 may also be suitable.
• Ferrimagnetic garnets e.g., 3M 2 O 3 - 5Fe 2 O 3 where M is one of the trivalent atoms Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, or Y, may also be used.
• mixtures of any of these and other suitable materials may be used.
• the cell area can be reduced to 4f 2 by fabricating alternating digit lines in two separate deposition and patterning steps and by using an insulating keeper material.
• a plan view of such an array showing overlapping digit lines is shown in FIG. 10.
• the two separately deposited sets of serpentine digit lines 1002 and 1004, shown in the two darker shades of gray, are insulated from each other. There are no GMR elements under the overlap of the serpentine lines so the overlap does not cause disturb.
• the keeper layers are not shown for clarity.
• the drawing is not to scale, e.g., the digit lines are shown narrower than they are in actuality for clarity.
• FIG. 11 shows two cross sections through the centers of two types of a gapless 4f cell design for use with various embodiments of the invention, each of which includes only one GMR element.
• FIG. 1 l(a) the digit line is closer to the GMR element, and insulators 2 and 3 are contiguous.
• FIG. ll(b) the digit line is closer to the word line, and insulators 1 and 2 are contiguous.
• bits along a given digit line are all of one type, and those in the neighboring digit line of the other type.
• the keeper being an insulator, contacts the GMR layer, as well as the two drive lines, resulting in a fully-closed-flux structure for each cell.
• FIG. 12(a) Alternative 4f designs for use with various embodiments of the invention, and including overlapping digit lines, an insulating keeper, and two GMR elements (e.g., similar to the design of FIG. 5) are shown in FIG. 12.
• the digit line is closer to the GMR film element, and insulators 2 and 3 are contiguous.
• the digit line is closer to the word line, and insulators 1 and 2 are contiguous.
• the data stored in the top and bottom GMR elements are identical, i.e., each bit value is stored in two different locations in a given cell.
• the two thin-film structures can be connected in series to get twice the resistance, and therefore twice the signal can be achieved relative to the cell designs of FIG. 11. And because noise depends on the square root of R, the cells of FIG. 12 are also operationally superior to those of FIG. 11 in this regard for relatively little added processing complexity.
• the GMR elements can be connected in series to double the sense signal, with the noise increasing only by 2.5.
• each sense line is implemented as pair of sense lines, and the sensing is done in parallel (instead of in series) due to the the resistance of the tunneling junction.
• the tunneling pair may be implemented as a pair of magnetic films 1302 and 1304 separated by an insulating gap as shown in FIG. 13.
• the two magnetic films are electrically connected by virtue of electrons tunneling through the intervening insulator.
• the resistance of the insulator is either large or small depending on whether the directions of magnetization of the two films are antiparallel or parallel.
• the MTJ elements may be connected to each other in parallel, i.e., top film to top film, bottom film to bottom film, to form a pair of sense lines.
• a particular MTJ element may be sensed when the magnetization of one of the element's films is toggled back and forth, thereby switching the resistance between one of the pairs of bits. This may be done with word and digit lines 1502 and 1504 placed on top of the MTJ elements as shown in FIG. 15. As discussed above, the word and digit lines may be parallel in the region of each MTJ element as described above with reference to FIG. 6 to achieve similar benefits. And as shown in FIG. 16, a keeper structure 1602 is provided over and in direct contact with each MTJ element, thus providing a fully-closed-flux structure which eliminates demagnetizing fields.
• computing systems may be implemented in which some or all of the various levels of the memory hierarchy, e.g., processor cache memory, system memory, long term storage, etc., are implemented using the techniques described herein.
• Implementations are also contemplated in which not only the memory cells themselves, but associated electronics are implemented using "all-metal" general purpose electronics. Such all-metal memory chips are inherently radiation hard.
• all-metal general-purpose electronics which may be used to implement such memories and the systems of which they are a part, reference can be made to U.S. Patent Nos. 5,929,636; 6,031,273; 6,469,927; and 6,483,740.
• CPP Current Perpendicular to the Plane
• CIP current in plane
• CPP memory elements are provided which address this issue, providing yet another mechanism that enables greater information density. According to such embodiments, CPP elements are provided which are much thicker than they are wide, as a result of which the resistance becomes reasonable.
• the vertical thickness of a CPP memory element is increased sufficiently as its width is decreased to maintain its mass or volume at the level required to ensure thermal stability for the specified time.
• An added benefit is that the increase in thickness can be realized by increasing the number of layers (i.e., multiple periods of the basic thin-film structure, which will further increase the GMR value and the signal. GMR values of experimental multi-period or lattice films have been found in the range around 100% at room temperature.
• the thickness of the nonmagnetic metal layer between the magnetic layers may also have to be increased in order to avoid exchange forces between the two layers increasing to the point where the lower-coercivity layer could not be switched independently. If this is the case, then this solution may not be as effective for MTJ-based memories in which the effectiveness of the tunnel layer is very sensitive to its thickness which is constrained to lie within very narrow limits in order to allow tunneling. However, as long as constraints on the tunneling layer may be met, the technique described herein may be used to implement such memory elements.
• the vertical thickness of the memory element is increased as the square of the decrease in horizontal feature size. So, for example, for a minimum feature size of about 6 nm and an aspect ratio of about unity, the thicknesses of individual layers in a two-layer GMR film, which may be about 8 nm each at micron-scale minimum feature size, will be increased to about 15 nm each.
• the overall increase in thickness can be realized by replacing the single GMR film by a multi-period structure with three periods, with the individual layer thicknesses maintained at about 8 nm. These two approaches may also be combined.
• this is done for both the storage layer and the read layer as each of them may be separately vulnerable to thermal instability. As discussed above, this may also be done for the nonmagnetic layer between them.
• this innovation may be combined with any of the other innovations described herein to achieve highly dense memory systems.
• the CPP memory elements described herein may be implemented without using any of the other techniques described herein.

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