WO2008111304A1 - 半導体デバイスの製造方法、半導体デバイスおよび光ピックアップモジュール - Google Patents

半導体デバイスの製造方法、半導体デバイスおよび光ピックアップモジュール Download PDF

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Publication number
WO2008111304A1
WO2008111304A1 PCT/JP2008/000514 JP2008000514W WO2008111304A1 WO 2008111304 A1 WO2008111304 A1 WO 2008111304A1 JP 2008000514 W JP2008000514 W JP 2008000514W WO 2008111304 A1 WO2008111304 A1 WO 2008111304A1
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WO
WIPO (PCT)
Prior art keywords
semiconductor device
adjoining
connection
optical pickup
separated
Prior art date
Application number
PCT/JP2008/000514
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English (en)
French (fr)
Inventor
Junya Furuyashiki
Syouzou Moribe
Hiroki Utatsu
Noriyuki Yoshikawa
Toshiyuki Fukuda
Masanori Minamio
Hiroyuki Ishida
Original Assignee
Panasonic Corporation
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Application filed by Panasonic Corporation filed Critical Panasonic Corporation
Priority to US12/525,217 priority Critical patent/US20100091633A1/en
Publication of WO2008111304A1 publication Critical patent/WO2008111304A1/ja

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    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B7/00—Recording or reproducing by optical means, e.g. recording using a thermal beam of optical radiation by modifying optical properties or the physical structure, reproducing using an optical beam at lower power by sensing optical properties; Record carriers therefor
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    • G11B7/123—Integrated head arrangements, e.g. with source and detectors mounted on the same substrate
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    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/146—Mixed devices
    • H01L2924/1461—MEMS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Light Receiving Elements (AREA)
  • Optical Head (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

　全体の大きさを小型にでき、特に略矩形のパッケージの４辺のうち対向する一対の２辺の長さを小さくできる半導体デバイスを効率よく製造する方法を提供する。 　平板であって、接続電極７５、内部配線７６、外部接続部７７が設けられた基板用原板１３０を用意する。この基板用原板１３０の隣り合う接続電極７５間の部分を切削し、溝５５を形成する。この溝５５に複数の半導体素子１０を搭載し、電極パッド２０と接続電極７５とを金属細線２２で接続し、さらに透明な蓋体９０を各半導体素子１０の上方を覆うようにスペーサ８０’の上に載せて接着させる。この後隣り合う溝５５間において２列に並ぶ接続電極７５の列間を切断して切り離す。さらに隣り合う半導体素子１０の間を切り離す。
PCT/JP2008/000514 2007-03-14 2008-03-10 半導体デバイスの製造方法、半導体デバイスおよび光ピックアップモジュール WO2008111304A1 (ja)

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JP2007-064806 2007-03-14
JP2007064806A JP2008227232A (ja) 2007-03-14 2007-03-14 半導体デバイスの製造方法、半導体デバイスおよび光ピックアップモジュール

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KR102588807B1 (ko) * 2016-12-15 2023-10-13 쑤저우 레킨 세미컨덕터 컴퍼니 리미티드 반도체 소자 패키지 및 그 제조방법, 자동 초점 장치
KR20180088067A (ko) * 2017-01-26 2018-08-03 주식회사 아모센스 센서 패키지용 윈도우 커버
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