Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
  • H01L21/67005—Apparatus not specifically provided for elsewhere
  • H01L21/67011—Apparatus for manufacture or treatment
  • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates

Definitions

• the invention relates to a method for the assembly of semiconductor chips on a substrate referred to in the preamble of claim 1 Art.
• the assembly of the semiconductor chips by means of an automatic assembly machine, which is known in the art as the bonders.
• the semiconductor chips are provided on a foil held by a frame, known in the art as a tape.
• the semiconductor chips adhere to the foil.
• the frame with the foil is clamped on a wafer table, which is displaceable in two orthogonal directions.
• the wafer table is shifted in cycles so that one semiconductor chip after another is provided at a first location A.
• the provided semiconductor chip is then picked up by the bonding head of the automatic assembly machine and placed at a second location B on a substrate.
• Suitable devices and methods are known, for example, from CH 694745, EP 923111, EP 1049140, EP 1587138 or WO 9732460.
• the invention has for its object to increase the throughput of such an automatic assembly machine.
• the invention is based on the finding that the time required for the wafer stage to provide the next semiconductor chip can be shortened if the wafer is oriented prior to the assembly process so that the edges of the semiconductor chips slope at a predetermined angle p extend to the two drive axes, so that in the subsequent assembly phase of the wafer table must be moved along each of the two drive axes to provide the next semiconductor chip.
• the orientation of the wafer is preferably adjusted by rotating the wafer table.
• the optimum value for the angle p depends on the external circumstances.
• the angle p will be optimal if both drive systems require approximately the same amount of time ⁇ t to move the wafer table and provide the next semiconductor chip.
• the provided semiconductor chip is then removed from the wafer table, as a rule rotated by an angle ⁇ and placed on the substrate.
• the angle ⁇ is a correction angle which is intended to eliminate a possible positional error.
• the angle ⁇ is determined by detecting the position of the semiconductor chip provided by the wafer table by means of an image processing system before the semiconductor chip is removed from the wafer table, and by means of the same or a second image processing system, the position of the substrate space on which the semiconductor chip is to be mounted , is recorded.
• the correction angle ⁇ corresponds to the angle by which the actual position of the semiconductor chip is rotated relative to its desired position on the substrate space.
• The angle ⁇ is a user-specified angle, which is usually 0 °, but in certain applications + 90 °, -90 ° or 180 °. The angle ⁇ is therefore always an angle clearly different from zero. If the angle ⁇ is 0 °, + 90 °, -90 ° or 180 °, then the edges of the mounted semiconductor chips are approximately parallel to the edges of the substrate.
• the inventive method for mounting semiconductor chips on a substrate wherein the semiconductor chips are provided by a wafer table, wherein the wafer table along two drive axes is displaceable, wherein the two drive axles enclose a predetermined angle, that is characterized in that a set-up phase of the wafer is oriented so that a line connecting the centers of two adjacent semiconductor chips, and the first drive axis include a predetermined angle p, which is in the range between 30 ° and 60 °, and that in a subsequent assembly phase of the wafer table respectively is moved simultaneously along the two drive axes to provide the next semiconductor chip.
• the provided semiconductor chip is picked up by the chip gripper of the bondhead, usually rotated by a different angle from zero angle ⁇ and placed on the substrate.
• the correction angle .DELTA..omega. Is an angle determined by the assembly machine, in each case during the assembly phase, which corresponds to the angle by which the actual position of the semiconductor chip (held by the chip gripper) is rotated with respect to its desired position (on the substrate).
• the angle p is preferably in a range between p 0 - 5 ° to p 0 + 5 °, wherein the angle p 0
• the wafer table is respectively displaced along the first drive axis, wherein the large ⁇ y denotes the distance by which the wafer table is respectively displaced along the second drive axis,
• FIG. 1 shows a wafer table which provides semiconductor chips for mounting on a substrate.
• FIG. 2 shows a detail of FIG. 1 in an enlarged representation.
• Fig. 1 shows schematically and in plan a wafer table 1, the semiconductor chips 2 provides for mounting on a substrate. 2 shows a detail of Fig. 1 in an enlarged view.
• a first drive 3 makes it possible to move the wafer table 1 along a first linear drive axis 4.
• a second drive 5 permits the movement of the wafer table 1 along a second linear drive axis 6 which includes a predetermined angle ⁇ with the first drive axis 4.
• a third, invisible drive allows the rotation of the wafer table 1 about an axis of rotation 7, which is perpendicular to the plane spanned by the two drive axles 4 and 6 level. In the example, the axis of rotation 7 is perpendicular to the plane of the drawing.
• the frame is clamped on the wafer table 1.
• the distances between the centers of the rectangular semiconductor chips 2 are denoted by Li and L 2 .
• the semiconductor chips 2 are arranged in rows and columns, wherein the distance between the rows is equal to the shorter distance L 2 and the distance between the columns is equal to the larger distance L 1 .
• the wafer table 1 is shifted in cycles to provide a semiconductor chip 2 at a predetermined location, respectively.
• Processing of the semiconductor chips 2 in the illustrated example is preferably carried out row by row along the path 10 shown in dashed line in FIG.
• the wafer table 1 is oriented such that the lines 11, which are the centers connect two adjacent semiconductor chips 2, which are in a same row, with the first drive shaft 4 includes a predetermined angle p.
• the wafer table 1 must be moved in both directions with each feed, ie the first drive 3 must move the wafer table 1 by the distance ⁇ x and the second drive 5 must move the wafer table 1 by the distance ⁇ y move. These movements occur simultaneously.
• the semiconductor chip 2 provided by the wafer table 1 is picked up by the chip gripper of the bonding head of the automatic assembly machine and placed on the substrate.
• the chip gripper is rotatable about its longitudinal axis and rotates the received semiconductor chip in the correct position, before the semiconductor chip 2 is deposited on the substrate. From Fig. 2 it can be clearly seen that the distances ⁇ x and ⁇ y are shorter than the distances L 1 and L 2 .
• the assembly of the semiconductor chips 2 is thus carried out advantageously according to the method steps:
• the angle p is typically in a range of 30 ° to 60 °. The optimum value for the angle p depends on various external factors.
• the route ⁇ S denotes the route connecting the centers of two adjacent semiconductor chips 2 which are in the same row when processing row by row or in the same column as column by column is processed.
• the track ⁇ S thus corresponds to the shorter distance L 2 between the centers of adjacent semiconductor chips 2 when row after row is processed, and the track ⁇ S corresponds to the larger distance Li between the centers of adjacent semiconductor chips 2 when column by column is processed.
• the travel path .DELTA.S is vectorially composed of a path .DELTA.x to the first drive 3 has to move the wafer table 1, and a distance ⁇ y by which the second drive 5 has to move the wafer table 1.
• the two drive axles 4 and 6 extend at right angles to each other, but the drive 5 is slower than the drive 3.
• the wafer table 1 is therefore preferably oriented so that the first drive 3 the wafer table 1 by the distance .DELTA.x along the first drive axle. 4 in the time interval .DELTA.t displaces, in which the second drive 5, the wafer table 1 by the distance .DELTA.y along the second drive shaft 6 shifts.
• the wafer table 1 is preferably oriented in the device phase in the process step 1, ie the angle p is set to the equation
• the distances .DELTA.x and .DELTA.y here denote the distances which the wafer table 1 has to cover in order to pass from a reference point on the semiconductor chip (for example the center of the semiconductor chip) to the reference point of the next adjacent semiconductor chip in the same row.
• ⁇ t .DELTA.t where the large .DELTA.t denotes the travel time, which is required for the displacement of the wafer table by the distances .DELTA.x and .DELTA.y.

Landscapes

• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Applications Claiming Priority (2)

Publications (1)

Family

ID=39511029

Family Applications (1)

Country Status (3)

Citations (4)

• 2007
  • 2007-02-06 CH CH2272007A patent/CH698719B1/de not_active IP Right Cessation
• 2008
  • 2008-02-01 WO PCT/EP2008/051234 patent/WO2008095865A1/de active Application Filing
  • 2008-02-04 TW TW97104183A patent/TW200847318A/zh unknown

Patent Citations (4)

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