WO2008087015A3 - Integrierter schaltkreis - Google Patents

Integrierter schaltkreis Download PDF

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Publication number
WO2008087015A3
WO2008087015A3 PCT/EP2008/000282 EP2008000282W WO2008087015A3 WO 2008087015 A3 WO2008087015 A3 WO 2008087015A3 EP 2008000282 W EP2008000282 W EP 2008000282W WO 2008087015 A3 WO2008087015 A3 WO 2008087015A3
Authority
WO
WIPO (PCT)
Prior art keywords
integrated circuit
connection
reference potential
relates
electrical
Prior art date
Application number
PCT/EP2008/000282
Other languages
English (en)
French (fr)
Other versions
WO2008087015A2 (de
Inventor
Anton Koch
Original Assignee
Atmel Germany Gmbh
Anton Koch
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Atmel Germany Gmbh, Anton Koch filed Critical Atmel Germany Gmbh
Priority to DE112008000041.7T priority Critical patent/DE112008000041B4/de
Publication of WO2008087015A2 publication Critical patent/WO2008087015A2/de
Publication of WO2008087015A3 publication Critical patent/WO2008087015A3/de

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00346—Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361—Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/0033—Radiation hardening
    • H03K19/00338—In field effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)

Abstract

Die Erfindung betrifft einen Integrierten Schaltkreis (10) mit zumindest einem Anschluss (18) zum Ein- und/oder Auskoppeln von elektrischen Signalen, insbesondere von Digitalsignalen, und mit integrierten, dem Anschluss (18) zugeordneten Bezugspotentialmitteln (12) für eine Bereitstellung eines elektrischen Bezugspotentials an den Anschluss (18). Erfindungsgemäß ist vorgesehen, dass die Bezugspotentialmittel (12), insbesondere durch einen Übersteuerungs Vorgang, schaltbar ausgebildet sind. Verwendung für Halbleiterbausteine.
PCT/EP2008/000282 2007-01-16 2008-01-16 Integrierter schaltkreis WO2008087015A2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE112008000041.7T DE112008000041B4 (de) 2007-01-16 2008-01-16 Integrierter Schaltkreis

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US88037707P 2007-01-16 2007-01-16
US60/880,377 2007-01-16
DE102007002502 2007-01-17
DE102007002502.7 2007-01-17

Publications (2)

Publication Number Publication Date
WO2008087015A2 WO2008087015A2 (de) 2008-07-24
WO2008087015A3 true WO2008087015A3 (de) 2008-09-18

Family

ID=39539559

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2008/000282 WO2008087015A2 (de) 2007-01-16 2008-01-16 Integrierter schaltkreis

Country Status (3)

Country Link
US (1) US7683655B2 (de)
DE (1) DE112008000041B4 (de)
WO (1) WO2008087015A2 (de)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3018604A1 (de) * 1979-05-17 1980-11-20 Rca Corp Integrierte klemmschaltung
EP0085991A2 (de) * 1982-02-10 1983-08-17 Nec Corporation Logische Schaltung
JPS58175324A (ja) * 1982-04-07 1983-10-14 Nec Corp 入力回路
US5216292A (en) * 1990-11-06 1993-06-01 Mitsubishi Denki Kabushiki Kaisha Pullup resistance control input circuit and output circuit
US5952850A (en) * 1996-09-25 1999-09-14 Kabushiki Kaisha Toshiba Input/output circuit and a method for controlling an input/output signal
US6285209B1 (en) * 1998-09-16 2001-09-04 Nec Corporation Interface circuit and input buffer integrated circuit including the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2837882C2 (de) * 1978-08-30 1984-03-29 Siemens AG, 1000 Berlin und 8000 München Taktformer für integrierte Halbleiter-Digitalschaltungen
DE2845379C2 (de) * 1978-10-18 1983-09-01 Siemens AG, 1000 Berlin und 8000 München Digitale integrierte Halbleiterschaltung
US5283479A (en) * 1991-04-30 1994-02-01 Microunity Systems Engineering, Inc. BiCMOS logic gate having plural linearly operated load FETs
JPH06209252A (ja) * 1992-09-29 1994-07-26 Siemens Ag Ｃｍｏｓ入力段
JP2001060667A (ja) 1999-08-24 2001-03-06 Nec Corp 半導体集積回路

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3018604A1 (de) * 1979-05-17 1980-11-20 Rca Corp Integrierte klemmschaltung
EP0085991A2 (de) * 1982-02-10 1983-08-17 Nec Corporation Logische Schaltung
JPS58175324A (ja) * 1982-04-07 1983-10-14 Nec Corp 入力回路
US5216292A (en) * 1990-11-06 1993-06-01 Mitsubishi Denki Kabushiki Kaisha Pullup resistance control input circuit and output circuit
US5952850A (en) * 1996-09-25 1999-09-14 Kabushiki Kaisha Toshiba Input/output circuit and a method for controlling an input/output signal
US6285209B1 (en) * 1998-09-16 2001-09-04 Nec Corporation Interface circuit and input buffer integrated circuit including the same

Also Published As

Publication number Publication date
US7683655B2 (en) 2010-03-23
DE112008000041A5 (de) 2009-09-17
DE112008000041B4 (de) 2023-11-16
US20080197875A1 (en) 2008-08-21
WO2008087015A2 (de) 2008-07-24

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