WO2008047422A1 - Procédé pour inspecter un schéma de câblages et système conçu à cet effet - Google Patents

Procédé pour inspecter un schéma de câblages et système conçu à cet effet Download PDF

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Publication number
WO2008047422A1
WO2008047422A1 PCT/JP2006/320723 JP2006320723W WO2008047422A1 WO 2008047422 A1 WO2008047422 A1 WO 2008047422A1 JP 2006320723 W JP2006320723 W JP 2006320723W WO 2008047422 A1 WO2008047422 A1 WO 2008047422A1
Authority
WO
WIPO (PCT)
Prior art keywords
wiring pattern
state
resist
etching
conductor
Prior art date
Application number
PCT/JP2006/320723
Other languages
English (en)
Japanese (ja)
Inventor
Masami Hiramoto
Tetsuo Oohori
Original Assignee
Casio Micronics Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Micronics Co., Ltd. filed Critical Casio Micronics Co., Ltd.
Priority to PCT/JP2006/320723 priority Critical patent/WO2008047422A1/fr
Publication of WO2008047422A1 publication Critical patent/WO2008047422A1/fr

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0269—Marks, test patterns or identification means for visual or optical inspection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0548—Masks
    • H05K2203/056—Using an artwork, i.e. a photomask for exposing photosensitive layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/16—Inspection; Monitoring; Aligning
    • H05K2203/162—Testing a finished product, e.g. heat cycle testing of solder joints
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0005—Apparatus or processes for manufacturing printed circuits for designing circuits by computer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists

Definitions

  • the present invention relates to a wiring pattern inspection method and a wiring pattern inspection system for inspecting the appearance of a wiring pattern to determine whether the wiring pattern is good or bad.
  • a base material in which a conductor 2 is laminated on a base film 1 is prepared.
  • a resist 3 is applied onto the conductor 2 of the base material, and a glass mask 4 designed and manufactured in advance is placed above the resist 3 and exposed.
  • the exposed portion in the resist 3 is removed with a developer, and a resist pattern 5 is formed from the remaining resist 3.
  • a resist pattern 5 as an etching mask, unnecessary portions of the conductor 2 are removed by wet etching, and the resist 3 on the conductor 2 is removed to form a wiring pattern 6 of the conductor 2.
  • a flexible sprocket 8 can be manufactured by forming sprocket holes 7 for conveyance on the left and right sides of the base film 1.
  • the manufactured flexible substrate 8 is measured by the AOI (Automated Optical Inspection) and!, Inspection equipment, and the appearance of the wiring pattern 6 is measured.
  • the product design data is verified, and the result of the verification is checked for the presence or absence of defects in the wiring pattern 6 (see, for example, Patent Documents 1 and 2).
  • Patent Document 1 JP-A-11 132723 (paragraph numbers 0033 to 0049)
  • Patent Document 2 Japanese Patent Laid-Open No. 2000-199709 (see paragraph numbers 0041-0052) Disclosure of the Invention
  • Patent Documents 1 and 2 it is possible to improve the image processing speed and perform inspection regardless of the wiring pattern material and process type.
  • the conventional inspection method has a big problem at its essential point. The conventional inspection method will be described below together with the inspection system.
  • the conventional inspection system 200 mainly includes a PC (Personal Computer) 10, a design device 20, a server 30 and an inspection device 40, and these devices are connected via an in-house LAN 50. So that they can communicate with each other.
  • An external LAN 60 is connected to the internal LAN 50, and communication between an external PC (not shown) and the PC 10 is possible.
  • step Tl when a product specification is first obtained from a customer as product specification data, or the product specification is a document, Is converted into data on PC10 and used as product specification data (step Tl). After that, the product is designed by the design device 20 based on the product specification data, product design data is created, and the product design data is stored in the server 30 (step ⁇ 2, refer to the first stage in FIG. 15).
  • a pseudo mask correction value obtained from experience based on the product design data is set in the design device 20, and then the pseudo mask is designed in the design device 20 based on the pseudo mask correction value and the product design data.
  • mask data (Step ⁇ 3, ⁇ 4).
  • a glass mask 4 is manufactured based on the mask data
  • a wiring pattern 6 is prototyped using the glass mask 4, and the wiring pattern 6 is measured by the inspection device 40 to obtain first measurement data (step). ⁇ 6 ⁇ ⁇ 8).
  • the product design data and the first measurement data are collated to determine whether or not they match (step T9).
  • the design device 20 also changes the pseudo-mask correction value for the first measurement data force (Steps T10, T11) Repeat steps ⁇ 3 to T11 until the product design data matches the first measurement data.
  • Step ⁇ ⁇ 3 to Step T11 As a result of repeating each process from Step ⁇ ⁇ 3 to Step T11, if the product design data and the first measurement data match, as shown in FIG. 14, the matrix that is the basis of the first measurement data.
  • the mask data is stored in the server 30 as optimum mask data, and a glass mask 4 for mass production is manufactured based on the optimum mask data.
  • a wiring pattern 6 is formed using the glass mask 4, and the wiring pattern 6 Is measured by the inspection device 40 and the second measurement data is obtained (see steps ⁇ 12 to ⁇ 16, second stage in Fig. 15).
  • the wiring pattern 6 is formed by wet etching in the process of step T14, the surrounding conditions such as the planar shape and pattern density, variation in etching conditions, and non-uniformity in the flow of the etching solution As shown in the square frame in FIG. 16, the etching is performed in a curved state (in a rounded state) at a specific portion such as a bent portion as shown in the square frame of FIG. This is expressed in the measurement data of 2.
  • the product design data is downloaded from the server 30 by the PC 10, converted into data that can be handled by the inspection apparatus 40, and transferred to the inspection apparatus 40.
  • the inspection device 40 compares the product design data with the second measurement data to determine whether or not they match (step T17, see the third stage in FIG. 15).
  • the product design data is used as a criterion for determining the quality of the wiring pattern 6, and the consistency with the second measurement data is determined.
  • the line width and position of the wiring pattern 6, the planar shape top The bottom line width, lead length, lead line width, lead chip, lead protrusion, etc. are included as representative criteria criteria.
  • step T17 If the product design data and the second measurement data coincide with each other as a result of the process in step T17, the wiring pattern 6 subjected to the inspection is determined to be a non-defective product and the inspection is terminated (step T18). Conversely, if it is determined that the product design data and the second measurement data do not match, The provided wiring pattern 6 is determined to be defective, and the inspection is completed by marking the flexible substrate 8 with a defective marking or making a hole with the inspection device 40 (steps T19 and T20).
  • product design data in which a specific part such as a bent portion of the wiring pattern 6 is expressed in a rectangular shape is used as a criterion for determining whether the wiring pattern 6 is good or bad.
  • the product design data and the second measurement data are transferred between specific parts such as the bent part of the wiring pattern 6 in the process of Step T17. If the wiring pattern 6 used for the inspection is judged as a defective product, it will be inconvenient.
  • the wet etching state is taken into consideration, and the quality of the wiring pattern 6 is determined based on the product design data as a criterion. Unlike the fact, the wiring pattern 6 to be made is judged as a defective product. In other words, the product design data itself is a factor that lowers the inspection accuracy of the wiring pattern 6 that originally meets the criteria.
  • An object of the present invention is to improve the inspection accuracy of a wiring pattern.
  • the first invention is a first invention.
  • the second invention is:
  • the resist With the conductor and resist laminated on the substrate, the resist is exposed and developed to form a resist pattern, and then the conductor is etched to form a wiring pattern.
  • An etching simulation step for predicting a state of the wiring pattern after etching before etching based on a prediction result of the exposure and development simulation step; a measurement step for measuring the state of the wiring pattern;
  • the third invention provides
  • a measurement step for measuring the state of the wiring pattern for both the top and bottom, and using the prediction result of the simulation step as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement step A matching process for matching each part of the top and bottom of the wiring pattern;
  • the fourth invention is:
  • Etching predicts the state of the wiring pattern after etching before etching for both top and bottom based on the prediction result of the exposure and development simulation process Simulation process
  • a measurement process for measuring the state of the wiring pattern for both the top and the bottom, and using the prediction result of the etching simulation process as a determination criterion for the quality of the wiring pattern, the determination criterion and the measurement result of the measurement process A collation process for collating each part of the top and bottom of the wiring pattern;
  • the fifth invention provides
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • An inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
  • the sixth invention provides:
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • a simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching before etching based on the prediction result;
  • An inspection device that measures the state of the wiring pattern and uses the prediction result of the simulator as a determination criterion for the quality of the wiring pattern, and compares the determination criterion with the measurement result.
  • the seventh invention provides
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • the simulator that predicts the state of the wiring pattern for both the top and the bottom, the state of the wiring pattern is measured for both the top and the bottom, and the prediction result of the simulator is measured for the wiring pattern.
  • an inspection device that collates the determination criterion and the measurement result for each of the top and bottom portions of the wiring pattern;
  • the eighth invention provides
  • a wiring pattern inspection system formed by exposing and developing the resist to form a resist pattern in a state where a conductor and a resist are stacked on a substrate, and then etching the conductor.
  • a simulator that predicts the state of the resist pattern after exposure and development before exposure and development, and predicts the state of the wiring pattern after etching for both top and bottom before etching based on the prediction result;
  • the state of the wiring pattern is measured at both the top and the bottom, and the prediction result of the simulator is used as a determination criterion for the quality of the wiring pattern, and the determination criterion and the measurement result are used as the wiring pattern.
  • An inspection device that checks each part of both the top and bottom of
  • the prediction result of the state of the wiring pattern after etching is used as a determination criterion, not the product design data, the measurement result of the wiring pattern and the determination criterion are within the approximate range. Therefore, it is possible to improve the inspection accuracy of the wiring pattern by checking the quality of the wiring pattern.
  • the predicted result of the resist pattern state after exposure and development is also considered as a basis for the judgment criteria, and therefore the range in which the measurement result of the wiring pattern and the judgment criteria are extremely approximated. Therefore, it is possible to reliably improve the inspection accuracy of the wiring pattern by strictly checking the wiring pattern.
  • both the top and bottom portions of the wiring pattern are considered as the basis of the judgment standard, so that the measurement result of the wiring pattern and the judgment standard are within a very approximate range. Strict collation is performed to determine the quality of the wiring pattern, and the accuracy of wiring pattern detection can be improved reliably.
  • both the top and bottom portions of the wiring pattern are considered as the basis of the judgment criteria.
  • the wiring pattern inspection accuracy can be reliably improved by closely collating the measurement results and the determination criteria within a very approximate range, and the wiring pattern inspection accuracy can be reliably improved.
  • FIG. 1 is a drawing showing a schematic configuration of a wiring pattern inspection system.
  • FIG. 2 is a plan view showing a schematic configuration of a carrier tape.
  • FIG. 3 is a plan view showing a schematic configuration of a flexible substrate.
  • FIG. 4 is a drawing for explaining an example of the internal configuration of the inspection apparatus.
  • FIG. 5 is a drawing for explaining another example of the internal configuration of the inspection apparatus.
  • FIG. 6 is a flowchart showing a wiring pattern inspection method over time.
  • FIG. 7 is a flowchart showing a step subsequent to FIG.
  • FIG. 8 is a drawing schematically explaining the processing of FIGS. 6 and 7.
  • FIG. 9 is a drawing for explaining the design principle of a glass mask.
  • FIG. 10 is a view showing a modified example of the flexible substrate.
  • FIG. 11 is a drawing for explaining a method of manufacturing a flexible substrate.
  • FIG. 12 is a drawing showing a schematic configuration of a conventional inspection system.
  • FIG. 13 is a flowchart showing a conventional inspection method over time.
  • FIG. 14 is a flowchart showing a step subsequent to that in FIG.
  • FIG. 15 is a drawing schematically explaining the processes of FIGS. 13 and 14.
  • FIG. 16 is a drawing for explaining a conventional problem.
  • a wiring pattern inspection system 100 has a configuration in which a plurality of inspection devices 40 and a simulator 70 are added to a conventional inspection system 200. These devices are used to check the quality of each wiring pattern 6 in the carrier tape 9 of FIG.
  • the carrier tape 9 has a configuration in which a large number of wiring patterns 6 are formed on a base film 1 as a substrate having a wide and long reel shape. .
  • one flexible substrate 8 is configured for each wiring pattern 6, and one flexible substrate 8 is one piece of the carrier tape 9.
  • the flexible substrate 8 is a wiring substrate having the form shown in FIG. 3, and has a configuration in which one wiring pattern 6 is formed on a rectangular base film 1.
  • a large number of flexible substrates 8 are arranged over three tracks in the carrier tape 9, and each flexible substrate 8 is arranged along the length direction of the base film 3 for each track. ing.
  • the carrier tape 9 has sprocket holes 7 for each track. The sprocket hole 7 is used for transporting the base film 1 when the wiring pattern 6 is formed or the inspection is performed.
  • the PC 10 controls the operation of the whole or part of the wiring pattern inspection system 100, converts the file format of data created by the design device 20, the simulator 70, etc., and transfers the data to other devices. It is a device that executes processing that can be handled.
  • the design device 20 is a CAD (Computer Aided design) device that designs products such as a pseudo mask of the glass mask 4 and a finished product of the wiring pattern 6.
  • CAD Computer Aided design
  • the server 30 is a device that accumulates data created by the design device 20, the simulator 70, and the like and provides the data to other devices.
  • the inspection device 40 is an AOI device that automatically inspects the appearance of each wiring pattern 6 in the carrier tape 9 and determines whether the wiring pattern 6 is acceptable.
  • a plurality of inspection devices 40 are connected to the LAN 50, and the plurality of inspection devices 40 can inspect the appearance of the wiring pattern 6 at the same time.
  • the inspection device 40 Inside the inspection device 40, light emission such as a laser diode or LED (Light Emitting Diode) is provided. An element 41 and a light receiving element 42 such as a photosensor are arranged (see FIGS. 4 and 5). In the inspection apparatus 40, the light emitting element 41 emits light, and the light receiving element 42 receives the light. The state of is measured. “The state of wiring pattern 6” mainly means the appearance of wiring pattern 6. The wiring pattern 6 has a line width and position, a planar shape (top 6a line width, bottom 6b line width, lead length, Including lead line width, lead chip, lead protrusion, etc.).
  • the inspection device 40 As the inspection device 40, a type using incident light and a type using transmitted light are mainly applicable.
  • each light receiving element 42 receives the light emitted from each light emitting element 41 and reflected by the wiring pattern 6, so that the state of the wiring pattern 6 can be measured. ing.
  • two sets of movable light-emitting elements 41 and light-receiving elements 42 are arranged symmetrically above and below the flexible substrate 8. Yes.
  • the light receiving elements 42 receive the light emitted from the light emitting elements 41 and transmitted through the base film 1, so that the state of the wiring pattern 6 can be measured. Become.
  • a small camera such as a CCD (Charge Coupled Device) is provided above and below the flexible substrate 8 in place of the light emitting element 41 and the light receiving element 42, and the wiring pattern 6 is imaged by the small camera.
  • the configuration is such that the state of the wiring pattern 6 including the line width of the top 6a and the line width of the bottom 6b is measured.
  • the simulator 70 is a device that predicts the state of the wiring pattern 6 after the wet etching before actually forming the wiring pattern 6 on the base film 1.
  • the product specification showing the state of wiring pattern 6 requested by the customer If the customer's ability to obtain the product specifications as “product specification data” or the product specification is a document, it is converted to “product specification data” by the PC 10 (see step S1, first row in FIG. 8).
  • step S1 When the processing of step S1 is completed, the product is designed by the design device 20 based on the product specification data to create “product design data”, and the product design data is stored in the server 30 (step S2, FIG. (See the second row of 8).
  • step S2 When the processing of step S2 is completed, an etching correction value obtained by experience in the design apparatus 20 is set, and thereafter, the wiring pattern 6 according to the product specification is formed. Based on the etching correction value and the product design data, the design apparatus 20 designs a pseudo mask to create “mask data” (steps S3 and S4).
  • the pseudo mask is designed by setting an etching correction value in consideration of the side etching amount of the conductor 2 (see the blank portion A surrounded by the dotted line portion).
  • step S4 the mask data is converted into data that can be handled by the simulator 70 by the PC 10 (step S5).
  • simulator 70 performs the post-wet etching process based on the mask data after data conversion and the wet etching conditions such as the type of etchant, the type and thickness of conductor 2, the processing temperature, and the processing pressure.
  • the state of the wiring pattern 6 is predicted (step S6), and the prediction result is acquired as “simulation data” (step S7).
  • the process of step S6 corresponds to a simulation process (etching simulation process).
  • the line width of the wiring pattern 6 is specified only for the top 6a in the product specification, the line width of the wiring pattern 6 is predicted only for the top 6a, and the wiring pattern is determined in the product specification.
  • the line width of 6 is specified only for the bottom 6b, the line width of the wiring pattern 6 is predicted only for the bottom 6b.
  • the wiring width of wiring pattern 6 is measured for both the top 6a and bottom 6b. Predict.
  • product design data is stored on PC10.
  • Product design data that can be handled by the simulator 70 is obtained by data conversion, and transferred to the simulator 70 (steps S8 and S9).
  • step S7 and step S9 the product design data after the data conversion and the simulation data are collated by the simulator 70 to determine whether the product design data and the simulation data match each other.
  • Judge Step S10 Specifically, the product design data and simulation data transferred from the PC 10 by the simulator 70 are collated, and the product design data is compared with the product design data in terms of whether the simulation data is within a certain standard range of the product design data. Determine consistency with simulation data.
  • step S10 If the product design data and the simulation data match as a result of the processing in step S10, it is determined that the requirements of the product specification are satisfied, and the subsequent processing in step S13 and step S18 is performed. Migrate (see Figure 7).
  • step S10 Conversely, if the product design data and the simulation data do not match as a result of the processing in step S10, it is recognized that the requirements of the product specification are satisfied and the design device 20 A pseudo mask correction value is calculated based on the simulation data subjected to the processing of S10, and the pseudo mask correction value is set in the design apparatus 20 (steps Sl1, S12). After that, based on the pseudo mask correction value and the product design data, the design device 20 redesigns the pseudo mask, performs simulation again, and steps S4 to S7, S10 until the data satisfies the requirements of the product specifications. Repeat each process of ⁇ S12 many times.
  • step S13 using the PC 10, the mask data that is the basis of the simulation data that matches the product design data is stored in the server 30 as “optimal mask data” (FIG. 8). (Refer to the left side of the middle 3rd stage) [0058]
  • step S13 a glass mask 4 for mass production is manufactured based on the optimum mask data stored in the server 30, and the wiring pattern 6 is formed on the base film 1 using the glass mask 4.
  • step S15 the wiring pattern 6 is formed as described with reference to FIG.
  • the processes in steps S14 and S15 are performed by a known pattern forming apparatus (not shown).
  • step S15 After the processing in step S15 is completed, the carrier tape 9 on which the wiring pattern 6 is formed is supplied to the inspection device 40, and the state of each wiring pattern 6 is measured by the inspection device 40 (step S16).
  • the measurement result is acquired as “measurement data” (see the left side of the fourth stage in FIG. 8 in step S17).
  • the process of step S16 corresponds to a measurement process.
  • step S18 separately from the processes of step S13 to step S17, using PC10, the simulation data that matches the product design data is stored in the server 30 as "optimum simulation data”. (See step S18, right side of 3rd stage in Fig. 8).
  • step S18 the PC 10 is used to convert the optimal simulation data stored in the server 30 into data that can be handled by the inspection device 40, and the optimal simulation data after the data conversion is referred to as "determination reference data". Is stored in a library corresponding to the data storage section of the inspection device 40 (steps S19 and S20).
  • the inspection apparatus 40 stores the determination standard data corresponding to the line widths of the top 6a and the bottom 6b of the actually formed wiring pattern 6 in the library based on the measurement data. Select from among them (Step S21, see the right side of the fourth row in Fig. 8).
  • the selection criterion data may be manually selected by an operator or automatically selected by the detection device 40.
  • the determination reference data may be arbitrarily or periodically selected manually or manually by the operator or automatically by the inspection apparatus 40. For example, for each flexible substrate 8 of the carrier tape 9, it may be possible to select the same one, selectable for each track, or select for each piece. If possible, and selectable for each specific area in the piece.
  • step S21 the inspection device 40 is used to collate the measurement data with the criterion data, and determine whether the measurement data and the criterion data match each other (step S21).
  • step S22 refer to the fifth row in Fig. 8). Specifically, the measurement data and the judgment reference data are collated, and the consistency between the measurement data and the judgment reference data is judged from the viewpoint of whether or not the measurement data is within a certain standard range of the judgment reference data. To do.
  • step S22 corresponds to a verification process.
  • step S22 If the measurement data and the judgment reference data match as a result of the process of step S22, it is recognized that the actually formed wiring pattern 6 satisfies the product specification, and the wiring pattern is determined. 6 is judged as “non-defective” and the inspection is finished (step S23).
  • step S22 determines whether the measurement data does not match the judgment reference data as a result of the process in step S22. If the measurement data does not match the judgment reference data as a result of the process in step S22, it is determined that the actually formed wiring pattern 6 does not satisfy the product specification. Te, it is determined that the wiring pattern 6 as a "defective", and or a hole or subjected to defect marking inspection apparatus 40 to the flexible substrate 8, the inspection process ends (step S24, S25) 0
  • the result of predicting the state of the wiring pattern 6 after etching before the etching is not performed, in which the product design data is not used as a criterion for the quality of the wiring pattern 6 as in the conventional inspection method (optimum Since the measurement data of wiring pattern 6 and the judgment reference data are collated using (simulation data) as judgment criteria, the measurement result of wiring pattern 6 and the judgment criteria are collated within the approximate range, and pass / fail of wiring pattern 6 is confirmed. Can be determined. [0070] In particular, when the line width of the wiring pattern 6 is specified for both the top 6a and the bottom 6b in the product specification! /, The line width of the measurement data and the reference data should be verified. Since both the top 6a and bottom 6b are performed for each part, it is possible to judge the quality of the wiring pattern 6 by closely collating the measurement result of the wiring pattern 6 and its judgment criteria within a very approximate range. it can.
  • the inspection accuracy of the wiring pattern 6 can be improved, and as a result, the yield (ratio of non-defective products to all products) in mass production of the flexible substrate 8 can be prevented.
  • step S2 As one improvement 'design change item, exposure is performed between the processes of step S2 and step S3.
  • an exposure / development simulation process may be provided to predict the state of the resist pattern 5 after development (the line width and position of the resist pattern 5, the planar shape, etc.) with the simulator 70!
  • the design apparatus 20 reflects the prediction result of the exposure / development simulation process in the etching correction value so that the simulator 70 predicts the state of the wiring pattern 6 based on the prediction result.
  • the inspection apparatus 40 may be configured to reflect the prediction result of the exposure / development simulation process as it is in the criterion data.
  • the photolithography condition of the resist 3 affects the etching condition of the conductor 2.
  • the line width of the wiring pattern 6 is affected. Therefore, it is less than the minimum standard value of the line width of wiring pattern 6 in the product specification, and it is not preferable to deviate from the standard value of the product specification.
  • the resist pattern 5 is wider than the target, a portion (not shown) corresponding to the tip of the lead in the wiring pattern 6 is undesirably thickened by under-etching. For this reason, it is effective to provide the exposure / development simulation step to avoid these disadvantages.
  • step S6 the occupied area of the wiring pattern 6 occupied on the base film 1, the planar shape of the wiring pattern 6, the expansion and contraction of the base film 1, etc. It may be the basis of
  • the state of the wiring pattern 6 is predicted for each track of the carrier tape 9 in the process of step S6, and each predicted result for each track is determined for the track in the process of step S22.
  • the measurement data and the determination reference data may be collated for each track of the carrier tape 9. In this case, even if the etching conditions such as the flow of the etching solution and the pressure vary from track to track, the variation can be handled from track to track.
  • a TEG (Test Element Group) mark 80 is provided in an area other than the wiring pattern 6 of the flexible substrate 8 as shown in FIG. 10, and the TEG mark is processed in step S21. Even if it is configured to select the judgment reference data based on 80 measurement data.
  • the TEG mark 80 is composed of a plurality of linear conductors 2 having a predetermined pitch width (for example, 25 ⁇ m), and is formed through the same process as the wiring pattern 6.
  • the wiring pattern inspection system 100 and its inspection method are applied to a wiring board other than the flexible board 8, that is, a rigid board such as a metal board, a glass board, a ceramic board, and a glass epoxy board. You may apply.
  • the wiring pattern inspection method and inspection system according to the present invention are useful for determining the quality of the wiring pattern formed on the substrate, and in particular, the determination criteria for the quality of the wiring pattern and the wiring Suitable for comparing pattern measurement results.

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  • Microelectronics & Electronic Packaging (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

L'invention concerne l'amélioration de l'exactitude de l'inspection d'un schéma de câblages. Selon l'invention, un système (100) d'inspection de schéma de câblages est utilisé pour inspecter un schéma de câblages qui est formé par un motif en matériau de protection grâce à l'exposition et au développement d'un matériau de protection dans un état, dans lequel un corps conducteur et le matériau de protection sont laminés sur un substrat, puis grâce à l'attaque chimique du corps conducteur. Le système d'inspection du schéma de câblages est doté d'un simulateur (70) destiné à estimer l'état du schéma de câblages, et d'un appareil d'inspection (40), qui mesure l'état du schéma de câblages et qui compare les résultats de la mesure avec des critères de jugement grâce aux résultats estimés obtenus à partir du simulateur et utilisés en tant que critères de jugement de conformité pour le schéma de câblages.
PCT/JP2006/320723 2006-10-18 2006-10-18 Procédé pour inspecter un schéma de câblages et système conçu à cet effet WO2008047422A1 (fr)

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PCT/JP2006/320723 WO2008047422A1 (fr) 2006-10-18 2006-10-18 Procédé pour inspecter un schéma de câblages et système conçu à cet effet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2006/320723 WO2008047422A1 (fr) 2006-10-18 2006-10-18 Procédé pour inspecter un schéma de câblages et système conçu à cet effet

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WO2008047422A1 true WO2008047422A1 (fr) 2008-04-24

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103454286A (zh) * 2012-05-31 2013-12-18 大日本网屏制造株式会社 基板检查装置及基板检查方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06213821A (ja) * 1993-01-21 1994-08-05 Hitachi Ltd 半導体ウェハの異物検査装置
JP2000088762A (ja) * 1998-09-11 2000-03-31 Fujitsu Ltd 外観検査装置
JP2000199709A (ja) * 1999-01-06 2000-07-18 Dainippon Screen Mfg Co Ltd パタ―ン検査方法およびパタ―ン検査装置
JP2001215113A (ja) * 2000-02-02 2001-08-10 Ibiden Co Ltd パターン検査装置およびパターン検査のためのマスタデータの作成方法
JP2003068803A (ja) * 2001-08-29 2003-03-07 Hitachi Cable Ltd 半導体装置用テープキャリアおよびそれを用いた半導体装置
JP2004056068A (ja) * 2002-05-28 2004-02-19 Shinko Electric Ind Co Ltd 配線形成システムおよびその方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06213821A (ja) * 1993-01-21 1994-08-05 Hitachi Ltd 半導体ウェハの異物検査装置
JP2000088762A (ja) * 1998-09-11 2000-03-31 Fujitsu Ltd 外観検査装置
JP2000199709A (ja) * 1999-01-06 2000-07-18 Dainippon Screen Mfg Co Ltd パタ―ン検査方法およびパタ―ン検査装置
JP2001215113A (ja) * 2000-02-02 2001-08-10 Ibiden Co Ltd パターン検査装置およびパターン検査のためのマスタデータの作成方法
JP2003068803A (ja) * 2001-08-29 2003-03-07 Hitachi Cable Ltd 半導体装置用テープキャリアおよびそれを用いた半導体装置
JP2004056068A (ja) * 2002-05-28 2004-02-19 Shinko Electric Ind Co Ltd 配線形成システムおよびその方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103454286A (zh) * 2012-05-31 2013-12-18 大日本网屏制造株式会社 基板检查装置及基板检查方法

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