WO2008018329A1 - Dispositif d'imagerie à semi-conducteur et son procédé de fabrication, et dispositif d'information électronique - Google Patents

Dispositif d'imagerie à semi-conducteur et son procédé de fabrication, et dispositif d'information électronique Download PDF

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Publication number
WO2008018329A1
WO2008018329A1 PCT/JP2007/065022 JP2007065022W WO2008018329A1 WO 2008018329 A1 WO2008018329 A1 WO 2008018329A1 JP 2007065022 W JP2007065022 W JP 2007065022W WO 2008018329 A1 WO2008018329 A1 WO 2008018329A1
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film
solid
imaging device
state imaging
manufacturing
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PCT/JP2007/065022
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English (en)
Japanese (ja)
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Hiroyuki Kawano
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Sharp Kabushiki Kaisha
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685—Process for coatings or optical elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate

Definitions

  • Solid-state imaging device manufacturing method thereof, and electronic information device
  • the present invention relates to a solid-state imaging device such as a CMOS type image sensor or a CCD type image sensor in which a photodiode and a MOS transistor are mixedly mounted on a semiconductor substrate, a manufacturing method thereof, and a solid-state imaging manufactured by the manufacturing method.
  • the present invention relates to an electronic information device such as an imaging camera, an image input camera, a scanner, a facsimile, and a camera-equipped mobile phone as an image input device.
  • this type of conventional solid-state imaging device has an imaging element in which a plurality of photodiodes that photoelectrically convert incident light are arranged in a two-dimensional manner and other functions in order to increase added value.
  • Peripheral circuits are mixedly mounted on the same semiconductor substrate (same chip), and in particular, the operation of peripheral circuits is speeded up and functions are being added.
  • an LDD structure As this LDD structure, an LDD (Lightly Doped Drain) region is formed between the channel region and the source / drain region, in which impurities having a lower concentration than the source / drain region are implanted.
  • a step of forming a sidewall on the side wall of the gate electrode is required. A sidewall is formed on the side wall of the gate electrode, and impurity ions are implanted using the gate electrode and the side wall as a mask, thereby forming a channel region without implanting impurities under the gate electrode.
  • an LDD region in which impurities are implanted at a low concentration is formed under the sidewall, and a gate electrode and a sidewall are provided! /, N! /, And a predetermined concentration on both sides has a high concentration of impurity. Implanted source and drain regions are formed.
  • Such a sidewall formation step is a step that is not required for forming a photodiode, and is newly added. For this reason, in the manufacturing process of the solid-state imaging device, the number of processes increases by that amount, and as a result, the manufacturing cost of the solid-state imaging device is increased.
  • Patent Document 1 In order to solve this problem, for example, in Patent Document 1, the formation of an antireflection film on the surface of the photodiode and the formation of a sidewall on the side wall of the gate electrode of the peripheral circuit are performed simultaneously. A method for manufacturing a solid-state imaging device that can suppress an increase in the number of processes is disclosed.
  • Patent Document 1 a conventional solid-state imaging device disclosed in Patent Document 1 will be described in detail with reference to FIG.
  • FIG. 4 is a longitudinal cross-sectional view showing an example of the configuration of the main parts of the imaging region and the peripheral circuit region in a predetermined intermediate manufacturing process of the conventional solid-state imaging device disclosed in Patent Document 1.
  • a conventional solid-state imaging device 20 is provided with a plurality of two-dimensional impurity diffusion layers 12 constituting a photodiode in an imaging element forming part (imaging region) of a semiconductor substrate 11.
  • a plurality of gate electrodes 13 of MOS transistors are provided via a gate insulating film.
  • a silicon oxide film 14 and a silicon nitride film 15 are provided in this order on the impurity diffusion layer 12. These silicon oxide film 14 and silicon nitride film 15 constitute an antireflection film 16.
  • a side wall 17 is provided on the side wall of the gate electrode 13, and the side wall 17 is also composed of a silicon oxide film 14 and a silicon nitride film 15.
  • FIGS. 5 (a) and 5 (b) are diagrams showing each manufacturing process up to a predetermined intermediate manufacturing process for explaining the manufacturing method of the solid-state imaging device of FIG. 4 disclosed in Patent Document 1. Sectional section It is.
  • a plurality of impurity diffusion layers 12 constituting a photodiode are formed two-dimensionally in an imaging element formation portion (imaging region) of a semiconductor substrate 11, and the semiconductor
  • a plurality of gate electrodes 13 of each MOS transistor are formed in the peripheral circuit forming portion of the substrate 11.
  • a silicon oxide film 14 and a silicon nitride film 15 are laminated in this order so as to cover the impurity diffusion layer 12 and the gate electrode 13.
  • a resist film (not shown) is formed so as to cover the silicon oxide film 14 and the silicon nitride film 15 on the photodiode (impurity diffusion layer 12), and this is formed into a predetermined pattern.
  • anisotropic dry etching is selectively performed on the silicon oxide film 14 and the silicon nitride film 15 which are not covered with the patterned resist film, the resist film covering the surface of the photodiode is removed.
  • the antireflection film 16 formed of the silicon oxide film 14 and the silicon nitride film 15 is formed on the surface of the photodiode to improve the sensitivity of the imaging device, and its periphery.
  • the side 17 of the silicon oxide film 14 and the silicon nitride film 15 formed on the side wall of the gate electrode 13 of each MOS transistor is formed while suppressing an increase in the number of processes. be able to.
  • Patent Document 2 discloses four layers of a silicon oxide film serving as a gate insulating film, a silicon oxide film and a silicon nitride film also used for forming a sidewall, and a silicon nitride film serving as an interlayer insulating film.
  • a solid-state imaging device in which a reflective film having a structural force is formed is disclosed. In this solid-state imaging device, when the antireflection film has a four-layer structure, the silicon oxide film and the silicon nitride film are partly used as an antireflection film to form a three-layer sidewall.
  • Patent Document 1 JP 2004-228425 A
  • Patent Document 2 Japanese Patent Laid-Open No. 2005-340475
  • the film thickness of the antireflection film 16 provided on the photodiode surface and the side wall of the gate electrode The problem is that the thickness of the provided sidewall 17 cannot be controlled independently. That is, the thickness of the antireflection film 16 provided on the photodiode surface is controlled by the thickness of the silicon oxide film 14 and the silicon nitride film 15, and the thickness of the sidewall 17 provided on the side wall of the gate electrode 13 is also set. Similarly, since the thickness is controlled by the thickness of the silicon oxide film 14 and the silicon nitride film 15, the thicknesses of the antireflection film 16 and the sidewall 17 which are different from each other cannot be controlled optimally independently. .
  • the antireflection film 16 provided on the surface of the photodiode is deposited so that incident light to the image pickup device is captured without being reflected by the surface of the photodiode, and its film quality (transmittance)
  • a high-sensitivity image sensor can be obtained.
  • a high-performance transistor can be obtained by accurately setting the film thickness of the sidewall 17 formed on the sidewall of the gate electrode 13 and accurately forming the LDD structure. For this reason, solving the above problem is an important issue for improving the performance of the solid-state imaging device.
  • the present invention solves the above-described conventional problems, and in manufacturing a solid-state imaging device in which an imaging element in which a plurality of photodiodes are arranged and a peripheral circuit including a MOS transistor are mixedly mounted. Properly control the film thickness of the antireflection film provided on the photodiode surface and the side wall thickness provided on the side wall of the gate electrode of the MOS transistor without increasing the number of manufacturing processes. It is an object to provide a manufacturing method of a solid-state imaging device that can be manufactured, a solid-state imaging device manufactured by this manufacturing method, and an electronic information device using the solid-state imaging device manufactured by this manufacturing method as an imaging unit Say it.
  • the method for manufacturing a solid-state imaging device of the present invention includes a desired optimum film having a different number of stacked layers, each of an antireflection film formed on a photodiode surface and a sidewall formed on a side wall of a gate electrode of a MOS transistor.
  • the anti-reflection film and the side wall forming step are simultaneously formed with a thickness, and the above object is achieved thereby.
  • the manufacturing method of the solid-state imaging device of the present invention is a solid-state in which an imaging element in which a plurality of photodiodes that photoelectrically convert incident light are arranged on a semiconductor substrate and a peripheral circuit having a MOS transistor are mixedly mounted.
  • the imaging element forming portion and the peripheral circuit forming portion are provided with an antireflection film formed on the surface of the photodiode and a sidewall formed on the side wall of the gate electrode of the MOS transistor.
  • Three layers of insulating films are laminated so that each film thickness becomes an optimum film thickness, and an antireflection film / sidewall forming step for forming the antireflection film and the sidewall from the three layers is provided. Yes, and the above objective is achieved.
  • the antireflection film is composed of two or three layers, and the sidewall is composed of three layers including the two layers from the lower layer. Yes.
  • a resist film is predetermined by photolithography so as to cover the three insulating films on the photodiode.
  • the antireflection film and the side wall are formed by removing the three layers of insulating films other than the region covered with the resist film by anisotropic dry etching.
  • the antireflection film is preferably controlled by controlling the refractive index and film thickness of the two layers of the lower insulating film and the intermediate insulating film.
  • the thickness of the sidewall is controlled by controlling the refractive index and the film thickness of the film, and also controlling the film thickness of the three layers of the lower insulating film, the intermediate insulating film, and the upper insulating film.
  • the antireflection film in the method for manufacturing a solid-state imaging device of the present invention is set to have a refractive index and a film thickness configuration capable of suppressing reflection of incident light to the photodiode.
  • the sidewall in the method for manufacturing a solid-state imaging device of the present invention is set to an optimum film thickness for forming the LDD structure of the MOS transistor.
  • a silicon oxide film, a silicon nitride film, and a silicon oxide film are laminated in this order from the lower layer.
  • the three layers in the method of manufacturing a solid-state imaging device of the present invention are plasma C
  • the antireflection film in the method for manufacturing a solid-state imaging device of the present invention is not the entire surface of the imaging element forming portion in which the photodiodes are arranged, but a part thereof, and at least the photodiode It is formed so as to cover the surface.
  • the uppermost insulating film of the three layers is removed by etching.
  • the necessary characteristics of the antireflection film and the sidewall are not impaired, and among the three layers. Then, dry etching conditions or wet etching chemicals are selected so that the interlayer insulating film does not lose its thickness.
  • an interlayer insulating film is formed on the photodiode and the MOS transistor, and the interlayer insulating film is formed on the interlayer insulating film.
  • Metal wiring is formed to electrically connect the imaging element and the peripheral circuit through the provided outer contour hole.
  • the uppermost insulating film of the three layers or the uppermost insulating film is used as an etching stopper at the time of forming the contact hole.
  • an insulating film made of a material different from that of the uppermost insulating film is formed.
  • the three layers are configured so that the antireflection function is optimized.
  • the refractive index and film thickness are set.
  • the silicon nitride film when the film thickness of the silicon oxide film is lOnm, the silicon nitride film is set to an optimum film thickness of 50 nm to 70 nm. Further, when the thickness of the silicon oxide film is lOnm, the silicon nitride film may be set to a thickness of 40 nm to 70 nm.
  • the silicon acid is used.
  • the silicon nitride film is set to an optimum film thickness of 20 nm to 35 nm.
  • the silicon nitride film is set to an optimum film thickness of lOnm or more and 20 nm or less.
  • the silicon nitride film when the thickness of the silicon oxide film is 5 nm or more and 50 nm or less, the silicon nitride film is set to lOnm or more and 80 nm or less. More preferably, when the thickness of the silicon oxide film is not less than lOnm and not more than 30 nm, the silicon nitride film is set to not less than 30 nm and not more than 70 nm.
  • the silicon nitride film is set to 50 nm soil lOnm. Note that the film thickness of the insulating film described above is set so that the antireflection function is optimal or favorable in consideration of the refractive index of the insulating film.
  • an interlayer insulating film is formed on the photodiode and the MOS transistor, and the thickness of the interlayer insulating film is set to 300 to 1000 mm. Set to.
  • the necessary characteristics of the antireflection film are transmittance and refractive index, and the necessary characteristics of the sidewall adversely affect the operating characteristics of the MOS transistor. It is a characteristic that does not give
  • the peripheral circuit in the method for manufacturing the solid-state imaging device of the present invention is a drive control circuit for driving and controlling the imaging element, and for converting an imaging signal from the imaging element into a display signal. At least one of signal processing circuits
  • the solid-state imaging device of the present invention is manufactured by the above-described method for manufacturing a solid-state imaging device of the present invention, and thereby the above object is achieved.
  • the electronic information device of the present invention uses a solid-state imaging device manufactured by the manufacturing method of the solid-state imaging device of the present invention for an imaging unit, and thereby the above-described object is achieved. [0047] With the above configuration, the operation of the present invention will be described below.
  • the antireflection film provided on the photodiode surface and the sidewall provided on the side wall of the gate electrode of the MOS transistor are simultaneously formed with a desired optimum film thickness with different number of layers. To do.
  • the refractive index and film thickness of the antireflective film are controlled by controlling the refractive index and film thickness of the two layers of the lower insulating film and the intermediate insulating film among the three insulating films. Set to film thickness.
  • the thickness of the sidewall is set to an appropriate thickness by controlling the thickness of the three layers of the lower insulating film, the intermediate insulating film, and the upper insulating film. This makes it possible to control the film thicknesses of the antireflection film and the side wall, which are different from each other, to the optimum film thickness independently.
  • the three-layer insulating film for example, a silicon oxide film, a silicon nitride film, and a silicon oxide film that are used in the manufacturing method of the solid-state imaging device are stacked in this order.
  • the antireflection film is formed on a part of the entire surface of the imaging element forming portion where the photodiodes are arranged. If the entire surface is covered with a silicon nitride film, water will be used during the H sintering process (hydrogenation process to eliminate silicon dangling bonds), which is performed to reduce the interface states generated on the semiconductor substrate.
  • an antireflection film having a high antireflection effect on the photodiode surface and a high-performance transistor in the peripheral circuit while suppressing an increase in the number of processes.
  • a solid-state imaging device having both an imaging element with good sensitivity and a peripheral circuit with excellent operating characteristics can be realized easily and satisfactorily at low cost.
  • FIG. 1 is a longitudinal sectional view showing a configuration example of main parts of an imaging region and a peripheral circuit region in a predetermined halfway manufacturing process of a solid-state imaging device according to an embodiment of the present invention.
  • FIG. 3 In the method for manufacturing a solid-state imaging device according to the embodiment of the present invention, the thicknesses of the silicon oxide film as the lower insulating film and the silicon nitride film as the intermediate insulating film are changed. ! / Is a graph showing a change in reflectance of incident light.
  • FIG. 4 is a longitudinal sectional view showing a configuration example of main parts of an imaging region and a peripheral circuit region in a predetermined halfway manufacturing process of a conventional solid-state imaging device.
  • 5 (a) and 5 (b) are longitudinal sectional views of main parts showing respective manufacturing steps up to a predetermined intermediate manufacturing step for explaining the manufacturing method of the solid-state imaging device of FIG.
  • FIG. 1 is a vertical cross-sectional view showing a configuration example of main parts of an imaging region and a peripheral circuit region in a halfway manufacturing process of the solid-state imaging device according to the embodiment of the present invention.
  • a plurality of impurity diffusion layers 2 constituting photodiodes are provided in a two-dimensional manner on the surface portion of the semiconductor substrate 1 of the imaging element forming portion (imaging region).
  • a plurality of gate electrodes 3 of each MOS transistor are provided in the peripheral circuit region of the imaging region.
  • the peripheral circuit is at least one of a drive control circuit for driving and controlling the image sensor and a signal processing circuit that performs signal processing for converting the image signal obtained from the image sensor into a display signal. is there.
  • An antireflection film 7 composed of three layers of insulating films 4 to 6 having an optimum film thickness is provided on each photodiode surface.
  • the antireflection film 7 is provided with an antireflection film. Since the function is determined by two layers from the lower layer, the film thickness of the antireflection film 7 may be set by the film thickness of these two layers.
  • a side wall 9 made of three insulating films 4 to 6 having an optimum film thickness is provided on the side wall of the gate electrode 3. Therefore, the thickness of the side wall 9 may be set by these three insulating films 4-6.
  • the antireflection film 7 and the sidewall 9 formed on the side wall of the gate electrode 3 of the MOS transistor are laminated in different layers by the antireflection film / sidewall formation process.
  • a plurality of desired optimum film thicknesses are simultaneously formed.
  • the peripheral circuit including the imaging element in which a plurality of photodiodes for photoelectrically converting incident light are arranged on the semiconductor substrate 1 and the MOS transistor through the longitudinal cross-sectional configuration in the intermediate manufacturing process of FIG. Is manufactured, and the solid-state imaging device 10 of this embodiment is manufactured.
  • FIGS. 2 (a) to 2 (c) illustrate each manufacturing process up to an intermediate manufacturing process of the solid-state imaging device of FIG. It is a principal part longitudinal cross-sectional view for clarifying.
  • a plurality of impurity diffusion layers 2 constituting a photodiode are two-dimensionally arranged and formed in an imaging element formation portion (imaging region) of the semiconductor substrate 1, Gate electrodes 3 of a plurality of MOS transistors are formed in the peripheral circuit formation region (peripheral circuit portion) via a gate insulating film.
  • the imaging element forming portion in order to form the impurity diffusion layer 2 of the photodiode, a well is formed through an ion implantation process and a heat treatment process.
  • element isolation formation by STI or the like, and LDD impurity diffusion layer formation after the sidewall formation described later are performed. Details of these steps can be performed in the same manner as in the prior art, and thus detailed description thereof is omitted here.
  • Three insulating films 4 to 6 are sequentially laminated so as to cover the surface of 2 (photodiode surface) and each gate electrode 3 of the peripheral circuit formation portion.
  • the refractive indexes of the lower insulating film 4 and the intermediate insulating film 5 are important as the antireflection film 7 formed on the surface of the photodiode.
  • the horizontal axis in FIG. 3 represents the film thickness of the intermediate silicon nitride film (interlayer insulating film 5), and the vertical axis in FIG. 3 represents the reflection of incident light in accordance with the film thickness of the intermediate layer insulating film 5). Shows the rate.
  • the black circle indicates a black diamond when the thickness of the lower silicon oxide film (lower insulating film 4) is set to lOnm, and the black square indicates a black diamond when the lower silicon oxide film (lower insulating film 4) is set to 30 nm. Indicates the case where the film thickness of the lower silicon oxide film (lower insulating film 4) is set to 50 nm.
  • the film thickness of an interlayer insulating film which will be described later, is 530 nm (usually 200 nm to 1; film thickness range of 1 OOOnm; the film thickness of the interlayer insulating film has little effect on the antireflection effect).
  • various structures are used on the interlayer insulating film and in multiple layers of metal wiring, and the antireflection film type (refractive index) and The film thickness can be set.
  • the lower insulating film 4 is a silicon oxide film of 10 nm
  • the intermediate insulating film 5 is a silicon nitride film with a thickness of 50 nm to 70 nm
  • the upper insulating film 6 is a silicon oxide film of 40 nm.
  • Lamination was performed using an (LP-CVD) apparatus.
  • the lower insulating film 4 is a silicon oxide film of 30 nm
  • the intermediate insulating film 5 is a silicon nitride film of 20 nm to 35 nm
  • the upper insulating film 6 is a silicon oxide film of 40 nm, both of which are reduced pressure CVD (LP-CVD) It laminated
  • LP-CVD reduced pressure CVD
  • the lower insulating film 4 is a silicon oxide film of 50 nm
  • the intermediate insulating film 5 is a silicon nitride film of lOnm or more and 20 nm or less
  • the upper insulating film 6 is a silicon oxide film of 40 nm.
  • Lamination was performed using a CVD (LP—CVD) apparatus.
  • the antireflection film 7 has an optimum antireflection effect (with a reflectance of approximately 0) by combining the optimum film thickness of the lower insulating film 4 (silicon oxide film) and the intermediate insulating film 5 (silicon nitride film). Percent). This is the case when the refractive index is about 2.0 or 2.0.
  • the thickness of the silicon oxide film (here, the lower insulating film 4) is 5 nm to 50 nm and the silicon nitride film (here, the intermediate insulating film 5) is set to 10 ⁇ m to 80 nm, the reflectivity A better anti-reflection effect of about 0 to 5 percent is obtained. More preferably, the silicon nitride film (here, the intermediate insulating film 5) is set to 30 nm or more and 70 nm or less when the film thickness force S1Onm of the silicon oxide film (here, the lower insulating film 4) is 30 nm or less.
  • the film thickness is 50 nm.
  • the silicon oxide film as the lower insulating film 4 is 10 ⁇ m ⁇ 5 nm
  • the silicon nitride film as the intermediate insulating film 5 is 50 nm ⁇ lOnm.
  • the above-mentioned insulating film thickness and film thickness range are set so that the antireflection function is optimal or better in consideration of the refractive index of the insulating film.
  • a resist film 8 is formed by photolithography so as to cover the antireflection film 7 on the surface of the photodiode (impurity diffusion layer 2). 3 layers of silicon oxide film (lower insulating film 4), silicon nitride film (interlayer insulating film 5) and silicon oxide film (upper insulating layer) After the film 6) is subjected to anisotropic dry etching, the resist film 8 above the photodiode is removed.
  • the antireflection film 7 for improving the sensitivity of the image sensor is formed on the surface of the photodiode so as to remain.
  • the insulating films 4 to 6 are etched by anisotropic etching, and a sidewall 9 for forming an LDD region for improving transistor characteristics is formed on the sidewall of the gate electrode 3.
  • the side wall 9 formed on the side wall of the gate electrode 3 of the MOS transistor has an offset region (from the gate electrode 3) when the source / drain region is formed by ion implantation. It becomes important because the film thickness becomes the LDD region. Therefore, the total film thickness of the three insulating films 4 to 6 can be set to the optimum film thickness of the sidewall 9 (offset width from the gate electrode 3; LDD region).
  • an LDD structure is formed by three layers of a silicon oxide film as the lower insulating film 4, a silicon nitride film as the intermediate insulating film 5, and a silicon oxide film as the upper insulating film 6. Therefore, the film thickness can be made as necessary.
  • These insulating films 4 to 6 can be deposited not only by a low pressure CVD apparatus but also by a CVD apparatus.
  • the refractive index and film thickness required for the antireflection film 7 provided on the surface of the photodiode (impurity diffusion layer 2) are reduced by the two layers of the lower insulating film 4 and the intermediate insulating film 5.
  • the film thickness required for the side wall 9 provided on the side wall of the gate electrode 3 of each MOS transistor constituting the peripheral circuit portion is made up of three layers of the lower insulating film 4, the intermediate insulating film 5 and the upper insulating film 6. It becomes possible to control each independently to a good film thickness.
  • the surface of the photodiode Of the antireflection film 7 and the gate electrode 3 of the MOS transistor A side wall 9 provided on the side wall is formed by laminating three layers of insulating films 4 to 6 at the same time in the same process by photolithography and dry etching.
  • the antireflection film 7 optimally controls the refractive index and film thickness of the lower insulating film 3 and the intermediate insulating film 4 so that the antireflection effect is enhanced, and the sidewall 9 is formed in the LDD region.
  • a high-sensitivity photodiode can be formed by setting the antireflection film 7 provided on the surface of each photodiode to a refractive index and a film thickness having a high antireflection effect.
  • a high performance transistor can be formed by setting the side wall 9 provided on the side wall of the gate electrode 3 of each MOS transistor constituting the peripheral circuit to an appropriate film thickness.
  • dry etching used here can be performed using an RIE apparatus, for example, using C4F gas, CHF gas, or the like.
  • each of the upper insulating film 6, the intermediate insulating film 5, and the lower insulating film 4 can be selectively removed, so that the sidewalls 9 can be formed uniformly.
  • the resist film 8 on the photodiode covers only the surface of the photodiode, and the other part of the imaging element formation portion (imaging region) is exposed. It is preferable to keep it. This is because the H sintering performed to reduce the interface state generated on the semiconductor substrate 1 can be carried out more effectively.
  • the interface state on the conductor substrate 1 is one of the causes of the leakage current ( ⁇ current) in the image sensor. If the entire surface of the image sensor formation part is covered with a silicon nitride film, the H
  • an ion implantation step for forming the imaging element and the MOS transistor of the peripheral circuit after the antireflection film side wall forming step of the present embodiment Perform an implantation diffusion process and form an interlayer insulation film on it
  • a contact hole forming process for forming a contact hole in the interlayer insulating film and a metal wiring forming process for forming a metal wiring for connecting the image pickup device and the peripheral circuit through the contact hole are performed.
  • the H sintering process is performed after this metal wiring formation process.
  • a salicide process using a refractory metal such as cobalt may be used to speed up the operation of the peripheral circuit.
  • a silicon nitride film may be formed as an etching stopper under the interlayer insulating film.
  • SiN film silicon nitride film
  • the purpose of removing the silicon oxide film (upper insulating film 6) is to reduce the antireflection effect when multiple types of films having different refractive indexes are laminated on the antireflection film 7 on the photodiode. Because there is.
  • the necessary characteristics of the antireflection film 7 provided on the photodiode surface and the side wall 9 provided on the side wall of the gate electrode 3 of each MOS transistor in the peripheral circuit portion are not impaired.
  • various etching conditions such as dry etching conditions and wet etching chemicals are appropriately selected.
  • the necessary characteristics of the antireflection film 7 are transmittance and refractive index, and the necessary characteristics of the sidewall 9 are characteristics that do not adversely affect the operation characteristics of the MOS transistor.
  • the refractive index and film thickness of the lower insulating film 4, the intermediate insulating film 5 and the upper insulating film 6 need to be set in consideration of the refractive index and film thickness of the film used as an etching stopper.
  • this type of insulating film can be used other than the combination of a silicon oxide film and a silicon nitride film.
  • the types of insulating films used in the method of manufacturing the solid-state imaging device include silicon oxide films and silicon nitride films. Three layers of film and silicon oxide film are stacked in this order from the bottom layer.
  • the antireflection film 7 formed on the surface of the photodiode (impurity diffusion layer 2) in the antireflection film side wall forming step of the present embodiment and The side walls 9 formed on the side walls of the gate electrode of the MOS transistor are simultaneously formed with a desired optimum film thickness with a different number of layers. This makes it High performance solid state by properly controlling the thickness of the antireflection film 7 provided on the photodiode surface and the thickness of the side wall 9 provided on the side wall of the gate electrode of the MOS transistor without increasing the manufacturing process.
  • the object of the present invention capable of manufacturing an imaging device can be achieved.
  • the refractive index and film thickness of the antireflection film 7 are two layers of the lower insulating film 4 and the intermediate insulating film 5 among the three insulating films 4 to 6 so that the reflectance is optimal or good.
  • the refractive index and film thickness can be set appropriately by controlling the refractive index and film thickness, but the antireflection film 7 is composed of two layers, a lower insulating film 4 and an intermediate insulating film 5.
  • three layers of a lower insulating film 4, an intermediate insulating film 5, and an upper insulating film 6 may be used.
  • the thickness of the side 9 can be set to an appropriate thickness by controlling the thickness of the three layers of the lower insulating film 4, the intermediate insulating film 5, and the upper insulating film 5.
  • the antireflection film 7 can be composed of two or three layers, and the sidewall 9 can be composed of three layers including two layers from the lower layer of the antireflection film 7.
  • specific examples thereof are not limited to, for example, two layers of antireflection films and three layers of sidewalls having different numbers of layers, which may be three layers as antireflection films and the same three layers as sidewalls.
  • the antireflection film 7 and the side wall 9 are formed, the antireflection film 7 can be formed in consideration of two layers, and the sidewall 9 can be formed of three layers.
  • an electronic device having the image input device such as the solid-state imaging device digital camera of the above embodiment, an image input camera, a scanner, a facsimile, or a camera-equipped mobile phone device.
  • Information devices will be described.
  • the electronic information device of the present invention is a memory such as a recording medium for recording data after performing predetermined signal processing for recording high-quality image data obtained by using the solid-state imaging device 10 of the above-described embodiment of the present invention as an imaging unit.
  • a display means such as a liquid crystal display device for displaying the image data on a display screen such as a liquid crystal display screen after performing predetermined signal processing for display of the image data, and after performing predetermined signal processing of the image data for communication It has at least one of communication means such as a transmission / reception device for performing communication processing and image output means for printing (printing) and outputting (printing out) the image data.
  • communication means such as a transmission / reception device for performing communication processing and image output means for printing (printing) and outputting (printing out) the image data.
  • the present invention relates to a solid-state imaging device such as a CMOS type image sensor or a CCD type image sensor in which a photodiode and a MOS transistor are mixedly mounted on a semiconductor substrate, a manufacturing method thereof, and a solid-state imaging device manufactured by this manufacturing method.
  • a solid-state imaging device such as a CMOS type image sensor or a CCD type image sensor in which a photodiode and a MOS transistor are mixedly mounted on a semiconductor substrate, a manufacturing method thereof, and a solid-state imaging device manufactured by this manufacturing method.
  • the anti-reflection effect on the photodiode surface is high!
  • a high-performance transistor in a peripheral circuit can be formed while suppressing an increase in the number of steps.
  • a solid-state imaging device having both an imaging element with good sensitivity and a peripheral circuit with excellent operating characteristics can be realized easily and satisfactorily at low cost.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)

Abstract

La présente invention concerne un dispositif d'imagerie à semi-conducteur haute performance dont le procédé de fabrication consiste à contrôler correctement l'épaisseur d'un film anti-réflexion disposé sur la surface d'une photodiode et l'épaisseur d'une paroi latérale disposée sur une paroi latérale d'électrode de grille d'un transistor MOS, sans augmenter le nombre d'étapes de fabrication. Dans le dispositif d'imagerie à semi-conducteur (10), une pluralité de photodiodes d'une zone d'imagerie sont montées en même temps que chaque transistor MOS dans la zone de circuit périphérique, et le film anti-réflexion (7) sur la surface de la photodiode et la paroi latérale (9) disposée sur celle de l'électrode de grille (3) du transistor MOS sont formés simultanément dans la même étape par stratification de trois couches de films isolants (4-6) et par photographie et gravure à sec. Plus précisément, le film anti-réflexion (7) contrôle les indices de réfraction et les épaisseurs du film isolant de couche inférieure (3) et du film isolant de couche médiane (4) de manière optimale pour obtenir des effets anti-réflexion élevés, et la paroi latérale (9) contrôle l'épaisseur du film isolant de couche inférieure (4), de celui de couche médiane (5) et de celui de couche supérieure (6) de manière optimale pour pouvoir former avec précision une zone LDD.
PCT/JP2007/065022 2006-08-07 2007-07-31 Dispositif d'imagerie à semi-conducteur et son procédé de fabrication, et dispositif d'information électronique WO2008018329A1 (fr)

Applications Claiming Priority (2)

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JP2006-214788 2006-08-07
JP2006214788A JP2008041958A (ja) 2006-08-07 2006-08-07 固体撮像装置およびその製造方法、電子情報機器

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JP2010118411A (ja) * 2008-11-11 2010-05-27 Sharp Corp 固体撮像素子およびその製造方法、電子情報機器
WO2010122657A1 (fr) 2009-04-24 2010-10-28 ルネサスエレクトロニクス株式会社 Dispositif d'imagerie à semi-conducteurs et son procédé de fabrication
JP6093368B2 (ja) 2012-10-29 2017-03-08 ルネサスエレクトロニクス株式会社 撮像装置の製造方法および撮像装置
JP2017130693A (ja) * 2017-04-13 2017-07-27 ルネサスエレクトロニクス株式会社 撮像装置およびその製造方法

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JPH0396421A (ja) * 1989-09-11 1991-04-22 Matsushita Electric Ind Co Ltd 自動車用ブロアの防水構造
JP2001245439A (ja) * 1999-12-31 2001-09-07 Nokia Mobile Phones Ltd 電池保護回路及び保護方法
JP2004335588A (ja) * 2003-05-01 2004-11-25 Renesas Technology Corp 固体撮像装置及びその製造方法
JP2005340475A (ja) * 2004-05-26 2005-12-08 Sony Corp 固体撮像装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3782297B2 (ja) * 2000-03-28 2006-06-07 株式会社東芝 固体撮像装置及びその製造方法
WO2003096421A1 (fr) * 2002-05-14 2003-11-20 Sony Corporation Dispositif a semi-conducteur et son procede de fabrication, et dispositif electronique

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0396421A (ja) * 1989-09-11 1991-04-22 Matsushita Electric Ind Co Ltd 自動車用ブロアの防水構造
JP2001245439A (ja) * 1999-12-31 2001-09-07 Nokia Mobile Phones Ltd 電池保護回路及び保護方法
JP2004335588A (ja) * 2003-05-01 2004-11-25 Renesas Technology Corp 固体撮像装置及びその製造方法
JP2005340475A (ja) * 2004-05-26 2005-12-08 Sony Corp 固体撮像装置

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