WO2007133044A1 - Procédé de fabrication de substrat semi-conducteur de nitrure et dispositif électroluminescent à semi-conducteur de nitrure du groupe iii - Google Patents

Procédé de fabrication de substrat semi-conducteur de nitrure et dispositif électroluminescent à semi-conducteur de nitrure du groupe iii Download PDF

Info

Publication number
WO2007133044A1
WO2007133044A1 PCT/KR2007/002388 KR2007002388W WO2007133044A1 WO 2007133044 A1 WO2007133044 A1 WO 2007133044A1 KR 2007002388 W KR2007002388 W KR 2007002388W WO 2007133044 A1 WO2007133044 A1 WO 2007133044A1
Authority
WO
WIPO (PCT)
Prior art keywords
substrate
nitride semiconductor
manufacturing
layer
hetero
Prior art date
Application number
PCT/KR2007/002388
Other languages
English (en)
Inventor
Chang Tae Kim
Soo Kun Jeon
Hyun-Min Jung
Original Assignee
Epivalley Co., Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR20060043580A external-priority patent/KR100788173B1/ko
Priority claimed from KR1020060047890A external-priority patent/KR101005765B1/ko
Application filed by Epivalley Co., Ltd. filed Critical Epivalley Co., Ltd.
Publication of WO2007133044A1 publication Critical patent/WO2007133044A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02488—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02491—Conductive materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate

Definitions

  • the present invention relates to a manufacturing method of a nitride semiconductor substrate and a manufacturing method of a Ill-nitride semiconductor light emitting device using the same, and more particularly, to a manufacturing method of a nitride semiconductor substrate with excellent crystallinity which forms a sacrificial layer on a substrate with a groove formed thereat, grow a GaN layer on the sacrificial layer, and remove the sacrificial layer by a wet etching method, and a manufacturing method of a Ill-nitride semiconductor light emitting device using the same.
  • FIG. 1 is a conceptual view illustrating one example of a conventional manufacturing method of a nitride semiconductor substrate. After a sacrificial layer 200 containing a Ill-nitride is formed on a substrate 100 and a GaN layer 300 is grown thick on the sacrificial layer 200 containing the Ill-nitride, the GaN layer 300 is separated from the substrate 100 by using a laser 400, to manufacture a nitride semiconductor substrate.
  • a sapphire substrate is used as the substrate 100.
  • the laser 400 irradiates the rear face of the sapphire substrate 100
  • the sapphire substrate 100 does not absorb but transmits the laser light as it is.
  • the sacrificial layer 200 has a smaller bandgap energy than a laser energy
  • the sacrificial layer 200 absorbs the laser light.
  • the sacrificial layer 200 generates heat, so that group III elements separate from group V elements and maintain a liquid phase.
  • the GaN layer 300 separates from the sapphire substrate 100, to thereby obtain the nitride semiconductor substrate.
  • the thermal expansion coefficient difference between the sapphire substrate 100 and the nitride semiconductor layer causes bending of the sapphire substrate 100.
  • the GaN substrate is easily broken in a stress solving direction or maintains an initial bending as it is.
  • the nitride semiconductor layer is damaged due to the stress between the GaN substrate and the nitride semiconductor layer, which has a detrimental effect on the yield of the device.
  • FIG. 2 is a conceptual view illustrating another example of the conventional manufacturing method of the nitride semiconductor substrate. After a sacrificial layer 201 is formed on a substrate 101 and a GaN layer 301 is grown thick on the sacrificial layer 201 , the GaN layer 301 is separated from the substrate 101 by a wet etching method.
  • an object of the present invention is to provide a manufacturing method of a nitride semiconductor substrate which can prevent bending of the nitride semiconductor substrate and secure the high quality nitride semiconductor substrate in a short etching time.
  • Another object of the present invention is to provide a manufacturing method of a Ill-nitride semiconductor light emitting device which can obtain a high efficiency vertical structure by easily removing a substrate.
  • the present invention provides a manufacturing method of a nitride semiconductor substrate for growing a Ill- nitride semiconductor light emitting device from a hetero-substrate, including: a first step of forming a nitride semiconductor layer on the hetero-substrate with a groove formed thereat, on the top face of which a sacrificial layer formed; and a second step of separating the nitride semiconductor layer side from the hetero- substrate side by removing the sacrificial layer.
  • the first step includes a process of forming the sacrificial layer on the hetero-substrate with the groove formed thereat.
  • the first step includes the processes of forming the sacrificial layer on the hetero-substrate, and forming the groove at the hetero-substrate with the sacrificial layer formed thereon.
  • the first step includes a process of forming the groove in a channel shape.
  • the first step includes a process of forming the groove to pass through the hetero-substrate.
  • the sacrificial layer formation of the first step includes a nitriding(nitrization) process.
  • the separation of the second step is conducted by a wet etching.
  • the hetero-substrate is a sapphire substrate.
  • the nitride semiconductor layer is GaN.
  • the sacrificial layer contains at least one selected from the group consisting of Ga, Nb, V 1 Ta 1 Zr, Hf, Ti, Al, Cr, Mo, W 1 Cu, Fe 1 C and In.
  • a manufacturing method of a Ill-nitride semiconductor light emitting device including: a substrate; a plurality of nitride semiconductor layers grown on the substrate and provided with an active layer for generating light by recombination of electrons and holes; and electrodes formed on and under the plurality of nitride semiconductor layers, the manufacturing method including: a first step of forming a groove at the substrate; a second step of forming a sacrificial layer on the substrate with the groove formed thereat; a third step of growing the plurality of nitride semiconductor layers on the sacrificial layer; and a fourth step of separating the plurality of nitride semiconductor layers side from the substrate side by removing the sacrificial layer.
  • the sacrificial layer formation of the second step includes a nitriding process.
  • the first step includes a process of forming the groove in a channel shape.
  • the manufacturing method further includes the steps of: forming a p-side electrode on the plurality of nitride semiconductor layers before the fourth step; and forming an n-side electrode under the plurality of nitride semiconductor layers after the fourth step.
  • the manufacturing method further includes a step of forming a reflection film on the plurality of nitride semiconductor layers as a p-side electrode, prior to the fourth step.
  • a manufacturing method of a nitride semiconductor substrate for growing a Ill- nitride semiconductor light emitting device from a hetero-substrate including: a first step of forming a groove at the hetero-substrate; a second step of growing an ln x Gai -x N(O ⁇ x ⁇ 1) layer on the hetero-substrate with the groove formed
  • the hetero-substrate is a sapphire substrate.
  • the ln x Gai -x N(O ⁇ x ⁇ 1) layer is
  • the groove formed at the hetero-substrate includes a groove passing through the hetero-substrate.
  • the light emitting device includes at least two grooves and in the first step, the at least two grooves are formed at the hetero-substrate to meet each other or one another(see Fig. 3).
  • the metal nitride sacrificial layer is formed on the substrate with the groove formed thereat, the GaN layer is formed thick on the sacrificial layer, and the wet etching is conducted thereon, to obtain the high quality nitride semiconductor substrate.
  • the groove formed at the substrate constitutes the channel to facilitate infiltration of an etching fluid, so that the wet etching time can be shortened to secure the high quality nitride semiconductor substrate.
  • the high efficiency Ill-nitride semiconductor light emitting device can be manufactured with the vertical structure electrode shape.
  • the ln x Gai -x N(O ⁇ x ⁇ 1) layer is grown
  • the GaN layer is formed thick
  • the groove formed at the substrate constitutes the channel to facilitate infiltration of an etching fluid, so that the photochemical wet etching time can be shortened to secure the high quality nitride semiconductor substrate.
  • FIG. 1 is a conceptual view illustrating one example of a conventional manufacturing method of a nitride semiconductor substrate.
  • FIG. 2 is a conceptual view illustrating another example of the conventional manufacturing method of the nitride semiconductor substrate.
  • FIGS. 3 to 5 are explanatory views illustrating one process of a manufacturing method of a nitride semiconductor substrate in accordance with the present invention.
  • FIG. 6 is a cross-sectional view illustrating one example of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention.
  • FIG. 7 is an explanatory view illustrating another process of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention.
  • FIG. 8 is a cross-sectional view illustrating another example of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention.
  • FIG. 9 is a process view illustrating a manufacturing method of a Ill- nitride semiconductor light emitting device in accordance with the present invention.
  • FIG. 10 is a cross-sectional view illustrating yet another example of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention.
  • FIG. 11 is an explanatory view illustrating a photochemical wet etching method.
  • FIGS. 3 to 5 are explanatory views illustrating one process of a manufacturing method of a nitride semiconductor substrate in accordance with the present invention.
  • Various shapes of grooves are formed at a top face of a substrate.
  • a sapphire substrate is normally used as the substrate.
  • Grooves with circular, elliptical and polygonal sections are formed by a laser having wavelengths of 266 nm, 355 nm and 532 nm and so on.
  • the diameters of the sections range from a few ⁇ m to a few hundreds ⁇ m.
  • the etching time is shortened to prevent deterioration of quality of the nitride semiconductor substrate due to long time exposure to the etching fluid.
  • Such grooves can also prevent vertical propagation of a potential defect generated in an initial growth stage of a semiconductor layer.
  • grooves 20 with a line width of 5 ⁇ m are formed at a top face
  • the scribing direction makes angles of 120°
  • grooves 21 with a line width of 10 ⁇ m are formed by a scribing
  • grooves 21 are about 350 ⁇ m.
  • the grooves 21 are formed at predetermined intervals.
  • FIG. 6 is a cross-sectional view illustrating one example of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention. Particularly, FIG.
  • a substrate 11 with grooves 23 formed thereat a sacrificial layer 12 formed on the substrate 11 , and a GaN layer 13 grown on the sacrificial layer 12.
  • a low temperature buffer layer for example, low temperature GaN layer
  • the sacrificial layer 12 may include a nitride metal layer and a double layer of a metal layer and a nitride metal layer. A nitridable metal is deposited
  • the nitridable metal contains at least one selected from the group consisting of Ga, Nb, V, Ta, Zr, Hf, Ti, Al, Cr, Mo, W, Cu, Fe, C and In.
  • the nitride metal layer such as a CrN layer is formed by nitriding the metal layer in a metal reduction atmosphere, for example, in an ammonia atmosphere.
  • the thickness of the nitride metal layer is dependent upon the flow rate and temperature of ammonia.
  • the double layer structure of the metal layer and the nitride metal layer can be obtained by nitriding only the surface of the metal layer.
  • the GaN layer 13 can be grown by an MOCVD, an HVPE and a combination thereof after the formation of the sacrificial layer 12. Ordinarily, the HVPE is used to rapidly grow the GaN layer 13.
  • single crystal GaN can be formed at a few ⁇ m by the MOCVD and the GaN layer 13 can be grown thick at a high
  • Ga metal reacts with HCI gas to produce GaCI gas
  • the GaCI gas reacts with NH 3 to produce GaN.
  • N 2 , H 2 and He can be used as a transfer gas.
  • the high quality GaN single crystal layer 13 can be grown by controlling a growth temperature, a ratio of group III elements to group V elements, and a moving speed of a transfer gas.
  • FIG. 7 is an explanatory view illustrating another process of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention.
  • the sacrificial layer 12 is removed by an etching fluid 31.
  • the GaN layer 13 is separated from the substrate 11 with the grooves 23 formed thereat, by using the etching fluid 31 for selectively etching only the sacrificial layer 12 made of the nitride metal layer.
  • the etching speed can be controlled by the concentration and temperature of the etching fluid 31. If the sacrificial layer 12 is a nitride metal layer containing Cr, a perchloro etching fluid is used as the etching fluid 31.
  • FIG. 8 is a cross-sectional view illustrating another example of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention.
  • grooves 23 can be formed at the substrate 11 by using a laser. In this case, while the grooves 23 are formed by the laser, a skin film such as an oxide film is formed on the metal layer. It is thus necessary to perform a process of removing the skin layer from the surface.
  • the metal layer is nitrided to form a sacrificial layer 12.
  • a GaN layer 13 is grown thick, to obtain a nitride semiconductor substrate.
  • FIG. 9 is a process view illustrating a manufacturing method of a Ill- nitride semiconductor light emitting device in accordance with the present invention, particularly, from a process of forming a sacrificial layer 1 on a substrate 11 with grooves formed thereat to a process of isolating a device.
  • the sacrificial layer 1 is formed on the substrate 11 with the grooves formed thereat, and nitrided.
  • the sacrificial layer 1 may include a nitride metal layer and a double layer of a metal layer and a nitride metal layer.
  • a nitridable metal is deposited at a few tens A to a few ⁇ m on the substrate 11 with the grooves formed thereat by using an e-beam evaporator or a sputter.
  • the nitridable metal contains at least one selected from the group consisting of Ga, Nb, V, Ta, Zr 1 Hf, Ti, Al, Cr, Mo, W, Cu, Fe, C and In.
  • the nitride metal layer such as a CrN layer is formed by nitriding the sacrificial layer 1 in a metal reduction atmosphere, for example, in an ammonia atmosphere.
  • the thickness of the nitride metal layer is dependent upon the flow rate and temperature of ammonia. Meanwhile, the double layer structure of the metal layer and the nitride metal layer can be obtained by nitriding only the surface of the metal layer.
  • nitride semiconductor layers including a buffer layer 2, an n-type nitride semiconductor layer 3 for supplying electrons, an active layer 4 for generating light by recombination of electrons and holes, and a p-type nitride semiconductor layer 5 for supplying holes.
  • the buffer layer 2 may be omitted.
  • a p-side electrode 6 is formed on the p-type nitride semiconductor layer 5.
  • the p-side electrode 6 can be made of one selected from the group consisting of Ni, Au, Ag, Cr, Ti, Pt, Pd, Rh, Ir, Al, Sn, AgAI, In, Ta, Cu, Co, Fe, Ru, Zr, W, Mo, PbSn and AuSn, or a combination thereof.
  • the p- side electrode 6 can be provided as a reflection film for reflecting light generated by the active layer 4.
  • the thickness of the p-side electrode 6 is not specially limited, but preferably ranges from 10 ⁇ m to 150 ⁇ m in consideration of a succeeding process.
  • the above process includes a process of forming a seed metal layer before forming the p-side electrode 6.
  • an etching process of separating the plurality of nitride semiconductor layers from the substrate 11 is carried out.
  • the n-type nitride semiconductor layer 3 is exposed.
  • a supplementary etching process of exposing the n-type nitride semiconductor layer 3 is required in some cases.
  • an n- side electrode 7 is formed on the exposed surface of the n-type nitride semiconductor layer 3.
  • the n-side electrode 7 can be made of one selected from the group consisting of Ni 1 Au, Ag 1 Cr, Ti, Pt, Pd, Rh, Ir 1 Al, Sn 1 In 1 Ta, Cu, Co, Fe, Ru, Zr 1 W and Mo, or a combination thereof.
  • the device is isolated into each chip.
  • a diamond sawing or a laser scribing is used as the method of isolating the device.
  • FIG. 10 is a cross-sectional view illustrating yet another example of the manufacturing method of the nitride semiconductor substrate in accordance with the present invention. Particularly, FIG. 10 shows a substrate 11 with
  • a high quality semiconductor layer is grown by an MOCVD. Meanwhile, the ln x Gai.
  • x N(0 ⁇ x ⁇ 1) layer 12 functions as a buffer layer to ease a lattice mismatch and a thermal expansion coefficient difference between the sapphire substrate 11 and the GaN layer 13 and to grow the high quality GaN layer 13.
  • the GaN layer 13 can be grown by an MOCVD, an HVPE and a
  • the HVPE is adopted to rapidly grow the GaN layer 13.
  • single crystal GaN can be formed at a few ⁇ m by the MOCVD and the GaN layer 13 can be grown thick at a high
  • FIG. 11 is an explanatory view illustrating a photochemical wet etching method.
  • the photochemical wet etching method light is irradiated from the outside to generate electrons and holes inside a nitride semiconductor layer.
  • the holes generated on the surface of the semiconductor layer react with a chemical etching fluid such as KOH, NaOH,
  • the resulting structure is etched by a chemical etching afterwards. Accordingly, if light is not irradiated from the outside, the electrons and the holes are not generated inside the nitride semiconductor layer and the etching is not performed either. If an energy of the light irradiated from the outside is equal to or larger than a bandgap energy of the semiconductor layer, the light is absorbed by the semiconductor layer and the electrons and the holes are formed therein. On the contrary, if the energy of the irradiated light is smaller than the bandgap energy of the semiconductor layer, the light is not absorbed but transmitted. That is, a high etching selectivity can be obtained by controlling the wavelength of the light applied from the outside and the material composition of the nitride semiconductor layer.
  • the photochemical wet etching method uses a mercury lamp 1 as a UV light source.
  • the light emitted from the mercury lamp 1 has various wavelengths. Particularly, a short wavelength component below 360 nm is a wavelength band absorbed by a GaN layer 13. Therefore, if a filter 2 for sufficiently blocking wavelengths below 360 nm is employed, electrons and holes are not generated in the GaN layer 13.
  • GaN layer 13 absorbs light over 360 nm, so that electrons and holes are
  • the ln x Gai -x N(O ⁇ x ⁇ 1) layer 12 is etched at a high speed by the photochemical wet etching method.

Abstract

L'invention concerne un procédé de fabrication d'un substrat semi-conducteur de nitrure et un procédé de fabrication d'un dispositif électroluminescent à semi-conducteur de nitrure du groupe III l'utilisant. Le procédé de fabrication du substrat semi-conducteur de nitrure pour développer le dispositif électroluminescent à semi-conducteur de nitrure du groupe III à partir d'un hétéro-substrat consiste dans une première étape à former une couche à semi-conducteur de nitrure sur le hétéro-substrat où on a formé une rainure et une couche sacrificielle sur une face supérieure, et, dans une seconde étape, à séparer le côté couche à semi-conducteur de nitrure du côté hétéro-substrat en évacuant la couche sacrificielle.
PCT/KR2007/002388 2006-05-15 2007-05-15 Procédé de fabrication de substrat semi-conducteur de nitrure et dispositif électroluminescent à semi-conducteur de nitrure du groupe iii WO2007133044A1 (fr)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
KR20060043580A KR100788173B1 (ko) 2006-05-15 2006-05-15 질화물 반도체 기판을 제조하는 방법 및 이를 이용한 3족질화물 반도체 발광소자를 제조하는 방법
KR10-2006-0043580 2006-05-15
KR1020060047890A KR101005765B1 (ko) 2006-05-29 2006-05-29 질화물 반도체 기판의 제조 방법
KR10-2006-0047890 2006-05-29

Publications (1)

Publication Number Publication Date
WO2007133044A1 true WO2007133044A1 (fr) 2007-11-22

Family

ID=38694101

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2007/002388 WO2007133044A1 (fr) 2006-05-15 2007-05-15 Procédé de fabrication de substrat semi-conducteur de nitrure et dispositif électroluminescent à semi-conducteur de nitrure du groupe iii

Country Status (1)

Country Link
WO (1) WO2007133044A1 (fr)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009044923A1 (fr) * 2007-10-04 2009-04-09 Canon Kabushiki Kaisha Procédé de fabrication d'un dispositif électroluminescent
CN102479887A (zh) * 2010-11-25 2012-05-30 萧介夫 磊晶元件的制作方法
US9048345B2 (en) 2009-12-31 2015-06-02 Epistar Corporation Method of forming light-emitting diode
CN103199160B (zh) * 2010-01-13 2015-12-09 晶元光电股份有限公司 发光二极管的形成方法
CN105185824A (zh) * 2015-09-02 2015-12-23 成都嘉石科技有限公司 半导体器件的制作方法
US9666754B2 (en) 2015-05-27 2017-05-30 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor substrate and substrate for semiconductor growth
CN108193230A (zh) * 2017-12-29 2018-06-22 厦门理工学院 一种钽衬底上生长InxGa1-xN纳米线的光电极及其制备方法
JP2019075569A (ja) * 2018-12-12 2019-05-16 晶元光電股▲ふん▼有限公司Ｅｐｉｓｔａｒ Ｃｏｒｐｏｒａｔｉｏｎ 半導体素子を選択的にトランスファーする方法
CN111430218A (zh) * 2019-01-09 2020-07-17 北京大学东莞光电研究院 一种自分离制备GaN单晶衬底的方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6500747B1 (en) * 2001-04-17 2002-12-31 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing GaN semiconductor substrate
US6627520B2 (en) * 2000-06-19 2003-09-30 Nichia Corporation Nitride semiconductor substrate and method for manufacturing the same, and nitride semiconductor device using nitride semiconductor substrate
US6723165B2 (en) * 2001-04-13 2004-04-20 Matsushita Electric Industrial Co., Ltd. Method for fabricating Group III nitride semiconductor substrate
US6730611B2 (en) * 2001-08-13 2004-05-04 Sony Corporation Nitride semiconductor growing process

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6627520B2 (en) * 2000-06-19 2003-09-30 Nichia Corporation Nitride semiconductor substrate and method for manufacturing the same, and nitride semiconductor device using nitride semiconductor substrate
US6723165B2 (en) * 2001-04-13 2004-04-20 Matsushita Electric Industrial Co., Ltd. Method for fabricating Group III nitride semiconductor substrate
US6500747B1 (en) * 2001-04-17 2002-12-31 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing GaN semiconductor substrate
US6730611B2 (en) * 2001-08-13 2004-05-04 Sony Corporation Nitride semiconductor growing process

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009044923A1 (fr) * 2007-10-04 2009-04-09 Canon Kabushiki Kaisha Procédé de fabrication d'un dispositif électroluminescent
US9048345B2 (en) 2009-12-31 2015-06-02 Epistar Corporation Method of forming light-emitting diode
CN103199160B (zh) * 2010-01-13 2015-12-09 晶元光电股份有限公司 发光二极管的形成方法
CN102479887A (zh) * 2010-11-25 2012-05-30 萧介夫 磊晶元件的制作方法
US9666754B2 (en) 2015-05-27 2017-05-30 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor substrate and substrate for semiconductor growth
CN105185824A (zh) * 2015-09-02 2015-12-23 成都嘉石科技有限公司 半导体器件的制作方法
CN108193230A (zh) * 2017-12-29 2018-06-22 厦门理工学院 一种钽衬底上生长InxGa1-xN纳米线的光电极及其制备方法
CN108193230B (zh) * 2017-12-29 2019-07-30 厦门理工学院 一种钽衬底上生长InxGa1-xN纳米线的光电极及其制备方法
JP2019075569A (ja) * 2018-12-12 2019-05-16 晶元光電股▲ふん▼有限公司Ｅｐｉｓｔａｒ Ｃｏｒｐｏｒａｔｉｏｎ 半導体素子を選択的にトランスファーする方法
CN111430218A (zh) * 2019-01-09 2020-07-17 北京大学东莞光电研究院 一种自分离制备GaN单晶衬底的方法

Similar Documents

Publication Publication Date Title
WO2007133044A1 (fr) Procédé de fabrication de substrat semi-conducteur de nitrure et dispositif électroluminescent à semi-conducteur de nitrure du groupe iii
JP5180050B2 (ja) 半導体素子の製造方法
US7674699B2 (en) III group nitride semiconductor substrate, substrate for group III nitride semiconductor device, and fabrication methods thereof
KR101211076B1 (ko) ＧａＮ계 반도체 발광 소자 및 그 제조 방법
JP5847083B2 (ja) 発光素子の製造方法
CN102714145B (zh) 第iii族氮化物半导体生长基板、外延基板、元件、自立基板及其制造方法
JP2022185100A (ja) 劈開技法を用いて基板を除去する方法
US7736925B2 (en) Method of fabricating nitride-based semiconductor laser diode
JP4818464B2 (ja) 微細構造の製造方法
CN105103310B (zh) 与生长衬底分离的紫外线发光装置及其制造方法
JP5706919B2 (ja) 半導体基板の製造方法
JP2003249453A (ja) 窒化ガリウム基板の製造方法
JP2004336040A (ja) 複数の半導体チップの製造方法および電子半導体基体
JP2001085736A (ja) 窒化物半導体チップの製造方法
JP2007048869A (ja) ＧａＮ系半導体発光素子の製造方法
JP2010521810A (ja) 半導体ヘテロ構造及びその製造
JP2000223417A (ja) 半導体の成長方法、半導体基板の製造方法および半導体装置の製造方法
KR100788173B1 (ko) 질화물 반도체 기판을 제조하는 방법 및 이를 이용한 3족질화물 반도체 발광소자를 제조하는 방법
JP2009170658A (ja) 半導体レーザ装置の製造方法
EP4144896A1 (fr) Procédé de fabrication d'élément semi-conducteur
JP5647497B2 (ja) 半導体基板、その製造方法、半導体デバイス及びその製造方法
JP2007197240A (ja) 窒化ガリウム単結晶基板の製造方法及び窒化ガリウム単結晶基板
JP4548117B2 (ja) 半導体発光素子の製造方法、集積型半導体発光装置の製造方法、画像表示装置の製造方法および照明装置の製造方法
KR20100132910A (ko) 반도체 기판, 그 제조방법, 반도체 디바이스 및 그 제조방법
KR101761833B1 (ko) 반도체 기판, 그 제조 방법, 반도체 디바이스 및 그 제조 방법

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 07746536

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 07746536

Country of ref document: EP

Kind code of ref document: A1