WO2007123262A1 - Procédé de fabrication d'un élément émetteur de lumière semi-conducteur au nitrure du groupe iii - Google Patents

Procédé de fabrication d'un élément émetteur de lumière semi-conducteur au nitrure du groupe iii Download PDF

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Publication number
WO2007123262A1
WO2007123262A1 PCT/JP2007/059001 JP2007059001W WO2007123262A1 WO 2007123262 A1 WO2007123262 A1 WO 2007123262A1 JP 2007059001 W JP2007059001 W JP 2007059001W WO 2007123262 A1 WO2007123262 A1 WO 2007123262A1
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Prior art keywords
layer
semiconductor layer
type semiconductor
light emitting
nitride semiconductor
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PCT/JP2007/059001
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English (en)
Japanese (ja)
Inventor
Tetsuo Sakurai
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Showa Denko K.K.
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Publication of WO2007123262A1 publication Critical patent/WO2007123262A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD

Definitions

  • the present invention is characterized in that the light emission output is high and the driving voltage is low.
  • the present invention relates to a method for manufacturing a group I I I nitride semiconductor light emitting device.
  • a group III nitride semiconductor light-emitting device is configured such that an n-type semiconductor layer and a P-type semiconductor layer are arranged with a light-emitting layer sandwiched therebetween, and holes are formed from a negative electrode and a positive electrode provided in contact with each other.
  • Light is emitted by injecting electrons and recombining them at the PN junction in the semiconductor layer. Since the intensity of this light emission is proportional to the number of carriers of holes and electrons to be recombined, the light emission output of the light emitting element becomes higher as more current flows. However, in actuality, since there is heat generation due to the bulk resistance of the semiconductor layer and the resistance of the electrode constituent material, it is not practical to increase the applied current in order to increase the light emission output.
  • the driving voltage V depends on the configuration of the n-type semiconductor layer and the p-type semiconductor layer.
  • the resistance generated by the P-type semiconductor layer must be as low as possible in order to reduce the drive voltage V ( It is necessary to suppress.
  • an object of the present invention is to provide a group III nitride semiconductor light emitting device having a high light emission output and a low driving voltage.
  • FIG. 1 shows a forward direction of a group III nitride semiconductor light emitting device.
  • the driving voltage V f of the rated current I f which is an intersection between the rated current I f (line A in the figure) the ideal characteristics of the current - voltage characteristic And the ohmic voltage V c between the p-type semiconductor layer and the electrode material. Therefore, the voltage V is used to reduce the drive voltage V f at the rated current. And voltage V. Must be lowered.
  • the voltage V e depends on the type of electrode material used, it is substantially determined by the selection. Therefore, in order to use a wide range of electrode materials, it is necessary to lower the voltage V fl instead of V e .
  • Current Speaking of the graph of voltage characteristics the voltage is V under a constant current. Lowering the value increases the slope of the straight line A, which is the ideal line.
  • the following formula (1) is often used to represent the ideal characteristics of light-emitting elements.
  • the present inventors grow a p-type semiconductor layer of a group III nitride semiconductor under a growth condition such that the growth rate is 8 to 20 nmZ, the p-type III having excellent crystallinity.
  • a group nitride semiconductor layer was obtained, and the present invention was completed by finding that the above-mentioned n-value was as extremely low as 2 or less.
  • the present invention provides the following inventions.
  • a negative electrode and a p-type semiconductor layer are formed on the n-type semiconductor layer and the P-type semiconductor layer.
  • n-type semiconductor layer, a light-emitting layer, and a P-type semiconductor layer made of a group III nitride semiconductor are stacked in this order on the substrate, and the positive electrode and the negative electrode are in contact with the P-type semiconductor layer and the n-type semiconductor layer, respectively.
  • a lamp comprising the group III nitride semiconductor light-emitting device according to item 3 or 4.
  • FIG. 1 is a diagram for explaining forward current-voltage characteristics of a light emitting device.
  • FIG. 2 is a schematic diagram showing a cross section of a group II I nitride semiconductor light emitting device of the present invention.
  • FIG. 3 is a graph showing the measurement result of the current-voltage characteristic curve of the light-emitting element obtained in Example 1.
  • FIG. 4 is a graph showing the measurement result of the current-voltage characteristic curve of the light-emitting element obtained in Example 2.
  • FIG. 5 is a graph showing the measurement result of the current-voltage characteristic curve of the light emitting device obtained in Comparative Example 1.
  • FIG. 6 is a graph showing the measurement result of the current-voltage characteristic curve of the light-emitting element obtained in Comparative Example 2.
  • the present invention provides a method for manufacturing a group III nitride semiconductor light emitting device, wherein the growth rate of the P type semiconductor layer is set to 8 ZO nm Z in the P type group III nitride semiconductor layer.
  • FIG. 2 is a schematic view showing a cross section of an I I I group nitride semiconductor light emitting device having a p-type semiconductor layer according to the present invention.
  • reference numeral 7 denotes a positive electrode, which is composed of a light-transmitting or reflective positive electrode 7 and a bonding pad layer 7b.
  • Reference numeral 5 denotes a p-type semiconductor layer, which is composed of a p-type cladding layer 5 a and a p-type contact layer 5 b.
  • 1 is a substrate
  • 2 is a buffer layer
  • 3 is an n-type semiconductor layer
  • 4 is a light emitting layer
  • 6 is a negative electrode.
  • the substrate 1 includes a sapphire single crystal (A 1 2 0 3 ; A plane, C plane, M plane, R plane), spinel single crystal (Mg Al 2 0 4 ), Z ⁇ ⁇ single crystal.
  • the plane orientation of the substrate is not particularly limited, and the off-angle may be arbitrarily selected.
  • the group III nitride semiconductors that make up the buffer layer, n-type semiconductor layer, light-emitting layer, and p-type semiconductor layer include the general formula A lx I ny G a ⁇ — y N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ Semiconductors of various compositions represented by 1, 0 ⁇ x + y ⁇ 1) are known.
  • the general formula A 1 x I y G a y N (0 ⁇ x ⁇ 1 , 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1), semiconductors with various compositions can be used without any limitation.
  • III-nitride semiconductors include organic metal vapor phase epitaxy (MO C VD), molecular beam epitaxy (MB) E) and hydride vapor phase epitaxy (HVPE).
  • MO C VD organic metal vapor phase epitaxy
  • MB molecular beam epitaxy
  • HVPE hydride vapor phase epitaxy
  • the composition control is easy and the MO CVD method with mass productivity is suitable, but it is not necessarily limited to this method.
  • trimethyl gallium (TMG a) or triethyl gallium (TEG a), which is an organometallic material, is used as a raw material for Group III Ga.
  • Trimethylaluminum (TMA 1) or triethylaluminum (TEA 1) is mainly used as the raw material for the group A 1.
  • TMI trimethylindium
  • TEI triethylindium
  • Ammonia (NH 3 ) or hydrazine (N 2 H 4 ) is used as the Group V N source.
  • Si or Ge is used as a dopant material for the n-type semiconductor layer.
  • Mg is used as a dopant.
  • the raw material for example, biscyclopentadienyl magnesium (C p 2 Mg) or bisethyl cyclopentadienyl magnesium ((E t C p) 2 Mg) is used.
  • the low temperature buffer layer disclosed in Japanese Patent No. 3 0 2 6 0 8 7 or the like may be the high temperature buffer layer disclosed in Japanese Patent Application Laid-Open No. 2 0 0 3-2 4 3 3 0 2 or the like.
  • These buffer layers can be used without any limitation.
  • the substrate for growth 1 can be selected from the previous list, but here The case where a sapphire substrate is used will be described.
  • the substrate is placed on a SiC film-coated jig (susceptor) installed in a reaction space where the temperature and pressure can be controlled, and hydrogen carrier gas and nitrogen carrier gas are placed there.
  • the Graphite jig with SiC film is heated to the required temperature by induction heating with an RF coil, and an A 1 N buffer layer is formed on the substrate.
  • the temperature is controlled from 5 00 ° C. to 700 ° C., and then raised to a temperature around 1 100 ° C. for crystallization.
  • a 1 N buffer layer When growing a high-temperature A 1 N buffer layer, it is not possible to perform two-step heating, but at a temperature of 100 ° C. to 120 ° C. at a time.
  • a 1 N single crystal substrate or the GaN single crystal substrate described above it is not always necessary to grow a buffer layer, and an n-type semiconductor layer described later is directly grown on the substrate.
  • the n-type semiconductor layer includes an underlayer composed of an ampere G a N layer, an n-type dopant such as Si or Ge, and more than the n-type contact layer and the light-emitting layer in which the negative electrode is provided. It consists of an n-type cladding layer with a large band gap energy.
  • the n-type contact layer can double as the n-type cladding layer and the Z or underlayer.
  • an underlayer composed of an undoped GaN layer is grown on the buffer layer.
  • Temperature is set to 1 0 0 0-1 2 0 0, under pressure control, Komu feeding NH 3 gas and TMG a to both the buffer layer and the carrier gas.
  • TMG a supply flow at the same time
  • controlling the growth rate between 1 Am / hour and 3 ⁇ mZ is effective in suppressing the occurrence of crystal defects such as dislocations.
  • the region of 20 to 60 kPa (20 00 to 60 mb ar) is optimal for securing the above growth rate.
  • the n-type contact layer is grown.
  • the growth conditions are the same as those for the undoped GaN layer.
  • the dopant is supplied together with the carrier gas, but the supply concentration is controlled by the ratio with the TMG a supply amount.
  • the driving voltage of the light emitting element is lowered by forming a p-type semiconductor layer to be described later at a specific growth rate.
  • the driving voltage is naturally affected by the concentration of dopant in the n-type contact layer. Therefore, the droop concentration of the n-type contact layer is determined according to the growth conditions of the p-type semiconductor layer.
  • the M / Ga ratio (M S i or G e
  • oxi cr 3 can be ⁇ 6, 0 X low driving voltage by the 1 0 3 range.
  • the thicknesses of the undoped GaN layer and the dopant-containing n-type semiconductor layer are preferably 1 to 4 m, but are not necessarily limited to this range.
  • As a means to suppress the propagation of crystal defects from the substrate and buffer layer to the upper layer it is possible to increase the film thickness of the undoped GaN layer and / or the dopant-containing n-type semiconductor layer. Filming induces warpage of the wafer itself, which is not a good idea. In the present invention, it is preferable to set the film thickness of each layer within the above range.
  • any composition and structure including these known ones are known. Can also be used.
  • a light emitting layer having a multiple quantum well structure is formed by alternately laminating n-type G a N layers as barrier layers and G aln N layers as well layers.
  • For carrier gas select N 2 or H 2 for use.
  • NH 3 and TEG a or TMG a are supplied together with this carrier gas.
  • TM I is further supplied for the growth of the GaInN layer. In other words, it takes a process of supplying In intermittently while controlling the growth time. Since the control of I n concentration is difficult by H 2 is interposed in the carrier gas in the growth of G a I n N layer, it is not advisable to use of H 2 as a carrier gas at this layer.
  • the film thickness of the barrier layer (n-type G a N layer) and well layer (G a I n N layer) is selected so that the light emission output is the highest. Once the optimal film thickness has been determined, select the Group III material supply and growth time appropriately.
  • the amount of dopant in the barrier layer also depends on the driving voltage of the light emitting element, and the concentration is selected according to the growth conditions of the p-type semiconductor layer. Either S i or G e can be used as the target.
  • the growth temperature is preferably between 700 ° C. and 100 ° C., but is not necessarily limited to this range.
  • the growth temperature should be selected within a range that does not increase too much.
  • the growth temperature of the light emitting layer is set in the range of 700 ° C. to 100 ° C., but there is no problem even if the growth temperature of the barrier layer and the well layer is changed.
  • the growth pressure is set in balance with the growth rate. In the present invention, the growth pressure is preferably between 20 kPa (20 00 mb a r) and 60 k Pa (60 m mb a), but is not necessarily limited to this range.
  • the light-emitting layer is finished by finally growing the barrier layer (final barrier layer).
  • This barrier layer prevents the carrier from overflowing from the well layer, and also prevents the elimination of In from the final well layer in the subsequent growth of the P-type semiconductor layer.
  • the P-type semiconductor layer is also known in various compositions and structures, and in the present invention, those having any composition and structure can be used including those known.
  • the P-type semiconductor layer is formed of mm, a P-type contact layer on which a positive electrode is formed, and a P-type cladding layer having a bandgap energy larger than that of the light emitting layer.
  • P-type contact layer can also serve as P-type cladding layer
  • the P-type semiconductor layer whose growth rate is controlled to 8 to 20 nm is a P-type contact layer on which a positive electrode is formed.
  • the growth rate of the P-type cladding layer does not necessarily need to be within this range.
  • the concentration of the Mg-and-pan cake in the P-type composite layer with a controlled growth rate is not particularly limited, but it has good crystallinity. in order to ensure the concentration of M g de one pan I 0. 9 X 1 0 2 0 ⁇ 2 X 1 0 2 ° atoms Z cm 3 Dearuko and are preferred.
  • the P-type configuration Yuku coat layer in water atom may be present in a concentration of about 1 X 1 0 1 8 ⁇ 1 X 1 0 2 1 atom / cm 3 with M g dopant.
  • the P-type cladding layer which is directly in contact with the final barrier layer of the light-emitting layer, is controlled on the growth rate of 8 to 20 nm / min. Layer. It is preferable to use G a N or G a A 1 N for the p-type cladding layer.
  • the ⁇ -type cladding layer may be formed by alternately stacking layers having different compositions or lattice constants, and the thickness of the layer and the concentration of Mg as a dopant may be changed. It is preferable to use Ga A 1 N for the p-type contact layer whose growth rate is controlled to 8 to 20 nm / min according to the present invention.
  • the growth is carried out as follows. TMG a, TMA 1 and dopant C p 2 Mg are fed onto the above p-type cladding layer together with a carrier gas (hydrogen or nitrogen, or a mixture of both) and NH 3 gas.
  • a carrier gas hydrogen or nitrogen, or a mixture of both
  • the well layer is placed in a high temperature environment during the growth process of the P-type semiconductor layer among the lower light emitting layers.
  • the growth pressure is not particularly limited, but preferably 50 k Pa (50 mbar) or less.
  • the reason for this is that if grown below this pressure, the in-plane A 1 concentration in the p-type semiconductor layer can be made uniform, and if necessary, the A 1 composition of Ga A 1 N can be increased. This is because control is easy when growing the changed p-type semiconductor layer. Under conditions higher than this pressure, the reaction between the supplied TMA 1 and NH 3 becomes prominent, and TM A 1 is consumed before reaching the substrate in the middle of growth, and the desired A 1 composition is obtained. Becomes difficult. The same can be said for Mg sent as a dopant.
  • the Mg concentration distribution in the two-dimensional direction (in-plane direction of the growth substrate) in the p-type semiconductor layer is uniform (the growth substrate surface). Internal uniformity).
  • the distribution of A 1 composition and Mg concentration in the in-plane direction of the Ga A 1 N contact layer changes depending on the carrier gas flow rate used.
  • the in-plane uniformity of the A 1 composition and Mg in the contact layer was greatly influenced by the growth pressure condition rather than the carrier gas condition. Therefore, it is appropriate to set the growth pressure below 50 k Pa (50 00 mbar) and above 10 k Pa (lOOmbar) .
  • the growth rate of the p-type semiconductor layer is mainly from the Ga source. Depends on the amount of TMG a supplied. If the TMGa supply amount per unit time is increased, the desired film thickness can be obtained in such a short time.
  • the supply amount of the dopant raw material may be increased as well.
  • the p-type semiconductor layer with a high growth rate is likely to introduce crystal defects, and even if the required concentration of doppins is included, donor levels increase due to crystal defects, resulting in a driving voltage V f will not go down.
  • the growth rate is too low, the growth time until the target film thickness is reached becomes longer, and there is a risk of increasing thermal damage to the light emitting layer during the growth period.
  • the growth condition of the p-type contact layer that satisfies the low drive voltage V f and the absence of thermal damage to the light emitting layer is that the growth rate is 8 to 20 nmZ. Was found to be preferable.
  • the growth rate is determined by measuring the thickness of the P-type contact layer by electron microscope (TEM) observation of the UA-8 cross section and dividing it by the growth time. Therefore, the necessary growth conditions are determined in advance by preparing samples for observation with different conditions and investigating the relationship between the growth rate and the supply amount of TMGa per unit time in advance. Can.
  • TEM electron microscope
  • the substrate heating is stopped and N Infeed 2 gas, as well as purge the reaction space, cooled Ueha, cooled until taken out to the outside of the growth apparatus.
  • the P-type semiconductor layer was confirmed to be the target P-type at this point. Therefore, heat treatment for activation after this is not indispensable.
  • the negative electrode those having various compositions and structures are known, and those of any composition and structure including these known ones can be used in the present invention.
  • Various production methods are known as the production method, and these known methods can be used.
  • a known photolithography technique and a general etching technique can be used for producing the negative electrode forming surface on the n-type contact layer. With these technologies, it is possible to dig from the uppermost layer of We 18 to the position of the n-type contact layer, and to expose the n-type contact layer in the region where the negative electrode is to be formed.
  • the negative electrode material metal materials such as Cr, W, and V as well as Al, Ti, Ni, and Au can be used as the contact metal in contact with the n-type contact layer.
  • a multilayer structure in which a plurality of contact metals are selected from the above metals may be used. When the outermost surface is Au, the bonding property is good.
  • the positive electrode provided on the P-type contact layer As the positive electrode provided on the P-type contact layer, light-transmitting or reflective positive electrodes having various compositions and structures are known, and the present invention also has any composition and structure including those known. Can be used. Various manufacturing methods are well known, and those public Knowledge methods can be used.
  • the composition of I T O is 50% ⁇ I n ⁇ 100% and 0% and S n ⁇ 50%. Within this range, low film resistance and high light transmittance can be satisfied. It is particularly preferable that I n is 90% and S n is 10%.
  • ITO may contain elements of Group I, Group I, Group I, Group I or Group V as impurities. In addition, SnO, ZnO, or InO can be used instead of ITO.
  • the thickness of the I T O film is desirably 50 to 500 nm. If it is 50 nm or less, the film resistance of the ITO film itself increases and the drive voltage increases. Conversely, if it is thicker than 50 O nm, the extraction efficiency of light emission to the upper surface is lowered, and the light emission output does not increase.
  • a known vacuum deposition method or sputtering method can be used as a method for forming the ITO film.
  • a method can be used in which the compound as a raw material is made liquid and applied to the surface to form an oxide film by appropriate treatment.
  • the crystallinity of the I T O film is affected by conditions, but this is not the case if the conditions are properly selected. If an ITO film is prepared at room temperature, heat treatment for transparency is required.
  • the surface of the p-type contact layer is easily damaged by the plasma because it is placed in a high-energy plasma environment, so the contact resistance tends to increase. By doing so, the influence on the surface of the p-type contact layer can be reduced.
  • a bonding pad layer constituting a bonding pad portion is formed on a part of the surface. Together with the bonding pad layer, a positive electrode is formed.
  • the material for the bonding pad layer materials having various structures are known, and these well-known materials can be used in the present invention without any particular limitation.
  • T i, N i and A u used for the negative electrode material, Cr, W and V can be used without any limitation. However, it is desirable to use a material having good adhesion to the light transmissive or reflective positive electrode used. The thickness must be sufficiently thick so as not to damage the light-transmitting or reflective positive electrode against the stress during bonding.
  • the outermost layer is preferably made of a material having good adhesion to the bonding pole, such as Au.
  • the I I I group nitride semiconductor light-emitting device of the present invention can be formed into a lamp by providing a transparent cover by means well known in the art, for example.
  • a white lamp can be manufactured by combining the gallium nitride compound semiconductor light emitting device of the present invention and a force bar having a phosphor.
  • a lamp manufactured from the Group III nitride semiconductor light-emitting device of the present invention has a low driving voltage and a high light-emitting output. Therefore, electronic devices such as mobile phones, displays, and panels incorporating lamps manufactured by this technology Mechanical devices such as automobiles, computers, and game machines that incorporate the electronic devices can be driven with low power and can achieve high characteristics. In particular, it can save power in battery-powered devices such as mobile phones, game machines, toys, and automobile parts.
  • substrate temperature is controlled to 1 100 ° C
  • TMA 1 and NH 3 are sent onto the substrate together with H 2 carrier gas, and A 1 N buffer layer is formed did.
  • the growth time was 10 minutes.
  • TMG a and NH 3 were supplied at a pressure of 40 k Pa (4 0 0 mbar), a temperature of 10 0 30 ° C, and an ampere G a N was formed on the A 1 N buffer layer. The formation was grown for 3 hours.
  • tetramethyl germanium was supplied as an n-type dopant, and an n-type GaN layer was grown for 1 hour.
  • the supply amount of tetramethylgermanium was adjusted so that the carrier concentration of the n-type GaN layer was 4.0 ⁇ 10 18 cm ⁇ 3 . As a result, an n-type contact layer was formed.
  • the pressure is 40 kPa (400 mbar)
  • the temperature is 7500 ° C
  • the carrier gas is switched from H 2 to N 2
  • Si H 4 as the dopant are supplied While growing the barrier layer for 7 minutes
  • the well layer was further grown for 5 minutes by supplying TMIn. This growth of the barrier layer and well layer was repeated five times alternately, and finally the final barrier layer was grown to form a light emitting layer.
  • the amount of Si H 4 in the dopant was adjusted so that the Si concentration in the barrier layer and well layer was 2.0 X 10 17 atoms / cm 3 .
  • the pressure is 20 k Pa (2 00 mbar)
  • the temperature is 10 00 ° C.
  • the carrier gas is switched to H 2 again
  • TMG a and TMA 1 are supplied
  • C p 2 is used as a dopant.
  • Q 5 N was grown for 3 minutes by feeding Mg.
  • n-type contact layer of the I II I nitride semiconductor laminate taken out of the furnace was exposed by photolithography and dry etching, and a negative electrode composed of a Cr and Ti metal layer was formed thereon.
  • the obtained light emitting device was caused to emit light by passing a current of 20 mA, and the drive voltage V f and the light emission output were measured and found to be 3.2 V and 9 mW.
  • Figure 3 shows the measurement results of the current-voltage characteristic curve. From this figure, the n value obtained using the above equation (1) was 1.8.
  • a group I I I nitride semiconductor light emitting device was fabricated in the same manner as in Example 1 except that the growth conditions of the P-type contact layer were set to 20 nmZ for the growth rate and 6 minutes for the growth time.
  • a II-I group nitride semiconductor light-emitting device was fabricated in the same manner as in Example 1 except that the growth conditions of the p-type contact layer were set to 7 nmZ for the growth rate and 17.2 minutes for the growth time.
  • the obtained light emitting device was evaluated in the same manner as in Example 1. As a result, the driving voltage was 3.3 V and the light emission output was 8 mW.
  • Figure 5 shows the measurement results of the current-voltage characteristic curve. From this figure, the n value obtained using the above equation (1) was 2.6.
  • a II-I group nitride semiconductor light-emitting device was fabricated in the same manner as in Example 1 except that the growth conditions of the P-type contact layer were set to 21 nm mZ and the growth time was 5.7 min.
  • the Group III nitride semiconductor light-emitting device of the present invention has a good light output and a low driving voltage, and thus has a very high industrial utility value.

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Abstract

La présente invention concerne un procédé de fabrication d'un élément émetteur de lumière semi-conducteur au nitrure du groupe III présentant un rendement d'émission de lumière élevé et une faible tension d'excitation. Dans le procédé, l'on fait croître dans cet ordre sur un substrat une couche semi-conductrice de type n, une couche émettrice de lumière et une couche semi-conductrice de type p, qui sont composées d'un semi-conducteur au nitrure du groupe III. Au moment de disposer une électrode négative et une électrode positive sur la couche semi-conductrice de type n et sur la couche semi-conductrice de type p pour fabriquer l'élément émetteur de lumière semi-conducteur au nitrure du groupe III, la vitesse de croissance de la couche semi-conductrice de type p est alors ajustée entre 8 et 20 nm/min.
PCT/JP2007/059001 2006-04-19 2007-04-19 Procédé de fabrication d'un élément émetteur de lumière semi-conducteur au nitrure du groupe iii WO2007123262A1 (fr)

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JP2006115791A JP2007288052A (ja) 2006-04-19 2006-04-19 Ｉｉｉ族窒化物半導体発光素子の製造方法
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JP5042781B2 (ja) 2007-11-06 2012-10-03 株式会社ミツトヨ 周波数安定化レーザ装置及びレーザ周波数安定化方法
JP2011009502A (ja) * 2009-06-26 2011-01-13 Showa Denko Kk 発光素子、その製造方法、ランプ、電子機器及び機械装置
JP5437533B2 (ja) * 2011-04-12 2014-03-12 パナソニック株式会社 窒化ガリウム系化合物半導体発光素子およびその製造方法
JP7149486B2 (ja) 2020-04-21 2022-10-07 日亜化学工業株式会社 発光素子の製造方法

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