WO2007099641A1

WO2007099641A1 - Board structure for product board, product board manufacturing method, and electronic apparatus

Info

Publication number: WO2007099641A1
Application number: PCT/JP2006/304140
Authority: WO
Inventors: Norihito Tukahara; Kiyoshi Nakanishi; Yoshikuni Fujihashi
Original assignee: Matsushita Electric Industrial Co., Ltd.
Priority date: 2006-03-03
Filing date: 2006-03-03
Publication date: 2007-09-07
Also published as: JP5075114B2; JPWO2007099641A1

Abstract

A board structure for product boards so designed that the dimension precision of a base part to be machined to a product board is improved by suppressing warp of the adjacent waste board part and a method for manufacturing a product board. A board structure (20) for product boards comprises a waste board part (27) fabricated adjacently to a base part (24) and connection parts (28) formed between the base part (24) and the waste board part (27). Electronic components (22) are placed on a circuit pattern (24A) formed on the base part (24), processed at a reflow step, and thus mounted. Then, the connection parts (28) are cut, and the waste board part (27) is removed. In this board the conductive layer (26) is removed from the waste board part (27).

Description

Specification

Substrate structure for product substrate, manufacturing method for product substrate, and electronic equipment

The present invention relates to a substrate structure for a product substrate in which each electronic component is mounted on a base material portion through a reflow process, a manufacturing method for the product substrate, and an electronic device.

Background art

A substrate structure for a product substrate for manufacturing a product substrate in which an electronic component is mounted on the substrate is known (for example, Patent Document 1).

In this substrate structure for product substrates, a circuit pattern is formed by etching an original substrate (hard substrate) of a predetermined size on which copper foil as a conductor layer is laminated, and then a resist is formed on the entire surface of the original substrate. After the circuit pattern is covered by laminating the layers, the base material portion on which the circuit pattern is formed is arranged in a lattice shape via the connecting portions by performing drilling at a predetermined location. A frame-like discarded substrate portion is formed around the periphery. The discarded substrate portion is formed with a laminated portion in which a resist layer is laminated on a copper foil as a conductor layer.

In such a substrate structure for a product substrate, each electronic component is mounted on a circuit pattern and then mounted through a reflow process, and then the connecting portion is divided and discarded. A product substrate is obtained by removing.

Patent Document 1: Japanese Patent Laid-Open No. 2005-347711

Disclosure of the invention

Problems to be solved by the invention

[0004] Incidentally, in recent years, a product substrate employing a film-like soft base material has been considered in order to reduce the thickness and size.

However, there are the following problems in manufacturing a product substrate using a soft base material by the substrate structure for a product substrate described above.

[0005] That is, when a film-like soft substrate is adopted, the strength of the soft substrate (the strength to maintain a flat shape) is lower than the strength of the conventional hard substrate, and the linear expansion coefficient of the soft substrate The linear expansion coefficient of the resist layer is much larger than that of the resist layer, so that the resist layer in the discarded substrate part extends along the surface direction in the reflow process, and the soft base material in the discarded substrate part follows the extension of the resist layer. Curved and deformed.

At this time, although the conductor layer in the laminated portion of the discarded substrate portion has a relatively small linear expansion coefficient, it follows the elongation of the resist layer and maintains the stretched state of the resist layer even when the temperature is lowered after the reflow process.

Since each base material is also curved and deformed following such deformation of the discarded substrate portion, the entire substrate structure for the product substrate is warped, and the dimensional accuracy of the product substrate cannot be maintained.

[0006] The present invention has been made to solve the above-mentioned disadvantages, and its purpose is to reduce the dimensional accuracy of the base material portion that becomes the product substrate by suppressing the warpage that occurs in the adjacent discarded substrate portion. It is an object to provide a substrate structure for a product substrate, a manufacturing method for the product substrate, and an electronic device that can be improved.

Means for solving the problem

[0007] The substrate structure for a product substrate according to the present invention provides the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material. A base plate portion formed adjacent to the base portion, and a connecting portion formed between the base portion and the base plate portion. Each electronic component is mounted on the circuit pattern and then mounted through a reflow process, and then the discarded substrate portion is removed by dividing the connecting portion. It is a substrate structure, and the warp dimension along the thickness direction per 10 mm along the surface direction of the substrate portion generated after the reflow process is 0.5 mm or less, so that the base material portion and the discarded substrate portion are formed. The linear expansion coefficient difference is within a certain range,

[0008] Here, in order to obtain the above-described desired value, for example, the conductor layer on the discarded substrate portion does not form a resist layer, the structure, or the material and thickness of the conductor layer or resist layer in the discarded substrate portion. Examples thereof include a structure for appropriately selecting a planar shape and the like, and a structure for forming a slit in the discarded substrate portion.

The difference in linear expansion coefficient between the base material part and the discarded substrate part so that the warpage dimension along the thickness direction per 10 mm along the surface direction of the base material part generated after the reflow process is 0.5 mm or less. Is configured to be within a certain range.

Since the difference in linear expansion coefficient is within a certain range, the warpage of the discarded substrate portion is less than a certain value, and the warpage of the base material portion that follows the discarded substrate portion is also less than a certain value.

[0009] Further, the present invention provides a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material, Each of the electrons with respect to a circuit pattern formed on the base material portion, and having a discarded substrate portion formed adjacent to the base material portion, and a base portion and a connecting portion formed between the waste substrate portions. A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after placing the component, and then the discarded substrate portion is removed by dividing the connecting portion. A layered portion in which a layer and a resist layer covering the conductor layer are stacked is provided on the discarded substrate portion! / Cunning! It is characterized by that.

In other words, the present invention includes a structure in which only the conductor layer is formed on the discarded substrate portion, or a structure in which only the resist layer is formed on the discarded substrate portion.

[0010] Note that in a substrate structure for manufacturing a product substrate, in consideration of convenience during storage or distribution, a model number, a manufacturing time, a lot number, and the like may be displayed on the discarded substrate portion. In this case, letters, numbers, and symbols may be formed by laminating a conductor layer and a resist layer in the manufacturing process of the product substrate, but this is not a laminated portion defined in the present invention.

In other words, these letters, numbers, symbols, etc. are not the dominant factors for the warpage generated in the substrate structure for manufacturing the product substrate by the reflow process, even if the conductor layer and the resist layer are laminated. ,.

In the present invention, since the laminated portion in which the conductor layer and the resist layer are laminated is not provided in the discarded substrate portion, the linear expansion coefficient can be reduced as compared with the conventional discarded substrate portion. The warp of the base material part generated following the part is also below a certain level.

[0012] Furthermore, the present invention provides a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material, A circuit board pattern formed on the base material part, the circuit board having a waste board part formed adjacent to the base material part, and a connecting part formed between the base material part and the waste board part. Each electric A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after placing a child component and then the discarded substrate portion is removed by dividing the connecting portion. A slit is formed in the discarded substrate portion along the arrangement direction of the base material portion and the discarded substrate portion.

[0013] A slit is formed in the discarded substrate portion along the arrangement direction of the base material portion and the discarded substrate portion. The warping of the discarded substrate part is divided by the slit, and the warp generated in the entire area of the discarded substrate part does not spread to the base material part as before.

[0014] Further, the present invention is characterized in that a resist layer is formed at predetermined intervals on the discarded substrate portion.

[0015] By forming the resist layer at a predetermined interval on the discarded substrate portion, the retainability of the discarded substrate portion is improved when the resist layer is supported on the jig via the adhesive surface.

[0016] Then, the manufacturing method of the product substrate of the present invention includes the steps of etching the conductor layer laminated on the insulating plate in order to manufacture a plurality of product substrates having electronic parts mounted on a base material. A plurality of base material portions to be a base material are formed along the same surface, a frame-shaped discard substrate portion is formed so as to surround each of the base material portions, and each of the base material portions and the discard substrate portion is formed A substrate for a product substrate in which a connecting portion is formed is manufactured in advance, and each electronic component is placed on the circuit pattern formed on the base material portion and then passed through a reflow process. A method of manufacturing a product substrate, wherein the discarded substrate portion is removed by mounting and then separating each of the connecting portions, and a frame portion corresponding to the discarded substrate portion and a frame portion provided in the frame portion, The product substrate on a jig having a lattice portion corresponding to the portion Characterized by placing the substrate.

For example, in the reflow process, since the deformation of the substrate portion is regulated by placing the substrate for the product substrate on the jig, the deformation of the substrate portion is less likely to occur, and Since the connecting portion is sandwiched between the portions, the deformation of the base material portion is indirectly suppressed.

Furthermore, the product substrate manufacturing method of the present invention is characterized in that the substrate for the product substrate is sandwiched in the thickness direction by using a pair of the jigs.

Since the substrate for the product substrate is sandwiched in the thickness direction, the deformation of the discarded substrate portion and the base material portion is reliably regulated. [0019] Further, the electronic device of the present invention is characterized in that a product substrate obtained by the above-described substrate structure for a product substrate is used.

Here, as electronic devices, in addition to mobile phones and memory cards in which product boards are housed in casings, circuit modules in which product boards are connected to other circuit boards in a hierarchy or along the same plane, etc. Is also included.

The invention's effect

[0020] According to the present invention, it is possible to reduce the warpage of the discarded substrate portion to a certain level or less, and it is possible to reduce the warpage of the base material portion that follows the discarded substrate portion to a certain value or less.

Brief Description of Drawings

FIG. 1 is a perspective view showing a product substrate according to the present invention.

FIG. 2 (A) is a perspective view showing a substrate structure for a product substrate according to the present invention (first embodiment), and FIG. 2 (B) is a diagram of the substrate structure for a product substrate according to the first embodiment. It is sectional drawing which shows a base material part.

FIG. 3 is a perspective view showing a jig used in the manufacturing method for a product substrate according to the first embodiment.

FIG. 4 is a perspective view showing a modified example of the substrate structure for a product substrate according to the first embodiment.

FIG. 5 is a perspective view showing a substrate structure for a product substrate (second embodiment) according to the present invention.

FIG. 6 is a perspective view showing a modified example of the substrate structure for a product substrate according to the second embodiment.

FIG. 7 is a perspective view showing a substrate structure for a product substrate (third embodiment) according to the present invention.

FIG. 8 is a perspective view showing a substrate structure for a product substrate (fourth embodiment) according to the present invention. Explanation of symbols

[0022] 10 Product Board

20, 40, 50, 60 Substrate structure for product substrate (substrate for product substrate)

21 Base material

22 Electronic components

24 Substrate part

24A circuit pattern 27, 41 Discarded board

28 Connecting part

29 resist layer

30 Jig

32 Frame

33 Lattice

42 Slit

BEST MODE FOR CARRYING OUT THE INVENTION

[0023] (First embodiment)

As shown in FIG. 1, the product substrate 10 is housed in a case 12 and used in, for example, a memory card 11. The memory card 11 is used as a recording medium by being inserted into the slot hole 14 of the portable terminal 13 or the like.

The product substrate 10 is obtained by mounting an electronic component 22 on a base material 21 manufactured from the substrate structure 20 (see FIG. 2) for the product substrate of the first embodiment.

Hereinafter, the substrate structure 20 for a product substrate of the first embodiment will be described with reference to FIG.

As shown in FIGS. 2 (A) and 2 (B), the substrate structure 20 for a product substrate of the first embodiment includes a product substrate 10 in which an electronic component 22 is mounted on a base material 21 shown in FIG. In order to manufacture, the conductive layer 26 laminated on the insulating soft base material 25 is etched to form the circuit pattern 24A on the base material portion 24 to be the base material 21 and to be formed adjacent to the base material portion 24. After removing the conductor layer 26 from the discarded substrate portion 27 and then covering the circuit pattern 24A by laminating a resist layer only in the region corresponding to the base portion 24 on the original substrate, the base portion 24 and the discarded portion are discarded. The connecting portion 28 is provided by performing an oval drilling (punching) process at a predetermined position between the substrate portions 27.

As a result, the substrate structure 20 for the product substrate has a large number of base material portions 27 arranged in a latticed manner via the connecting portions 28, and a frame-like discarded substrate portion 27 is formed on the peripheral portion. Each electronic component 22 (see FIG. 1) is placed on the circuit pattern 24A formed on 24, and each electronic component 22 is mounted through a force reflow process. The plate part 27 is removed.

[0025] This substrate structure 20 for manufacturing a product substrate is formed by removing the conductor layer 26 from the discarded substrate portion 27 in the etching process and masking the discarded substrate portion 27 in the resist layer forming process. 27 is not provided with a laminated portion in which a conductor layer and a resist layer are laminated, and one resist layer 29 is formed on the discarded substrate portion 27 at a predetermined interval.

[0026] Since the laminated portion having a large linear expansion coefficient is provided from the discarded substrate portion 27, most of the discarded substrate portion 27 can be made only of the soft base material 25. As a result, the discarded board part compared to the conventional case

The linear expansion coefficient as 27 can be reduced, and the warpage of the base material portion 24 caused by following the discarded substrate portion 27 is also below a certain level.

That is, the base material portion 24 and the discarded substrate portion 2 are formed so that the warp dimension along the thickness direction per 10 mm along the surface direction of the substrate portion 24 generated after the reflow process is 0.5 mm or less.

The linear expansion coefficient difference of 7 is within a certain range.

Since the difference in linear expansion coefficient is within a certain range, the warpage of the discarded substrate portion 27 becomes less than a certain value, and the warpage of the base material portion 24 generated following the discarded substrate portion 27 becomes less than a certain value.

[0028] Further, by forming resist layers 29 on the discarded substrate portion 27 at predetermined intervals, a jig 3 described later is formed.

When supported by 0 (see FIG. 3) via the adhesive surface, the holding property of the discarded substrate portion 27 is improved.

[0029] In the first embodiment, the force described in the example in which the resist layer 29 is formed on the front surface 27A of the discarded substrate portion 27 is not limited to this. The resist layer 29 is formed on the rear surface of the discarded substrate portion 27. It is also possible to form partly on both the front surface 27A and the back surface.

Next, the jig 30 used in the reflow process of the product substrate manufacturing method will be described with reference to FIG.

The jig 30 shown in FIG. 3 is provided in the outer peripheral portion 31 and corresponds to the discarding substrate portion 27 and the frame portion 32 corresponding to the discarded substrate portion 27, and the connecting portion 28 provided in the frame portion 32. And a grid portion 33 to be used.

[0031] The outer peripheral portion 31 is a portion having a substantially rectangular frame shape and a thickness dimension T1.

The frame portion 32 is formed in a rectangular frame shape so as to correspond to the discarded substrate portion 27, and is a portion having a thickness dimension T2. The lattice portion 33 is formed in a lattice shape so as to correspond to each connecting portion 28 by forming a plurality of rectangular openings 34 in the frame portion 32, and is a portion having a thickness dimension T2.

[0032] Here, the relationship between the thickness dimension T1 and the thickness dimension T2 is TKT2.

The frame portion 32 and the lattice portion 33 are formed so that the surfaces 32A and 33A are flush with each other. Each of the surfaces 32A and 33A protrudes from the surface 31A of the outer peripheral portion 31 by a dimension (T2-T1).

[0033] A pair of jigs 30 are prepared, and the surfaces 32A and 33A of one jig 30 and the surfaces 32A and 33A of the other jig 30 face each other, and the surfaces 32A and 33A of one jig 30 The substrate structure 20 for the product substrate is sandwiched between the surfaces 32A and 33A of the other jig 30.

As a result, the substrate portion 27 is sandwiched between the surface 32A of one jig 30 and the surface 32A of the other jig 30.

Further, the connecting portion 28 is sandwiched between the surface 33A of one jig 30 and the surface 33A of the other jig 30.

[0034] In this state, the pair of jigs 30 and the substrate structure 20 for the product substrate are carried into a reflow furnace. By heating in the reflow furnace, soldering is performed, and the electronic component 22 (see Fig. 1) is mounted on the base member 24.

Hereinafter, a method for manufacturing a product substrate in which the reflow process is performed using the jig 30 will be described.

First, by etching the conductor layer 26 laminated on the insulating plate 25, a plurality of base material portions 24 to be the base materials 21 are formed along the same surface, and a frame shape is formed so as to surround each base material portion 24. The substrate 20 for a product substrate in which the discarded substrate portion 27 is formed and the connecting portion 28 is formed between each base material portion 24 and the discarded substrate portion 27 is manufactured.

[0036] Next, after forming a resist layer corresponding to each base material portion 24, each electronic component 22 is placed on the circuit pattern 24A formed on the base material portion 24, and then the reflow process is performed. Then, each electronic component 22 is mounted.

In the reflow process, the substrate 20 for the product substrate is mounted on a jig 30 having a frame portion 32 corresponding to the discarded substrate portion 27 and a lattice portion 33 provided in the frame portion 32 and corresponding to each connecting portion 28. Put. At this time, the substrate portion 27 is discarded against the adhesive layer provided on the surface 32A of the jig 30. The resist layer 29 adheres, thereby fixing the substrate 20 for the product substrate.

Next, by stacking another jig 30 on the product substrate 20, the product substrate 20 is sandwiched in the thickness direction.

[0037] After the reflow process, the substrate 20 for the product substrate is removed from each jig 30, and the discarded substrate portions 27 are removed by dividing the connecting portions 28, and the connecting portions 28 between the base materials 21 are removed. The process of manufacturing a plurality of product substrates 10 each having the electronic component 22 mounted on the base material 21 is completed.

[0038] In the reflow process, by placing the substrate 20 for product substrate on the jig 30 through the adhesive layer on the surface 32A, the deformation of the discarded substrate portion 27 is regulated, so that the substrate portion 24 is deformed. Is less likely to spread.

Then, by sandwiching the substrate 20 for product substrate in the thickness direction by the pair of jigs 30, the deformation of the discarded substrate part 27 can be reliably regulated by the frame part 32 of the jig 30, and the lattice part 3 Since the connecting portion 28 is sandwiched by 3, the deformation of the base material portion 24 is indirectly suppressed.

[Modification]

The substrate structure 20 for the product substrate of the first embodiment has the force described in the example in which the resist layer 29 is formed one by one at a predetermined interval on the discarded substrate portion 27. As shown in FIG. It is possible to form a plurality of resist layers 29 (five as an example) at predetermined intervals.

[0040] When a plurality of resist layers 29 are formed, the resist layers 29 are preferably arranged in a staggered manner. This is because a large number of resist layers 29 can be formed in a relatively small area.

Furthermore, by disposing the resist layers 29 in a staggered manner, the retainability of the discarded substrate portion 27 is further improved when supported by the jig 30 (see FIG. 3) via the adhesive surface.

[0041] Next, second to third embodiments will be described with reference to Figs. In the substrate structures for product substrates of the second to third embodiments, the same reference numerals are given to the same members as those in the first embodiment, and the description thereof is omitted.

[0042] (Second Embodiment)

As shown in FIG. 5, the substrate structure 40 for the product substrate of the second embodiment is discarded in the base material portion 24. A substrate part 41 is provided directly, and a plurality of slits 42 are formed at predetermined intervals in the substrate part 41 along the arrangement direction of the base material part 24 and the discarded substrate part 41. This is the same as the embodiment.

The discarded substrate portion 41 is formed with one copper foil 29A as a conductor layer at a predetermined interval.

[0043] By forming the slit 42 in the discarded substrate portion 41, the warpage of the discarded substrate portion 41 is divided by the slit 42, and the warpage generated in the entire area of the discarded substrate portion 41 is propagated to the base material portion 24 as in the past. do not do.

The positions where the slits 42 are formed, the number of the slits 42, and the shape of the slits 42 can be arbitrarily determined.

According to the substrate structure 40 for a product substrate of the second embodiment, by forming the slits 42 in the substrate part 41, it is not necessary to remove the conductor layer 26 from the discarded substrate part 41.

According to the substrate structure 40 for a product substrate of the second embodiment, the same effect as the substrate structure 20 for a product substrate of the first embodiment can be obtained.

[0045] (Modification)

The substrate structure 40 for the product substrate according to the second embodiment has the force described in the example in which the resist 29A is formed one by one at a predetermined interval on the discarded substrate portion 41. As shown in FIG. It is possible to form a plurality of resists 29A (as an example, five) at intervals.

[0046] When a plurality of resists 29A are formed, it is preferable that the resists 29A are arranged in a staggered manner. This is because a large number of resists 29A can be formed in a relatively small area.

Furthermore, by disposing the resists 29A in a staggered manner, the retainability of the discarded substrate portion 41 is further improved when supported by the jig 30 (see FIG. 3) via the adhesive surface.

[0047] (Third embodiment)

As shown in FIG. 7, the substrate structure 50 for the product substrate of the third embodiment is obtained by removing the discarded substrate portion 27 from the substrate structure 20 for the product substrate of the first embodiment. This is the same as the embodiment.

[0048] By removing the discarded substrate portion 27, the warp of the base material portion 24 can be suppressed to a certain level or less. That is, according to the substrate structure 50 for a product substrate of the third embodiment, the same effect as the substrate structure 20 for a product substrate of the first embodiment can be obtained.

[0049] (Fourth embodiment)

As shown in FIG. 8, the substrate structure 60 for product substrates of the fourth embodiment is obtained by connecting the discarded substrate portions 41 in the substrate structure 40 for product substrates of the second embodiment by bridge portions 61.

By the way, in the second embodiment described above, since each discarded substrate portion 41 is independent, each discarded substrate portion 41 is individually separated when each base material portion 24 is divided.

Therefore, in the second embodiment described above, there is a possibility that the mechanical structure for discarding each discarded substrate portion 41 becomes complicated and it is difficult to improve the efficiency of the disposal work.

On the other hand, according to the fourth embodiment described above, since the discarded substrate portions 41 are connected by the bridge portions 61, when each base material portion 24 is divided, the discarded substrate portions 41 are disposed in an integrated state. As a result, it is possible to simplify the mechanical structure for discarding each discarded substrate portion 41, and to achieve an effect of efficiently performing the disposal work.

Since the discarded substrate part 41 remains in the body structure, for example, when discharging the discarded substrate using a machine, the processing of adsorption and disposal becomes efficient.

[0051] (Example)

Next, according to the present invention, a substrate structure for a plurality of types of product substrates having different configurations of the discarded substrate portion is manufactured, the maximum warpage dimension in the substrate structure for the product substrate is measured, and the laminated portion is disposed on the discarded substrate portion. Table 1 will be used to explain the comparison with the maximum warpage dimension in the conventional example provided with.

In Examples 1 to 4 and Conventional Example 1, the linear expansion coefficient of the original base material is 12 ppm, the linear expansion coefficient of the conductor layer (copper foil) is 16 ppm, and the linear expansion coefficient of the resist layer is 60 to 70 ppm. is there.

In addition, the outer dimensions of Examples 1 to 4 are 73. Omm in length and 55. Omm in width, and the outer dimensions in Conventional Example 1 are 74.8 mm in height and 95. Omm in width. [0052] Then, for Examples 1 to 4 and Comparative Example 1 as described above, after measuring the maximum warpage dimension in the initial state before mounting the electronic component, the electronic component was formed on the surface by a reflow process. The maximum warp dimension was measured again in the state of mounting, and then the maximum warp dimension was measured again with the electronic component mounted on the back surface by the reflow process.

The maximum warpage dimension was determined by placing the substrate structure for the product substrate on a surface plate so that the back surface was in contact, and measuring the maximum separation distance of the part lifted from the surface plate to determine the maximum warpage size.

[0053] In Examples 1 to 4, the surface mounting for mounting the electronic component on the surface uses the jig according to the present invention described above, the maximum warp dimension in the case, and the jig. The maximum warpage dimension was measured.

On the other hand, in Conventional Example 1, only the maximum warpage dimension was measured when no jig was used.

[0054] [Table 1]

From the above results, Example 1 to Example 4 are compared to Conventional Example 1 where the overall judgment is E because the discarded substrate part is not provided with a laminated part or a slit is provided. Thus, it can be seen that the maximum warpage dimension is drastically reduced, the configuration according to the present invention is discarded, the warpage of the substrate portion is suppressed, the warpage of the product substrate can be reduced, and comprehensive judgments A to D are obtained.

Further, in Example 4, since the slit is provided in the discarded substrate portion, even if the laminated portion is provided in the discarded substrate portion, the warp generated in the discarded substrate portion is divided and does not affect the base material portion. As a result, a dramatic improvement was observed compared to Conventional Example 1, and Examples 1 to It can be seen that even when compared with 3, good results were obtained.

From the above results, in the substrate structure for the product substrate for obtaining the product substrate, by adopting the configuration according to the present invention, the warpage of the product substrate due to the warpage of the discarded substrate portion is suppressed, and the dimensions of the product substrate are reduced. It can be seen that the accuracy can be improved.

In each of the above-described embodiments, the example in which the present invention is applied to a single-layer product substrate has been described. However, the present invention is not limited to this, and the present invention can also be applied to a multilayer product substrate. The

The multilayer product substrate is a laminate of a plurality of single-layer product substrates. For this reason, the warp generated in the substrate portion following the discarded substrate is likely to remain without being eliminated even after the discarded substrate portion is removed.

Therefore, a particularly remarkable effect can be obtained by applying the present invention to a multilayer product substrate.

[0057] In addition, the product substrate, the substrate structure for the product substrate, the base material, the electronic component, the base material portion, the discarded substrate portion, the connection portion, the resist layer, the jig, the frame portion, and the lattice exemplified in each of the embodiments described above The shape of the part, slit, etc. is not limited to this, and can be changed as appropriate.

Industrial applicability

The present invention is suitable for application to a substrate structure for a product substrate in which each electronic component is mounted on a base material portion through a reflow process and a manufacturing method for the product substrate.

Claims

The scope of the claims

[1] In order to manufacture a product substrate with electronic components mounted on the substrate,

Etching the conductor layer laminated on the insulating plate, forming the base material portion as the base material, the discarded substrate portion formed adjacent to the base material portion, and the base material portion and the discarded substrate portion. A connected portion,

Each electronic component is mounted through a reflow process after placing each electronic component on the circuit pattern formed on the substrate portion,

Next, a substrate structure for producing a product substrate in which the discarded substrate portion is removed by dividing the connecting portion,

The warp dimension along the thickness direction per 10 mm along the surface direction of the substrate portion generated after the reflow process is 0.5 mm or less.

A substrate structure for a product substrate, wherein a difference in linear expansion coefficient between the base material portion and the discarded substrate portion is within a certain range.

[2] To manufacture a product substrate with electronic components mounted on the substrate,

A substrate structure for a product substrate, wherein a laminated portion in which the conductor layer and a resist layer covering the conductor layer are laminated is not provided on the substrate portion.

[3] In order to manufacture product boards with electronic components mounted on the substrate,

After placing each electronic component on the circuit pattern formed on the base material, Each electronic component is mounted through a flow process,

A substrate structure for a product substrate, wherein a slit is formed in the discarded substrate portion along an arrangement direction of the base material portion and the discarded substrate portion.

[4] The resist layer is formed at predetermined intervals on the discarded substrate portion.

4. A substrate structure for a product substrate according to any one of claims 2 and 3.

[5] To produce multiple product boards with electronic components mounted on the substrate,

By etching the conductor layer laminated on the insulating plate, a plurality of base material portions serving as the respective base materials are formed along the same surface, and a frame-shaped discarded base plate portion is provided so as to surround the respective base material portions. And manufacturing a substrate for a product substrate in which a connecting portion is formed between each base material portion and the discarded substrate portion,

After mounting each electronic component on the circuit pattern formed on the base material portion, the electronic component is mounted through a reflow process,

Next, a method of manufacturing a product substrate in which the discarded substrate portion is removed by dividing each of the connecting portions,

The product substrate is placed on a jig having a frame portion corresponding to the discarded substrate portion and a lattice portion provided in the frame portion and corresponding to each of the connecting portions. A method for manufacturing a substrate.

6. The method for producing a product substrate according to claim 5, wherein the product substrate is sandwiched in the thickness direction by using a pair of the jigs.

[7] An electronic device comprising a product substrate obtained by the substrate structure for a product substrate according to any one of claims 1 to 4.