JPWO2007099641A1 - Substrate structure for product substrate, method for manufacturing product substrate, and electronic device - Google Patents

Abstract

Provided are a substrate structure for a product substrate and a manufacturing method for the product substrate, which can improve the dimensional accuracy of a base material portion to be a product substrate by suppressing warpage generated in an adjacent discarded substrate portion. The substrate structure 20 for a product substrate has a discarded substrate portion 27 formed adjacent to the base material portion 24, and a connecting portion 28 formed between the base material portion 24 and the discarded substrate portion 27. Each electronic component 22 is mounted on the circuit pattern 24A formed on the circuit board 24A through a reflow process, and then the board portion 27 is removed by dividing the connecting portion 28. It is. In the substrate structure 20 for manufacturing the product substrate, the conductor layer 26 is removed from the discarded substrate portion 27.

Description

  The present invention relates to a substrate structure for a product substrate in which each electronic component is mounted on a base material portion through a reflow process, a manufacturing method for the product substrate, and an electronic device.

A substrate structure for a product substrate for manufacturing a product substrate in which an electronic component is mounted on the substrate is known (for example, Patent Document 1).
The substrate structure for this product substrate has a circuit pattern formed by etching an original base material (hard substrate) having a predetermined dimension on which copper foil as a conductor layer is laminated, and then a resist layer on the entire surface of the original substrate. After the circuit pattern is covered by laminating, the base material part on which the circuit pattern is formed is arranged in a lattice shape via the connecting part by performing drilling (punching) processing at a predetermined place, and A frame-like discarded substrate portion is formed around the periphery.
The discarded substrate part is formed with a laminated part in which a resist layer is laminated on a copper foil as a conductor layer.

In such a substrate structure for a product substrate, each electronic component is mounted on the circuit pattern and then mounted through a reflow process, and then the connecting portion is divided and discarded to remove the substrate portion. Thus, a product substrate is obtained.
JP 2005-347711 A

By the way, in recent years, a product substrate employing a film-like soft substrate has been considered in order to reduce the thickness and size.
However, there are the following problems in manufacturing a product substrate employing a soft base material by the above-described substrate structure for a product substrate.

That is, when a film-like soft base material is adopted, the strength of the soft base material (strength for maintaining a flat shape) is lower than that of the conventional hard base material, and compared with the linear expansion coefficient of the soft substrate. Since the linear expansion coefficient of the resist layer is extremely large, in the reflow process, the resist layer of the discarded substrate portion extends along the surface direction, and the soft base material in the discarded substrate portion also bends and deforms following the elongation of the resist layer.
At this time, the conductor layer in the laminated portion of the discarded substrate portion has a relatively small linear expansion coefficient, but follows the elongation of the resist layer, and maintains the stretched state of the resist layer even when the temperature is lowered after the reflow process.
Since each base material is also curved and deformed following such deformation of the discarded substrate portion, the entire substrate structure for the product substrate is warped, and the dimensional accuracy of the product substrate cannot be maintained.

  The present invention has been made in order to eliminate the above-described disadvantages, and its purpose is to improve the dimensional accuracy of the base material portion that becomes the product substrate by suppressing the warpage occurring in the adjacent discarded substrate portion. It is to provide a substrate structure for manufacturing, a manufacturing method for a product substrate, and an electronic apparatus.

  The substrate structure for a product substrate according to the present invention includes a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material. , Having a discarded substrate portion formed adjacent to the substrate portion, and a connecting portion formed between the substrate portion and the discarded substrate portion, and the circuit pattern formed on the substrate portion A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after mounting each electronic component, and then the discarded substrate portion is removed by dividing the connecting portion, The difference in linear expansion coefficient between the base material portion and the discarded substrate portion is within a certain range so that the warpage dimension along the thickness direction per 10 mm along the surface direction of the substrate portion generated after the reflow process is 0.5 mm or less. It is characterized by

Here, in order to obtain the above-mentioned desired value, for example, a structure in which a conductor layer or a resist layer is not formed on the discarded substrate portion, or a material, thickness, planar shape, etc. of the conductor layer or resist layer in the discarded substrate portion are appropriately selected. Examples thereof include a structure and a structure in which a slit is formed in the discarded substrate portion.
The difference in linear expansion coefficient between the base material portion and the discarded substrate portion is within a certain range so that the warpage dimension along the thickness direction per 10 mm along the surface direction of the base material portion generated after the reflow process is 0.5 mm or less. It was configured as follows.
Since the difference in linear expansion coefficient is within a certain range, the warpage of the discarded substrate portion is less than a certain value, and the warpage of the base material portion generated following the discarded substrate portion is also less than a certain value.

Further, the present invention provides a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material, and the base material portion Each of the electronic components is mounted on a circuit pattern formed on the base material portion. A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after being placed, and then the discarded substrate portion is removed by dividing the connecting portion, and the conductor layer, A laminated part in which a resist layer covering the conductor layer is laminated is not provided in the discarded substrate part.
That is, a structure in which only the conductor layer is formed on the discarded substrate part, or a structure in which only the resist layer is formed on the discarded substrate part is included in the present invention.

In addition, in a substrate structure for manufacturing a product substrate, a model number, a manufacturing time, a lot number, and the like may be displayed on the discarded substrate portion in consideration of convenience during storage or distribution. In this case, letters, numbers, and symbols may be formed by laminating a conductor layer and a resist layer in the manufacturing process of the product substrate, but this is not a laminated portion defined in the present invention.
That is, such letters, numbers, symbols, and the like are not dominant factors for warpage generated in a substrate structure for manufacturing a product substrate by a reflow process even if a conductor layer and a resist layer are laminated.

  In the present invention, since the laminated portion in which the conductor layer and the resist layer are laminated is not provided in the discarded substrate portion, the linear expansion coefficient can be reduced as compared with the conventional discarded substrate portion, thereby following the discarded substrate portion. The warp of the base material portion generated as a result is also below a certain level.

  Furthermore, the present invention provides a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material, and the base material portion Each of the electronic components is mounted on a circuit pattern formed on the base material portion. A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after being placed, and then the discarded substrate portion is removed by dividing the connecting portion, and the base portion and the base portion A slit is formed in the discarded substrate portion along the arrangement direction of the discarded substrate portions.

  A slit is formed in the discarded substrate portion along the arrangement direction of the base material portion and the discarded substrate portion. The warp of the discarded substrate portion is divided by the slit, and the warp generated in the entire area of the discarded substrate portion does not reach the base material portion as in the prior art.

  Further, the present invention is characterized in that a resist layer is formed at predetermined intervals on the discarded substrate portion.

  By forming the resist layer at a predetermined interval on the discarded substrate portion, the retainability of the discarded substrate portion is improved when the resist layer is supported on the jig through the adhesive surface.

  And the manufacturing method of the product board | substrate of this invention is a plurality which becomes said each base material by etching the conductor layer laminated | stacked on the insulating board, in order to manufacture multiple product boards with which the electronic component was mounted in the base material. And forming a frame-like discarded substrate portion so as to surround each of the substrate portions, and connecting a connecting portion between each of the substrate portions and the discarded substrate portion. A substrate for the formed product substrate is manufactured, each electronic component is mounted on the circuit pattern formed on the base portion, and then mounted through the reflow process, and then each of the electronic components is mounted. A method of manufacturing a product substrate in which the discarded substrate portion is removed by dividing the connecting portion, a frame portion corresponding to the discarded substrate portion, and a lattice portion provided in the frame portion and corresponding to each connecting portion A substrate for the product substrate in a jig having Characterized by location.

  For example, in the reflow process, since the deformation of the discarded substrate portion is regulated by placing the substrate for the product substrate on the jig, there is little possibility of the deformation spreading to the base material portion, and the connecting portion is connected by the lattice portion. Because of the clamping, the deformation of the base material portion is indirectly suppressed.

Furthermore, the product substrate manufacturing method of the present invention is characterized in that the product substrate is sandwiched in the thickness direction by using a pair of the jigs.
Since the substrate for the product substrate is sandwiched in the thickness direction, the deformation of the discarded substrate portion and the base material portion is reliably regulated.

The electronic device of the present invention is characterized in that a product substrate obtained by the substrate structure for a product substrate described above is used.
Here, as an electronic device, in addition to a mobile phone or a memory card in which a product board is housed in a casing, a circuit module in which the product board is connected to other circuit boards in a hierarchical manner or along the same surface, etc. Is also included.

  According to the present invention, it is possible to reduce the warpage of the discarded substrate portion to a certain level or less, and it is possible to reduce the warpage of the base material portion generated following the discarded substrate portion to a certain level or less.

It is a perspective view which shows the product board | substrate which concerns on this invention. 2A is a perspective view showing a substrate structure for a product substrate (first embodiment) according to the present invention, and FIG. 2B is a base portion of the substrate structure for a product substrate according to the first embodiment. It is sectional drawing shown. It is a perspective view which shows the jig | tool used for the manufacturing method for product substrates which concerns on 1st Embodiment. It is a perspective view which shows the modification of the board | substrate structure for product substrates which concerns on 1st Embodiment. It is a perspective view which shows the substrate structure (2nd Embodiment) for the product substrates which concerns on this invention. It is a perspective view which shows the modification of the board | substrate structure for product substrates which concerns on 2nd Embodiment. It is a perspective view which shows the board | substrate structure (3rd Embodiment) for product boards concerning this invention. It is a perspective view which shows the board | substrate structure (4th Embodiment) for product boards concerning this invention.

Explanation of symbols

10 Product substrate 20, 40, 50, 60 Product substrate structure (Product substrate substrate)
21 Base material 22 Electronic component 24 Base material portion 24A Circuit pattern 25 Insulating plate 26 Conductor layers 27 and 41 Discarded substrate portion 28 Connection portion 29 Resist layer 30 Jig 32 Frame portion 33 Grid portion 42 Slit

(First embodiment)
As shown in FIG. 1, the product substrate 10 is accommodated in a case 12, and is used for a memory card 11, for example. The memory card 11 is used as a recording medium by being inserted into the slot hole 14 of the portable terminal 13 or the like.
The product substrate 10 is obtained by mounting an electronic component 22 on a base material 21 manufactured from the product substrate structure 20 (see FIG. 2) according to the first embodiment.
Hereinafter, the substrate structure 20 for a product substrate according to the first embodiment will be described with reference to FIG.

As shown in FIGS. 2A and 2B, the substrate structure 20 for a product substrate of the first embodiment is for manufacturing a product substrate 10 in which an electronic component 22 is mounted on a base material 21 shown in FIG. Further, by etching the conductor layer 26 laminated on the insulating soft base material 25, the circuit pattern 24A is formed on the base material portion 24 to be the base material 21, and the discarded substrate is formed adjacent to the base material portion 24. After removing the conductor layer 26 from the portion 27 and then covering the circuit pattern 24A by laminating a resist layer only in a region corresponding to the base portion 24 in the original substrate, the space between the base portion 24 and the discarded substrate portion 27 is covered. The connecting portion 28 is provided by performing an elliptical drilling process at a predetermined location.
As a result, the substrate structure 20 for the product substrate has a large number of base material portions 27 arranged in a lattice shape via the connecting portions 28, and a frame-like discarded substrate portion 27 is formed on the peripheral portion. Each electronic component 22 (see FIG. 1) is mounted on the circuit pattern 24A formed on the substrate, and then the electronic component 22 is mounted through a reflow process. Then, the connecting portion 28 is divided to discard the substrate portion 27. Is to be removed.

  In the substrate structure 20 for manufacturing the product substrate, the conductor layer 26 is removed from the discarded substrate portion 27 in the etching process, and the discarded substrate portion 27 is masked in the resist layer forming process, whereby the conductor layer 26 is disposed on the discarded substrate portion 27. In addition, the laminated portion where the resist layers are laminated is not provided, and one resist layer 29 is formed on the discarded substrate portion 27 at a predetermined interval.

  Since the laminated portion having a large linear expansion coefficient is not provided from the discarded substrate portion 27, most of the discarded substrate portion 27 can be made only of the soft base material 25. As a result, the linear expansion coefficient of the discarded substrate portion 27 can be reduced as compared with the conventional case, and the warpage of the base material portion 24 caused by following the discarded substrate portion 27 is also less than a certain level.

That is, the difference in linear expansion coefficient between the base material portion 24 and the discarded substrate portion 27 is such that the warpage dimension along the thickness direction per 10 mm along the surface direction of the substrate portion 24 generated after the reflow process is 0.5 mm or less. Within certain range.
Since the linear expansion coefficient difference is within a certain range, the warpage of the discarded substrate portion 27 is less than a certain value, and the warp of the base material portion 24 generated following the discarded substrate portion 27 is also less than a certain value.

  In addition, by forming the resist layer 29 on the discarded substrate portion 27 at a predetermined interval, the retainability of the discarded substrate portion 27 is improved when supported by a jig 30 (see FIG. 3) described later via an adhesive surface. .

  In the first embodiment, the example in which the resist layer 29 is formed on the front surface 27A of the discarded substrate portion 27 has been described. However, the present invention is not limited to this, and the resist layer 29 can be formed on the rear surface of the discarded substrate portion 27. It is also possible to partially form both the front surface 27A and the back surface.

Next, the jig 30 used in the reflow process of the manufacturing method of the product substrate will be described with reference to FIG.
In the jig 30 shown in FIG. 3, the jig 30 is provided in the outer peripheral portion 31 and corresponds to the discard substrate portion 27, and the frame portion 32 is provided in the frame portion 32 and corresponds to each connecting portion 28. And a lattice portion 33.

The outer peripheral portion 31 is a portion having a substantially rectangular frame shape and a thickness dimension T1.
The frame portion 32 is formed in a rectangular frame shape so as to correspond to the discarded substrate portion 27 and is a part having a thickness dimension T2.
The lattice portion 33 is formed in a lattice shape so as to correspond to each connecting portion 28 by forming a plurality of rectangular openings 34 in the frame portion 32, and is a portion having a thickness dimension T2.

Here, the relationship between the thickness dimension T1 and the thickness dimension T2 satisfies T1 <T2.
And the frame part 32 and the grating | lattice part 33 are formed so that each surface 32A, 33A may become flush. Each of the surfaces 32A and 33A protrudes from the surface 31A of the outer peripheral portion 31 by a dimension (T2-T1).

A pair of jigs 30 is prepared, and the surfaces 32A and 33A of one jig 30 and the surfaces 32A and 33A of the other jig 30 face each other, and the surfaces 32A and 33A of one jig 30 and the other The substrate structure 20 for the product substrate is held between the surfaces 32A and 33A of the jig 30.
As a result, the discarded substrate portion 27 is sandwiched between the surface 32A of one jig 30 and the surface 32A of the other jig 30.
Further, the connecting portion 28 is sandwiched between the surface 33A of one jig 30 and the surface 33A of the other jig 30.

  In this state, the pair of jigs 30 and the substrate structure 20 for the product substrate are carried into a reflow furnace. Soldering is performed by heating in a reflow furnace, and the electronic component 22 (see FIG. 1) is mounted on the base member 24.

Hereinafter, the manufacturing method of the product substrate which performs a reflow process using the jig | tool 30 is demonstrated.
First, by etching the conductor layer 26 laminated on the insulating plate 25, a plurality of base material portions 24 to be the base materials 21 are formed along the same surface, and a frame shape is formed so as to surround each base material portion 24. The substrate 20 for a product substrate in which the discarded substrate portion 27 is formed and the connecting portion 28 is formed between each base material portion 24 and the discarded substrate portion 27 is manufactured.

Next, after a resist layer is formed corresponding to each base material portion 24, each electronic component 22 is placed on the circuit pattern 24 </ b> A formed on the base material portion 24, and then each electronic component is subjected to a reflow process. 22 is implemented.
In the reflow process, the product substrate 20 is placed on a jig 30 having a frame portion 32 corresponding to the discarded substrate portion 27 and a lattice portion 33 provided in the frame portion 32 and corresponding to each connecting portion 28. To do. At this time, the resist layer 29 of the discarded substrate portion 27 adheres to the adhesive layer provided on the surface 32 </ b> A of the jig 30, thereby fixing the product substrate 20.
Next, by stacking another jig 30 on the product substrate 20, the product substrate 20 is sandwiched in the thickness direction.

  After the reflow process, the substrate 20 for the product substrate is removed from each jig 30, and the discarded substrate portions 27 are removed by dividing the connecting portions 28, and the connecting portions 28 between the base materials 21 are divided. Thus, the process of manufacturing a plurality of product substrates 10 each having the electronic component 22 mounted on the base material 21 is completed.

In the reflow process, by placing the substrate 20 for the product substrate on the jig 30 through the adhesive layer on the surface 32A, the deformation of the discarded substrate portion 27 is regulated, so that the deformation spreads to the base material portion 24. There is little fear.
The product substrate 20 is sandwiched in the thickness direction by the pair of jigs 30, so that the deformation of the discarded substrate part 27 can be reliably regulated by the frame part 32 of the jig 30 and connected by the grid part 33. Since the part 28 is clamped, the deformation of the base material part 24 is indirectly suppressed.

(Modification)
In the substrate structure 20 for the product substrate of the first embodiment, the example in which the resist layer 29 is formed one by one at a predetermined interval on the discarded substrate portion 27 has been described. However, as shown in FIG. It is possible to form a plurality (for example, five) of resist layers 29 at predetermined intervals.

When a plurality of resist layers 29 are formed, it is preferable to arrange the resist layers 29 in a staggered manner. This is because a large number of resist layers 29 can be formed in a relatively small area.
Furthermore, by disposing the resist layers 29 in a staggered manner, the retainability of the discarded substrate portion 27 is further improved when supported by the jig 30 (see FIG. 3) via the adhesive surface.

  Next, second to third embodiments will be described with reference to FIGS. In addition, in the board | substrate structure for product substrates of 2nd-3rd embodiment, the same code | symbol is attached | subjected about the same / similar member as 1st Embodiment, and description is abbreviate | omitted.

(Second Embodiment)
As shown in FIG. 5, in the substrate structure 40 for a product substrate of the second embodiment, a discarded substrate portion 41 is provided directly on the base material portion 24, and along the arrangement direction of the base material portion 24 and the discarded substrate portion 41. A plurality of slits 42 are formed at a predetermined interval in the discarded substrate portion 41, and the other configurations are the same as those in the first embodiment.
The discarded substrate portion 41 is formed with one copper foil 29A as a conductor layer at a predetermined interval.

By forming the slit 42 in the discarded substrate portion 41, the warpage of the discarded substrate portion 41 is divided by the slit 42, and the warpage generated in the entire area of the discarded substrate portion 41 does not spread to the base material portion 24 as in the past.
The positions where the slits 42 are formed, the number of the slits 42, and the form of the slits 42 can be arbitrarily determined.

According to the substrate structure 40 for a product substrate of the second embodiment, it is not necessary to remove the conductor layer 26 from the discarded substrate portion 41 by forming the slits 42 in the substrate portion 41.
In addition, according to the substrate structure 40 for product substrates of the second embodiment, the same effect as the substrate structure 20 for product substrates of the first embodiment can be obtained.

(Modification)
In the substrate structure 40 for the product substrate of the second embodiment, the example in which the resists 29A are formed one by one at a predetermined interval on the discarded substrate portion 41 has been described. However, as shown in FIG. It is possible to form a plurality of resists 29A (five as an example) at a predetermined interval.

When a plurality of resists 29A are formed, it is preferable that the resists 29A are arranged in a staggered manner. This is because a large number of resists 29A can be formed in a relatively small area.
Furthermore, by disposing the resists 29A in a staggered manner, the retainability of the discarded substrate portion 41 is further improved when supported by the jig 30 (see FIG. 3) via the adhesive surface.

(Third embodiment)
As shown in FIG. 7, the substrate structure 50 for the product substrate of the third embodiment is obtained by removing the discarded substrate portion 27 from the substrate structure 20 for the product substrate of the first embodiment. This is the same as the embodiment.

By removing the discarded substrate portion 27, the warp of the base material portion 24 can be suppressed to a certain level or less.
That is, according to the substrate structure 50 for a product substrate of the third embodiment, the same effect as the substrate structure 20 for a product substrate of the first embodiment can be obtained.

(Fourth embodiment)
As shown in FIG. 8, the substrate structure 60 for product substrates of the fourth embodiment is obtained by connecting the discarded substrate portions 41 in the substrate structure 40 for product substrates of the second embodiment by bridge portions 61.

By the way, in the second embodiment described above, since each discarded substrate portion 41 is independent, when each base material portion 24 is divided, each discarded substrate portion 41 is individually separated.
Therefore, in the above-described second embodiment, there is a possibility that the mechanical structure for discarding each discarded substrate portion 41 becomes complicated and it is difficult to improve the efficiency of the disposal work.
On the other hand, according to the above-described fourth embodiment, since the discarded substrate portions 41 are connected by the bridge portions 61, when each base material portion 24 is divided, the discarded substrate portions 41 are disposed in an integrated state. This makes it possible to simplify the mechanical structure for discarding each discarded substrate portion 41 and to increase the efficiency of the disposal work.
Since the discarded substrate part 41 remains in an integrated structure, for example, when discharging the discarded substrate using a machine, the processing of adsorption and disposal becomes efficient.

(Example)
Next, in accordance with the present invention, a plurality of types of substrate structures for product substrates having different configurations of the discarded substrate portions are manufactured, the maximum warpage dimension in the substrate structure for the product substrates is measured, and the stacked portions are disposed on the discarded substrate portions. Since it was compared with the maximum warp dimension in the conventional example provided, it will be described with reference to Table 1.
In Examples 1 to 4 and Conventional Example 1, the linear expansion coefficient of the original base material is 12 ppm, the linear expansion coefficient of the conductor layer (copper foil) is 16 ppm, and the linear expansion coefficient of the resist layer is 60 to 70 ppm. .
The outer dimensions of Examples 1 to 4 are 73.0 mm in length and 55.0 mm in width, and the outer dimensions of Conventional Example 1 are 74.8 mm in length and 95.0 mm in width.

And with respect to Examples 1 to 4 and Comparative Example 1 as described above, after measuring the maximum warpage dimension in the initial state before mounting the electronic component, the state in which the electronic component is mounted on the surface by the reflow process Then, the maximum warp dimension was measured again, and then the maximum warp dimension was measured again with the electronic component mounted on the back surface by the reflow process.
The maximum warp dimension was determined by placing the substrate structure for the product substrate on a surface plate so that the back surface was in contact, and measuring the maximum separation dimension of the part that was lifted from the surface plate to obtain the maximum warp size.

In Examples 1 to 4, the surface mounting for mounting the electronic component on the surface is the maximum warp dimension when the jig according to the present invention is not used and the maximum warp dimension when the jig is used. And measured.
On the other hand, in Conventional Example 1, only the maximum warpage dimension when no jig was used was measured.

From the above results, Example 1 to Example 4 are not provided with a laminated part in the discarded substrate part or are provided with a slit, and therefore, compared with Conventional Example 1 in which the comprehensive judgment is E. It can be seen that the maximum warpage dimension is drastically reduced, the configuration according to the present invention is discarded, the warpage of the substrate portion is suppressed, the warpage of the product substrate can be reduced, and comprehensive judgments A to D are obtained.
Further, in Example 4, since the slit is provided in the discarded substrate portion, even if the laminated portion is provided in the discarded substrate portion, the warp generated in the discarded substrate portion is divided and does not affect the base material portion. Thus, it can be seen that a dramatic improvement is recognized as compared with Conventional Example 1, and that a favorable result is obtained even when compared with Examples 1 to 3.
From the above results, in the substrate structure for the product substrate to obtain the product substrate, by adopting the configuration according to the present invention, the warpage of the product substrate due to the warpage of the discarded substrate portion is suppressed, and the dimensional accuracy of the product substrate It can be seen that it can be improved.

In each of the above-described embodiments, the example in which the present invention is applied to a single-layer product substrate has been described. However, the present invention is not limited to this, and the present invention can also be applied to a multilayer product substrate.
A multilayer product substrate is a laminate of a plurality of single-layer product substrates. For this reason, the warp generated in the substrate portion following the discarded substrate is likely to remain without being eliminated even after the discarded substrate portion is removed.
Therefore, a particularly remarkable effect can be obtained by applying the present invention to a multilayer product substrate.

  In addition, the product substrate, the substrate structure for the product substrate, the base material, the electronic component, the base material portion, the discarded substrate portion, the connection portion, the resist layer, the jig, the frame portion, the lattice portion, and the slit exemplified in each of the embodiments described above However, the shape is not limited to this, and can be appropriately changed.

  The present invention is suitable for application to a substrate structure for a product substrate in which each electronic component is mounted on a base material portion through a reflow process and a manufacturing method for the product substrate.

  The present invention relates to a substrate structure for a product substrate in which each electronic component is mounted on a base material portion through a reflow process, a method for manufacturing the product substrate, and an electronic apparatus.

A substrate structure for a product substrate for manufacturing a product substrate in which an electronic component is mounted on the substrate is known (for example, Patent Document 1).
The substrate structure for this product substrate has a circuit pattern formed by etching an original base material (hard substrate) having a predetermined dimension on which copper foil as a conductor layer is laminated, and then a resist layer on the entire surface of the original substrate. After the circuit pattern is covered by laminating, the base material part on which the circuit pattern is formed is arranged in a lattice shape via the connecting part by performing drilling (punching) processing at a predetermined place, and A frame-like discarded substrate portion is formed around the periphery.
The discarded substrate part is formed with a laminated part in which a resist layer is laminated on a copper foil as a conductor layer.

In such a substrate structure for a product substrate, each electronic component is mounted on the circuit pattern and then mounted through a reflow process, and then the connecting portion is divided and discarded to remove the substrate portion. Thus, a product substrate is obtained.
JP 2005-347711 A

By the way, in recent years, a product substrate employing a film-like soft substrate has been considered in order to reduce the thickness and size.
However, there are the following problems in manufacturing a product substrate employing a soft base material by the above-described substrate structure for a product substrate.

That is, when a film-like soft base material is adopted, the strength of the soft base material (strength for maintaining a flat shape) is lower than that of the conventional hard base material, and compared with the linear expansion coefficient of the soft substrate. Since the linear expansion coefficient of the resist layer is extremely large, in the reflow process, the resist layer of the discarded substrate portion extends along the surface direction, and the soft base material in the discarded substrate portion also bends and deforms following the elongation of the resist layer.
At this time, the conductor layer in the laminated portion of the discarded substrate portion has a relatively small linear expansion coefficient, but follows the elongation of the resist layer, and maintains the stretched state of the resist layer even when the temperature is lowered after the reflow process.
Since each base material is also curved and deformed following such deformation of the discarded substrate portion, the entire substrate structure for the product substrate is warped, and the dimensional accuracy of the product substrate cannot be maintained.

  The present invention has been made in order to eliminate the above-described disadvantages, and its purpose is to improve the dimensional accuracy of the base material portion that becomes the product substrate by suppressing the warpage occurring in the adjacent discarded substrate portion. It is to provide a substrate structure, a manufacturing method of a product substrate, and an electronic apparatus.

  The substrate structure for a product substrate according to the present invention includes a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material. , Having a discarded substrate portion formed adjacent to the substrate portion, and a connecting portion formed between the substrate portion and the discarded substrate portion, and the circuit pattern formed on the substrate portion A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after mounting each electronic component, and then the discarded substrate portion is removed by dividing the connecting portion, The difference in linear expansion coefficient between the base material portion and the discarded substrate portion is within a certain range so that the warpage dimension along the thickness direction per 10 mm along the surface direction of the substrate portion generated after the reflow process is 0.5 mm or less. It is characterized by

Here, in order to obtain the above-mentioned desired value, for example, a structure in which a conductor layer or a resist layer is not formed on the discarded substrate portion, or a material, thickness, planar shape, etc. of the conductor layer or resist layer in the discarded substrate portion are appropriately selected. Examples thereof include a structure and a structure in which a slit is formed in the discarded substrate portion.
The difference in linear expansion coefficient between the base material portion and the discarded substrate portion is within a certain range so that the warpage dimension along the thickness direction per 10 mm along the surface direction of the base material portion generated after the reflow process is 0.5 mm or less. It was configured as follows.
Since the difference in linear expansion coefficient is within a certain range, the warpage of the discarded substrate portion is less than a certain value, and the warpage of the base material portion generated following the discarded substrate portion is also less than a certain value.

Further, the present invention provides a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material, and the base material portion Each of the electronic components is mounted on a circuit pattern formed on the base material portion. A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after being placed, and then the discarded substrate portion is removed by dividing the connecting portion, and the conductor layer, A laminated part in which a resist layer covering the conductor layer is laminated is not provided in the discarded substrate part.
That is, the present invention includes a structure in which only the conductor layer is formed on the discarded substrate portion or a structure in which only the resist layer is formed on the discarded substrate portion.

In addition, in a substrate structure for manufacturing a product substrate, a model number, a manufacturing time, a lot number, and the like may be displayed on the discarded substrate portion in consideration of convenience during storage or distribution. In this case, letters, numbers, and symbols may be formed by laminating a conductor layer and a resist layer in the manufacturing process of the product substrate, but this is not a laminated portion defined in the present invention.
That is, such letters, numbers, symbols, and the like are not dominant factors for warpage generated in a substrate structure for manufacturing a product substrate by a reflow process even if a conductor layer and a resist layer are laminated.

  In the present invention, since the laminated portion in which the conductor layer and the resist layer are laminated is not provided in the discarded substrate portion, the linear expansion coefficient can be reduced as compared with the conventional discarded substrate portion, thereby following the discarded substrate portion. The warp of the base material portion generated as a result is also below a certain level.

  Furthermore, the present invention provides a base material portion that becomes the base material by etching a conductor layer laminated on an insulating plate in order to manufacture a product substrate in which an electronic component is mounted on the base material, and the base material portion Each of the electronic components is mounted on a circuit pattern formed on the base material portion. A substrate structure for manufacturing a product substrate in which each electronic component is mounted through a reflow process after being placed, and then the discarded substrate portion is removed by dividing the connecting portion, and the base portion and the base portion A slit is formed in the discarded substrate portion along the arrangement direction of the discarded substrate portions.

  A slit is formed in the discarded substrate portion along the arrangement direction of the base material portion and the discarded substrate portion. The warp of the discarded substrate portion is divided by the slit, and the warp generated in the entire area of the discarded substrate portion does not reach the base material portion as in the prior art.

  Further, the present invention is characterized in that a resist layer is formed at predetermined intervals on the discarded substrate portion.

  By forming the resist layer at a predetermined interval on the discarded substrate portion, the retainability of the discarded substrate portion is improved when the resist layer is supported on the jig through the adhesive surface.

  And the manufacturing method of the product board | substrate of this invention is a plurality which becomes said each base material by etching the conductor layer laminated | stacked on the insulating board, in order to manufacture multiple product boards with which the electronic component was mounted in the base material. And forming a frame-like discarded substrate portion so as to surround each of the substrate portions, and connecting a connecting portion between each of the substrate portions and the discarded substrate portion. A substrate for the formed product substrate is manufactured, each electronic component is mounted on the circuit pattern formed on the base portion, and then mounted through the reflow process, and then each of the electronic components is mounted. A method of manufacturing a product substrate in which the discarded substrate portion is removed by dividing the connecting portion, a frame portion corresponding to the discarded substrate portion, and a lattice portion provided in the frame portion and corresponding to each connecting portion A substrate for the product substrate in a jig having Characterized by location.

  For example, in the reflow process, since the deformation of the discarded substrate portion is regulated by placing the substrate for the product substrate on the jig, there is little possibility of the deformation spreading to the base material portion, and the connecting portion is connected by the lattice portion. Because of the clamping, the deformation of the base material portion is indirectly suppressed.

Furthermore, the product substrate manufacturing method of the present invention is characterized in that the product substrate is sandwiched in the thickness direction by using a pair of the jigs.
Since the substrate for the product substrate is sandwiched in the thickness direction, the deformation of the discarded substrate portion and the base material portion is reliably regulated.

The electronic device of the present invention is characterized in that a product substrate obtained by the substrate structure for a product substrate described above is used.
Here, as an electronic device, in addition to a mobile phone or a memory card in which a product board is housed in a casing, a circuit module in which the product board is connected to other circuit boards in a hierarchical manner or along the same surface, etc. Is also included.

  According to the present invention, it is possible to reduce the warpage of the discarded substrate portion to a certain level or less, and it is possible to reduce the warpage of the base material portion generated following the discarded substrate portion to a certain level or less.

(First embodiment)
As shown in FIG. 1, the product substrate 10 is accommodated in a case 12, and is used for a memory card 11, for example. The memory card 11 is used as a recording medium by being inserted into the slot hole 14 of the portable terminal 13 or the like.
The product substrate 10 is obtained by mounting an electronic component 22 on a base material 21 manufactured from the product substrate structure 20 (see FIG. 2) according to the first embodiment.
Hereinafter, the substrate structure 20 for a product substrate according to the first embodiment will be described with reference to FIG.

As shown in FIGS. 2A and 2B, the substrate structure 20 for a product substrate of the first embodiment is for manufacturing a product substrate 10 in which an electronic component 22 is mounted on a base material 21 shown in FIG. Further, by etching the conductor layer 26 laminated on the insulating soft base material 25, the circuit pattern 24A is formed on the base material portion 24 to be the base material 21, and the discarded substrate is formed adjacent to the base material portion 24. After removing the conductor layer 26 from the portion 27 and then covering the circuit pattern 24A by laminating a resist layer only in a region corresponding to the base portion 24 in the original substrate, the space between the base portion 24 and the discarded substrate portion 27 is covered. The connecting portion 28 is provided by performing an elliptical drilling process at a predetermined location.
As a result, the substrate structure 20 for the product substrate has a large number of base material portions 27 arranged in a lattice shape via the connecting portions 28, and a frame-like discarded substrate portion 27 is formed on the peripheral portion. Each electronic component 22 (see FIG. 1) is mounted on the circuit pattern 24A formed on the substrate, and then the electronic component 22 is mounted through a reflow process. Then, the connecting portion 28 is divided to discard the substrate portion 27. Is to be removed.

  In the substrate structure 20 for manufacturing the product substrate, the conductor layer 26 is removed from the discarded substrate portion 27 in the etching process, and the discarded substrate portion 27 is masked in the resist layer forming process, whereby the conductor layer 26 is disposed on the discarded substrate portion 27. In addition, the laminated portion where the resist layers are laminated is not provided, and one resist layer 29 is formed on the discarded substrate portion 27 at a predetermined interval.

  Since the laminated portion having a large linear expansion coefficient is not provided from the discarded substrate portion 27, most of the discarded substrate portion 27 can be made only of the soft base material 25. As a result, the linear expansion coefficient of the discarded substrate portion 27 can be reduced as compared with the conventional case, and the warpage of the base material portion 24 caused by following the discarded substrate portion 27 is also less than a certain level.

That is, the difference in linear expansion coefficient between the base material portion 24 and the discarded substrate portion 27 is such that the warpage dimension along the thickness direction per 10 mm along the surface direction of the substrate portion 24 generated after the reflow process is 0.5 mm or less. Within certain range.
Since the linear expansion coefficient difference is within a certain range, the warpage of the discarded substrate portion 27 is less than a certain value, and the warp of the base material portion 24 generated following the discarded substrate portion 27 is also less than a certain value.

  In addition, by forming the resist layer 29 on the discarded substrate portion 27 at a predetermined interval, the retainability of the discarded substrate portion 27 is improved when supported by a jig 30 (see FIG. 3) described later via an adhesive surface. .

  In the first embodiment, the example in which the resist layer 29 is formed on the front surface 27A of the discarded substrate portion 27 has been described. However, the present invention is not limited to this, and the resist layer 29 can be formed on the rear surface of the discarded substrate portion 27. It is also possible to partially form both the front surface 27A and the back surface.

Next, the jig 30 used in the reflow process of the manufacturing method of the product substrate will be described with reference to FIG.
In the jig 30 shown in FIG. 3, the jig 30 is provided in the outer peripheral portion 31 and corresponds to the discard substrate portion 27, and the frame portion 32 is provided in the frame portion 32 and corresponds to each connecting portion 28. And a lattice portion 33.

The outer peripheral portion 31 is a portion having a substantially rectangular frame shape and a thickness dimension T1.
The frame portion 32 is formed in a rectangular frame shape so as to correspond to the discarded substrate portion 27 and is a part having a thickness dimension T2.
The lattice portion 33 is formed in a lattice shape so as to correspond to each connecting portion 28 by forming a plurality of rectangular openings 34 in the frame portion 32, and is a portion having a thickness dimension T2.

Here, the relationship between the thickness dimension T1 and the thickness dimension T2 satisfies T1 <T2.
And the frame part 32 and the grating | lattice part 33 are formed so that each surface 32A, 33A may become flush. Each of the surfaces 32A and 33A protrudes from the surface 31A of the outer peripheral portion 31 by a dimension (T2-T1).

A pair of jigs 30 is prepared, and the surfaces 32A and 33A of one jig 30 and the surfaces 32A and 33A of the other jig 30 face each other, and the surfaces 32A and 33A of one jig 30 and the other The substrate structure 20 for the product substrate is held between the surfaces 32A and 33A of the jig 30.
As a result, the discarded substrate portion 27 is sandwiched between the surface 32A of one jig 30 and the surface 32A of the other jig 30.
Further, the connecting portion 28 is sandwiched between the surface 33A of one jig 30 and the surface 33A of the other jig 30.

  In this state, the pair of jigs 30 and the substrate structure 20 for the product substrate are carried into a reflow furnace. Soldering is performed by heating in a reflow furnace, and the electronic component 22 (see FIG. 1) is mounted on the base member 24.

Hereinafter, the manufacturing method of the product substrate which performs a reflow process using the jig | tool 30 is demonstrated.
First, by etching the conductor layer 26 laminated on the insulating plate 25, a plurality of base material portions 24 to be the base materials 21 are formed along the same surface, and a frame shape is formed so as to surround each base material portion 24. The substrate 20 for a product substrate in which the discarded substrate portion 27 is formed and the connecting portion 28 is formed between each base material portion 24 and the discarded substrate portion 27 is manufactured.

Next, after a resist layer is formed corresponding to each base material portion 24, each electronic component 22 is placed on the circuit pattern 24 </ b> A formed on the base material portion 24, and then each electronic component is subjected to a reflow process. 22 is implemented.
In the reflow process, the product substrate 20 is placed on a jig 30 having a frame portion 32 corresponding to the discarded substrate portion 27 and a lattice portion 33 provided in the frame portion 32 and corresponding to each connecting portion 28. To do. At this time, the resist layer 29 of the discarded substrate portion 27 adheres to the adhesive layer provided on the surface 32 </ b> A of the jig 30, thereby fixing the product substrate 20.
Next, by stacking another jig 30 on the product substrate 20, the product substrate 20 is sandwiched in the thickness direction.

  After the reflow process, the substrate 20 for the product substrate is removed from each jig 30, and the discarded substrate portions 27 are removed by dividing the connecting portions 28, and the connecting portions 28 between the base materials 21 are divided. Thus, the process of manufacturing a plurality of product substrates 10 each having the electronic component 22 mounted on the base material 21 is completed.

In the reflow process, by placing the substrate 20 for the product substrate on the jig 30 through the adhesive layer on the surface 32A, the deformation of the discarded substrate portion 27 is regulated, so that the deformation spreads to the base material portion 24. There is little fear.
The product substrate 20 is sandwiched in the thickness direction by the pair of jigs 30, so that the deformation of the discarded substrate part 27 can be reliably regulated by the frame part 32 of the jig 30 and connected by the grid part 33. Since the part 28 is clamped, the deformation of the base material part 24 is indirectly suppressed.

(Modification)
In the substrate structure 20 for the product substrate of the first embodiment, the example in which the resist layer 29 is formed one by one at a predetermined interval on the discarded substrate portion 27 has been described. However, as shown in FIG. It is possible to form a plurality (for example, five) of resist layers 29 at predetermined intervals.

When a plurality of resist layers 29 are formed, it is preferable to arrange the resist layers 29 in a staggered manner. This is because a large number of resist layers 29 can be formed in a relatively small area.
Furthermore, by disposing the resist layers 29 in a staggered manner, the retainability of the discarded substrate portion 27 is further improved when supported by the jig 30 (see FIG. 3) via the adhesive surface.

  Next, second to third embodiments will be described with reference to FIGS. In addition, in the board | substrate structure for product substrates of 2nd-3rd embodiment, the same code | symbol is attached | subjected about the same / similar member as 1st Embodiment, and description is abbreviate | omitted.

(Second Embodiment)
As shown in FIG. 5, in the substrate structure 40 for a product substrate of the second embodiment, a discarded substrate portion 41 is provided directly on the base material portion 24, and along the arrangement direction of the base material portion 24 and the discarded substrate portion 41. A plurality of slits 42 are formed at a predetermined interval in the discarded substrate portion 41, and the other configurations are the same as those in the first embodiment.
The discarded substrate portion 41 is formed with one copper foil 29A as a conductor layer at a predetermined interval.

By forming the slit 42 in the discarded substrate portion 41, the warpage of the discarded substrate portion 41 is divided by the slit 42, and the warpage generated in the entire area of the discarded substrate portion 41 does not spread to the base material portion 24 as in the past.
The positions where the slits 42 are formed, the number of the slits 42, and the form of the slits 42 can be arbitrarily determined.

According to the substrate structure 40 for a product substrate of the second embodiment, it is not necessary to remove the conductor layer 26 from the discarded substrate portion 41 by forming the slits 42 in the substrate portion 41.
In addition, according to the substrate structure 40 for product substrates of the second embodiment, the same effect as the substrate structure 20 for product substrates of the first embodiment can be obtained.

(Modification)
In the substrate structure 40 for the product substrate of the second embodiment, the example in which the resists 29A are formed one by one at a predetermined interval on the discarded substrate portion 41 has been described. However, as shown in FIG. It is possible to form a plurality of resists 29A (five as an example) at a predetermined interval.

When a plurality of resists 29A are formed, it is preferable that the resists 29A are arranged in a staggered manner. This is because a large number of resists 29A can be formed in a relatively small area.
Furthermore, by disposing the resists 29A in a staggered manner, the retainability of the discarded substrate portion 41 is further improved when supported by the jig 30 (see FIG. 3) via the adhesive surface.

(Third embodiment)
As shown in FIG. 7, the substrate structure 50 for the product substrate of the third embodiment is obtained by removing the discarded substrate portion 27 from the substrate structure 20 for the product substrate of the first embodiment. This is the same as the embodiment.

By removing the discarded substrate portion 27, the warp of the base material portion 24 can be suppressed to a certain level or less.
That is, according to the substrate structure 50 for a product substrate of the third embodiment, the same effect as the substrate structure 20 for a product substrate of the first embodiment can be obtained.

(Fourth embodiment)
As shown in FIG. 8, the substrate structure 60 for product substrates of the fourth embodiment is obtained by connecting the discarded substrate portions 41 in the substrate structure 40 for product substrates of the second embodiment by bridge portions 61.

By the way, in the second embodiment described above, since each discarded substrate portion 41 is independent, when each base material portion 24 is divided, each discarded substrate portion 41 is individually separated.
Therefore, in the above-described second embodiment, there is a possibility that the mechanical structure for discarding each discarded substrate portion 41 becomes complicated and it is difficult to improve the efficiency of the disposal work.
On the other hand, according to the above-described fourth embodiment, since the discarded substrate portions 41 are connected by the bridge portions 61, when each base material portion 24 is divided, the discarded substrate portions 41 are disposed in an integrated state. This makes it possible to simplify the mechanical structure for discarding each discarded substrate portion 41 and to increase the efficiency of the disposal work.
Since the discarded substrate portion 41 remains in an integral structure, for example, when the discarded substrate is discharged using a machine, the processes of adsorption and disposal become efficient.

(Example)
Next, in accordance with the present invention, a plurality of types of substrate structures for product substrates having different configurations of the discarded substrate portions are manufactured, the maximum warpage dimension in the substrate structure for the product substrates is measured, and the stacked portions are disposed on the discarded substrate portions. Since it was compared with the maximum warp dimension in the conventional example provided, it will be described with reference to Table 1.
In Examples 1 to 4 and Conventional Example 1, the linear expansion coefficient of the original base material is 12 ppm, the linear expansion coefficient of the conductor layer (copper foil) is 16 ppm, and the linear expansion coefficient of the resist layer is 60 to 70 ppm. .
The outer dimensions of Examples 1 to 4 are 73.0 mm in length and 55.0 mm in width, and the outer dimensions of Conventional Example 1 are 74.8 mm in length and 95.0 mm in width.

And with respect to Examples 1 to 4 and Comparative Example 1 as described above, after measuring the maximum warpage dimension in the initial state before mounting the electronic component, the state in which the electronic component is mounted on the surface by the reflow process Then, the maximum warp dimension was measured again, and then the maximum warp dimension was measured again with the electronic component mounted on the back surface by the reflow process.
The maximum warp dimension was determined by placing the substrate structure for the product substrate on a surface plate so that the back surface was in contact, and measuring the maximum separation dimension of the part that was lifted from the surface plate to obtain the maximum warp size.

In Examples 1 to 4, the surface mounting for mounting the electronic component on the surface is the maximum warp dimension when the jig according to the present invention is not used and the maximum warp dimension when the jig is used. And measured.
On the other hand, in Conventional Example 1, only the maximum warpage dimension when no jig was used was measured.

From the above results, Example 1 to Example 4 are not provided with a laminated part in the discarded substrate part or are provided with a slit, and therefore, compared with Conventional Example 1 in which the comprehensive judgment is E. It can be seen that the maximum warpage dimension is drastically reduced, the configuration according to the present invention is discarded, the warpage of the substrate portion is suppressed, the warpage of the product substrate can be reduced, and comprehensive judgments A to D are obtained.
Further, in Example 4, since the slit is provided in the discarded substrate portion, even if the laminated portion is provided in the discarded substrate portion, the warp generated in the discarded substrate portion is divided and does not affect the base material portion. Thus, it can be seen that a dramatic improvement is recognized as compared with Conventional Example 1, and that a favorable result is obtained even when compared with Examples 1 to 3.
From the above results, in the substrate structure for the product substrate to obtain the product substrate, by adopting the configuration according to the present invention, the warpage of the product substrate due to the warpage of the discarded substrate portion is suppressed, and the dimensional accuracy of the product substrate It can be seen that it can be improved.

In each of the above-described embodiments, the example in which the present invention is applied to a single-layer product substrate has been described. However, the present invention is not limited to this, and the present invention can also be applied to a multilayer product substrate.
A multilayer product substrate is a laminate of a plurality of single-layer product substrates. For this reason, the warp generated in the substrate portion following the discarded substrate is likely to remain without being eliminated even after the discarded substrate portion is removed.
Therefore, a particularly remarkable effect can be obtained by applying the present invention to a multilayer product substrate.

  In addition, the product substrate, the substrate structure for the product substrate, the base material, the electronic component, the base material portion, the discarded substrate portion, the connection portion, the resist layer, the jig, the frame portion, the lattice portion, and the slit exemplified in each of the embodiments described above However, the shape is not limited to this, and can be appropriately changed.

  The present invention is suitable for application to a substrate structure for a product substrate in which each electronic component is mounted on a base material portion through a reflow process and a method for manufacturing the product substrate.

It is a perspective view which shows the product board | substrate which concerns on this invention. 2A is a perspective view showing a substrate structure for a product substrate (first embodiment) according to the present invention, and FIG. 2B is a base portion of the substrate structure for a product substrate according to the first embodiment. It is sectional drawing shown. It is a perspective view which shows the jig | tool used for the manufacturing method of the product board | substrate which concerns on 1st Embodiment. It is a perspective view which shows the modification of the board | substrate structure for product substrates which concerns on 1st Embodiment. It is a perspective view which shows the substrate structure (2nd Embodiment) for the product substrates which concerns on this invention. It is a perspective view which shows the modification of the board | substrate structure for product substrates which concerns on 2nd Embodiment. It is a perspective view which shows the board | substrate structure (3rd Embodiment) for product boards concerning this invention. It is a perspective view which shows the board | substrate structure (4th Embodiment) for product boards concerning this invention.

Explanation of symbols

10 Product substrate 20, 40, 50, 60 Product substrate structure (Product substrate substrate)
21 Base material 22 Electronic component 24 Base material portion 24A Circuit pattern 25 Insulating plate 26 Conductor layers 27 and 41 Discarded substrate portion 28 Connection portion 29 Resist layer 30 Jig 32 Frame portion 33 Grid portion 42 Slit

Claims (7)

In order to manufacture a product substrate with electronic components mounted on the base material,
Etching a conductor layer laminated on an insulating plate, a base material portion serving as the base material, a discarded substrate portion formed adjacent to the base material portion, and formed between the base material portion and the discarded substrate portion. A connecting portion,
Each electronic component is mounted through a reflow process after placing each electronic component on the circuit pattern formed on the substrate part,
Next, a substrate structure for manufacturing a product substrate in which the discarded substrate portion is removed by dividing the connecting portion,
The warp dimension along the thickness direction per 10 mm along the surface direction of the substrate portion generated after the reflow step is 0.5 mm or less.
A substrate structure for a product substrate, wherein a difference in linear expansion coefficient between the base material portion and the discarded substrate portion is within a certain range. In order to manufacture a product substrate with electronic components mounted on the base material,
Etching a conductor layer laminated on an insulating plate, a base material portion serving as the base material, a discarded substrate portion formed adjacent to the base material portion, and formed between the base material portion and the discarded substrate portion. A connecting portion,
Each electronic component is mounted through a reflow process after placing each electronic component on the circuit pattern formed on the substrate part,
Next, a substrate structure for manufacturing a product substrate in which the discarded substrate portion is removed by dividing the connecting portion,
A substrate structure for a product substrate, wherein a laminated portion in which the conductor layer and a resist layer covering the conductor layer are laminated is not provided in the discarded substrate portion. In order to manufacture a product substrate with electronic components mounted on the base material,
Etching a conductor layer laminated on an insulating plate, a base material portion serving as the base material, a discarded substrate portion formed adjacent to the base material portion, and formed between the base material portion and the discarded substrate portion. A connecting portion,
Each electronic component is mounted through a reflow process after placing each electronic component on the circuit pattern formed on the substrate part,
Next, a substrate structure for manufacturing a product substrate in which the discarded substrate portion is removed by dividing the connecting portion,
A substrate structure for a product substrate, wherein a slit is formed in the discarded substrate portion along an arrangement direction of the base material portion and the discarded substrate portion.   The substrate structure for a product substrate according to any one of claims 2 and 3, wherein a resist layer is formed at predetermined intervals on the discarded substrate portion. In order to manufacture multiple product boards with electronic components mounted on the base material,
By etching the conductor layer laminated on the insulating plate, a plurality of base material portions serving as the respective base materials are formed along the same surface, and a frame-like discarded substrate portion is formed so as to surround each of the base material portions. Forming and manufacturing a substrate for a product substrate in which a connecting portion is formed between each base material portion and the discarded substrate portion;
Mount each electronic component through a reflow process after placing each electronic component on the circuit pattern formed on the base material,
Next, the product substrate manufacturing method for removing the discarded substrate portion by dividing each connecting portion,
A product substrate, wherein the substrate for the product substrate is placed on a jig having a frame portion corresponding to the discarded substrate portion and a lattice portion provided in the frame portion and corresponding to each of the connecting portions. Manufacturing method.   6. The method of manufacturing a product substrate according to claim 5, wherein the product substrate is sandwiched in the thickness direction by using a pair of the jigs.   An electronic apparatus using a product substrate obtained by the substrate structure for a product substrate according to any one of claims 1 to 4.

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