JP2009267061A - Method of manufacturing wiring board - Google Patents

Method of manufacturing wiring board Download PDF

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JP2009267061A
JP2009267061A JP2008114405A JP2008114405A JP2009267061A JP 2009267061 A JP2009267061 A JP 2009267061A JP 2008114405 A JP2008114405 A JP 2008114405A JP 2008114405 A JP2008114405 A JP 2008114405A JP 2009267061 A JP2009267061 A JP 2009267061A
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wiring board
manufacturing
hole
metal heat
wiring
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Shunsaku Hamazaki
俊作 濱崎
Hideaki Maniwa
秀明 馬庭
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Kyocera SLC Technologies Corp
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Kyocera SLC Technologies Corp
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a wiring board which prevents the formation of a burr or an elongation on a metal heat sink and enables manufacturing the thin wiring board having the metal heat sink reduced in thickness. <P>SOLUTION: The method is provided for manufacturing the wiring board including a wiring board body 3 having a through-hole C at its center for housing a semiconductor device S and the metal heat sink 5 joined to the undersurface of the wiring board body 3 to close the through-hole C. The manufacturing method includes a step of integrally arranging a plurality of wiring board bodies 3 in a mother substrate 10 such that the wiring board bodies are lined up vertically and horizontally with cutting areas A interposed on boundaries thereof, a step of bonding a metal foil 5P to the undersurface of the mother substrate 10 to cover the wiring board bodies 3 and the cutting areas A, a step of removing the areas corresponding to the cutting areas A by etching from the metal foil 5P, and a step of cutting the mother substrate 10 along the cutting areas A. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は半導体素子を搭載するための配線基板の製造方法に関し、より詳細には中央部に半導体素子を収容する貫通孔を有する絶縁基板の上面に、前記半導体素子の電極が接続される配線導体が配設されて成る配線基板本体と、該配線基板本体の下面に前記開口部を塞ぐように接合され、該開口部内の上面に半導体素子が搭載される放熱板とから成る配線基板の製造方法に関するものである。   The present invention relates to a method of manufacturing a wiring board for mounting a semiconductor element, and more specifically, a wiring conductor in which an electrode of the semiconductor element is connected to an upper surface of an insulating substrate having a through hole that accommodates the semiconductor element in a central portion. A method of manufacturing a wiring board comprising: a wiring board main body comprising a wiring board; and a heat sink that is bonded to a lower surface of the wiring board main body so as to close the opening, and on which an upper surface of the opening is mounted with a semiconductor element. It is about.

従来より半導体集積回路素子等の半導体素子を搭載する配線基板として、図2に示すように、ガラスクロス基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた複数の絶縁板や絶縁層を積層して成り、中央部に半導体素子Sを収容するための貫通孔Cを有する絶縁基板1の上面から下面にかけて半導体素子Sの電極が電気的に接続される銅箔や銅めっき層から成る配線導体2が配設された配線基板本体3と、配線基板本体3の下面に貫通孔Cを塞ぐように接着剤層4を介して接合されており、貫通孔内Cに露出する上面に半導体素子Sが搭載される銅板から成る金属放熱板5とから成る配線基板が知られている。   2. Description of the Related Art Conventionally, as a wiring board on which a semiconductor element such as a semiconductor integrated circuit element is mounted, as shown in FIG. 2, a plurality of insulating plates in which a glass cloth base material is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin A copper foil or a copper plating in which the electrodes of the semiconductor element S are electrically connected from the upper surface to the lower surface of the insulating substrate 1 having a through hole C for accommodating the semiconductor element S in the center. The wiring board main body 3 on which the wiring conductor 2 composed of layers is disposed is bonded to the lower surface of the wiring board main body 3 via the adhesive layer 4 so as to close the through hole C, and is exposed to the inside C of the through hole. There is known a wiring board including a metal heat radiating plate 5 made of a copper plate on which a semiconductor element S is mounted.

なお、この配線基板は、配線基板本体3における上面から下面にかけて上下の配線導体2を接続するためのスルーホールめっき導体が被着されたスルーホール6が形成されており、スルーホール6の内部には熱硬化性樹脂から成る孔埋め樹脂7が充填されている。さらに孔埋め樹脂7の一部は絶縁基板1の上面およびその表面の配線導体2の一部を覆ってレジスト層を形成しており、絶縁基板1の下面およびその表面の配線導体2は同じく熱硬化性樹脂から成るレジスト層8で被覆されている。   The wiring board has a through hole 6 formed with a through hole plating conductor for connecting the upper and lower wiring conductors 2 from the upper surface to the lower surface of the wiring board body 3. Is filled with a hole-filling resin 7 made of a thermosetting resin. Further, a part of the hole filling resin 7 covers the upper surface of the insulating substrate 1 and a part of the wiring conductor 2 on the surface thereof to form a resist layer, and the lower surface of the insulating substrate 1 and the wiring conductor 2 on the surface thereof are similarly heated. It is covered with a resist layer 8 made of a curable resin.

そして、この配線基板は、貫通孔C内に露出する金属放熱板5の上面に半導体素子Sを接着剤9を介して搭載するとともに半導体素子Sの電極と配線導体2とをボンディングワイヤWを介して接続した後、貫通孔C内およびその周辺の上面に図示しない封止樹脂を半導体素子SおよびボンディングワイヤWを覆うように被着させることにより製品としての半導体装置となる。   In this wiring board, the semiconductor element S is mounted on the upper surface of the metal heat dissipating plate 5 exposed in the through hole C via the adhesive 9 and the electrode of the semiconductor element S and the wiring conductor 2 are connected via the bonding wire W. After the connection, a sealing resin (not shown) is deposited on the upper surface in and around the through hole C so as to cover the semiconductor element S and the bonding wire W, thereby obtaining a semiconductor device as a product.

ところで、このような配線基板において配線基板本体3に金属放熱板5を接合するには、従来以下のような方法が採用されていた。先ず、図3(a)に示すように、配線基板本体3の複数個分を包含する大きさの母基板10中に、配線基板本体3の複数個を各領域の境界に切断領域Aを介在させて縦横の並びに一体的に配列形成する。次に、図3(b)に示すように、母基板10の切断領域Aをダイシングマシンやルータ等の切断装置を用いて切断除去し、複数の配線基板本体3を個片に分離する。次に、図3(c)に示すように、個片となった配線基板本体3の下面にエポキシ樹脂等の熱硬化性樹脂を含有する接着剤層4を介して銅から成る金属放熱板5を接合する。   By the way, in order to join the metal heat radiating plate 5 to the wiring board body 3 in such a wiring board, the following method has been conventionally employed. First, as shown in FIG. 3A, a plurality of wiring board main bodies 3 are interposed in a mother board 10 having a size including a plurality of wiring board main bodies 3, and a cutting area A is interposed at the boundary of each area. In this way, the array is formed vertically and horizontally. Next, as shown in FIG. 3B, the cutting area A of the mother board 10 is cut and removed by using a cutting device such as a dicing machine or a router to separate the plurality of wiring board main bodies 3 into individual pieces. Next, as shown in FIG. 3 (c), a metal heat radiating plate 5 made of copper is provided on the lower surface of the wiring board main body 3 as a single piece through an adhesive layer 4 containing a thermosetting resin such as an epoxy resin. Join.

このような従来の方法においては、個片となった配線基板本体3に個別に金属放熱板5を接合することから、その製造効率に劣る。そこで、特許文献1には図4(a)に示すように、母基板10中に、配線基板本体3の複数個をこれらの境界に切断領域Aを介在させて縦横の並びに一体的に配列形成した状態で、母基板10の下面に複数個の配線基板3および切断領域Aを同時に覆う大きさの銅板5Pを接着剤層4Pを介して接合し、その後、図4(b)に示すように母基板10の切断領域Aとこれに重なる銅板5Pおよび接着剤層4Pの境界領域をダイシングマシンやルータ等の切断装置を用いて切断除去し、配線基板本体3に金属放熱板5が接着剤層4を介して接合された複数の配線基板を個片に分離する方法が提案されている。   In such a conventional method, since the metal heat sink 5 is individually joined to the wiring board main body 3 which became a piece, its manufacturing efficiency is inferior. Therefore, in Patent Document 1, as shown in FIG. 4 (a), a plurality of wiring board main bodies 3 are formed in a mother board 10 in a vertically and horizontally integrated manner with a cutting region A interposed at the boundary between them. In this state, a copper plate 5P having a size that simultaneously covers the plurality of wiring boards 3 and the cutting area A is bonded to the lower surface of the mother board 10 via the adhesive layer 4P, and then, as shown in FIG. The cutting area A of the mother board 10 and the boundary area between the copper plate 5P and the adhesive layer 4P that overlaps the cutting area A are cut and removed by using a cutting device such as a dicing machine or a router, and the metal heat sink 5 is attached to the wiring board main body 3. A method of separating a plurality of wiring boards joined via 4 into individual pieces has been proposed.

しかしながら、このように母基板10と銅板5Pとが重なった状態で両者を切断すると、切断された銅板5Pにバリや延びが発生するという問題がある。そこで、特許文献2には銅板5Pの切断領域Aに対応する部位に予めスリットを設けておく技術が提案されている。しかしながら、銅板5Pにスリットを設けると、特に銅板5Pが薄い場合には銅板5Pの機械的な強度が低下して銅板5Pに歪みや変形が生じて母基板10に形成された各配線基板本体3と銅板5Pとを正確に位置合わせして接合することが困難となる。さらに、このようにスリットを設ける場合であっても、銅板5Pは例えば各配線基板本体3の角部に対応する部位で繋がっているので、銅板5Pにバリや延びが発生するのを完全には防止できない。
特開平7−3150号公報 特開2006−10098号公報
However, if the mother board 10 and the copper plate 5P overlap with each other in this manner, there is a problem that burrs and elongation occur in the cut copper plate 5P. Therefore, Patent Document 2 proposes a technique in which a slit is provided in advance in a portion corresponding to the cutting region A of the copper plate 5P. However, when a slit is provided in the copper plate 5P, particularly when the copper plate 5P is thin, the mechanical strength of the copper plate 5P is reduced, and the copper plate 5P is distorted or deformed to form each wiring board body 3 formed on the mother board 10. And the copper plate 5P are difficult to accurately align and join. Furthermore, even when the slits are provided in this way, the copper plate 5P is connected at, for example, a portion corresponding to the corner of each wiring board body 3, so that it is completely possible to prevent burrs and elongation from occurring on the copper plate 5P. It cannot be prevented.
Japanese Patent Laid-Open No. 7-3150 JP 2006-10098 A

本発明は、かかる問題点に鑑み案出されたものであり、その課題は、配線基板本体と金属放熱板とを効率よく接合することが可能であるとともに、金属放熱板にバリや延びが発生することがなく、しかも厚みの薄い金属放熱板を備えた薄型の配線基板を製造することが可能な配線基板の製造方法を提供することにある。   The present invention has been devised in view of such problems, and the problem is that it is possible to efficiently join the wiring board body and the metal heat sink, and burrs and stretches occur in the metal heat sink. It is another object of the present invention to provide a method for manufacturing a wiring board that can manufacture a thin wiring board having a thin metal heat sink.

本発明の配線基板の製造方法は、中央部に半導体素子を収容するための貫通孔を有する絶縁基板の上面に前記半導体素子の電極が電気的に接続される配線導体が配設された配線基板本体と、該配線基板本体の下面に前記貫通孔を塞ぐように接合されており、前記貫通孔内に露出する上面に前記半導体素子が搭載される金属放熱板とを有する配線基板の製造方法であって、前記配線基板本体の複数個分を包含する大きさの母基板中に、前記配線基板本体の複数個を該配線基板本体の境界に切断領域を介在させて縦横の並びに一体的に配列形成する工程と、前記母基板の下面に前記配線基板本体および前記切断領域を覆うように前記金属放熱板となる金属箔を接合する工程と、前記金属箔における前記切断領域に対応する領域をエッチング除去する工程と、前記母基板を前記切断領域において切断する工程とを含むことを特徴とするものである。
さらに本発明の配線基板の製造方法は、前記金属箔の前記母基板と接合される側の面が粗化面であることを特徴とするものである。
In the method for manufacturing a wiring board according to the present invention, a wiring board in which a wiring conductor to which an electrode of the semiconductor element is electrically connected is disposed on an upper surface of an insulating substrate having a through hole for accommodating a semiconductor element in the center. A method of manufacturing a wiring board, comprising: a main body; and a metal heat radiating plate that is joined to a lower surface of the wiring board main body so as to close the through hole and on which an upper surface is exposed in the through hole. In the mother board having a size including a plurality of the wiring board main bodies, a plurality of the wiring board main bodies are integrally arranged vertically and horizontally with a cutting region at the boundary of the wiring board main bodies. A step of forming, a step of bonding a metal foil serving as the metal heat sink so as to cover the wiring board main body and the cutting region on the lower surface of the mother substrate, and etching a region corresponding to the cutting region in the metal foil Remove And step is the mother substrate which is characterized in that it comprises a step of cutting in the cutting region.
Furthermore, the method for manufacturing a wiring board according to the present invention is characterized in that a surface of the metal foil to be bonded to the mother substrate is a roughened surface.

本発明の配線基板の製造方法によれば、配線基板本体の複数個がそれらの境界に切断領域を介在させて縦横の並びに一体的に配列形成された母基板の下面に複数個の配線基板本体および切断領域を覆うように金属放熱板となる金属箔を接合し、次に、前記金属箔における前記切断領域に対応する領域をエッチング除去し、次に母基板を前記切断領域において切断することから、配線基板本体と金属放熱板とを効率よく接合することが可能であるとともに、金属放熱板にバリや延びが発生することがなく、しかも厚みの薄い金属放熱板を備えた薄型の配線基板を製造することが可能な配線基板の製造方法を提供することができる。   According to the method for manufacturing a wiring board of the present invention, a plurality of wiring board bodies are formed on the lower surface of the mother board in which a plurality of wiring board bodies are integrally formed vertically and horizontally with a cutting region at the boundary between them. And joining a metal foil to be a metal heat sink so as to cover the cutting region, then etching away the region corresponding to the cutting region in the metal foil, and then cutting the mother substrate in the cutting region A thin wiring board that can efficiently join the wiring board body and the metal heat sink, is free from burrs and stretches, and has a thin metal heat sink. A method of manufacturing a wiring board that can be manufactured can be provided.

さらに、前記金属箔の前記母基板と接合される側の面が粗化面である場合には、金属放熱板と半導体素子とを強固に密着させることができるという利点がある。   Furthermore, when the surface of the metal foil to be bonded to the mother substrate is a roughened surface, there is an advantage that the metal heat sink and the semiconductor element can be firmly adhered.

次に、本発明の配線基板の製造方法を図1(a)〜(d)に基づいて詳細に説明する。これらの図は本発明の配線基板の製造方法を説明するための工程毎の概略断面図であり、これらの工程を経て図2に示した配線基板が製造される。なお、図中、1aは絶縁板、1bは絶縁層であり、これらにより絶縁基板1が形成される。また、2aは内層配線導体層、2bは表層配線導体層であり、これらにより配線導体2の一部が形成される。3は配線基板本体、4は接着剤層、4Pは接着剤層4用の接着剤シート、5は金属放熱板、5Pは金属放熱板5用の銅箔、6はスルーホール、7は孔埋め樹脂、8はレジスト層、Aは切断領域、Cは半導体素子を収容するための貫通孔である。   Next, the manufacturing method of the wiring board of this invention is demonstrated in detail based on Fig.1 (a)-(d). These drawings are schematic cross-sectional views for each process for explaining the method for manufacturing a wiring board of the present invention, and the wiring board shown in FIG. 2 is manufactured through these processes. In the figure, reference numeral 1a denotes an insulating plate and 1b denotes an insulating layer, which form the insulating substrate 1. Further, 2a is an inner wiring conductor layer, and 2b is a surface wiring conductor layer, and a part of the wiring conductor 2 is formed by these. 3 is a wiring board body, 4 is an adhesive layer, 4P is an adhesive sheet for the adhesive layer 4, 5 is a metal heat sink, 5P is a copper foil for the metal heat sink 5, 6 is a through hole, and 7 is a hole filling Resin, 8 is a resist layer, A is a cutting region, and C is a through hole for accommodating a semiconductor element.

先ず、図1(a)に示すように、配線基板本体3の複数個がこれらの境界に切断領域Aを介在させて縦横の並びに一体的に配列形成された母基板10と未硬化の接着剤層4用の接着剤シート4Pと放熱金属板5用の銅箔5Pとを準備する。   First, as shown in FIG. 1 (a), an uncured adhesive and a mother board 10 in which a plurality of wiring board main bodies 3 are integrally arranged vertically and horizontally with a cutting region A interposed therebetween. An adhesive sheet 4P for the layer 4 and a copper foil 5P for the heat radiating metal plate 5 are prepared.

母基板10は、例えばガラスクロス基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた厚みが0.06〜1.40mmの絶縁板1aの両面に、厚みが7〜35μm銅箔から成る内層配線導体層2aと、ガラスクロス基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた厚みが0.02〜0.15mmの絶縁層1bと、厚みが3〜35μmの銅箔および厚みが10〜70μmの銅めっきから成る表層配線導体層2bが順次積層された縦横が500〜600mm程度の大型の積層基板であり、各配線基板本体3には半導体素子を収容するための貫通孔Cおよびスルーホール6が穿孔されており、さらに貫通孔Cの内壁およびスルーホール6内壁には上下の配線導体2の所定のもの同士を電気的に接続するための厚みが10〜70μmの銅めっきから成る導体層が被着されている。また、各配線基板本体3の上面には上面の配線導体2の一部を覆うとともにスルーホール6の内部を充填するエポキシ樹脂等の熱硬化性樹脂から成る孔埋め樹脂7が被着されており、各配線基板本体3の下面には、下面の配線導体2を覆うエポキシ樹脂等の熱硬化性樹脂から成るレジスト層8が被着されている。   The mother substrate 10 has a thickness of 7 to 35 μm on both surfaces of an insulating plate 1a having a thickness of 0.06 to 1.40 mm, for example, a glass cloth base material impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. An inner wiring conductor layer 2a made of copper foil, an insulating layer 1b having a thickness of 0.02 to 0.15 mm obtained by impregnating a glass cloth base material with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin, and a thickness A surface layer wiring conductor layer 2b composed of a copper foil having a thickness of 3 to 35 μm and a copper plating having a thickness of 10 to 70 μm is sequentially laminated, and is a large laminated substrate having a length and width of about 500 to 600 mm. Through holes C and through holes 6 are received, and the inner walls of the through holes C and the inner walls of the through holes 6 have predetermined upper and lower wiring conductors 2 each other. Conductor layer thickness for electrical connection is made of copper plating of 10~70μm is adhered. Further, a hole-filling resin 7 made of a thermosetting resin such as an epoxy resin that covers a part of the wiring conductor 2 on the upper surface and fills the inside of the through hole 6 is attached to the upper surface of each wiring board body 3. A resist layer 8 made of a thermosetting resin such as an epoxy resin that covers the wiring conductor 2 on the lower surface is attached to the lower surface of each wiring board body 3.

このような母基板10は、ガラスクロス基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂を含浸させた厚みが0.06〜1.40mmの絶縁板1aの両面全面に内層配線導体層2a用の厚みが7〜35μmの銅箔が貼着された両面銅張板における前記銅箔を内層配線導体層2aに対応する所定のパターンにエッチングし、次にこの内層配線導体層2aが形成された両面銅張板の両面に、ガラスクロス基材にエポキシ樹脂やビスマレイミドトリアジン樹脂等の熱硬化性樹脂成分を含浸させた絶縁層1b用の厚みが0.02〜0.15mmの未硬化の絶縁シート(プリプレグ)および表層配線導体層2b用の厚みが3〜35μmの銅箔を積層するとともに、これらをプレス装置により加圧しながら加熱して絶縁層1b用の絶縁シートを熱硬化させて母基板10用の積層体を形成し、次にこの積層体に貫通孔Cおよびスルーホール6をルータやドリルマシン等の切削装置を用いて穿孔し、次に貫通孔Cの内壁およびスルーホール6の内壁ならびに表層配線導体層2b用の銅箔の表面に無電解銅めっきおよび電解銅めっきを施すとともに所謂半田剥離法により表層配線導体層2bおよびスルホール導体を形成し、さらに孔埋め樹脂7およびレジスト層8を被着させることにより形成される。なお、孔埋め樹脂7は、アクリル変性エポキシ樹脂等の感光性を有する熱硬化性樹脂成分を含有する樹脂ペーストを上面側の絶縁層1bおよび表層配線導体層2bの上にスルーホール6を充填するようにして塗布するとともにこれを所定のパターンに露光および現像することにより形成される。また、レジスト層8は、同じくアクリル変性エポキシ樹脂等の感光性を有する熱硬化性樹脂成分を含有する樹脂ペーストを下面側の絶縁層1bおよび表層配線導体層2bの上に塗布するとともにこれを所定のパターンに露光および現像することにより形成される。   Such a mother substrate 10 has an inner-layer wiring conductor on both surfaces of an insulating plate 1a having a thickness of 0.06 to 1.40 mm in which a glass cloth base material is impregnated with a thermosetting resin such as an epoxy resin or a bismaleimide triazine resin. The copper foil in the double-sided copper-clad board to which a copper foil having a thickness of 7 to 35 μm for the layer 2a is adhered is etched into a predetermined pattern corresponding to the inner wiring conductor layer 2a, and then the inner wiring conductor layer 2a is A thickness of 0.02 to 0.15 mm for an insulating layer 1b in which a glass cloth base material is impregnated with a thermosetting resin component such as an epoxy resin or a bismaleimide triazine resin on both sides of the formed double-sided copper-clad plate Laminated insulating sheets (prepregs) and copper foils having a thickness of 3 to 35 μm for the surface wiring conductor layer 2b are laminated and heated while being pressed by a press device to insulate the insulating layer 1b. The sheet is thermally cured to form a laminated body for the mother substrate 10, and then through holes C and through holes 6 are drilled in the laminated body using a cutting device such as a router or a drill machine, and then the through holes C are formed. Electroless copper plating and electrolytic copper plating are applied to the inner wall of the through hole 6 and the inner wall of the through hole 6 and the surface of the copper foil for the surface wiring conductor layer 2b, and the surface wiring conductor layer 2b and the through hole conductor are formed by a so-called solder peeling method. It is formed by depositing hole filling resin 7 and resist layer 8. The hole-filling resin 7 fills the through-hole 6 with a resin paste containing a thermosetting resin component having photosensitivity such as an acrylic-modified epoxy resin on the insulating layer 1b and the surface wiring conductor layer 2b on the upper surface side. In this way, it is formed by applying and exposing to a predetermined pattern and developing. The resist layer 8 is also applied to a resin paste containing a thermosetting resin component having photosensitivity, such as an acrylic-modified epoxy resin, on the insulating layer 1b and the surface wiring conductor layer 2b on the lower surface side. This pattern is formed by exposure and development.

また、接着剤シート4Pは、エポキシ樹脂等の熱硬化性樹脂の未硬化組成物を厚みが60〜150μm程度のシート状に成形するとともに乾燥または半硬化させたものであり、接着剤シートとして市販されているものを利用することができる。なお、接着剤シート4Pは、母基板10における貫通孔Cに対応する部分を打抜き加工により打抜いておく。   The adhesive sheet 4P is obtained by molding an uncured composition of a thermosetting resin such as an epoxy resin into a sheet having a thickness of about 60 to 150 μm and drying or semi-curing it, and is commercially available as an adhesive sheet. Can be used. Note that the adhesive sheet 4P is punched by punching a portion corresponding to the through hole C in the mother board 10.

また、銅箔5Pは、厚みが75〜300μm程度の電解銅箔または圧延銅箔から成り、その一方の主面が算術平均粗さRaでRa=0.3〜1.8μm程度に粗化されているとともにその表面が厚み1〜20μmのニッケルめっきで被覆されていることが好ましい。また、母基板10の切断領域Aに対応する部分にスリット等は形成されておらず、そのため厚みが75〜300μm程度と薄いにも拘わらず歪みや変形が生じ難くなっている。   Further, the copper foil 5P is made of an electrolytic copper foil or a rolled copper foil having a thickness of about 75 to 300 μm, and one main surface thereof is roughened to an arithmetic average roughness Ra of Ra = 0.3 to 1.8 μm. It is preferable that the surface is covered with nickel plating having a thickness of 1 to 20 μm. Further, no slit or the like is formed in the portion corresponding to the cutting area A of the mother substrate 10, and therefore, distortion and deformation are hardly caused even though the thickness is as thin as about 75 to 300 μm.

次に図1(b)に示すように、母基板10の下面に銅箔5Pを接着剤シート4Pを介して接合する。母基板10の下面に銅箔5Pを接着剤シート4Pを介して接合するには、母基板10の下面に未硬化または半硬化の接着剤シート4Pと銅箔5Pとを重ね、これらをプレス装置により加圧しながら加熱して接着剤シート4Pを熱硬化させる方法が採用される。このとき、金属放熱板5用の銅箔5Pは、多数の配線基板本体3に同時に接合されることからその作業が極めて簡便なものとなる。したがって、多数の配線基板を極めて効率よく製造することができる。また、銅箔5Pは、スリット等が加工されておらず、母基板10との接合の際に歪みや変形が発生し難い。したがって厚みが75〜300μmと薄いにも拘わらず、母基板10と良好に接合することができ、その結果、薄型の配線基板を提供することができる。なお、銅箔5Pの粗化された面を母基板10側にして接合することにより銅箔5Pと母基板10とを接着剤シート4Pを介して強固に接合することができるとともに、銅箔5Pから形成される金属放熱板5と半導体素子Sとを極めて強固に接合することが可能となる。したがって、銅箔5Pの粗化された面を母基板10側にして接合することが好ましい。   Next, as shown in FIG.1 (b), the copper foil 5P is joined to the lower surface of the motherboard 10 via the adhesive sheet 4P. In order to bond the copper foil 5P to the lower surface of the mother substrate 10 via the adhesive sheet 4P, the uncured or semi-cured adhesive sheet 4P and the copper foil 5P are stacked on the lower surface of the mother substrate 10, and these are pressed. A method is employed in which the adhesive sheet 4P is thermally cured by heating while being pressurized. At this time, the copper foil 5P for the metal heat radiating plate 5 is joined to a large number of wiring board bodies 3 at the same time, so that the operation becomes extremely simple. Therefore, a large number of wiring boards can be manufactured extremely efficiently. In addition, the copper foil 5P is not processed with slits or the like, and is less likely to be distorted or deformed when bonded to the mother board 10. Therefore, although it is as thin as 75 to 300 μm, it can be satisfactorily bonded to the mother board 10, and as a result, a thin wiring board can be provided. The copper foil 5P and the mother board 10 can be firmly bonded via the adhesive sheet 4P by bonding the roughened surface of the copper foil 5P to the mother board 10 side, and the copper foil 5P. It is possible to bond the metal heat sink 5 and the semiconductor element S, which are formed from the above, extremely firmly. Therefore, it is preferable to bond the roughened surface of the copper foil 5P with the mother substrate 10 side.

次に、図1(c)に示すように、銅箔5Pの切断領域Aに対応する部位を切断領域Aよりも若干広い幅でエッチング除去して各配線基板本体3の下面にそれぞれが独立した金属放熱板5を形成する。銅箔5Pの切断領域Aに対応する部位をエッチング除去するには、母基板10の上面全面をエッチングレジストで保護するとともに銅箔5Pの下面に母基板10の切断領域Aに対応する部分を露出させるエッチングレジストを被着形成し、しかる後、塩化第二鉄や塩化第二銅等を含む市販の銅エッチング液によりエッチングレジストから露出する銅箔5Pをエッチングすればよい。なお、エッチングレジストは、銅箔5aのエッチング後に水酸化ナトリウム等を含む市販のレジスト剥離液を用いて剥離して除去する。   Next, as shown in FIG. 1 (c), the part corresponding to the cutting area A of the copper foil 5P is removed by etching with a width slightly wider than the cutting area A, and each of them is independent on the lower surface of each wiring board body 3. A metal heat sink 5 is formed. In order to etch away the portion corresponding to the cut region A of the copper foil 5P, the entire upper surface of the mother substrate 10 is protected with an etching resist, and the portion corresponding to the cut region A of the mother substrate 10 is exposed on the lower surface of the copper foil 5P. The copper foil 5P exposed from the etching resist may be etched with a commercially available copper etching solution containing ferric chloride or cupric chloride. The etching resist is stripped and removed using a commercially available resist stripping solution containing sodium hydroxide after etching the copper foil 5a.

次に、図1(d)に示すように、母基板10を切断領域Aにおいて切断し、個片の配線基板本体3の下面に個片の金属放熱板5が接合された多数の配線基板が同時集約的に製作される。このとき、母基板10の切断領域Aに対応する部位の銅箔5Pはエッチングにより除去されているので、母基板10を切断領域Aにおいて切断しても金属放熱板5にバリや延びが発生することは一切ない。したがって、本発明の配線基板の製造方法によれば、配線基板本体と金属放熱板とを効率よく接合することが可能であるとともに、金属放熱板にバリや延びが発生することがなく、しかも厚みの薄い金属放熱板を備えた薄型の配線基板を製造することが可能である。   Next, as shown in FIG. 1 (d), a large number of wiring boards in which the mother board 10 is cut in the cutting area A and the individual metal heat sinks 5 are joined to the lower surface of the individual wiring board main body 3. Produced simultaneously and intensively. At this time, since the copper foil 5P at the portion corresponding to the cutting area A of the mother board 10 is removed by etching, even if the mother board 10 is cut in the cutting area A, the metal heat radiating plate 5 is burred or extended. There is nothing at all. Therefore, according to the method for manufacturing a wiring board of the present invention, it is possible to efficiently join the wiring board body and the metal heat sink, and the metal heat sink does not generate burrs or stretches, and has a thickness. It is possible to manufacture a thin wiring board provided with a thin metal heat sink.

(a)〜(d)は、本発明の配線基板の製造方法を説明するための工程毎の概略断面図である。(A)-(d) is a schematic sectional drawing for every process for demonstrating the manufacturing method of the wiring board of this invention. 従来および本発明の製造方法により製造される配線基板の概略断面図である。It is a schematic sectional drawing of the wiring board manufactured by the manufacturing method of the past and this invention. (a)〜(c)は、従来の配線基板の製造方法を説明するための工程毎の概略断面図である。(A)-(c) is a schematic sectional drawing for every process for demonstrating the manufacturing method of the conventional wiring board. (a)および(b)は、従来の配線基板のさらに別の製造方法を説明するための工程毎の概略断面図である。(A) And (b) is a schematic sectional drawing for every process for demonstrating another manufacturing method of the conventional wiring board.

符号の説明Explanation of symbols

1:絶縁基板
1a:絶縁基板1を形成するための絶縁板
1b:絶縁基板1を形成するための絶縁層
2:配線導体
2a:配線導体2を形成する内層配線導体層
2b:配線導体2を形成する表層配線導体層
3:配線基板本体
4:接着剤層
4P:接着剤層4を形成するための接着剤シート
5:金属放熱板
5P:金属放熱板5を形成するための銅箔
10:母基板
A:切断領域
C:半導体素子を収容するための貫通孔
S:半導体素子
1: Insulating substrate 1a: Insulating plate 1b for forming insulating substrate 1: Insulating layer 2 for forming insulating substrate 1: Wiring conductor 2a: Inner layer wiring conductor layer 2b for forming wiring conductor 2: Wiring conductor 2 Surface wiring conductor layer 3 to be formed: Wiring board body 4: Adhesive layer 4P: Adhesive sheet 5 for forming the adhesive layer 4: Metal heat sink 5P: Copper foil 10 for forming the metal heat sink 5: Mother board A: Cutting region C: Through hole S for accommodating semiconductor element S: Semiconductor element

Claims (2)

中央部に半導体素子を収容するための貫通孔を有する絶縁基板の上面に前記半導体素子の電極が電気的に接続される配線導体が配設された配線基板本体と、該配線基板本体の下面に前記貫通孔を塞ぐように接合されており、前記貫通孔内に露出する上面に前記半導体素子が搭載される金属放熱板とを有する配線基板の製造方法であって、前記配線基板本体の複数個分を包含する大きさの母基板中に、前記配線基板本体の複数個を該配線基板本体の境界に切断領域を介在させて縦横の並びに一体的に配列形成する工程と、前記母基板の下面に前記複数個の配線基板本体および前記切断領域を覆うように前記金属放熱板となる金属箔を接合する工程と、前記金属箔における前記切断領域に対応する領域をエッチング除去する工程と、前記母基板を前記切断領域において切断する工程とを含むことを特徴とする配線基板の製造方法。   A wiring board body in which a wiring conductor to which an electrode of the semiconductor element is electrically connected is disposed on an upper surface of an insulating substrate having a through hole for accommodating a semiconductor element in the center, and a lower surface of the wiring board body A method of manufacturing a wiring board, which is joined so as to close the through-hole, and has a metal heat dissipating plate on which the semiconductor element is mounted on an upper surface exposed in the through-hole. Forming a plurality of wiring board main bodies in a matrix including a plurality of wiring board bodies in a vertical and horizontal arrangement with a cutting region at the boundary of the wiring board main bodies, and a lower surface of the mother board. Bonding a metal foil serving as the metal heat sink so as to cover the plurality of wiring board main bodies and the cutting region, etching and removing a region corresponding to the cutting region in the metal foil, and the mother Board Method for manufacturing a wiring board, which comprises a step of cutting the serial cutting region. 前記金属箔の前記母基板と接合される側の面が粗化面であることを特徴とする請求項1記載の配線基板の製造方法。   2. The method for manufacturing a wiring board according to claim 1, wherein a surface of the metal foil to be bonded to the mother substrate is a roughened surface.
JP2008114405A 2008-04-24 2008-04-24 Method of manufacturing wiring board Pending JP2009267061A (en)

Priority Applications (1)

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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111954372A (en) * 2019-05-17 2020-11-17 株式会社电装 Electronic device
CN116454059A (en) * 2023-06-09 2023-07-18 尚睿微电子(上海)有限公司 Method for forming substrate and packaging structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111954372A (en) * 2019-05-17 2020-11-17 株式会社电装 Electronic device
CN116454059A (en) * 2023-06-09 2023-07-18 尚睿微电子(上海)有限公司 Method for forming substrate and packaging structure
CN116454059B (en) * 2023-06-09 2023-09-08 尚睿微电子(上海)有限公司 Method for forming substrate and packaging structure

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