JP2016048768A - Wiring board and manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring board which inhibits warpage occurring in the manufacturing process and packaging process of the wiring board, and to provide a manufacturing method of a semiconductor device.SOLUTION: A reinforcement substrate 9 is provided on a substrate part of a lamination body 600 provided with the substrate part in which a given number of insulation layers and wiring layers are provided on a support substrate. Subsequently, the support substrate is removed to obtain a wiring board.SELECTED DRAWING: Figure 11

Description

  The present invention relates to a wiring board and a method for manufacturing a semiconductor device.

  2. Description of the Related Art In recent years, electronic devices such as portable information communication device terminals have been rapidly reduced in size and functionality, and a thin and highly functional semiconductor device is required. If the wiring board used in the semiconductor device is thinned, it is directly connected to the thinning of the semiconductor device, and the conductor path length in the wiring board can be shortened, which is advantageous for high functionality. Therefore, it is required to make the wiring board as thin as possible.

  For example, a multilayer wiring board formed by a build-up method, which is being widely used as a substrate for increasing the density and thickness of a wiring board, has conventionally been a method of repeatedly laminating an insulating layer and a wiring layer on a core substrate. Has been manufactured by. However, a multilayer wiring board from which the core substrate is removed has been studied in response to the demand for thinning as described above.

  However, when the wiring board is thinned, the rigidity is reduced accordingly, and thus a problem arises in that warpage generated in the manufacturing process of the wiring board increases. As a result, positional accuracy such as wiring processing and various drilling operations during the manufacture of the wiring board may be deteriorated, and it becomes difficult to manufacture the wiring board with a high yield. Further, when the wiring board is warped, it is difficult to flip-chip the semiconductor chip, which adversely affects the productivity of the semiconductor device.

  In order to solve this problem, a method of making a thin wiring board on a support substrate and finally removing the support substrate is known. In addition, a method of mounting a semiconductor chip before removing the support substrate has been proposed. (Patent Document 1)

Japanese Patent No. 4866268

  However, in the method described in Patent Document 1, when a thinner wiring board is manufactured, warping may occur in a process (for example, a mounting process) after the wiring member is separated from the temporary substrate.

  In order to reduce warpage in the mounting process, it may be possible to mount a semiconductor chip with a temporary substrate provided, but it is necessary to mount the semiconductor chip on both sides, and there is a special method for fixing a wiring board when mounting. There is a problem with productivity because it is necessary.

  An object of the present invention is to provide a method for manufacturing a wiring board and a semiconductor device capable of suppressing warpage of the manufacturing process and the mounting process of the wiring board.

  As a result of investigations to solve the above problems, the present inventors have found that the following problems can be solved by the present invention.

[1] A method for producing a wiring board, comprising the following steps 1 to 3.
Step 1: Providing a substrate portion having an arbitrary number of insulating layers and wiring layers on at least one surface on the support substrate Step 2: Providing a reinforcing substrate on the substrate portion Step 3: Providing the support substrate Step to remove
[2] The method for manufacturing a wiring board according to [1], wherein a base layer is provided on at least one surface of the support substrate in the step 1.

  [3] The method for manufacturing a wiring board according to [1] or [2], wherein the size of the base layer is smaller than the size of the support substrate and the substrate portion.

  [4] The method for manufacturing a wiring board according to any one of [1] to [3], wherein in the step 1, substrate portions are provided on both surfaces of the support substrate.

[5] The method for manufacturing a wiring board according to any one of [1] to [3], further comprising the following steps 4 and 5.
Step 4: Step of forming a solder resist layer having an opening in the outermost layer of the substrate portion Step 5: Step of plating or prefluxing the opening
[6] The method for manufacturing a wiring board according to any one of [1] to [5], wherein a coefficient of thermal expansion of the insulating layer excluding the solder resist layer of the substrate portion increases as it approaches the support substrate.

  [7] The method for manufacturing a wiring board according to any one of [1] to [6], wherein a coefficient of thermal expansion of the solder resist layer of the substrate portion increases as the distance from the support substrate increases.

  [8] The method for manufacturing a wiring board according to any one of [1] to [7], wherein the support substrate is a substrate obtained by curing a composite material containing glass cloth and a thermosetting resin.

  [9] The method for manufacturing a wiring board according to any one of [1] to [8], wherein the reinforcing substrate has an adhesive layer and a core base material.

  [10] The method for manufacturing a wiring board according to [9], wherein the adhesive layer is a composite material containing glass cloth and a thermosetting resin.

  [11] The method for manufacturing a wiring board according to [9] or [10], wherein the core base material is a substrate formed by curing a composite material containing glass cloth and a thermosetting resin.

  [12] The method for manufacturing a wiring board according to any one of [1] to [11], wherein the support substrate is thicker than the substrate portion.

  [13] The method for manufacturing a wiring board according to any one of [1] to [12], wherein the reinforcing substrate is thicker than a thickness of the substrate portion.

  [14] A method for manufacturing a semiconductor device, using the method for manufacturing a wiring board according to any one of [1] to [13].

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of a wiring board and a semiconductor device which can suppress the curvature of the manufacturing process and mounting process of a wiring board can be provided.

FIG. 1 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 2 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 3 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 4 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 5 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 6 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 7 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 8 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 9 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 10 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 12 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 13 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 14 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 15 is a cross-sectional view showing an example of a method for manufacturing a wiring board according to the present invention. FIG. 16 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device of the present invention. FIG. 17 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device of the present invention. FIG. 18 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device of the present invention. FIG. 19 is a cross-sectional view showing an example of a method for manufacturing a semiconductor device of the present invention.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the following description, the same or corresponding parts are denoted by the same reference numerals, and redundant description is omitted. Further, the positional relationship such as up, down, left and right is based on the positional relationship shown in the drawings unless otherwise specified. Further, the dimensional ratios in the drawings are not limited to the illustrated ratios.

  In the method for manufacturing a wiring board and a semiconductor device according to the present invention, as shown in FIG. 1, first, a cured FR-4 base material having a thickness of 1 mm is prepared as a support substrate 1.

  As the support substrate 1, various types of plates such as an organic substrate and a metal plate can be used. Although there is no particular limitation, a composite material (prepreg) containing a glass cloth and a thermosetting resin is cured. It is preferable to use a substrate or a metal-clad laminate in which metal foil is disposed on both sides of the substrate.

  Although it does not restrict | limit especially as a thermosetting resin used for the composite material (prepreg) containing a glass cloth and a thermosetting resin, For example, an epoxy resin, a phenol resin, unsaturated imide resin, cyanate resin , Isocyanate resin, benzoxazine resin, oxetane resin, amino resin, unsaturated polyester resin, allyl resin, dicyclopentadiene resin, silicone resin, triazine resin, melamine resin and the like. These may be used alone or in combination of two or more.

  Among these, it is preferable to contain an epoxy resin from the point that the support substrate 1 excellent in strength, chemical resistance, and workability can be obtained.

  Although it does not restrict | limit especially as thickness of the support substrate 1, It is preferable that it is thicker than the thickness of a board | substrate part, and it is more preferable that it is 2000 micrometers or less. When the thickness of the support substrate 1 is thicker than the thickness of the substrate portion, the warp of the substrate portion tends to be sufficiently suppressed. Further, when the thickness of the support substrate 1 is 2000 μm or less, the handleability tends to be good in the wiring board manufacturing process.

Thereafter, as shown in FIG. 2, a copper foil having a thickness of 3 μm is prepared as the base layer 2 and the wiring layer 3a, and a semi-cured resin film having a thickness of 10 μm is prepared as the insulating layer 4a.
As the underlayer 2, for example, a metal foil such as a copper foil, a release film, or a release agent is used. As the release film, a polyester or PET (polyethylene terephthalate) film laminated with a thin fluororesin (ETFE) layer, or a polyester or PET film surface subjected to silicone release treatment is used. As the release agent, a silicone release agent or a fluorine release agent is used.

  The wiring layer 3a is not particularly limited, and for example, a metal foil such as a copper foil, a conductive material using a metal such as copper, nickel, silver, and an organic compound, or the like can be used. Further, the wiring layer 3a can be formed by a method such as a subtractive method or a semi-additive method.

  Although there is no restriction | limiting in particular as thickness of the wiring layer 3a, It is preferable that it is 1-12 micrometers in thickness. When the thickness of the wiring layer 3a is 1 μm or more, good conductivity tends to be obtained, and when it is 12 μm or less, the wiring layer tends to be embedded by the insulating layer.

  Although it does not restrict | limit especially as the insulating layer 4a, For example, insulating materials, such as a semi-hardened resin film, a semi-hardened prepreg, and a semi-hardened buildup material, can be used. The thickness of the insulating layer 4a is not particularly limited, but is preferably 5 to 50 μm, for example. When the thickness of the insulating layer 4a is 5 μm or more, good insulation tends to be obtained, and when it is 50 μm or less, the wiring board tends to be thinned.

  Each insulating layer of the present invention may form a via hole, a through hole or the like using a laser or the like. Further, after the formation of the via hole, treatment may be performed using a chemical solution such as a desmear solution or a developer as necessary.

  The size of the base layer 2 is preferably smaller than the size of the support substrate 1, each wiring layer, and each insulating layer.

  As shown in FIG. 2, the base layer 2, the insulating layer 4 a, and the wiring layer 3 a are laminated on both surfaces of the support substrate 1 in order from the bottom. Then, the laminated body 100 which has the board | substrate part 101 shown in FIG. 3 is obtained by heat-pressing with a press. The board | substrate part of this invention has an insulating layer and wiring layer of arbitrary layers. The substrate portion corresponds to the wiring board of the present invention.

  In the embodiment shown in FIG. 3, the size of the base layer 2 is set smaller than the sizes of the support substrate 1, the wiring layer 3a, and the insulating layer 4a. Therefore, the support substrate 1 and the insulating layer 4a are bonded together at the outer peripheral portion of the base layer 2. Further, since the support substrate 1 and the base layer 2 (copper foil) are not bonded, the support substrate 1 can be easily removed by cutting off the portion corresponding to the periphery of the base layer 2 or the inside thereof later.

  Next, as illustrated in FIG. 4, the multilayer body 200 is obtained by wiring the wiring layer 3 a by a subtractive method. Each wiring layer of the present invention is not particularly limited, and may be formed by a method such as a semi-additive method.

  Subsequently, as shown in FIG. 5, a 10 μm semi-cured resin film is prepared as the insulating layer 4b, and a 3 μm copper foil is prepared as the wiring layer 3b. And the insulating layer 4b and the wiring layer 3b are laminated | stacked in order from the bottom on both surfaces of the laminated body 200, respectively. Then, the laminated body 300 which has the board | substrate part 301 shown in FIG. 6 can be obtained by heat-pressing with a press.

  Next, as illustrated in FIG. 7, the wiring body 3 b is processed by a subtractive method to obtain a stacked body 400 having a substrate portion 401.

  Here, the relationship between the thermal expansion coefficients of the insulating layer 4a and the insulating layer 4b is preferably such that the insulating layer 4a> the insulating layer 4b. By doing so, warpage when a semiconductor device is manufactured tends to be suppressed. This is because the warpage of the semiconductor device has a convex shape with the semiconductor chip facing upward at room temperature mainly due to the difference in thermal expansion coefficient between the semiconductor chip and the wiring board, but the insulating layer on the support substrate side has a high thermal expansion. It is considered that the wiring board itself tends to warp in the opposite direction to the semiconductor device.

  In the embodiment shown in FIG. 7, the insulating layers and the wiring layers are alternately stacked in two stages. However, the number of stacked layers is not particularly limited, and the insulating layers and the wiring layers are not alternately stacked. Also good.

  Next, as shown in FIG. 8, a solder resist layer 5 a is formed on both sides of the laminate 400 using a photo-curable film resist having a thickness of 10 μm through an exposure and development process. By providing, the laminated body 500 which has the board | substrate part 501 is obtained. The method for forming each solder resist layer of the present invention is not particularly limited. For example, a liquid type solder resist may be applied.

  Each solder resist layer of the present invention means an insulating layer which is arranged on the outermost layer of the substrate portion and has an opening for obtaining electrical connection with a semiconductor chip or a mounting substrate. Various solder resists can be applied as the solder resist layer, and there is no particular limitation. However, a photocuring type that obtains an opening by exposure and development processes is widely used, and the cost is reduced. This is preferable because it can be suppressed.

  The thickness of each solder resist layer of the present invention is not particularly limited, however, for example, a thickness of 5 to 25 μm is preferable because the wiring layer can be easily embedded and can be thinned.

  Subsequently, as shown in FIG. 9, an opening is provided in the solder resist layer 5a through an exposure and development process. The method for forming the opening is not particularly limited, and for example, the opening may be formed by laser processing. Furthermore, the wiring layer 3b exposed at the opening of the solder resist layer 5a was subjected to electroless nickel plating and electroless gold plating to provide an electrode portion 6a.

  The said plating process means the noble metal plating process performed to the opening part of a soldering resist. Various types of plating can be used as the type of plating, and although there is no particular limitation, gold plating is preferably performed on nickel plating from the viewpoint of preventing corrosion of the pad metal.

  Further, a preflux treatment may be performed. The preflux treatment means a flux treatment applied to the electrode part. Various types of flux can be used as the type of flux, and there is no particular limitation. However, a treatment method using a material suitable for so-called OSP (Organic Solderability Preservative) treatment is suitable for corrosion prevention and stability over time of the electrode part. It is preferable because it is excellent.

  Next, in the embodiment shown in FIG. 10, after the release treatment is performed on the surface of the outermost layer of the laminated body 600, a 60 μm semi-cured FR− is formed as an adhesive layer 7 on both sides of the laminated body 600 sequentially from the bottom. 5 base materials (prepreg) are used as the core base material 8 and a 1 mm hardened FR-5 base material is respectively disposed, and the adhesive layer 7 and the core base material 8 are bonded to the substrate portion 601 by a press. A laminated body 700 in which a reinforcing substrate 9 having an adhesive layer 7 and a core base material 8 is provided on both sides of the laminated body 600 as shown in FIG. There is no restriction | limiting in particular as a mold release process performed on the surface of the outermost layer of the laminated body 600, A fluorine processing, a silicone processing, etc. can be used. As the core base material 8 used for the reinforcing substrate 9, for example, a plate such as an organic substrate or a metal plate can be used. Among these, it is preferable to use the board | substrate formed by hardening | curing the composite material (prepreg) containing a glass cloth and a thermosetting resin. Although it does not restrict | limit especially as a thermosetting resin used for the composite material (prepreg) containing a glass cloth and a thermosetting resin, For example, an epoxy resin, a phenol resin, unsaturated imide resin, cyanate resin , Isocyanate resin, benzoxazine resin, oxetane resin, amino resin, unsaturated polyester resin, allyl resin, dicyclopentadiene resin, silicone resin, triazine resin, melamine resin and the like. These may be used alone or in combination of two or more.

  Among these, it is preferable to contain an epoxy resin from the viewpoint of obtaining a core substrate having excellent strength, chemical resistance, and processability.

  For the adhesive layer 7 of the reinforcing substrate 9, a material such as a semi-cured resin film, a semi-cured prepreg, a semi-cured build-up material, and an adhesive used by applying or pasting to the core substrate 8 is used. be able to. As the adhesive layer 7, a release film or a release agent may be used. When a release film or a release agent is used for the adhesive layer 7, it is not necessary to perform a release treatment on the surface of the outermost layer of the laminate 600. Among these, it is preferable to use a composite material (prepreg) containing a glass cloth and a thermosetting resin for the adhesive layer 7. Although it does not specifically limit as a thermosetting resin used for a prepreg, For example, the thermosetting resin etc. which were illustrated by description of the above-mentioned core base material can be used.

  The thickness of the reinforcing substrate 9 is not particularly limited, but the reinforcing substrate 9 is preferably thicker than the substrate portion to be finally produced from the viewpoint of suppressing warpage, and is 2000 μm or less. It is more preferable. When the thickness of the reinforcing substrate 9 is thicker than the thickness of the substrate portion, the warp of the substrate portion tends to be sufficiently suppressed. Further, when the thickness of the reinforcing substrate 9 is 2000 μm or less, the handleability tends to be improved in the wiring board manufacturing process. When a prepreg is used for the adhesive layer 7, the thickness of the prepreg is preferably 40 μm or more from the viewpoint of embedding the irregularities of the substrate portion.

  Next, as shown in FIG. 12, the part corresponding to the periphery of the base layer 2 is cut. Thereby, as shown in FIG. 12, since the part to which the support substrate 1 and the insulating layer 4a were bonded is cut | disconnected, the support substrate 1 and the base layer 2 can be isolate | separated.

  Subsequently, as illustrated in FIG. 13, the base layer 2 is subjected to wiring processing by a subtractive method, whereby a stacked body 800 is obtained. Next, as shown in FIG. 14, a solder resist layer is used by using a film-type solder resist having a photocurable property in which openings are obtained by an exposure and development process having a thickness of 10 μm on the base layer 2 of the laminate 800. 5b is provided.

  Subsequently, as shown in FIG. 15, an opening is provided in the solder resist layer 5b through an exposure and development process. The method for forming the opening is not particularly limited, and for example, the opening may be formed by laser processing. Furthermore, the base layer 2 exposed at the opening of the solder resist layer 5b is subjected to electroless nickel plating and electroless gold plating, thereby obtaining a laminate 900 having the electrode portion 6b. Such plating treatment and preflux treatment are not particularly limited, and may be performed as necessary.

  Here, the relationship between the thermal expansion coefficients of the solder resist layer 5a and the solder resist layer 5b is preferably such that the solder resist layer 5a> the solder resist layer 5b. By doing so, warpage when a semiconductor device is manufactured tends to be suppressed. This is considered to be the same as the mechanism for reducing the warpage of the semiconductor device due to the difference in thermal expansion coefficient of the insulating layer.

  Next, as shown in FIG. 16, the semiconductor chip 11 is mounted on the stacked body 900. Here, the semiconductor chip 11 is flip-chip connected to a chip having a thickness of 60 μm with the element surface facing down. The thickness, mounting surface, mounting number, and mounting method of the semiconductor chip are not particularly limited. As a process for mounting the semiconductor chip, a method using a die bonding film or a die bonding paste, a method using an underfill or a sealing material, and the like can be used, and there is no particular limitation. Further, for example, an adhesive such as a die attach film may be used on the back surface of a semiconductor chip of about 30 μm, and a plurality of chips may be mounted so as to overlap the chips.

  Subsequently, as illustrated in FIG. 17, the sealing material 12 is disposed in order to protect the semiconductor chip 11 or the connection portion of the semiconductor chip 11. In the embodiment shown in FIG. 17, the entire semiconductor chip 11 is covered and the sealing material 12 is sealed by transfer press so that the thickness of the sealing material is 250 μm. The method and the kind of the sealing material are not particularly limited. The thickness of the sealing material is, for example, preferably 150 μm or more and more preferably 250 μm or more so that a thin substrate portion can be supported.

  Next, as shown in FIG. 18, the reinforcing substrate 9 is separated from the substrate portion and removed. Here, as in the embodiment shown in FIG. 10, the mold release process is performed on the surface of the outermost layer of the stacked body 600. Thereby, a reinforcement board | substrate can be isolate | separated from the surface which performed the mold release process.

  Subsequently, as shown in FIG. 19, the semiconductor device 13 can be obtained by dividing into pieces. The method of dividing into pieces is not particularly limited, and can be performed by a method using a blade dicing apparatus, a laser dividing apparatus, a mechanical drill dividing apparatus, or the like.

DESCRIPTION OF SYMBOLS 1 Support substrate 2 Ground layer 3a Wiring layer 3b Wiring layer 4a Insulating layer 4b Insulating layer 5a Solder resist layer 5b Solder resist layer 6a Electrode part 6b Electrode part 7 Adhesive layer 8 Core base material 9 Reinforcing substrate 10 Bump 11 Semiconductor chip 12 Sealing Material 13 Semiconductor device 100 Laminated body 200 Laminated body 300 Laminated body 400 Laminated body 500 Laminated body 600 Laminated body 800 Laminated body 900 Laminated body 101 Substrate part 301 Substrate part 401 Substrate part 501 Substrate part 601 Substrate part

Claims (14)

The manufacturing method of a wiring board which has the following processes 1-3.
Step 1: Providing a substrate portion having an arbitrary number of insulating layers and wiring layers on at least one surface on the support substrate Step 2: Providing a reinforcing substrate on the substrate portion Step 3: Providing the support substrate Step to remove   The method for manufacturing a wiring board according to claim 1, wherein a base layer is provided on at least one surface of the support substrate in the step 1.   The method for manufacturing a wiring board according to claim 1, wherein the size of the base layer is smaller than the sizes of the support substrate and the substrate portion.   The manufacturing method of the wiring board as described in any one of Claims 1-3 which provides a board | substrate part on both surfaces of a support substrate at the said process 1. Furthermore, the manufacturing method of the wiring board as described in any one of Claims 1-4 which has the following processes 4 and 5.
Step 4: Step of forming a solder resist layer having an opening in the outermost layer of the substrate portion Step 5: Step of plating or prefluxing the opening   The manufacturing method of the wiring board as described in any one of Claims 1-5 with which the thermal expansion coefficient of the insulating layer except the soldering resist layer of the said board | substrate part becomes large, so that it is close to a support substrate.   The manufacturing method of the wiring board as described in any one of Claims 1-6 with which the thermal expansion coefficient of the soldering resist layer of the said board | substrate part becomes large, so that it is close to a support substrate.   The method for manufacturing a wiring board according to claim 1, wherein the support substrate is a substrate formed by curing a composite material containing glass cloth and a thermosetting resin.   The method for manufacturing a wiring board according to claim 1, wherein the reinforcing substrate has an adhesive layer and a core base material.   The method for manufacturing a wiring board according to claim 9, wherein the adhesive layer is a composite material containing glass cloth and a thermosetting resin.   The method for manufacturing a wiring board according to claim 9 or 10, wherein the core substrate is a substrate formed by curing a composite material containing glass cloth and a thermosetting resin.   The manufacturing method of the wiring board as described in any one of Claims 1-11 whose thickness of the said support substrate is thicker than the thickness of a board | substrate part.   The manufacturing method of the wiring board as described in any one of Claims 1-12 whose thickness of the said reinforcement board | substrate is thicker than the thickness of a board | substrate part.   The manufacturing method of a semiconductor device using the manufacturing method of the wiring board as described in any one of Claims 1-13.

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